CN101431091A - Image sensor and method for manufacturing the same - Google Patents
Image sensor and method for manufacturing the same Download PDFInfo
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- CN101431091A CN101431091A CNA2008101758209A CN200810175820A CN101431091A CN 101431091 A CN101431091 A CN 101431091A CN A2008101758209 A CNA2008101758209 A CN A2008101758209A CN 200810175820 A CN200810175820 A CN 200810175820A CN 101431091 A CN101431091 A CN 101431091A
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Abstract
An image sensor includes a first substrate having a lower wiring line and electric circuitry formed therein, a bonding layer formed over the first substrate, a second substrate bonded to the first substrate via the bonding layer, a vertical-type photodiode formed in the second substrate, and a contact plug formed in the photodiode and the bonding layer and electrically connected to the lower wiring line.
Description
The application requires the priority of 10-2007-0112172 number (submitting on November 5th, 2007) korean patent application, and its full content is hereby expressly incorporated by reference.
Technical field
The present invention relates to a kind of imageing sensor and manufacture method thereof.
Background technology
Usually, imageing sensor is optical imagery to be converted to the semiconductor device of the signal of telecommunication and mainly to be divided into (CMOS) imageing sensor (CIS) of charge-coupled device (CCD) imageing sensor and complementary metal oxide silicon (complementary metal oxide silicon).Cmos image sensor has photodiode and the MOS transistor that is formed in the unit picture element, and uses method of switching (switching method) to come the signal of telecommunication of sequence detection unit picture element, thereby is embodied as picture.Cmos image sensor can have the structure that photodiode is therein arranged with respect to transistor level.
Though reduced the shortcoming of ccd image sensor by such horizontal CMOS image sensor, horizontal CMOS image sensor still has problem.Particularly, in horizontal CMOS image sensor, photodiode and transistor on the substrate and/or above horizontal tectonics adjacent to each other.Therefore, for photodiode, need extra zone.So,, thereby go wrong because reduce in activity coefficient distributed area (fill factor area) and resolution quality is limited.In addition, in horizontal CMOS image sensor, photodiode and transistorized process are constructed in very difficult optimization simultaneously.In other words, in quick transistor technology (rapid transistor process), low pressure sheet resistance (lowsheet resistance) needs shallow junction, but this shallow junction may be not suitable for photodiode.And, function (on-chip function) on the sheet that horizontal CMOS image sensor may need be added imageing sensor.Therefore,, then must increase the size of unit picture element, perhaps, must reduce to be used for the zone of photodiode in order to keep Pixel Dimensions for the photosensitivity (sensitivity) that keeps imageing sensor.Yet if Pixel Dimensions increases, the resolution of imageing sensor reduces.In addition, because if the zone of photodiode reduces, the photosensitivity of imageing sensor just reduces, so problem has just produced.
Summary of the invention
The embodiment of the invention relates to a kind of imageing sensor and manufacture method thereof, and this imageing sensor and manufacture method thereof provide circuit and photodiode new integrated.
The embodiment of the invention relates to a kind of imageing sensor and manufacture method thereof, in this imageing sensor and manufacture method thereof, and can be simultaneously with resolution and photosensitivity maximization.
The embodiment of the invention relates to a kind of imageing sensor and manufacture method thereof, in this imageing sensor and manufacture method thereof, can avoid the defective in the photodiode when adopting the vertical-type photodiode.
The embodiment of the invention relates to a kind of imageing sensor and manufacture method thereof, and the manufacturing of the imageing sensor of the feasible employing of this imageing sensor and manufacture method thereof vertical-type photodiode is easier.
A kind of imageing sensor according to the embodiment of the invention can comprise in following one of at least: first substrate that has formed bottom wiring (wiring line) and circuit (circuitry) therein; Be formed on first substrate and/or the binder course of top (bonding layer); Crystalline semiconductor layer (crystalline semiconductor layer), this crystalline semiconductor layer is coupled to first substrate when contacting with binder course; Be formed on the photodiode in the crystalline semiconductor layer; And be formed in photodiode and the binder course and be electrically connected to the contact plunger (contact plug) of bottom wiring.
A kind of imageing sensor according to the embodiment of the invention can comprise at least one in following: first substrate has the bottom wiring and the circuit that are formed on wherein; Be formed on the binder course of first substrate top; Link to the crystalline semiconductor layer of first substrate by binder course; Be formed on the vertical-type photodiode in the crystalline semiconductor layer; And be formed in photodiode and the binder course and be electrically connected to the contact plunger of bottom wiring.
A kind of method of the shop drawings image-position sensor according to the embodiment of the invention comprise in following one of at least: preparation has formed first substrate of bottom wiring and circuit therein, on first substrate and/or above form binder course, preparation has formed second substrate of photodiode therein, second substrate is bound up with first substrate so that photodiode is contacted with binder course, and the downside of removing second substrate that is coupled then, thereby expose photodiode.
A kind of method of the shop drawings image-position sensor according to the embodiment of the invention can comprise in following one of at least: first substrate is set, and this first substrate has bottom wiring and the circuit that is formed on wherein; Above first substrate, form binder course; Second substrate is set, and this second substrate has the photodiode that is formed on wherein; Implement to connect technology (bonding process) at binder course and connect (attachment) between second substrate and first substrate, to form; And expose photodiode by removing part second substrate then.
A kind of method according to the embodiment of the invention can comprise in following one of at least: first substrate is set, and this first substrate has bottom wiring and at least one transistor that is formed on wherein; Second substrate is set; In second substrate, form epitaxial loayer; By in second substrate, injecting the at the interface formation hydrogen ion implantation layer of hydrogen ion between second substrate and epitaxial loayer; In epitaxial loayer, form photodiode; Formation at the interface between second substrate and first substrate connects (bond); On second substrate, implement annealing process so that hydrogen ion implantation layer is converted to geocorona; Removal at part second substrate at geocorona place to expose photodiode; And formation is electrically connected to the contact plunger that connects up in the bottom then.
According to the embodiment of the invention, it is integrated that a kind of imageing sensor and manufacture method thereof can obtain the vertical-type of circuit and photodiode.
According to the embodiment of the invention, when employing was arranged in the vertical-type photodiode of circuit top, photodiode formed in crystalline semiconductor layer.Therefore, can avoid the interior defective of photodiode.Go up and/or top formation binder course at first substrate such as the logic substrate (logicsubstrate) that comprises the bottom wiring.Therefore, guaranteed to connect with the crystalline semiconductor layer that has formed photodiode therein.Can form the contact plunger that is connected to the bottom wiring, thereby maximize the performance of imageing sensor and can produce imageing sensor with premium properties.The integrated activity coefficient (fill factor) that makes of the vertical-type of circuit and photodiode is near 100%.And, maximized photosensitivity can be in identical Pixel Dimensions, provided by vertical-type is integrated, and whole costs can also be reduced.Each unit picture element can be realized more complicated circuit and not reduce photosensitivity.The additional on-chip circuit that can be integrated (on-chip circuitry) makes the overall performance optimization of imageing sensor, and has realized miniaturization and the manufacturing cost that has reduced semiconductor device.
Description of drawings
Instance graph 1 to Figure 10 shows imageing sensor and the manufacture method thereof according to the embodiment of the invention.
Embodiment
Hereinafter, describe imageing sensor and manufacture method thereof in detail with reference to accompanying drawing according to the embodiment of the invention.
According to embodiments of the invention, provide description with reference to the structure accompanying drawing of cmos image sensor (CIS).Yet the embodiment of the invention is not limited to cmos image sensor, but can be applied to all imageing sensors, for example ccd image sensor.
As shown in instance graph 1, can comprise first substrate 100 according to the imageing sensor of the embodiment of the invention, in this first substrate 100, formed bottom wiring 110 and circuit.On first substrate 100 and/or above form binder course 120, and when contacting with binder course 120, crystalline semiconductor layer 210a can be coupled (bond) to first substrate 100.Can in crystalline semiconductor layer 210a, form photodiode 210, and can in photodiode 210 and binder course 120, form contact plunger 220, form by this way and connect up 110 be electrically connected of bottom.
According to the embodiment of the invention, during the vertical-type photodiode arranged above adopting the circuit be formed in the substrate 100, photodiode 210 is formed in the crystalline semiconductor layer.Therefore, can avoid defective in the photodiode.First substrate 100 such as the logic substrate that comprises bottom wiring 110 on and/or above use binder course 120 can be bound up on the crystalline semiconductor layer that has wherein formed photodiode 210.Formation is connected to the contact plunger 220 of bottom wiring 110 so that can easily make the imageing sensor with premium properties.
According to the embodiment of the invention, crystalline semiconductor layer can be a single-crystal semiconductor layer, but is not limited to this.Crystalline semiconductor layer can be a polycrystal semiconductor layer.Binder course can have identical crystal structure with crystalline semiconductor layer, but is not limited to this.The circuit of first substrate 100 can comprise four transistors (4Tr CIS) under the situation of CIS, or also can be applied to 1 Tr CIS, 3 Tr CIS, 5 Tr CIS or 1.5 Tr CIS (transistor of shared CIS) etc.In addition, the bottom wiring 110 that is formed in first substrate 100 can comprise lower metal line and bottom connector.The top of bottom wiring 110 can be as the lower electrode of photodiode.
Photodiode 210 can comprise the sandwich construction such as the P-N structure.Photodiode can comprise the first conductivity type conductive layer (conduction type conductive layer) 214 that is formed among the crystalline semiconductor layer 210a and on the first conductivity type conductive layer 214 and/or above crystalline semiconductor layer 210a in the second conductivity type conductive layer 216 that forms.For example, photodiode 210 can comprise the low concentration N type conductive layer 214 that is formed among the crystalline semiconductor layer 210a and on low concentration N type conductive layer 214 and/or above crystalline semiconductor layer 210a in the high concentration P-type conduction layer 216 that forms, but be not limited to this.In other words, first conductivity type is not limited to the N type, and can be the P type.
As shown in instance graph 2, photodiode 210 may further include the high concentration first conduction type conductive layer 212 that forms in the crystalline semiconductor layer below the first conductivity type conductive layer 214.High concentration first conduction type conductive layer 212 can be formed for ohmic contact (ohmic contact).Photodiode 210 may further include the high concentration N type conductive layer 212 that forms in the crystalline semiconductor layer below N type conductive layer 214.Can in the crystalline semiconductor layer 210a adjacent, form separator 230 with the side of contact plunger 220.Have the separator 230 of shallow trench isolation in order to prevent crosstalking between the pixel, can to form from (STI) structure.Can on the photodiode 210 and/or above form upper metallization layer and colour filter (color filter).
As shown in instance graph 3, can comprise according to the method for the shop drawings image-position sensor of the embodiment of the invention first substrate 100 is set that this first substrate 100 has bottom wiring 110 and the circuit that is formed on wherein.The circuit of first substrate 100 can comprise four transistors (4 Tr CIS) under the CIS situation, or also can be applied to 1 Tr CIS, 3 Tr CIS, 5 TrCIS or 1.5 Tr CIS (transistor of shared CIS) etc.The bottom wiring 110 that is formed in first substrate 100 can comprise the lower metal line and be connected to the bottom connector that connects up in the bottom.On first substrate 100 that comprises bottom wiring 110 and/or above form binder course 120.Binder course 120 is formed and is played the effect that increases the adhesion (bonding force) between first substrate 100 and second substrate 200 by oxide layer.Yet the material of binder course is not limited to oxide layer.Further formed in crystalline semiconductor layer 210a under the situation of separator 230 before connecting, the binder course 120 of first substrate 100 is formed by identical oxide layer materials with the separator 230 of second substrate 200, thereby has increased the adhesion between the substrate.Just comprise at first substrate 100 on the logic substrate of bottom wiring 110 and/or above form binder course, thereby guarantee to connect with the crystalline semiconductor layer that has wherein formed photodiode.Subsequently, form the contact that is connected to the bottom wiring, so that can easily make imageing sensor with premium properties.
As shown in instance graph 4 and Fig. 5, in crystalline semiconductor layer, form photodiode.As shown in instance graph 4 and Fig. 5, form epitaxial loayer such as crystalline semiconductor layer 210a so that in order to remove the downside of second substrate 200 by injecting hydrogen ion at second substrate 200 before connecting carrying out substrate.Then, after connecting, implement annealing.Yet the embodiment of the invention is not limited to the foregoing description.Can use such as silicon-on-insulator (silicon-on-insulator) buried insulator layer (buried insulating layer) (SOI) as crystalline semiconductor layer 210a.As shown in instance graph 4, by epitaxy on second substrate 200 and/or above form crystalline semiconductor layer 210a.Then, inject hydrogen ion in the border between second substrate 200 and crystalline semiconductor layer 210a, thereby form hydrogen ion implantation layer 207a.
As shown in instance graph 5, inject at crystalline semiconductor layer 210a by ion then to form photodiode 210.For example, can on the downside of crystalline semiconductor layer 210a and/or above form the second conductivity type conductive layer 216.For example, can by use blanket formula ion without mask inject the whole surface that ion is injected into second substrate 200 come on the downside of crystalline semiconductor layer 210a and/or above form high concentration P-type conduction layer 216.Then on the second conductivity type conductive layer 216 and/or above form the first conductivity type conductive layer 214.For example, can by use blanket formula ion without mask inject the whole surface that ion is injected into second substrate 200 come on the second conductivity type conductive layer 216 and/or above form low concentration N type conductive layer 214.
Under the situation of embodiment shown in Figure 2, high concentration first conduction type conductive layer 212 is formed on the first conductivity type conductive layer 214 times and/or below.This means, in Fig. 5 can on the first conductivity type conductive layer 214 and/or above form high concentration first conduction type conductive layer 212, this is because between Fig. 2 and Fig. 5, between the high concentration first conduction type conductive layer 212 and the first conductivity type conductive layer 214 on/relation is different down.For example, can by use blanket formula ion without mask inject the whole surface that ion is injected into second substrate 200 come on the first conductivity type conductive layer 214 and/or above form high concentration N type conductive layer 212.
Before connecting, further in crystalline semiconductor layer 210a, form under the situation of separator 230, because binder course 120 made by identical oxide layer materials with separator 230, so can increase adhesion between the separator 230 of the binder course 120 of first substrate 100 and second substrate.Yet, even can after connecting, form separator 230.
As shown in example 6, make the photodiode 210 of second substrate 200 contact the binder course 120 of first substrate 100 so that second substrate 200 and first substrate 100 be bound up thereby implement to connect technology then.For example, after first substrate 100 and second substrate 200 are contacted with each other, can use plasma activation (plasma activation) that first substrate 100 and second substrate 200 are bound up, but the embodiment of the invention is not limited to this.
As shown in instance graph 7, on second substrate 200, implement annealing process then, thereby hydrogen ion implantation layer 207a change state becomes geocorona 207.As shown in instance graph 8, a side of removing second substrate 200 at geocorona 207 places is to expose photodiode 210.Under the situation after separator 230 is formed on connection technology, can after exposing photodiode 210, form separator 230.As shown in instance graph 9, thereby optionally etching photodiode 210 and binder course 120 expose bottom wiring 110 to form contact hole H by this contact hole H.As shown in instance graph 10, in contact hole H, form contact plunger 220, this contact plunger 220 is connected (coupled) to the bottom wiring 110 that is exposed.Can use at least a contact plunger 220 that forms in tungsten (W), titanium (Ti), titanium nitride (TiN) and the aluminium (Al).Thereafter, can on the photodiode 210 and/or above form upper metallization layer, and can implement passivation technology then.Then can on the photodiode 210 and/or above further form colour filter, and then can also on the colour filter and/or above form lenticule or microlens array.
According to the embodiment of the invention, the method of shop drawings image-position sensor comprises when adopting the vertical-type photoelectric diode structure, in crystalline semiconductor layer, form photodiode, wherein, in this vertical-type photoelectric diode structure photodiode be placed on the circuit and/or above.Therefore, can avoid the interior defective of photodiode.And, according to the embodiment of the invention, first substrate such as the logic substrate that comprises bottom wiring on and/or above form binder course, thereby guarantee to connect with the crystalline semiconductor layer that has formed photodiode therein.Formation is connected to the contact of bottom wiring so that can easily make the imageing sensor with premium properties then.
Although described a plurality of embodiment herein, should be appreciated that it may occur to persons skilled in the art that multiple other modifications and embodiment, they all will fall in the spirit and scope of principle of the present disclosure.More particularly, in the scope of the disclosure, accompanying drawing and claims, carry out various modifications and change aspect the arrangement mode that can arrange in subject combination and/or the part.Except the modification and change of part and/or arrangement aspect, optionally using also is conspicuous selection for a person skilled in the art.
Claims (20)
1. imageing sensor comprises:
First substrate has the bottom wiring and the circuit that are formed on wherein;
Binder course is formed on described first substrate top;
Second substrate links to described first substrate by described binder course;
The vertical-type photodiode is formed in described second substrate; And
Contact plunger is formed in described photodiode and the described binder course and is electrically connected to described bottom and connects up.
2. imageing sensor according to claim 1, wherein, described second substrate comprises epitaxial loayer.
3. imageing sensor according to claim 2, wherein, described epitaxial loayer comprises crystalline semiconductor layer.
4. imageing sensor according to claim 3, wherein, described photodiode comprises:
The first conductivity type conductive layer is formed in the described crystalline semiconductor layer; And
The second conductivity type conductive layer is formed in the described crystalline semiconductor layer of described first conductivity type conductive layer top and with the described first conductivity type conductive layer and contacts.
5. imageing sensor according to claim 1, wherein, described photodiode comprises:
The first conductivity type conductive layer is formed in the described crystalline semiconductor layer;
The second conductivity type conductive layer is formed in the described crystalline semiconductor layer of described first conductivity type conductive layer top and with the described first conductivity type conductive layer and contacts; And
The high concentration first conduction type conductive layer is formed in the described crystalline semiconductor layer of described first conductivity type conductive layer below and with the described first conductivity type conductive layer and contacts.
6. imageing sensor according to claim 1 wherein, uses at least a in tungsten (W), titanium (Ti), titanium nitride (TiN) and the aluminium (Al) to form described contact plunger.
7. imageing sensor according to claim 1, wherein, described circuit comprises at least one transistor.
8. the method for a shop drawings image-position sensor comprises:
First substrate is set, and described first substrate has bottom wiring and the circuit that is formed on wherein;
Above described first substrate, form binder course;
Second substrate is set, and described second substrate has the photodiode that is formed on wherein;
Implementing to connect technology at described binder course connects to form between described second substrate and described first substrate; And then
Expose described photodiode by removing described second substrate of part.
9. method according to claim 8 after exposing described photodiode, further comprises:
Form contact hole to expose the wiring of described bottom by described photodiode of selective etch and described binder course; And then
In described contact hole, form contact plunger and described contact plunger is connected to the wiring of described bottom.
10. method according to claim 9 wherein, provides described second substrate to comprise:
Above described second substrate, form crystalline semiconductor layer; And in described crystalline semiconductor layer, form described photodiode then.
11. method according to claim 10 wherein, is provided with described second substrate and comprises hydrogen ion is injected in the border of described second substrate and described crystalline semiconductor layer.
12. method according to claim 11, wherein, described binder course comprises oxide layer.
13. method according to claim 8, wherein, described connection technology comprises plasma activation.
14. a method comprises:
First substrate is set, and described first substrate has bottom wiring and at least one transistor that is formed on wherein;
Second substrate is set;
In described second substrate, form epitaxial loayer;
By hydrogen ion being injected into the next hydrogen ion implantation layer of formation at the interface between described second substrate and described epitaxial loayer in described second substrate;
In described epitaxial loayer, form photodiode;
Formation at the interface between described second substrate and described first substrate connects;
On second substrate, implement annealing process so that described hydrogen ion implantation layer is converted to geocorona;
Removal at described second substrate of the part at described geocorona place to expose described photodiode; And then
Formation is electrically connected to the contact plunger of described bottom wiring.
15. method according to claim 14, wherein, the described connection of formation at the interface between described second substrate and described first substrate comprises:
After described first substrate is set, above described first substrate that comprises the wiring of described bottom, forms binder course and described binder course is contacted with described first substrate; And then
Implement plasma activation technology.
16. method according to claim 15 wherein, forms described contact plunger and comprises:
Form the contact hole that exposes the wiring of described bottom by described photodiode of etching and described binder course; And then
In described contact hole, form metal level and described metal level is contacted with the wiring of described bottom.
17. method according to claim 16 wherein, forms described metal level and is included in and forms at least a in tungsten (W), titanium (Ti), titanium nitride (TiN) and the aluminium (Al) in the described contact hole.
18. method according to claim 14 wherein, forms described photodiode and comprises:
Above described hydrogen ion implantation layer, form the second conductivity type conductive layer; And then
Above the described second conductivity type conductive layer, form the first conductivity type conductive layer and the described first conductivity type conductive layer is contacted with the described second conductivity type conductive layer.
19. method according to claim 18 wherein, forms described photodiode and further comprises:
Above the described first conductivity type conductive layer, form the high concentration first conduction type conductive layer and described high concentration first conduction type conductive layer is contacted with the described first conductivity type conductive layer.
20. method according to claim 14 further comprises, before implementing described connection technology, forms shallow groove isolation layer in described epitaxial loayer.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR20070112172 | 2007-11-05 | ||
| KR1020070112172 | 2007-11-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101431091A true CN101431091A (en) | 2009-05-13 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2008101758209A Pending CN101431091A (en) | 2007-11-05 | 2008-11-04 | Image sensor and method for manufacturing the same |
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| Country | Link |
|---|---|
| CN (1) | CN101431091A (en) |
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- 2008-11-04 CN CNA2008101758209A patent/CN101431091A/en active Pending
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Open date: 20090513 |