CN101425848A - Timing estimation method in single carrier frequency domain equalization system - Google Patents
Timing estimation method in single carrier frequency domain equalization system Download PDFInfo
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- CN101425848A CN101425848A CN 200810227673 CN200810227673A CN101425848A CN 101425848 A CN101425848 A CN 101425848A CN 200810227673 CN200810227673 CN 200810227673 CN 200810227673 A CN200810227673 A CN 200810227673A CN 101425848 A CN101425848 A CN 101425848A
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Abstract
The invention discloses a timing estimation method in a single carrier frequency range equilibrium system; after the block synchronization, sample points closest to the timing position are obtained through a data auxiliary ML search algorithm and through setting a specific lead data structure, the timing deviation is locked to the deviation of one sample point, the rest timing deviation is estimated by an improved data-free auxiliary O&M algorithm; and the further timing correction is carried out by interpolating modules. With the method, a fully digital receiver is capable of acquiring the result of timing estimation in the time domain with high precision; moreover, the whole timing estimation process just needs less auxiliary data, so the practical value is very high.
Description
Technical field
The present invention relates to moving communicating field, relate in particular to the timing estimation method in a kind of single-carrier frequency domain equalization system.
Background technology
At present, along with new communication service demand increases rapidly, transmission rate to wireless communication system and WLAN (wireless local area network) is had higher requirement, and the raising of transmission rate has brought bigger carrier wave frequency deviation, more serious ISI problems such as (intersymbol-interference, intersymbol interference) for conventional single-carrier system.OFDM (Orthogonal Frequency Division Multiplexing, OFDM) technology can effectively overcome the intersymbol interference that the weak channel of frequency selectivity brings, become the research focus of radio communication and moving communicating field gradually, in multiple standards, be called as support technology.But the OFDM technology is relatively more responsive to carrier synchronization, and PAPR (Peak-to-Average Power Ratio, peak-to-average power ratio) is bigger, so the single-carrier frequency domain equalization system scheme is suggested.SC-FDE (single carrier system withfrequency domain equalization, single carrier frequency domain equalization) is the method that a kind of up-and-coming anti-multipath disturbs in the broadband wireless transmission, the same piecemeal of taking with OFDM transmits, and adopt CP (CyclicPrefix, Cyclic Prefix) mode, so just can be converted into circular convolution to the linear convolution of signal and channel impulse response, and eliminate the interference of the data block that multipath causes.Adopt simple frequency-domain equalization technology just can eliminate intersymbol interference at receiving terminal.The SC-FDE system compares ofdm system and does not have the PAPR problem, thus do not need to use expensive linear power amplifier, simultaneously neither be responsive especially to carrier synchronization, so the SC-FDE technology is subjected to increasing attention at present.
A most crucial problem in the digital communication technology field is exactly a stationary problem, is divided into carrier synchronization technically with regularly synchronously.In the baseband sampling signal that obtains through the receiving terminal behind the wireless mobile channel, exist carrier frequency offset, phase deviation and timing offset, these deviations generally derive from Doppler effect and these several aspects of frequency selectivity in not matching of crystal oscillator between the transmitter and receiver and the wireless mobile channel, even if in the indoor environment of channel relatively flat, also can there be these deviations.Use the SC-FDE system of piece transmission technology that these synchronous deviations are had higher requirement.The simultaneous techniques of SC-FDE system is divided into carrier synchronization and regularly synchronously, its receiving terminal mainly contain following task synchronously:
1) frame arrive to detect, and is used for judging whether detect signal, and this is the synchronous first step, has only and judges that what receive is that useful signal just can carry out the processing of back;
2) carrier wave frequency deviation is caught;
3) carrier frequency tracking;
4) the symbol original position is estimated (piece is synchronous), promptly accurately knows original position (initial Fourier transform FFT position) before equilibrium, for obtaining more accurate position, needs timing estimation;
5) tracking of sampling clock frequency.
The SC-FDE radiofrequency signal is in separating the process of being transferred to baseband signal, owing to be subjected to influencing received signal and can having time-delay deviation of channel delay.Time-delay deviation can cause many-sided influence to the SC-FDE system, the one, make the planisphere of signal that rotation take place, the 2nd, brought inter symbol interference (ISI), the 3rd, inclined to one side correction can't be carried out accurate frequency offset estimating when not carrying out, the 4th, the existence of time-delay deviation causes obtaining the original position of Fourier transform window accurately, cause channel estimating, frequency domain equalization precise decreasing, the 5th, the big more channel tracking of initial time-delay deviation, timing are followed the trail of, the effect of carrier tracking is poor more, and these all will cause system normally to move.The accuracy of therefore initial timing estimation will influence the performance of system to a great extent.Initial time-delay deviation should be controlled in 5% the symbol time in the general SC-FDE system, therefore in order to keep the superperformance of SC-FDE system, needs accurate timing.
Existing SC-FDE system piece synchronously after, mainly contain dual mode for processing regularly, a kind of processing mode is directly compensation in regularly following the tracks of, and remaining time-delay deviation is put in the tracking solve.Another kind of processing mode is to carry out timing estimation, existing timing estimation algorithm thinking is identical with frequency offset estimating thinking in the ofdm system, obtain timing offset by the phase difference of received signal on frequency domain that utilizes two sections identical auxiliary data correspondences, this timing estimation algorithm is specific as follows: the length of establishing unique word (UW) sequence A is the L Baud Length.Make two adjacent identical UW sequence A form new sequence [A A], obtain its sampled signal sequence and be respectively R1=[r (1) in the correspondence of receiving terminal ..., r (L)], R
2=[r (L+1) ..., r (2L)], r (t) t={1,2 ... } expression receiving terminal signal sampling value.Owing to there is timing offset, the Fourier transform of R1, R2 sequence just is converted into the time-delay deviation on the time domain phase deviation on the frequency domain in theory, utilizes this phase deviation just can obtain the time-delay deviation that will estimate.
Do not carry out the algorithm that timing estimation directly changes the timing tracking over to for above-mentioned synchronously at piece, because the initial timing offset of wireless mobile channel is bigger, cause channel estimating, frequency domain equalization module and tracing module estimated accuracy to reduce, poor stability is to the demands for higher performance of the module of back.
For the above-mentioned algorithm that utilizes the phase difference of received signal on frequency domain to carry out timing estimation, because this class algorithm need just can reach good effect under the very little situation of frequency deviation, and receiving terminal has only carried out thick frequency offset estimating before algorithm application, also have bigger frequency deviation, therefore the timing estimation results precision that obtains is very low.Algorithm needs more auxiliary data simultaneously, can reduce the transmission rate of valid data, and algorithm need can increase the operand of algorithm and the complexity of realization in the enterprising line translation of frequency domain simultaneously.
Summary of the invention
The invention provides the timing estimation method in a kind of SC-FDE system, by setting distinctive lead data block structure, finish piece synchronously after, by ML (Maximum Likelihood, the maximum likelihood) searching algorithm of the auxiliary type of data and the O﹠amp of the auxiliary type of free of data; M (Oerder and Meyr) algorithm combines, and directly obtains timing estimation on time domain.
Technical scheme of the present invention is as follows:
Timing estimation method in a kind of single-carrier frequency domain equalization system, the sample rate of receiving terminal is 4 samplings, comprises step:
A, utilize maximum likelihood searching algorithm based on the BAKER sign indicating number to obtain sampled point Q near timing position;
B, be original position with Q, the data intercept section [r (Q) ..., r (Q+4M-1)], with symbol S=[s (1) ... s (4M)] expression, i.e. S=[s (1) ... s (4M)]=[r (Q), ..., r (Q+4M-1)], wherein M is the code element number in the data segment of intercepting, the length of the data block that sends with transmitting terminal is identical, and S is undertaken obtaining behind the bandpass filtering by first band pass filter
C, calculating
F () is a nonlinear function, with what obtain
Undertaken obtaining behind the bandpass filtering by second band pass filter
D, calculating residue timing offset
Make V=4 represent that the sample rate of receiving terminal is 4 samplings, promptly
Total timing estimation value is
Wherein T is the code element transmission time, the side-play amount of the estimated value P of the original position of BAKER sign indicating number in the lead data that K-I-1 obtains for the sampling point position determined synchronously according to piece.
Preferably, described steps A specifically comprises step:
A1, add the auxiliary data of the lead data of N Baud Length as the maximum likelihood searching algorithm after the auxiliary data that piece uses synchronously, described lead data is made up of the invalid code element of N-L Baud Length and the BAKER sign indicating number of L Baud Length;
A2, the sampling point position of determining synchronously according to piece obtain the estimated value P of the original position of BAKER sign indicating number in the lead data;
A3, determined that by estimated value P the hunting zone of the original position of BAKER sign indicating number is: with the P point is the center, and front and back each I sampled point is determined with the BAKER sign indicating number by the hunting zone and to be made the needed receiving sequence R of correlation computations;
The mould square C (k) of the correlation of A4,2I+1 BAKER sign indicating number sequence B of calculating and receiving sequence R,
A5, ask C (k) maximum corresponding sequence number K, obtain the offset T=K-I-1 of relative estimated position P, determine the new original position Q of BAKER sign indicating number thus, its position is Q=P+ Δ T, and this position is near timing position.
Preferably, preceding 3 code elements of the Chu sequence that described invalid code element is 8 Baud Lengths, described BAKER sign indicating number is the sequence B of 13 Baud Lengths, B=[B (1) ... ..B (13)]=[1-1-1-1-111-1-11-11-1], i.e. N=16, L=13.
Preferably, described R be [r (P-I) ..., r (P+52+I)], with formula R=[r (1),, r (52+2I)] and expression, i.e. R=[r (1) ..., r (52+2I)]=[r (P-I),, r (P+52+I)], R is 2I+L*4=2I+52 sampled point altogether, and wherein r () is the received signal sampled value.
Preferably, the value of described position offset Δ T be on the occasion of the time, the expression timing position need be offset to data transfer direction, when the value of described position offset Δ T was negative value, the expression timing position need be to the skew of the opposite direction of transfer of data.
Preferably, described first band pass filter is that centre frequency is the band pass filter of 1/2T, and described second band pass filter is that centre frequency is the band pass filter of 1/T.
Beneficial effect of the present invention is as follows:
The present invention is by setting distinctive lead data block structure, finish piece synchronously after, ML searching algorithm by the auxiliary type of data obtains the sampled point near timing position, timing offset is locked onto the deviation of a sampled point, utilize the O﹠amp of the auxiliary type of free of data after improving this moment again; The M algorithm is estimated the residue timing offset, carries out further correction of timing by interpolating module.All-digital receiver can directly obtain timing estimation results after adopting the present invention on time domain, and its precision is very high, and only needs less auxiliary data in the whole timing estimation process, and very high practical value is arranged.
Description of drawings
Fig. 1 is the flow chart of the timing estimation method in the SC-FDE of the present invention system;
Fig. 2 is for when the value of D is 4, calculates the peaked schematic diagram of mould square C (k) of the correlation of 9 BAKER sign indicating number sequence B and receiving sequence R;
Fig. 3 is for utilizing the O﹠amp after improving among the present invention; The M algorithm further estimates to remain the schematic diagram of timing offset.
Embodiment
Because the all-digital receiver utilization in the reality is that interpolation algorithm recovers timing data, so receiving terminal generally all is at least 4 samplings, and promptly a code element has 4 sampled points at least.After piece is finished synchronously, can obtain rough sampling point position, but just be locked in a small range with original position this moment.In order to obtain accurate original position, need carry out further timing estimation, promptly smart timing estimation.The present invention is by setting distinctive lead data structure, finish piece synchronously after, ML searching algorithm by the auxiliary type of data obtains the sampled point near timing position, and timing offset is locked onto the deviation of a sampled point, and the estimation range for the treatment of of this moment has narrowed down to (T/V, T/V), T is the code element transmission time, and V is the sample rate of receiving terminal, is 4 samplings generally speaking, be scope narrow down to (T/4, T/4).Utilize the O﹠amp of the auxiliary type of free of data after improving this moment again; The M algorithm is estimated the residue timing offset, carries out further correction of timing by interpolating module.All-digital receiver can directly obtain timing estimation results after adopting the present invention on time domain, and its precision is very high, and only needs less auxiliary data in the whole timing estimation process, and very high practical value is arranged.
Below in conjunction with each accompanying drawing specific implementation process of the present invention is further described in detail.
See also Fig. 1, this figure is the flow chart of the timing estimation method in the SC-FDE of the present invention system, and its specific implementation process is as follows:
Adopt specific lead data structural reason as follows among the present invention:
The BAKER sign indicating number has strong autocorrelation performance, length is that the BAKER sign indicating number of L is the strongest for L at auto-correlation position energy, and the energy of all the other positions all is 1, even just because of this point makes the sampled point that also can accurately search under certain frequency deviation and the weak condition near timing position existing.The invalid code that increases is in order to ensure the strong correlation in the hunting zone.
Can select for use preceding 3 code elements in the Chu sequence of 8 Baud Lengths as invalid code element in the reality, the BAKER sign indicating number is 13 Baud Length B=[B (1), ... ..B (13)]=[1-1-1-1-111-1-11-11-1], this moment, the sample rate of receiving terminal was 4 samplings, the received signal sampled value is r (t) t={1,2 ... }.
Described R be [r (P-I) ..., r (P+52+I)], with formula R=[r (1) ... r (52+2I)] expression, i.e. R=[r (1) ..., r (52+2I)]=[r (P-I),, r (P+52+I)], R is 2I+L*4=2I+52 sampled point altogether, and wherein r () is the received signal sampled value.
The mould square C (k) of the correlation of step 13,2I+1 BAKER sign indicating number sequence B of calculating and receiving sequence R,
If I value selected in the step 12 is 4, then need to calculate R1=[r (1), r (5) ..., r (49)] with the mould square C (1) of the correlation of sequence B, R
2=[r (2), r (6) ..., r (50)] with the mould square C (2) of the correlation of sequence B ... .., calculate R
9=[r (9), r (13) ..., r (57)] with the mould square C (9) of the correlation of sequence B.
In this step, the value of described position offset Δ T be on the occasion of the time, the expression timing position need be offset to data transfer direction, when the value of described position offset Δ T was negative value, the expression timing position need be to the skew of the opposite direction of transfer of data.
See also Fig. 2, this figure is when the value of I is 4, calculate the peaked schematic diagram of mould square C (k) of the correlation of 9 BAKER sign indicating number sequence B and receiving sequence, as seen from the figure, input data r (n) are by the input of sampling beat, and data are put in the buffering area of four sampling time-delays, after four samplings of continuous input, this unit begins to calculate (at this moment importing data is r (4), and delay line is output as r (0)).Four samplings of every input (also being a symbol), the BARKER sign indicating number is updated to next bit.Calculating 13 so altogether takes turns.After last took turns beginning, the summer result that will add up square outputed to the MAX unit through mould, compares, and determines maximum from all 9 accumulation results, determined sampled point Q near timing position with this.
After above-mentioned steps is finished, can access near the sampled point of timing position, timing offset can be locked onto the deviation of a sampled point, i.e. the deviation of 1/4 code element.Utilize the O﹠amp after improving below; The M algorithm further estimates to remain timing offset, to reach the purpose that accurate timing is estimated.
See also Fig. 3, this figure is the O﹠amp that utilizes among the present invention after improving; The M algorithm further estimates to remain the schematic diagram of timing offset, O﹠amp; The M algorithm is insensitive to frequency deviation, does not need data auxiliary, simple in structure, and precision is higher under the situation of the certain less timing offset of the comparatively accurate i.e. existence of original position, implements more or less freely.Adjust O﹠amp; The non-linear form of M algorithm not only can not reduce the shake variance under the non-weak channel, and can reduce the shake variance under the wireless mobile channel, improves estimated accuracy.O﹠amp; Have the cyclic stationary characteristic if the M algorithm basic principle is the signal of matched filtering output through the signal after the Nonlinear Processing, just have spectral line to produce so in the symbol rate position.This just can calculate spectral line with the Fourier series expansion.At O﹠amp; The input of M algorithm carries out the bandpass filtering first time to signal, carries out the bandpass filtering second time after non-linear, can reduce noise to estimation effect, reduces shake, improves estimated accuracy.Utilize the O﹠amp after improving among the present invention; The detailed process that the M algorithm further estimates to remain timing offset is as follows:
Above-mentioned first band pass filter is that centre frequency is the band pass filter of 1/2T, and above-mentioned second band pass filter is that centre frequency is the band pass filter of 1/T.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.
Claims (6)
1, the timing estimation method in a kind of single-carrier frequency domain equalization system, the sample rate of receiving terminal is 4 samplings, it is characterized in that, comprises step:
A, utilize maximum likelihood searching algorithm based on the BAKER sign indicating number to obtain sampled point Q near timing position;
B, be original position with Q, the data intercept section [r (Q) ..., r (Q+4M-1)], with symbol S=[s (1) ... s (4M)] expression, i.e. S=[s (1) ... s (4M)]=[r (Q), ..., r (Q+4M-1)], wherein M is the code element number in the data segment of intercepting, the length of the data block that sends with transmitting terminal is identical, and S is undertaken obtaining behind the bandpass filtering by first band pass filter
C, calculating
F () is a nonlinear function, with what obtain
Undertaken obtaining behind the bandpass filtering by second band pass filter
D, calculating residue timing offset
Make V=4 represent that the sample rate of receiving terminal is 4 samplings, promptly
Total timing estimation value is
Wherein T is the code element transmission time, the side-play amount of the estimated value P of the original position of BAKER sign indicating number in the lead data that K-I-1 obtains for the sampling point position determined synchronously according to piece.
2, the method for claim 1 is characterized in that, described steps A specifically comprises step:
A1, add the auxiliary data of the lead data of N Baud Length as the maximum likelihood searching algorithm after the auxiliary data that piece uses synchronously, described lead data is made up of the invalid code element of N-L Baud Length and the BAKER sign indicating number of L Baud Length;
A2, the sampling point position of determining synchronously according to piece obtain the estimated value P of the original position of BAKER sign indicating number in the lead data;
A3, determined that by estimated value P the hunting zone of the original position of BAKER sign indicating number is: with the P point is the center, and front and back each I sampled point is determined with the BAKER sign indicating number by the hunting zone and to be made the needed receiving sequence R of correlation computations;
The mould square C (k) of the correlation of A4,2I+1 BAKER sign indicating number sequence B of calculating and receiving sequence R,
A5, ask C (k) maximum corresponding sequence number K, obtain the offset T=K-I-1 of relative estimated position P, determine the new original position Q of BAKER sign indicating number thus, its position is Q=P+ Δ T, and this position is near timing position.
3, method as claimed in claim 2 is characterized in that, preceding 3 code elements of the Chu sequence that described invalid code element is 8 Baud Lengths, described BAKER sign indicating number is the sequence B of 13 Baud Lengths, B=[B (1) ... ..B (13)]=[1-1-1-1-111-1-11-11-1], be N=16, L=13.
4, method as claimed in claim 2 is characterized in that, described R is [r (P-I),, r (P+52+I)], with formula R=[r (1),, r (52+2I)] and expression, i.e. R=[r (1), r (52+2I)]=[r (P-I) ..., r (P+52+I)], R is 2I+L*4=2I+52 sampled point altogether, and wherein r () is the received signal sampled value.
5, method as claimed in claim 2, it is characterized in that, the value of described position offset Δ T be on the occasion of the time, the expression timing position need be offset to data transfer direction, when the value of described position offset Δ T was negative value, the expression timing position need be to the opposite direction skew of transfer of data.
6, method as claimed in claim 2 is characterized in that, described first band pass filter is that centre frequency is the band pass filter of 1/2T, and described second band pass filter is that centre frequency is the band pass filter of 1/T.
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Cited By (5)
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CN102474482A (en) * | 2009-07-03 | 2012-05-23 | 松下电器产业株式会社 | Carrier frequency synchronization detection circuit and correlation operator |
CN102624419A (en) * | 2012-04-23 | 2012-08-01 | 西安电子科技大学 | Carrier synchronization method of burst direct sequence spread spectrum system |
CN106888065A (en) * | 2017-03-08 | 2017-06-23 | 四川九洲电器集团有限责任公司 | A kind of clock synchronizing method and terminal |
WO2020107333A1 (en) * | 2018-11-27 | 2020-06-04 | 上海航天电子通讯设备研究所 | Vde-based multi-passage channel detection processing system |
CN111585933A (en) * | 2020-03-27 | 2020-08-25 | 中国人民解放军海军工程大学 | Receiver burst signal synchronization method and device of single carrier frequency domain equalization system |
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CN1156188C (en) * | 2001-12-14 | 2004-06-30 | 清华大学 | Bump interconnected decoding equalizer |
CN1694440A (en) * | 2005-06-06 | 2005-11-09 | 山东大学 | Timing tracking method in single carrier blocking transmission system |
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CN102474482A (en) * | 2009-07-03 | 2012-05-23 | 松下电器产业株式会社 | Carrier frequency synchronization detection circuit and correlation operator |
CN102624419A (en) * | 2012-04-23 | 2012-08-01 | 西安电子科技大学 | Carrier synchronization method of burst direct sequence spread spectrum system |
CN102624419B (en) * | 2012-04-23 | 2013-12-25 | 西安电子科技大学 | Carrier synchronization method of burst direct sequence spread spectrum system |
CN106888065A (en) * | 2017-03-08 | 2017-06-23 | 四川九洲电器集团有限责任公司 | A kind of clock synchronizing method and terminal |
CN106888065B (en) * | 2017-03-08 | 2019-02-26 | 四川九洲电器集团有限责任公司 | A kind of clock synchronizing method and terminal |
WO2020107333A1 (en) * | 2018-11-27 | 2020-06-04 | 上海航天电子通讯设备研究所 | Vde-based multi-passage channel detection processing system |
CN111585933A (en) * | 2020-03-27 | 2020-08-25 | 中国人民解放军海军工程大学 | Receiver burst signal synchronization method and device of single carrier frequency domain equalization system |
CN111585933B (en) * | 2020-03-27 | 2022-09-02 | 中国人民解放军海军工程大学 | Receiver burst signal synchronization method and device of single carrier frequency domain equalization system |
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