CN101408571B - Inserted detection circuit - Google Patents
Inserted detection circuit Download PDFInfo
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- CN101408571B CN101408571B CN2007101802122A CN200710180212A CN101408571B CN 101408571 B CN101408571 B CN 101408571B CN 2007101802122 A CN2007101802122 A CN 2007101802122A CN 200710180212 A CN200710180212 A CN 200710180212A CN 101408571 B CN101408571 B CN 101408571B
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- circuit
- detection circuit
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- analog
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Abstract
A socket detection circuit comprises a converting circuit and an analog/digital converter. The converting circuit linearizes the analog input signal of a switching circuit and then the analog/digital converter transforms the signal into a digital output signal so as to reduce the complexity of signal identification.
Description
Technical field
The present invention relates to a kind of testing circuit, particularly relate to a kind of inserted detection circuit.
Background technology
Present most electronic product, for example personal computer or multimedia video product, provide plural at least socket (jack) with transmission interface as simulating signal, when a user inserted this socket with a simulating signal output unit, a message unit (for example: CPU (central processing unit)) just can distinguish this simulating signal output unit or this simulating signal according to the inserting state of this simulating signal output unit or the simulating signal of being exported; A kind of simulating signal output unit commonly used is a Keysheet module, and when the user pressed any one button on this Keysheet module, this Keysheet module just can be sent a simulating signal and distinguish the button of being pressed for a message unit.Now, use the equivalent resistance that changes this on-off circuit 90, and then produce a voltage signal V with distinguishing that the principle of this analog input signal is to control the switching configuration (Fig. 1) of an on-off circuit 90 according to this simulating signal
In1, this voltage signal V
In1Export by an output bus N after being converted to a digital signal via an analog/digital converter 80 again, carry out corresponding operation according to this digital signal for a message unit (not shown).
Figure 1 shows that a kind of known switching configuration, it comprises an on-off circuit 90 serial connections one analog/digital converter 80, and the input voltage of this analog/digital converter 80 is V
In1This on-off circuit 90 comprises four switch SW
4, SW
3, SW
2And SW
1, the conducting state of described switch is decided by the inserting state of a simulating signal output unit or the simulating signal of being exported.In addition, four of on-off circuit 90 switch SW
4, SW
3, SW
2And SW
1Conducting priority be SW
4＞SW
3＞SW
2＞SW
1, when this switch SW
4During conducting, V
In1=0 volt; This switch SW
3During conducting, V
In1=V
CC* R
4/ (R
5+ R
4) volt; This switch SW
2During conducting, V
In1=V
CC* (R
4+ R
3)/(R
5+ R
4+ R
3) volt; This switch SW
1During conducting, V
In1=V
CC* (R
4+ R
3+ R
2)/(R
5+ R
4+ R
3+ R
2) volt; Work as SW
4, SW
3, SW
2And SW
1Four switches are all during not conducting, V
In1=V
CC* (R
4+ R
3+ R
2+ R
1)/(R
5+ R
4+ R
3+ R
2+ R
1) volt.Generally speaking, under different switch conduction states, input voltage V
In1Be not the variation that is linear, so the comparative voltage spacing of this analog/digital converter 80 must be non-linear or select to adopt the more analog/digital converter of seniority.
Figure 2 shows that another kind of known switching configuration, its by an on-off circuit 91 serial connections one analog/digital converter 80 constitute the switch SW of this on-off circuit 91
4, SW
3, SW
2And SW
1Not having conducting priority, is to be conducting or not conducting according to the inserting state of simulating signal output unit or the simulating signal exported, usually under different switch conduction states, and the input voltage V of this analog/digital converter 80
In2The comparative voltage spacing of this analog/digital converter 80 also is nonlinear variation, so also must be non-linear or select to adopt the more analog/digital converter of seniority, the complexity in the time of so can increasing signal identification.
Summary of the invention
One of the object of the invention is to provide a kind of inserted detection circuit, to address the above problem.
One of the object of the invention is providing a kind of inserted detection circuit, so that the input signal of analog/digital converter has linear characteristic.
For achieving the above object, inserted detection circuit of the present invention is used for detecting the inserting state of an analogue means and the simulating signal of output thereof, to produce a digital signal, this inserted detection circuit comprises an on-off circuit, a change-over circuit and an analog/digital converter.This on-off circuit is used for according to the analogue signal generating one equivalent impedance of the inserting state of this analogue means and output thereof.This change-over circuit couples this on-off circuit, is used for producing a reference current according to one first reference voltage and this equivalence impedance.This analog/digital converter (analog-to-digital converter) couples this change-over circuit, is used for producing this digital signal according to this reference current.
Description of drawings
Fig. 1 shows the circuit diagram of the inserted detection circuit of commonly using.
Fig. 2 shows the circuit diagram of another inserted detection circuit of commonly using.
Fig. 3 shows the calcspar of the inserted detection circuit of first embodiment of the invention.
Fig. 4 shows the circuit diagram of the inserted detection circuit of first embodiment of the invention.
Fig. 5 shows the circuit diagram of the inserted detection circuit of second embodiment of the invention.
Fig. 6 shows the circuit diagram of the inserted detection circuit of third embodiment of the invention.
The reference numeral explanation
10 change-over circuits, 11 first generating circuit from reference voltage
111 operational amplifiers, 112 the first transistors
12 first current mirroring circuits, 121 transistor secondses
122 the 3rd transistors, 20 analog/digital converters
30 change-over circuits, 31 generating circuit from reference voltage
311 operational amplifiers, 32 current mirroring circuits
321 transistors 40 are current circuit relatively
41 second generating circuit from reference voltage, 411 operational amplifiers
412 transistors, 42 second current mirroring circuits
50 analog/digital converters, 80 analog/digital converters
90 on-off circuits, 91 on-off circuits
SW
1-SW
4Switch module R
1-R
5Resistor
The N output bus
Embodiment
In order to make above and other objects of the present invention, feature and the advantage can be more obvious, the embodiment of the invention cited below particularly, and be described with reference to the accompanying drawings as follows.
Please refer to Fig. 3, it discloses the calcspar of the inserted detection circuit of first embodiment of the invention, this inserted detection circuit is used for detecting the inserting state of an analogue means and the simulating signal of output thereof, to produce a digital signal, it comprises an on-off circuit 91, a change-over circuit 10 and an analog/digital converter 20.This change-over circuit 10 is a secondary signal with one first conversion of signals of these on-off circuit 91 inputs, and wherein an embodiment of this first and second signal is an analog current signal.This analog/digital converter 20 is converted to a digital output signal with this secondary signal.
Please refer to shown in Figure 4ly, it is the circuit diagram of the inserted detection circuit of first embodiment of the invention, and it comprises this on-off circuit 91, change-over circuit 10, analog/digital converter 20 and a resistor R
5, this resistor R
5Have one first end and one second end, this first end is connected in the secondary signal output terminal of change-over circuit 10, and this second end then is connected to a reference voltage, and in the present embodiment, this reference voltage is a ground voltage.The resistance unit of this on-off circuit 91 is by four switch module SW in the present embodiment
1, SW
2, SW
3, SW
4And four impedance components, for example resistor R
1, R
2, R
3, R
4Form described SW
1, SW
2, SW
3And SW
4Can be subjected to the control of a simulating signal output unit and conducting or not conducting, for example when this simulating signal output unit is a keyboard, corresponding switch of each button meeting on it, when the user presses a certain button, its corresponding switch promptly can conducting, for example when inserted detection circuit that this simulating signal output unit is pegged graft shown in Figure 3, can directly utilize the external force of grafting to make corresponding switch conduction again.In the present embodiment, this R
1=R ohm, R
2=2R ohm, R
3=4R ohm and R
4=8R ohm.In addition, scrutable is on practice, and this on-off circuit 91 can have a plurality of resistance units more than four according to different design requirements.
Refer again to shown in Figure 4ly, the change-over circuit 10 of first embodiment of the invention comprises one first generating circuit from reference voltage 11 and one first current mirroring circuit 12.This first generating circuit from reference voltage 11 has an operational amplifier 111 and a first transistor 112, and the positive input terminal of this operational amplifier 111 receives one first reference voltage V
Ref, negative input end is connected in the source class (source) of this first transistor 112 and is coupled to the grid level (gate) that this on-off circuit 91, output terminal are connected in this first transistor 112.As if this operational amplifier 111 is an ideal amplifier, then negative input end voltage V
Ref' equal the first reference voltage V of positive input terminal
Ref, therefore according to voltage V
Ref' value and the equivalent resistance of this on-off circuit 91, can produce corresponding electric current I
In3, above-mentioned corresponding relation then as shown in Table 1.
Table 1
| ?SW 1 | ?SW 2 | ?SW 3 | ?SW 4 | I in3 | V in3 | Digital output signal |
| ?Off | ?off | ?off | ?off | 0 | 0 | 0000 |
| ?Off | ?off | ?off | ?on | V ref/8R | aIin3*R 5＝X | 0001 |
| ?Off | ?off | ?on | ?off | V ref/4R | aIin3*R 5＝2X | 0010 |
| ?Off | ?off | ?on | ?on | (V ref/8R+V ref/4R) | aIin3*R 5＝3X | 0011 |
| ?Off | ?on | ?off | ?off | V ref/2R | aIin3*R 5＝4X | 0100 |
| ?Off | ?on | ?off | ?on | (V ref/8R+V ref/2R) | aIin3*R 5＝5X | 0101 |
| ?Off | ?on | ?on | ?off | (V ref/4R+V ref/2R) | aIin3*R 5＝6X | 0110 |
| ?Off | ?on | ?on | ?on | (V ref/8R+V ref/4R+V ref/2R) | aIin3*R 5＝7X | 0111 |
| ?On | ?off | ?off | ?off | V ref/R | aIin3*R 5＝8X | 1000 |
| ?On | ?off | ?off | ?on | (V ref/8R+V ref/R) | aIin3*R 5＝9X | 1001 |
| ?On | ?off | ?on | ?off | (V ref/4R+V ref/R) | aIin3*R 5＝10X | 1010 |
| ?On | ?off | ?on | ?on | (V ref/8R+V ref/4R+V ref/R) | aIin3*R 5＝11X | 1011 |
| ?On | ?on | ?off | ?off | (V ref/2R+V ref/R) | aIin3*R 5＝12X | 1100 |
| ?On | ?on | ?off | ?on | (V ref/8R+V ref/2R+V ref/R) | aIin3*R 5＝13X | 1101 |
| ?On | ?on | ?on | ?off | (V ref/4R+V ref/2R+V ref/R) | aIin3*R 5＝14X | 1110 |
| ?On | ?on | ?on | ?on | (V ref/8R+V ref/4R+V ref/2R+V ref/R) | aIin3*R 5＝15X | 1111 |
X=(aV wherein
Ref* R
5)/8R
This first current mirroring circuit 12, it comprises a transistor seconds 121 and one the 3rd transistor 122, if the outward appearance of this two transistor 121,122, then can form one and electric current I than identical
In3Proportional electric current aI
In3, because the enforcement and the running of current mirroring circuit 12 are that those skilled in the art are known, so do not repeat them here.
Refer again to shown in Figure 4ly, the analog/digital converter 20 of first embodiment of the invention, its input end are coupled to this first current mirroring circuit 12 and resistor R
5First end between, this analog/digital converter 20 is the analog/digital converter of a voltage mode, its input voltage V
In3Value equal electric current aI
In3Be multiplied by this resistor R
5Value, that is input voltage V
In3=R
5* aI
In3, as shown in table 1, and described input voltage has a linear relationship.Input voltage V
In3After these analog/digital converter 20 conversions, export a corresponding digital output signal by this output bus N.The input voltage V of the conducting state of the switch module of this on-off circuit 91 and this analog/digital converter 20
In3And the relation of digital output signal is as shown in table 1.In the present embodiment, because this on-off circuit 91 has four switch modules, so its output signal is one or four a digital signal.
Please refer to Fig. 5, it discloses the inserted detection circuit of second embodiment of the invention, and it comprises this on-off circuit 91, analog/digital converter 20 and resistor R equally
5, and comprising a change-over circuit 30, this change-over circuit 30 has a generating circuit from reference voltage 31 and a current mirroring circuit 32 equally, and the difference of this change-over circuit 10 of itself and first embodiment of the invention is that the transistor of this change-over circuit 30 is the P transistor npn npn; And the transistor of this change-over circuit 10 is the N transistor npn npn.The negative input end of this operational amplifier 311 receives this first reference voltage V
RefPositive input terminal is connected in the source class of this transistor 321 and is coupled to this on-off circuit 91; Output terminal then is connected in the grid of this transistor 321.So, this change-over circuit 30 equally can be with one first signal I
In4Be converted to a secondary signal aI
In4, and this secondary signal aI
In4Can be linear variation with the switch conduction state of this on-off circuit 91, so the input voltage V of this analog/digital converter 20
In4=R
5* aI
In4, have linear comparative voltage spacing equally.
Please refer to shown in Figure 6ly, it discloses the inserted detection circuit of third embodiment of the invention, and it comprises this change-over circuit 10, resistor R equally
5And on-off circuit 91, its difference is also to comprise one and compares a current circuit 40 and an analog/digital converter 50.This change-over circuit 10 is equally with one first signal I
In5Be converted to a secondary signal aI
In5This comparison current circuit 40 comprises one second generating circuit from reference voltage 41 and one second current mirroring circuit 42, this second generating circuit from reference voltage 41 has an operational amplifier 411 and a transistor 412, and the positive input terminal of this operational amplifier 411 receives one second reference voltage V
Ref" (in the present embodiment, this second reference voltage V
Ref" equal this first reference voltage V
Ref); Output terminal is connected in the grid level of this transistor 412; Negative input end is connected in the source class of this transistor 412 and is connected to this resistor R
5First end, this resistor R
5Second end then be connected to a reference voltage, for example ground connection so forms a reference current I
Ref=V
Ref"/R
5Flow through this transistor 412.In the present embodiment, this second current mirroring circuit 42 is with this reference current I
RefBe mapped as one and compare electric current I
c, the secondary signal aI of itself and this change-over circuit 10
In5Input to this analog/digital converter 50 together and compare, export a digital output signal at last to this output bus N.Therefore, this analog/digital converter 50 is the analog/digital converter of a current-mode, the secondary signal aI that it is exported in order to this change-over circuit 10 relatively
In5Reach the comparison electric current I that this comparison current circuit 40 is exported
c, and this secondary signal aI
In5Can be linear variation with the switch conduction state of this on-off circuit 91.
In addition, the embodiment of Fig. 4, Fig. 5 and Fig. 6 also can be changed enforcement, for example with the V among the described figure
CcVoltage is exchanged mutually with ground voltage, and so this is not a limitation of the present invention.
In sum, the invention is characterized in and make the input signal of analog/digital converter have linear characteristic, though therefore the present invention discloses with aforementioned preferred embodiment, right its is not in order to limit the present invention, those skilled in the art, under the premise without departing from the spirit and scope of the present invention, when doing various changes and modification.Therefore protection scope of the present invention should be as the criterion with claim of the present invention.
Claims (12)
1. an inserted detection circuit is used for detecting the inserting state of an analogue means or the simulating signal that this analogue means is exported, and to produce a digital signal, this inserted detection circuit comprises:
One on-off circuit is used for the analogue signal generating one equivalent impedance of exporting according to inserting state or this analogue means of this analogue means;
One change-over circuit couples this on-off circuit, is used for producing a reference current according to one first reference voltage and this equivalence impedance, and wherein the variation of this reference current has linear characteristic with respect to the variation of this equivalence impedance; And
One analog/digital converter couples this change-over circuit, is used for producing this digital signal according to this reference current.
2. inserted detection circuit as claimed in claim 1, the variation of the simulating signal of wherein should the equivalence impedance exporting with variation or this analogue means of the inserting state of this analogue means changes.
3. inserted detection circuit as claimed in claim 2, wherein this on-off circuit comprises a plurality of guiding paths, each this guiding path comprises a switch and an impedance component, the simulating signal that the on off state of this switch is exported by inserting state or this analogue means of this analogue means and determining.
4. inserted detection circuit as claimed in claim 3, wherein said guiding path parallel connection.
5. inserted detection circuit as claimed in claim 2, it further comprises:
One reference impedance couples this change-over circuit and this analog/digital converter, is used for producing a voltage signal according to this reference current;
Wherein this analog/digital converter is converted to this digital signal with this voltage signal.
6. inserted detection circuit as claimed in claim 5, wherein the variation of this voltage signal has linear characteristic with respect to the variation of this equivalence impedance.
7. inserted detection circuit as claimed in claim 2, wherein this change-over circuit comprises:
One first generating circuit from reference voltage couples this on-off circuit, is used for producing this first reference voltage, and accordingly according to this equivalence impedance and this first reference voltage and produce an initial reference electric current; And
One current mirror couples this first generating circuit from reference voltage and this analog/digital converter, is used for according to this initial reference electric current so that this reference current to be provided.
8. inserted detection circuit as claimed in claim 7, wherein this first generating circuit from reference voltage comprises:
One first amplifier has a positive input terminal, a negative input end and an output terminal, and this positive input terminal couples an input voltage, and this negative input end couples this on-off circuit; And
One the first transistor couples this output terminal, this negative input end, this on-off circuit and this current mirror.
9. inserted detection circuit as claimed in claim 2, it further comprises:
One compares current generating circuit, is used for producing one according to one second reference voltage and a reference impedance and compares electric current;
Wherein this analog/digital converter according to this comparison electric current and this reference current to produce this digital signal.
10. inserted detection circuit as claimed in claim 9, wherein this analog/digital converter relatively this comparison electric current and this reference current to produce this digital signal.
11. inserted detection circuit as claimed in claim 9, wherein this comparison current generating circuit comprises:
One second generating circuit from reference voltage couples this reference impedance, is used for producing this second reference voltage, and produces an initial relatively electric current accordingly according to this reference impedance and this second reference voltage; And
One current mirror couples this second generating circuit from reference voltage and this analog/digital converter, is used for according to should initially comparing electric current so that this comparison electric current to be provided.
12. inserted detection circuit as claimed in claim 11, wherein this second generating circuit from reference voltage comprises:
One second amplifier has a positive input terminal, a negative input end and an output terminal, and this positive input terminal couples an input voltage, and this negative input end couples this reference impedance; And
One transistor seconds couples this output terminal, this negative input end, this reference impedance and this current mirror.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007101802122A CN101408571B (en) | 2007-10-11 | 2007-10-11 | Inserted detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007101802122A CN101408571B (en) | 2007-10-11 | 2007-10-11 | Inserted detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101408571A CN101408571A (en) | 2009-04-15 |
| CN101408571B true CN101408571B (en) | 2011-06-01 |
Family
ID=40571668
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2007101802122A Active CN101408571B (en) | 2007-10-11 | 2007-10-11 | Inserted detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101408571B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI400464B (en) * | 2011-02-11 | 2013-07-01 | Etron Technology Inc | Circuit having an external test voltage |
| CN102866351B (en) * | 2012-09-13 | 2014-07-09 | 十堰科纳汽车电器有限公司 | Switch state detection circuit |
| CN109270398B (en) * | 2017-07-18 | 2020-07-28 | 华为技术有限公司 | Method, device and equipment for detecting stable insertion state of plug-in card |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2174690Y (en) * | 1993-10-23 | 1994-08-17 | 湘潭市瑞桑信息技术公司 | Intelligent calorimeter |
| CN1549241A (en) * | 2003-05-20 | 2004-11-24 | 瑞昱半导体股份有限公司 | Analog front end apparatus with adjustable bandwidth wave filtering function |
-
2007
- 2007-10-11 CN CN2007101802122A patent/CN101408571B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2174690Y (en) * | 1993-10-23 | 1994-08-17 | 湘潭市瑞桑信息技术公司 | Intelligent calorimeter |
| CN1549241A (en) * | 2003-05-20 | 2004-11-24 | 瑞昱半导体股份有限公司 | Analog front end apparatus with adjustable bandwidth wave filtering function |
Non-Patent Citations (1)
| Title |
|---|
| JP特开2002-198792A 2002.07.12 |
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| Publication number | Publication date |
|---|---|
| CN101408571A (en) | 2009-04-15 |
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