CN101394155A - Inner automatic gain control loop for VGA - Google Patents
Inner automatic gain control loop for VGA Download PDFInfo
- Publication number
- CN101394155A CN101394155A CNA2007102017929A CN200710201792A CN101394155A CN 101394155 A CN101394155 A CN 101394155A CN A2007102017929 A CNA2007102017929 A CN A2007102017929A CN 200710201792 A CN200710201792 A CN 200710201792A CN 101394155 A CN101394155 A CN 101394155A
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- vga
- control
- gain control
- circuit
- gain
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- Control Of Amplification And Gain Control (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
The invention provides an automatic gain control loop which is applicable to the inner gain control of VGA. The circuit is composed of a detector of peak value, a comparator and a numeric part. The purpose of the inner automatic gain control is achieved through the following steps: the charging and discharging circuit of a charge pump is controlled through the detection of an output voltage value output by the circuit, and the voltage value is converted into a numerical control signal by the comparator so as to change the gain control of the VGA.
Description
Technical field
The present invention is the automatic gain control loop of a kind of VGA of being applied to internal gain control, particularly be the internal gain control loop of the variable gain amplifier in the receiver.
Background technology
As everyone knows, the signal amplitude that receives of receiver has very big dynamic range.Weak signal need be received link significantly amplifies, and strong signal then only needs link to provide corresponding gain to get final product.Do not make circuit saturated for the signal to different amplitudes carries out suitable processing, must in circuit, use the Gain Adjustable circuit.And this Gain Adjustable circuit need be made automatic adjustment to the amplitude of input signal, therefore just needs an automatic gain control loop.
Traditional internal gain control loop input is from the MAG signal of ADC output.By discharging and recharging of MAG signal controlling charge pump, the voltage of resulting outer electric capacity is as exporting to the VGA circuit as control signal.This type of loop requires circuit to comprise the ADC part, is applicable to analog gain control, or has adopted the digital control VGA of voltage logarithmic converter and exponential voltage generator, can not be directly and numerically controlled VGA circuit interface.
The present invention then directly detects the intermediate frequency output signal, and no longer requiring has the ADC part, and has comprised digital control part, can directly apply to numerically controlled VGA.
Summary of the invention
The objective of the invention is, make the loop of design directly provide digital gain control, reach the purpose of automatic gain control to VGA.
For achieving the above object, the present invention has adopted following technical scheme: circuit is made up of peak detector, comparator and numerical portion.Detect VGA output voltage signal size by peak detector, produce the magnitude of voltage of a reflection output voltage amplitude, this magnitude of voltage and a voltage window are compared, the work of control figure part, reduce or increase the gain of VGA, then carry out the judgement of a new round, reach requirement, make till the numerical portion locking up to signal amplitude.
Description of drawings:
Fig. 1: the present invention is applied to the automatic gain control loop of VGA internal gain control
Fig. 2: peak detector of the present invention
Fig. 3: the comparator among the present invention in the peak detector
Fig. 4: the charge pump among the present invention in the peak detector
Fig. 5: the comparator among the present invention
Specific implementation method
For VGA being carried out internal gain control, the inventor realizes by adopting following technical scheme: form automatic gain control loop by peak detector, comparator and numerical portion, as shown in Figure 1.
Fig. 2 is the built-up circuit of peak detector.Fig. 3 and Fig. 4 are respectively comparator and the charge pump in the peak detector.At first, the positive and negative two ends of VGA output enter two comparators in the peak detector respectively.By the different connected modes of comparator, make it all when signal amplitude is higher than reference voltage, obtain high level output.Again by or door obtain one only relevant and export with the numeral of phase-independent and to control discharging and recharging of subordinate's charge pump with the differential signal amplitude.When signal amplitude was higher than reference level, output signal " up " was low, and " dn " is high, otherwise " up " is high, and " dn " is low.Charge pump circuit is to be realized by current source circuit.Again with point that the outer electric capacity of sheet links to each other on by from the switching signal " up " of peak detector and the break-make of " dn " Control current path.When " up " is high, " dn " when low, then PMOS loop conducting, i.e. the charge circuit conducting of charge pump is charged to the outer electric capacity of sheet; When " up " is low, when " dn " is high, then NMOS loop conducting, i.e. the discharge loop conducting of charge pump is discharged to the outer electric capacity of sheet.According to the time that discharges and recharges, the voltage on the outer electric capacity of sheet will obtain a stable value.
Comparator behind the peak detector as shown in Figure 5.Comparator is compared the magnitude of voltage on the outer electric capacity of this sheet with a voltage window of being made of VREFH and VREFL.If the magnitude of voltage on the electric capacity illustrates that the VGA output amplitude is moderate in voltage window, do not need to change the gain of VGA.At this moment, the output of comparator " Inrange " is high, no matter why " Dircon " is worth, numerical portion all is in the lock state, and does not change the gain controlling word of VGA.If it is high that the voltage ratio reference windows on the electric capacity is wanted, then the output of comparator " Inrange " is low, and " Dircon " is high, and control figure partly makes the VGA gain increase.If the voltage ratio reference windows on the electric capacity is low, then the output of comparator " Inrange " is low, and " Dircon " also is low, and control figure partly makes the VGA gain reduce.It is digital control so just to have realized what comparing by internal loop, reaches the purpose of VGA being carried out internal gain control.
In sum,, reached the purpose of this invention, promptly realized directly to obtain the automatic gain control loop of digital gain control by the as above enforcement of technical scheme.
Claims (7)
- [claim 1] a kind of automatic gain control loop that is applied to the control of VGA internal gain, it is characterized in that: circuit is made up of peak detector, comparator and numerical portion, and numerical portion is directly controlled the VGA circuit, makes the VGA amplitude output signal keep constant.
- [claim 2] a kind of automatic gain control loop that is applied to the control of VGA internal gain as claimed in claim 1, it is characterized in that: peak detector is made of jointly voltage comparator and charge pump, by voltage comparator control charge pump to the outer electric capacity of sheet discharge and recharge obtain one can the reflected signal amplitude magnitude of voltage.
- [claim 3] a kind of automatic gain control loop that is applied to the control of VGA internal gain as claimed in claim 1, it is characterized in that: through after the peak detector, the magnitude of voltage that obtains enters comparator, obtains the signal of two control figure circuit workings.
- [claim 4] a kind of automatic gain control loop that is applied to the control of VGA internal gain as claimed in claim 1, it is characterized in that: can directly be controlled the gain control signal of VGA by the numerical portion of circuit, the gain controlling word is corresponding one by one with gain.
- [claim 5] a kind of automatic gain control loop that is applied to the control of VGA internal gain as claimed in claim 1, it is characterized in that: automatic gain control loop can turn-off fully.
- [claim 6] a kind of automatic gain control loop that is applied to the control of VGA internal gain as claimed in claim 1 is characterized in that: can change the loop-locking time by changing the outer electric capacity size of sheet.
- Charge pump circuit in [claim 7] peak detector as claimed in claim 2 is characterized in that: adopt the bias current source circuit to constitute, by the direction of switch control charging and discharging currents.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNA2007102017929A CN101394155A (en) | 2007-09-20 | 2007-09-20 | Inner automatic gain control loop for VGA |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNA2007102017929A CN101394155A (en) | 2007-09-20 | 2007-09-20 | Inner automatic gain control loop for VGA |
Publications (1)
Publication Number | Publication Date |
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CN101394155A true CN101394155A (en) | 2009-03-25 |
Family
ID=40494276
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CNA2007102017929A Pending CN101394155A (en) | 2007-09-20 | 2007-09-20 | Inner automatic gain control loop for VGA |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102064841A (en) * | 2009-11-16 | 2011-05-18 | 杭州士兰微电子股份有限公司 | Amplitude shift keying (ASK)/on-off keying (OOK) radio frequency (RF) receiving circuit |
CN102420588A (en) * | 2011-12-13 | 2012-04-18 | 四川和芯微电子股份有限公司 | Signal regulating circuit and method |
CN102739177A (en) * | 2012-07-17 | 2012-10-17 | 中科芯集成电路股份有限公司 | Self-test digital AGC (automatic gain control) method and circuit |
-
2007
- 2007-09-20 CN CNA2007102017929A patent/CN101394155A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102064841A (en) * | 2009-11-16 | 2011-05-18 | 杭州士兰微电子股份有限公司 | Amplitude shift keying (ASK)/on-off keying (OOK) radio frequency (RF) receiving circuit |
CN102064841B (en) * | 2009-11-16 | 2014-04-09 | 杭州士兰微电子股份有限公司 | Amplitude shift keying (ASK)/on-off keying (OOK) radio frequency (RF) receiving circuit |
CN102420588A (en) * | 2011-12-13 | 2012-04-18 | 四川和芯微电子股份有限公司 | Signal regulating circuit and method |
CN102739177A (en) * | 2012-07-17 | 2012-10-17 | 中科芯集成电路股份有限公司 | Self-test digital AGC (automatic gain control) method and circuit |
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Open date: 20090325 |