CN101393965B - Phase change memory device and methods of fabricating the same - Google Patents
Phase change memory device and methods of fabricating the same Download PDFInfo
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- CN101393965B CN101393965B CN2008101358085A CN200810135808A CN101393965B CN 101393965 B CN101393965 B CN 101393965B CN 2008101358085 A CN2008101358085 A CN 2008101358085A CN 200810135808 A CN200810135808 A CN 200810135808A CN 101393965 B CN101393965 B CN 101393965B
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
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Abstract
Phase change memory devices can have bottom patterns on a substrate. Line-shaped or L-shaped bottom electrodes can be formed in contact with respective bottom patterns on a substrate and to have top surfaces defined by dimensions in x and y axes directions on the substrate. The dimension along the x-axis of the top surface of the bottom electrodes has less width than a resolution limit of a photolithography process used to fabricate the phase change memory device. Phase change patterns can be formed in contact with the top surface of the bottom electrodes to have a greater width than each of the dimensions in the x and y axes directions of the top surface of the bottom electrodes and top electrodes can be formed on the phase change patterns, wherein the line shape or the L shape represents a sectional line shape or a sectional L shape of the bottom electrodes in the x-axis direction.
Description
Technical field
The present invention relates to semiconductor storage unit and manufacture method thereof, relate more specifically to have phase change memory device and the manufacture method thereof of hearth electrode.
Background technology
The structure cell of phase change memory device (unit cell) comprises access device and is connected in series to the data storage elements of access device.Data storage elements can comprise the hearth electrode that is electrically connected to access device and with hearth electrode phase change material contacting layer.Phase-change material layers can be according to the magnitude of current that provides to it and between noncrystalline state and the crystalline state or carry out TURP between the various resistance states in crystalline state and change.
When program current flows through hearth electrode, the joule's heat energy of generation at the interface that can be between phase-change material layers and hearth electrode.Such joule's heat energy can be converted to noncrystalline state or crystalline state with the part (hereinafter referred to as " transition region ") of phase-change material layers.Has the resistance of transition region of noncrystalline state greater than the resistance of the transition region with crystalline state.Therefore, by detecting the electric current flow through transition region in read mode, the data difference of storing in can the phase-change material layers with phase change memory device is logic one (1) or logical zero (0).
Summary of the invention
In according to some embodiments of the present invention, phase change memory device can have in suprabasil bottom pattern.The hearth electrode of wire shaped or L shaped shape can be formed with suprabasil respective base pattern and contact, and has the upper surface that is limited by the yardstick on suprabasil x and the y direction of principal axis.Have less than the width for the manufacture of the resolution limit of the photoetching treatment of phase change memory device along the yardstick of the x axle of the upper surface of hearth electrode.The phase transformation pattern can be formed with the upper surface of hearth electrode and contact, to have than the x of the upper surface of hearth electrode and the bigger width of each yardstick on the y direction of principal axis, and top electrode can be formed on the phase transformation pattern, wherein, described wire shaped or L shaped shape are illustrated in hatching shape or the L shaped shape of section of the hearth electrode on the x direction of principal axis.
Description of drawings
As shown in the drawing, by following more specifically description to example embodiment of the present invention, above-mentioned and other purposes, feature and advantage of the present invention will become obvious.Accompanying drawing is uninevitable proportionally to be drawn, and focuses on illustrating principle of the present invention.
Fig. 1 is at the equivalent circuit figure according to the part of the cell array region of the phase change memory device in the some embodiments of the present invention.
Fig. 2 be corresponding with the equivalent circuit figure of Fig. 1, according to the plane graph of the cell array region of the phase change memory device in the some embodiments of the present invention.
Fig. 3 A-3E is the viewgraph of cross-section that line I-I ' and the II-II ' along Fig. 2 gets, and is used for being illustrated in according to some embodiments of the present invention, for the manufacture of the method for phase change memory device.
Fig. 4 is illustrated in according in the some embodiments of the present invention, for the manufacture of the plane graph of the method for phase change memory device.
Fig. 5 A-5C is the viewgraph of cross-section that line I-I ' and the II-II ' along Fig. 4 gets, and is used for being illustrated in according to some embodiments of the present invention, for the manufacture of the method for phase change memory device.
Fig. 6 A-6C is illustrated in according in the some embodiments of the present invention, for the manufacture of the viewgraph of cross-section of the method for phase change memory device.
Fig. 7 is illustrated in according in the some embodiments of the present invention, for the manufacture of the viewgraph of cross-section of the method for phase change memory device.
Fig. 8 A-8C is illustrated in according in the some embodiments of the present invention, for the manufacture of the viewgraph of cross-section of the method for phase change memory device.
Fig. 9 is illustrated in according in the some embodiments of the present invention, for the manufacture of the plane graph of the method for phase change memory device.
Figure 10 is the viewgraph of cross-section that line III-III ' and the IV-IV ' along Fig. 9 gets, and is illustrated in according in the some embodiments of the present invention, for the manufacture of the method for phase change memory device.
Figure 11 is at the equivalent circuit figure according to the part of the cell array region of the phase change memory device in the some embodiments of the present invention.
Figure 12 be diagram corresponding with the equivalent circuit figure of Figure 11, in according to some embodiments of the present invention for the manufacture of the viewgraph of cross-section of the method for phase change memory device.
Figure 13 be corresponding to the equivalent circuit figure of Fig. 1, according to the plane graph of the cell array region of the phase change memory device in the some embodiments of the present invention.
Figure 14 A-14E is the viewgraph of cross-section that line V-V ' and the VI-VI ' along Figure 13 gets, and is illustrated in according in the some embodiments of the present invention, for the manufacture of the method for phase change memory device.
Figure 15 A-15B is the viewgraph of cross-section that line V-V ' and the VI-VI ' along Figure 13 gets, and is illustrated in according in the some embodiments of the present invention, for the manufacture of the method for phase change memory device.
Figure 16 is at the plane graph according to the cell array region of the phase change memory device in the some embodiments of the present invention.
Figure 17 is the viewgraph of cross-section that line V-V ' and the VI-VI ' along Figure 16 gets, and is illustrated in according in the some embodiments of the present invention, for the manufacture of the method for phase change memory device.
Figure 18 is at the amplification view according to the annular upper surface of the cylinder hearth electrode of Figure 14 C in the some embodiments of the present invention.
The plane graph of Figure 19 A-19D in according to some embodiments of the present invention, by the structure that obtains with the part of the cylinder hearth electrode of linear insulating pattern cutting Figure 18 along line of cut C1, C2, C3 and C4 respectively.
Figure 20 is illustrated in according in the some embodiments of the present invention, for the manufacture of the viewgraph of cross-section of the method for phase change memory device.
Embodiment
Below referring to accompanying drawing the present invention is described more fully, wherein, embodiments of the invention are shown for example.But the present invention can be with many multi-form embodiments, and are not appreciated that and are limited to example embodiment given herein.But these example embodiment are provided, and make that the disclosure is thorough and complete, and will pass on scope of the present invention all sidedly to those skilled in the art.And, describe and graphic each embodiment also comprises the embodiment of its complementary conduction type at this.
Be appreciated that, when an element be called as " being connected to ", " being couple to " or " in response to " during (and/or its version) another element, it can directly be connected to, be couple to or in response to another element, perhaps can have intermediary element.On the contrary, when an element is called as " being directly connected to ", another element of " being directly coupled to " or " corresponding directly to " (and/or its version), there is not intermediary element.In whole accompanying drawings, same numeral is represented similar elements.As used herein term " and/or " comprise any He all combinations of one or more listed projects that are associated, and can be abbreviated as "/".
Can be used herein to the various elements of description, parts, zone, layer and/or part though be appreciated that the term first, second, third, etc., these elements, parts, zone, layer and/or part should not limited by these terms.These terms only are used for element of difference, parts, zone, layer or part and another zone, layer or part.Therefore, under the situation that does not break away from instruction of the present invention, first element described herein, parts, zone, layer or part can be called second element, parts, zone, layer or part.
Term only is used for describing specific embodiment as used herein, is not intended to limit the present invention.Singulative " one " and " being somebody's turn to do " are intended to also comprise plural form as used herein, unless context clearly indication in addition.It should also be understood that, when being used for this specification, term " comprises " and/or " comprising " (and/or its version) shows and have described feature, integer, step, operation, element and/or parts, does not exist or increases one or more other features, integer, step, operation, element and/or their group but do not get rid of.On the contrary, in the time of in being used for this specification, term " by ... constitute " (and/or its version) shows feature, integer, step, operation, element and/or the parts of described quantity, and eliminating additional features, integer, step, operation, element and/or parts.
Unless otherwise defined, as used herein all terms (comprising scientific and technical terminology) have with the present invention under the identical implication of the implication of those of skill in the art's common sense.Can further understand, term (such as those terms that defines in normally used dictionary) should be interpreted as having consistent implication in this area and the application's context, and will on desirable or excessively formal meaning, it not made an explanation, unless so limit clearly at this.
The term of space correlation, such as " ... under ", " ... following ", " bottom ", " being lower than ", " in ... top ", " top ", " top " etc., be used the relation of element shown in being used for being described in the accompanying drawing or feature and other elements or feature for convenience of description.Be appreciated that the term of space correlation is intended to contain the different azimuth of device except the described orientation of accompanying drawing, in using or operating.For example, if the device in the accompanying drawing is reversed, then be described as be in other elements or feature " under " or the element of " bottom " then be positioned in described other elements or feature " on ".Therefore, exemplary term " under " can contain on and under two kinds of orientation.Device can be positioned (revolve and turn 90 degrees or rotate to other orientation) in addition, and explains the descriptor of space correlation as used herein accordingly.And, " laterally " expression and the vertical direction direction of quadrature basically as used herein.
Be appreciated that the section shape that is illustrated in the hearth electrode on the x direction of principal axis according to the linear and L shaped hearth electrode described in the embodiments of the invention, and L shaped hearth electrode comprise in vertical direction L shaped part and the part of described L shaped symmetrical structure.As an alternative, linear and L shaped hearth electrode can be illustrated in the section shape of the hearth electrode on the y direction of principal axis.
Example embodiment of the present invention provides phase change memory device and the manufacture method thereof with hearth electrode, and described phase change memory device is adapted to pass through and reduces boundary zone between phase-change material layers and hearth electrode, that produce joule's heat energy and reduce the electric current that will apply during reset operation.
In some example embodiments of the present invention, the width that the y axle of the upper surface of hearth electrode has can be equal to, or greater than the limit of resolution of photoetching treatment.
In other example embodiment, the width that the y axle of the upper surface of hearth electrode has can be less than the limit of resolution of photoetching treatment.
In other example embodiment, described L shaped hearth electrode can comprise in vertical direction L shaped part and in the part of described L shaped symmetrical structure.
The L shaped structure of described L shaped hearth electrode adjacent one another are can be set symmetrically.
In other example embodiment, described bottom pattern can be diode.
In other example embodiment, described bottom pattern can be the contact plunger that contacts with substrate and the conductive pattern that is arranged on the described contact plunger.Can arrange the transistor that is electrically connected to corresponding bottom pattern in substrate.
In other example embodiment, described phase transformation pattern can extend in the direction parallel with the x axle of the upper surface of described hearth electrode, perhaps can extend in the direction parallel with the y axle of the upper surface of described hearth electrode.
In yet another aspect, the present invention relates to method for the manufacture of phase change memory device.Described method comprises: the substrate that preparation has bottom pattern.Form linear or L shaped hearth electrode, it contacts with corresponding bottom pattern, and has a plurality of upper surfaces by the suprabasil x with described bottom pattern and y axis limit.In this case, the x axle of the upper surface of described hearth electrode has the width less than the limit of resolution of photoetching treatment.In addition, the section shape of described linear or L shaped expression hearth electrode on the x direction of principal axis.The phase transformation pattern is formed, and it contacts with the upper surface of hearth electrode, and has than the x of the upper surface of described hearth electrode and each bigger width of y axle.Form top electrode at described phase transformation pattern.
In some example embodiments of the present invention, the y axle of the upper surface of described hearth electrode can have the width of the limit of resolution of the photoetching treatment of being equal to, or greater than.
In other example embodiment, form described linear hearth electrode and can be included in the substrate with described bottom pattern and form interlayer insulative layer.Can form linear groove in described interlayer insulative layer, described linear groove extends and is exposed to simultaneously the part of two adjacent on x direction of principal axis bottom pattern at the y direction of principal axis.Can form the hearth electrode spacer at the sidewall of described linear groove, and can in the substrate with described hearth electrode spacer, form first insulating pattern of filling described linear groove.Can be formed on the linear mask pattern that the x direction of principal axis extends in the substrate with described first insulating pattern, described hearth electrode spacer and described interlayer insulative layer, and can use described linear mask pattern to come described first insulating pattern of etching, described hearth electrode spacer and described interlayer insulative layer as etching mask, up to exposing bottom pattern.Subsequently, can in the etched zone of institute, fill second insulating pattern.
In other example embodiment, forming described L shaped hearth electrode can be included in the substrate with described bottom pattern and form interlayer insulative layer, and in described interlayer insulative layer, form linear groove, described linear groove extends at the y direction of principal axis, and is exposed to the part of two adjacent on x direction of principal axis bottom pattern simultaneously.Subsequently, can form bottom electrode layer and partition layer in the substrate with described linear groove in regular turn.And can eat-back described partition layer and described bottom electrode layer in regular turn to form L shaped hearth electrode and spacer.Can form first insulating pattern of filling described linear groove in the substrate with described L shaped hearth electrode pattern and described spacer, and be formed on the linear mask pattern that the x direction of principal axis extends in the substrate with described first insulating pattern and described L shaped hearth electrode pattern.Can use described linear mask pattern to come described first insulating pattern of etching, described L shaped hearth electrode pattern and described interlayer insulative layer as etching mask, up to exposing described bottom pattern.Subsequently, can in etched zone, fill second insulating pattern.
In other example embodiment, forming described L shaped hearth electrode can be included in the substrate with bottom pattern and form interlayer insulative layer, and form linear groove in described interlayer insulative layer, described linear groove extends and is exposed to simultaneously the part of two adjacent on x direction of principal axis bottom pattern at the y direction of principal axis.Subsequently, can form the hearth electrode pattern at sidewall and the lower surface of described linear groove, and can form built-in electrical insulation pattern, the described linear groove of described built-in electrical insulation pattern fills in the substrate with described hearth electrode pattern.In the substrate with described built-in electrical insulation pattern and described hearth electrode pattern, can form the mask pattern with first opening and second opening, described first opening is exposed to the middle section of the described built-in electrical insulation pattern on the y direction of principal axis, and described second opening is exposed to the zone of going up between the described bottom pattern on the x direction of principal axis.Can use described mask pattern to come the described built-in electrical insulation pattern of etching, described hearth electrode pattern and described interlayer insulative layer as etching mask, up to exposing described bottom pattern.Subsequently, can in the etched zone of institute, fill insulating pattern.
In other example embodiment, the y axle of the upper surface of described hearth electrode can have the width less than the limit of resolution of photoetching treatment.
In other example embodiment, forming described linear hearth electrode can comprise: form interlayer insulative layer in the substrate with described bottom pattern, and form linear groove in described interlayer insulative layer, described linear groove extends and is exposed to simultaneously the part of two adjacent on x direction of principal axis bottom pattern at the y direction of principal axis.Can form the hearth electrode spacer at the sidewall of described linear groove, and can in the substrate with described hearth electrode spacer, form first insulating pattern of filling described linear groove.Can be formed on the linear sacrifice pattern that the x direction of principal axis extends in the substrate with described first insulating pattern, described hearth electrode spacer and described interlayer insulative layer, and can form the mask spacer at the sidewall of described linear sacrifice pattern.Can use described mask spacer to come the described linear sacrifice pattern of etching, described interlayer insulative layer, described hearth electrode spacer and described first insulating pattern as etching mask, up to exposing described bottom pattern.Subsequently, can in the etched zone of institute, fill second insulating pattern.In this case, can above the respective base pattern, form the sidewall of linear sacrifice pattern.
In other example embodiment, forming described L shaped hearth electrode can comprise: form interlayer insulative layer in the substrate with described bottom pattern, and form linear groove in described interlayer insulative layer, described linear groove extends and is exposed to simultaneously the part of two adjacent on x direction of principal axis bottom pattern at the y direction of principal axis.Hearth electrode and partition layer can be in the substrate with described linear groove, formed in regular turn, and described partition layer and described bottom electrode layer can be eat-back in regular turn to form L shaped hearth electrode pattern and spacer.Can in the substrate with described L shaped hearth electrode pattern and spacer, form first insulating pattern of filling described linear groove, and can be formed on the linear sacrifice pattern that the x direction of principal axis extends in the substrate with described first insulating pattern and described L shaped hearth electrode pattern.Can form the mask spacer at the sidewall of described linear sacrifice pattern, and can use described mask spacer to come the described linear sacrifice pattern of etching, described first insulating pattern, described L shaped hearth electrode pattern and described interlayer insulative layer as etching mask, up to exposing described bottom pattern.Subsequently, can in the etched zone of institute, fill second insulating pattern.Can above the respective base pattern, form the sidewall of linear sacrifice pattern.
In other example embodiment, described L shaped hearth electrode can comprise in vertical direction L shaped part and the part of described L shaped symmetrical structure.Described L shaped hearth electrode adjacent one another are can have the L shaped structure of symmetry.
In other example embodiment, described bottom pattern can be formed by diode.
In other example embodiment, described bottom pattern can be formed by the contact plunger that contacts with described substrate and the conductive pattern that is arranged on the described contact plunger.Can before forming described contact plunger, form the transistor that is electrically connected to the respective base pattern in substrate.
In other example embodiment, described phase transformation pattern can extend in the direction parallel with the x axle of the upper surface of described hearth electrode, perhaps can extend in the direction parallel with the y axle of the upper surface of described hearth electrode.
In other example embodiment, can form described phase transformation pattern and described top electrode simultaneously by patterning.
In yet another aspect, the present invention relates to method for the manufacture of phase change memory device.Described method comprises: the substrate that preparation has bottom pattern.Form interlayer insulative layer in the substrate with described bottom pattern.Pass described interlayer insulative layer and contact to form the cylinder hearth electrode with described bottom pattern.In described interlayer insulative layer, form insulating pattern, to cut the part of described cylinder hearth electrode and interlayer insulative layer in vertical direction.The top that the phase transformation pattern is formed the cylinder hearth electrode that is cut with part contacts.Form top electrode at described phase transformation pattern.
In some example embodiments of the present invention, the cylinder hearth electrode that is partly cut can have crescent, " C " the shape or " (" shape of seeing from top view.
In other example embodiment, described bottom pattern can comprise diode and the diode electrode that piles up in regular turn.
In other example embodiment, described bottom pattern can comprise the contact plunger that contacts with described substrate and the conductive pattern that is arranged on the described contact plunger.Can form the transistor that is electrically connected to the respective base pattern in substrate.
In other example embodiment, form described insulating pattern and can comprise a part of cutting described cylinder hearth electrode and described interlayer insulative layer in vertical direction, to form groove, described groove exposes the part of upper surface of described bottom pattern and the sidewall that is cut of the cylinder hearth electrode that partly cut, also is included in and forms insulating barrier in the described groove.
In other example embodiment, form described insulating pattern and can comprise a part of cutting described cylinder hearth electrode and described interlayer insulative layer in vertical direction, with the upper surface of the cutting part that form to expose the cylinder hearth electrode that is partly cut and the groove of sidewall, and be included in and form insulating barrier in the described groove.
In other example embodiment, forming described cylinder hearth electrode can comprise: pass described interlayer insulative layer and form the hearth electrode contact hole, the upper surface of the described bottom pattern of described hearth electrode contact holes exposing.Can form bottom electrode layer to cover sidewall and the lower surface of the described hearth electrode contact hole on the interlayer insulative layer with described hearth electrode contact hole.Can form internal insulating layer to be filled in the suprabasil hearth electrode contact hole with described bottom electrode layer.Described internal insulating layer and described bottom electrode layer can be flattened, up to the upper surface that exposes described interlayer insulative layer.
In other example embodiment, behind the upper surface that exposes described interlayer insulative layer, can carry out planarization process at the described internal insulating layer of complanation and described bottom electrode layer at least one times.
In yet another aspect, the present invention relates to method for the manufacture of phase change memory device.Described method comprises: the substrate that preparation has bottom pattern.Form interlayer insulative layer in the substrate with bottom pattern.Pass described interlayer insulative layer and form the cylinder hearth electrode in corresponding bottom pattern.On x axle or y direction of principal axis, in interlayer insulative layer, form linear insulating pattern, to cut the part of described cylinder hearth electrode and described interlayer insulative layer in vertical direction.The phase transformation pattern is formed with the top of the cylinder hearth electrode that is partly cut and contacts.Form described top electrode at corresponding phase transformation pattern.
In some example embodiments of the present invention, the cylinder hearth electrode that is partly cut can have crescent, " C " the shape or " (" shape of seeing from top view.
In other example embodiment, can cut the same section of described cylinder hearth electrode and arrange with the uniform CCC that forms when checking the cylinder hearth electrode that is partly cut from top view.
In other example embodiment, described phase transformation pattern can be formed on the direction parallel or vertical with the surface and extend, and has cut the part of described cylinder hearth electrode along this surface.
In other example embodiment, form described linear insulating pattern and can comprise a part of cutting described cylinder hearth electrode and described interlayer insulative layer in vertical direction, to form linear groove, described linear groove exposes the part of upper surface of described bottom pattern and the sidewall that cuts of the cylinder hearth electrode that partly cut, and is included in and forms insulating barrier in the described linear groove.
In other example embodiment, form described linear insulating pattern and can comprise a part of cutting described cylinder hearth electrode and described interlayer insulative layer in vertical direction, with the upper surface of the cutting part that form to expose the cylinder hearth electrode that is partly cut and the linear groove of sidewall, and be included in and form insulating barrier in the described linear groove.
Fig. 1 is at the equivalent circuit figure according to the part of the cell array region of the phase change memory device in the some embodiments of the present invention.
Referring to Fig. 1, word line WL, a plurality of phase transformation pattern Rp and a plurality of diode D that can be included in the bit line BL that is arranged parallel to each other on the column direction, be arranged parallel to each other in the row direction according to the phase change memory device of example embodiment of the present invention.
Bit line BL can intersect with word line WL.Phase transformation pattern Rp can be disposed in the corresponding intersection of bit line BL and word line WL.Each of diode D can be connected in series to a corresponding phase transformation pattern Rp.In addition, each of phase transformation pattern Rp can be connected to a corresponding bit line BL.Each diode D can be connected to a corresponding word line WL.Diode D can be used as access device.In according to some embodiments of the present invention, can omit diode D.In according to some embodiments of the present invention, access device can be metal-oxide semiconductor (MOS) (MOS) transistor.
Referring now to Fig. 2 and 3A-3E, the method for the manufacture of phase change memory device according to example embodiment of the present invention is described.In this case, the Reference numeral A in Fig. 3 A-3E and B represent the viewgraph of cross-section got along line I-I ' and the II-II ' of Fig. 2 respectively.
Referring to Fig. 2 and 3A, can in the presumptive area of substrate 100, be formed for being limited with the separator 102 of source region 102a.Can use the semiconductor-based end such as silicon wafer or silicon-on-insulator (SOI) wafer for substrate 100.Substrate 100 can have the foreign ion of first conduction type.Can use shallow trench isolation to form separator 102 from (STI) technology.Separator 102 can be combined to form by silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its.Active area 102a can be formed has wire shaped.
The foreign ion of second conduction type different with first conduction type can be injected in the active area 102a, to form word line WL 105.Below, simple in order to illustrate, suppose that first and second conduction types are respectively P and N-type.In according to some embodiments of the present invention, first and second conduction types can be respectively N and P type.
Can form first interlayer insulative layer 107 in the substrate 100 with word line WL 105 and separator 102.In according to some embodiments of the present invention, first interlayer insulative layer 107 can be combined to form by silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its.First interlayer insulative layer 107 can be patterned to form contact hole 108h, and described contact hole 108h exposes the presumptive area of word line WL105.
First and second semiconductor patterns 110 and 112 can be deposited in the contact hole 108h in regular turn.In according to some embodiments of the present invention, can use growth technology or chemical vapor deposition (CVD) technology to form first and second semiconductor patterns 110 and 112.In according to some embodiments of the present invention, first and second semiconductor patterns 110 and 112 can comprise diode D.
Can form diode electrode 115 at corresponding diode D.In according to some embodiments of the present invention, diode electrode 115 can comprise from one of the group selection of being made up of following layer: titanium (Ti) layer, titanium silicon (TiSi) layer, titanium nitride (TiN) layer, titanium oxynitrides (TiON) layer, tungsten titanium (TiW) layer, TiAlN (TiAlN) layer, titanium oxynitrides aluminium (TiAlON) layer, titanium silicon nitride (TiSiN) layer, titanium nitride boron (TiBN) layer, tungsten (W) layer, tungsten nitride (WN) layer, nitrogen tungsten oxide (WON) layer, tungsten nitride carbon (WCN) layer, silicon (Si) layer, tantalum (Ta) layer, tantalum silicide (TaSi) layer, tantalum nitride (TaN) layer, nitrogen tantalum oxide (TaON) layer, tantalum nitride aluminium (TaAlN) layer, tantalum nitride silicon (TaSiN) layer, tantalum nitride carbon (TaCN) layer, aluminium (Mo) layer, molybdenum nitride (MoN) layer, molybdenum nitride silicon (MoSiN) layer, molybdenum nitride aluminium (MoAlN) layer, niobium nitride (NbN) layer, zirconium nitride silicon (ZrSiN) layer, zirconium nitride aluminium (ZrAlN) layer, ruthenium (Ru) layer, cobalt silicide (CoSi) layer, nickle silicide (NiSi) layer, conduction carbon family layer, copper (Cu) layer and combination thereof.For example, in according to some embodiments of the present invention, can be by depositing TiN layer and W layer form diode electrode 115 in regular turn.
Can in contact hole 108h, form diode electrode 115.In this case, diode electrode 115 can autoregistration on corresponding diode D.In according to some embodiments of the present invention, can omit diode electrode 115.
Referring to Fig. 2 and 3B, can form second interlayer insulative layer 117 in the substrate 100 with diode electrode 115.Second interlayer insulative layer 117 can be patterned to form linear groove 120t in second interlayer insulative layer 117, and described linear groove 120t is exposed to the part of the diode electrode 115 of the next-door neighbour on the x direction of principal axis simultaneously, and extends at the y direction of principal axis.Can be along forming bottom electrode layer 122 at the suprabasil bottom ladder (bottom step) with linear groove 120t.Bottom electrode layer 122 can cover the diode electrode that is exposed 115 in the linear groove 120t and first interlayer insulative layer 107 that is exposed, and can cover the sidewall of linear groove 120t and the upper surface of second interlayer insulative layer 117.
In according to some embodiments of the present invention, bottom electrode layer 122 can comprise from one of the group selection of being made up of following layer: the Ti layer, the TiSi layer, the TiN layer, the TiON layer, the TiW layer, the TiAlN layer, the TiAlON layer, the TiSiN layer, the TiBN layer, the W layer, the WN layer, the WON layer, the WSiN layer, the WBN layer, the WCN layer, the Si layer, the Ta layer, the TaSi layer, the TaN layer, the TaON layer, the TaAlN layer, the TaSiN layer, the TaCN layer, the Mo layer, the MoN layer, the MoSiN layer, the MoAlN layer, the NbN layer, the ZrSiN layer, the ZrAlN layer, the Ru layer, the CoSi layer, the NiSi layer, conduction carbon family layer, Cu layer and combination thereof.
Referring to Fig. 2 and 3C, can eat-back substrate with bottom electrode layer 122 to form hearth electrode spacer 122 ', described hearth electrode spacer 122 ' covers the sidewall of linear groove 120t.Can form first insulating pattern 125 of filling linear groove 120t in the substrate with hearth electrode spacer 122 '.In order to describe this point in detail, form first insulating pattern 125 and can be included in formation first insulating barrier in the substrate with hearth electrode spacer 122 ', and complanation is that first insulating barrier is to expose the upper surface of hearth electrode spacer 122 '.First insulating pattern 125 can be formed by insulating barrier, such as silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its combination.In according to some embodiments of the present invention, first insulating pattern 125 can be by forming with second interlayer insulative layer, 117 identical materials layers.
In other embodiments, at complanation first insulating barrier behind the upper surface that has exposed hearth electrode spacer 122 ', planarization process can be carried out once at least, in second interlayer insulative layer 117, more to be formed uniformly the height of hearth electrode spacer 122 '.
Referring to Fig. 2 and 3D, can be formed on the linear mask pattern 127 that the x direction of principal axis extends in the substrate with first insulating pattern 125, hearth electrode spacer 122 ' and second interlayer insulative layer 117.Linear mask pattern 127 can comprise linear opening 127t, and it is exposed to the upper area between adjacent diode electrode 115 on the y direction of principal axis.Linear mask pattern 127 can be formed by the material layer that has etching selectivity with respect to second interlayer insulative layer 117, first insulating pattern 125 and hearth electrode spacer 122 '.Linear mask pattern 127 can be hard mask pattern or photoresist pattern.Hard mask pattern can be formed by nitride layer.
Subsequently, can use linear mask pattern 127 to come etching second interlayer insulative layer 117, first insulating pattern 125 and hearth electrode spacer 122 ' as etching mask, up to having exposed first interlayer insulative layer 107 or diode electrode 115.As a result, form linear hearth electrode 122 at diode electrode 115 ".Linear hearth electrode 122 " have a upper surface by x and y axis limit.Linear hearth electrode 122 " the x axial extent of upper surface become and equal the thickness of hearth electrode spacer 122 '.Therefore, linear hearth electrode 122 " the x axle of upper surface can be formed the width that has less than the limit of resolution of photoetching treatment.Linear hearth electrode 122 on the x direction of principal axis " a plurality of parts can have the number " 1 " shape.
Referring to Fig. 2 and 3E, can remove linear mask pattern 127.Subsequently, can in etching area, fill second insulating pattern 130.In order to describe this point in detail, can form second insulating barrier in the substrate with etching area, and can described second insulating barrier of complanation, up to having exposed linear hearth electrode 122 " upper surface.As an alternative, can before forming second insulating barrier, not remove linear mask pattern 127, and can remove linear mask pattern 127 simultaneously with second insulating barrier by the processing of complanation second insulating barrier.
Can be in the substrate with second insulating pattern 130, simultaneously and linear hearth electrode 122 " sediment phase change pattern 135 and top electrode 137 in regular turn contiguously.In order to describe this point in detail, can in the substrate with second insulating pattern 130, form phase change layer and upper electrode layer in regular turn.Subsequently, in regular turn patterning upper electrode layer and phase change layer to form phase transformation pattern 135 and top electrode 137.
In according to some embodiments of the present invention, top electrode 137 BL can comprise that the formation of this group is the Ti layer from a layer of following group selection, the TiSi layer, the TiN layer, the TiON layer, the TiW layer, the TiAlN layer, the TiAlON layer, the TiSiN layer, the TiBN layer, the W layer, the WN layer, the WON layer, the WSiN layer, the WBN layer, the WCN layer, the Si layer, the Ta layer, the TaSi layer, the TaN layer, the TaON layer, the TaAlN layer, the TaSiN layer, the TaCN layer, the Mo layer, the MoN layer, the MoSiN layer, the MoAlN layer, the NbN layer, the ZrSiN layer, the ZrAlN layer, the Ru layer, the CoSi layer, the NiSi layer, conduction carbon family layer, Cu layer and combination thereof.
As mentioned above, according to the linear hearth electrode 122 of example embodiment of the present invention " can have the upper surface by x and y axis limit.Linear hearth electrode 122 " the x axle of upper surface have width less than the limit of resolution of photoetching treatment.Therefore, linear hearth electrode 122 " can overcome the patterning limit to have the area littler than prior art.As a result, can reduce wherein produce joule's heat energy, at phase transformation pattern 135 and linear hearth electrode 122 " between the boundary zone, in order to compared with prior art can reduce the electric current that will during reset operation, apply.In according to some embodiments of the present invention, term " linear " expression is the complete external boundary shape of the structure of contact phase transformation pattern 135 directly.In according to some embodiments of the present invention, term x and y axle are represented mutually orthogonal directions.
Fig. 4 is the plane graph for the manufacture of the method for phase change memory device according to other example embodiment of the present invention, and Fig. 5 A-5C is the viewgraph of cross-section that line I-I ' and the II-II ' along Fig. 4 gets, and is used for diagram according to the method for the manufacture of phase change memory device of other example embodiment of the present invention.Reference numeral A in Fig. 5 A-5C and B represent the viewgraph of cross-section got along line I-I ' and the II-II ' of Fig. 4 respectively.
Referring to Figure 4 and 5 A, in according to some embodiments of the present invention, can carry out with referring to the identical processing of the described method of Fig. 3 A-3C, up to first insulating pattern 125 of form filling linear groove 120t.Subsequently, can be formed on the linear sacrifice pattern 126 that the x direction of principal axis extends in the substrate with first insulating pattern 125.Can above respective diode electrode 115, form the sidewall of linear sacrifice pattern 126.Linear sacrifice pattern 126 can be made of the material layer that has low etching selectivity with respect to second interlayer insulative layer 117.Linear sacrifice pattern 126 can be formed by oxide skin(coating).Linear sacrifice pattern 126 can be by forming with second interlayer insulative layer, 117 identical materials layers.
Subsequently, can form mask spacer 128 at the sidewall of linear sacrifice pattern 126.Mask spacer 128 can be formed by the material layer that has etching selectivity with respect to second interlayer insulative layer 117, first insulating pattern 125 and hearth electrode spacer 122 '.Mask spacer 128 can be formed by hard mask pattern or photoresist pattern.Hard mask pattern can be formed by nitride layer.
Referring to Figure 4 and 5 B, can use mask spacer 128 to come the linear sacrifice pattern 126 of etching, second interlayer insulative layer 117 and hearth electrode spacer 122 ' and first insulating pattern 125 as etching mask, up to having exposed diode electrode 115.As a result, can form linear hearth electrode 122 at diode electrode 115 " '.
Referring to Figure 4 and 5 C, can remove mask spacer 128.Subsequently, can in etching area, fill second insulating pattern 130 '.In order to describe this point in detail, second insulating barrier can be formed in the substrate with etching area, and can be flattened up to having exposed linear hearth electrode 122 " ' upper surface.As an alternative, can before forming second insulating barrier, not remove mask spacer 128, and can come by the processing of complanation second insulating barrier to come along except mask spacer 128 with second insulating barrier simultaneously.
Subsequently, can carry out and form phase transformation pattern 135 and top electrode 137 referring to the identical processing of the described method of Fig. 3 E, they with linear hearth electrode 122 " ' be deposited in regular turn in the substrate with second insulating pattern 130 ' when contacting.Top electrode 137 can be used as bit line BL.Phase transformation pattern 135 can extend in the direction parallel with the line direction of linear groove 120t as shown in Figure 4 with top electrode 137 BL.As an alternative, phase transformation pattern 135 can extend in the direction vertical with the line direction of linear groove 120t with top electrode 137 BL.Top electrode 137 BL can extend in the direction vertical with word line 105 WL.
As mentioned above, according to the linear hearth electrode 122 of example embodiment of the present invention " ' can have the upper surface by x and y axis limit.Linear hearth electrode 122 " ' the x of upper surface and y axle can have width less than the limit of resolution of photoetching treatment.Therefore, linear hearth electrode 122 " ' can overcome the patterning limit to have the area littler than prior art.As a result, wherein produce joule's heat energy, at phase transformation pattern 135 and linear hearth electrode 122 " ' between the area at interface can be reduced, in order to compared with prior art can reduce the electric current that will during reset operation, apply.
Fig. 6 A-6C is illustrated in according in the some embodiments of the present invention, for the manufacture of the viewgraph of cross-section of the method for phase change memory device, and term " linear " expression directly contacts the shape of complete outer boundary of the structure of phase transformation pattern 135.Again referring to Fig. 2.
Referring to Fig. 2 and 6A, in according to some embodiments of the present invention, can carry out with referring to Fig. 3 A processing identical with the described method of 3B, up to forming linear groove 220t and bottom electrode layer 222.Subsequently, can form partition layer 224 along the ladder at the suprabasil linear groove 220t with bottom electrode layer 222.The thickness of partition layer 224 can freely be changed.Partition layer 224 can be formed by oxide skin(coating).Partition layer 224 can be by forming with second interlayer insulative layer, 117 identical materials layers.
Referring to Fig. 2 and 6B, can eat-back partition layer 224 and bottom electrode layer 222 in regular turn, up to having exposed first interlayer insulative layer 107.As a result, can form L shaped bottom electrode layer 222 ' and spacer 224 ' to cover the sidewall of linear groove 220t in regular turn.Shown in Fig. 6 B, L shaped hearth electrode pattern 222 ' can have around the structure of sidewall and the lower surface of spacer 224 '.Therefore, spacer 224 ' allows L shaped bottom electrode layer 222 ' at the symmetrical structure that has L shaped shape or described L shaped shape in the part of x axle.Can freely change the lower width of the L shaped shape of L shaped bottom electrode layer 222 ' according to the thickness of spacer 224 '.
As an alternative, in according to some embodiments of the present invention, can patterning bottom electrode layer 222 (not having spacer 224 ') to form the L shaped hearth electrode pattern of the sidewall that covers linear groove 220t.
Referring to Fig. 2 and 6C, can form first insulating pattern 225 of filling linear groove 220t in the substrate with L shaped hearth electrode pattern 222 ' and spacer 224 '.First insulating pattern 225 can be by forming with second interlayer insulative layer, 117 identical materials layers.First insulating pattern 225 can be formed by oxide skin(coating).
Subsequently, can carry out with referring to the identical processing of the described method of Fig. 3 D, to be formed on the linear mask pattern that the x direction of principal axis extends in the substrate with first insulating pattern 225 and L shaped bottom electrode layer 222 '.Can use described linear mask pattern to come etching first insulating pattern 225, spacer 224 ', L shaped hearth electrode pattern 222 ' and second interlayer insulative layer 117 as etching mask, up to exposing first interlayer insulative layer 107 or diode electrode 115.As a result, can form L shaped bottom electrode layer 222 at diode electrode 115 ".
L shaped bottom electrode layer 222 " can have the upper surface by x and y axis limit.L shaped bottom electrode layer 222 " the width of x axle of upper surface become and equal the thickness of bottom electrode layer 222.Therefore, L shaped bottom electrode layer 222 " the x axle of upper surface can be formed the width that has less than the limit of resolution of photoetching treatment.L shaped bottom electrode layer 222 on the x direction of principal axis " part can have the symmetrical structure of L shaped shape or L shaped shape.
Subsequently, linear mask pattern can be removed, and second insulating pattern 230 can be in etching area, filled.In order to describe this point in detail, can form second insulating barrier in the substrate with etching area, and can described second insulating barrier of complanation up to having exposed L shaped bottom electrode layer 222 " upper surface.As an alternative, can before forming second insulating barrier, not remove linear mask pattern, and can remove linear mask pattern simultaneously with second insulating barrier by the processing of complanation second insulating barrier.
Subsequently, can carry out with referring to the identical method of the described processing of Fig. 3 E, forming phase transformation pattern 235 and top electrode 237, they with L shaped hearth electrode 222 " be deposited in regular turn in the substrate with second insulating pattern 230 when contacting.Top electrode 237 can be used as bit line BL.Phase transformation pattern 235 can extend in the direction parallel with the line direction of linear groove 220t with top electrode 237 BL, as shown in Fig. 6 C.As an alternative, phase transformation pattern 235 can extend in the direction vertical with the line direction of linear groove 220t with top electrode 237 BL.Top electrode 137 BL can extend in the direction vertical with word line 105 WL.
As mentioned above, according to the L shaped hearth electrode 222 of example embodiment of the present invention " can have the upper surface by x and y axis limit.L shaped hearth electrode 222 " the x axle of upper surface can have width less than the limit of resolution of photoetching treatment.Therefore, wherein produce joule's heat energy, at phase transformation pattern 235 and linear hearth electrode 222 " between the boundary zone can be reduced, in order to compared with prior art can reduce the electric current that will during reset operation, apply.
In addition, in according to some embodiments of the present invention, can be adjusted at diode electrode 115 and L shaped bottom electrode layer 222 according to the thickness of spacer 224 ' " between contact area; be L shaped bottom electrode layer 222 " L shaped bottom width, in order to can increase diode electrode 115 and L shaped bottom electrode layer 222 " between contact area, to reduce interface resistance.Therefore, L shaped bottom electrode layer 222 " can overcome the patterning limit, to have following structure: compared with prior art, described structure has realized small upper zone and diode electrode 115 and L shaped bottom electrode layer 222 " between the interface resistance that reduces.
Fig. 7 is diagram according to other example embodiment of the present invention, for the manufacture of the viewgraph of cross-section of the method for phase change memory device.Therefore again referring to Fig. 4.
Referring to Fig. 4 and 7, can carry out with referring to Fig. 6 A processing identical with the described method of 6B, to form L shaped hearth electrode pattern 222 ' and spacer 224 ', they cover the sidewall of linear groove 220t in regular turn.L shaped bottom electrode layer 222 ' can have shown in Fig. 6 B around the structure of sidewall and the lower surface of spacer 224 '.Therefore, spacer 224 ' allows L shaped bottom electrode layer 222 ' at the symmetrical structure that has L shaped shape or described L shaped shape in the part of x axle.Can freely change the L shaped bottom width of L shaped hearth electrode pattern 222 ' according to the thickness of spacer 224 '.
Can form first insulating pattern 225 of filling linear groove 220t in the substrate with L shaped bottom electrode layer 222 ' and spacer 224 '.First insulating pattern 225 can be by forming with second interlayer insulative layer, 117 identical materials layers.First insulating pattern 225 can be formed by oxide skin(coating).
Subsequently, can use mask spacer (Fig. 5 B 128) as etching mask carry out with referring to the identical processing of the described method of Fig. 5 A-5C, with etching second interlayer insulative layer 117, L shaped hearth electrode pattern 222 ', spacer 224 ' and first insulating pattern 225, up to having exposed diode electrode 115.As a result, can form L shaped bottom electrode layer 222 at diode electrode 115 " '.L shaped bottom electrode layer 222 " ' can have the upper surface by x and y axis limit.L shaped bottom electrode layer 222 " ' the width of x axle of upper surface become and equal the thickness of bottom electrode layer 222.In addition, L shaped bottom electrode layer 222 " ' the width of y axle of upper surface become and equal the thickness of mask spacer (Fig. 5 B 128).Therefore, L shaped bottom electrode layer 222 " ' the x of upper surface and the y axle the two can have width less than the limit of resolution of photoetching treatment.
Subsequently, after having removed the mask spacer, second insulating pattern 230 ' can be filled in the etching area.In order to describe this point in detail, can form second insulating barrier in the substrate with etching area, and can described second insulating barrier of complanation up to exposing L shaped bottom electrode layer 222 " ' upper surface.In according to some embodiments of the present invention, can before forming second insulating barrier, not remove the mask spacer, and can come by the processing of complanation second insulating barrier to come along except the mask spacer with second insulating barrier simultaneously.
Subsequently, can carry out with referring to the identical processing of the described method of Fig. 3 E, forming phase transformation pattern 235 and top electrode 237, they with linear hearth electrode 222 " ' be deposited in regular turn in the substrate with second insulating pattern 230 ' when contacting.Top electrode 237 can be used as bit line BL.Phase transformation pattern 235 can extend in the direction parallel with the line direction of linear groove 220t as shown in Figure 4 with top electrode 237 BL.As an alternative, phase transformation pattern 235 can extend in the direction vertical with the line direction of linear groove 220t with top electrode 237 BL.Top electrode 237 BL can extend in the direction vertical with word line 105 WL.
As mentioned above, according to the linear hearth electrode 222 of other example embodiment of the present invention " ' can have the upper surface by x and y axis limit.Linear hearth electrode 222 " ' the x of upper surface and y axle can have width less than the limit of resolution of photoetching treatment.Therefore, linear hearth electrode 222 " ' can overcome the patterning limit to have the area littler than prior art.Therefore, wherein produce joule's heat energy, at phase transformation pattern 235 and linear hearth electrode 222 " ' between the boundary zone can be reduced, in order to compared with prior art can reduce the electric current that will during reset operation, apply.
In addition, can adjust diode electrode 115 and L shaped bottom electrode layer 222 according to the thickness of spacer 224 ' " ' between contact area; be L shaped bottom electrode layer 222 " contact area between ' L shaped bottom width, in order to can increase diode electrode 115 and L shaped bottom electrode layer 222 " ' to be to reduce interface resistance.Therefore, L shaped bottom electrode layer 222 " the interface resistance of minimizing between ' can overcome the patterning limit; to have following structure: compared with prior art, described structure has realized small upper zone and diode electrode 115 and L shaped bottom electrode layer 222 " '.
Fig. 8 A-8C is diagram according to other example embodiment of the present invention, for the manufacture of the viewgraph of cross-section of the method for phase change memory device.Therefore again referring to Fig. 2.
Referring to Fig. 2 and 8A, can carry out with referring to Fig. 3 A processing identical with the described method of 3B, up to forming linear groove 320t and bottom electrode layer 322.Subsequently, can form the internal insulating layer 325 of filling linear groove 320t in the substrate with bottom electrode layer 322.Internal insulating layer 325 can be formed by insulating barrier, described insulating barrier such as silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its combination.Internal insulating layer 325 can be by forming with second interlayer insulative layer, 117 identical materials layers.
Referring to Fig. 2 and 8B, can complanation internal insulating layer 325 and bottom electrode layer 322, up to the upper surface that has exposed second interlayer insulative layer 117.As a result, can form the hearth electrode pattern 322 ' that covers linear groove 320t sidewall and lower surface and the built-in electrical insulation pattern 325 ' of filling linear groove 320t.
Can form mask pattern 327 in the substrate with built-in electrical insulation pattern 325 ' and hearth electrode pattern 322 ', mask pattern 327 has the first opening 327t ' and the second opening 327t "; the first opening 327t ' is exposed to the middle section of the built-in electrical insulation pattern 325 ' on the y direction of principal axis, the second opening 327t " be exposed to the upper area between the diode electrode 115 on the x direction of principal axis.Mask pattern 327 can be hard mask pattern or photoresist pattern.Hard mask pattern can be formed by nitride layer.
Referring to Fig. 2 and 8C, can use and have the first opening 327t ' and the second opening 327t " mask pattern 327 come etching built-in electrical insulation pattern 325 ', hearth electrode pattern 322 ' and second interlayer insulative layer 117 as etching mask, up to having exposed first interlayer insulative layer 107.As a result, can form L shaped bottom electrode layer 322 at diode electrode 115 ".L shaped bottom electrode layer 322 " can have the upper surface by x and y axis limit.L shaped bottom electrode layer 322 " the width of x axle of upper surface become and equal the thickness of bottom electrode layer 322.Therefore, L shaped bottom electrode layer 322 " the x axle of upper surface can have width less than the limit of resolution of photoetching treatment.L shaped bottom electrode layer 322 on the x direction of principal axis " part have the symmetrical structure of L shaped shape or described L shaped shape.
Subsequently, mask pattern 327 backs filling insulating pattern 330 in etching area can removed.In order to describe this point in detail, can form insulating barrier in the substrate with etching area, and can the described insulating barrier of complanation up to having exposed L shaped hearth electrode 322 " upper surface.As an alternative, can before forming insulating barrier, not remove mask pattern 327, and can remove mask pattern 327 simultaneously with insulating barrier by the processing of complanation insulating barrier.
Subsequently, can carry out with referring to the identical processing of the described method of Fig. 3 E, forming phase transformation pattern 335 and top electrode 337, they with L shaped hearth electrode 322 " be deposited in regular turn in the substrate with insulating pattern 330 when contacting.Top electrode 337 can be used as bit line BL.Phase transformation pattern 335 can extend in the direction parallel with the line direction of linear groove 320t with top electrode 337 BL.As an alternative, phase transformation pattern 335 can extend in the direction vertical with the line direction of linear groove 320t with top electrode 337 BL.Top electrode 337 BL can extend in the direction vertical with word line 105 WL.
As mentioned above, according to the L shaped hearth electrode 322 of example embodiment of the present invention " can have the upper surface by x and y axis limit.L shaped hearth electrode 322 " the x axle of upper surface can have width less than the limit of resolution of photoetching treatment.Therefore, wherein produce joule's heat energy, at phase transformation pattern 335 and L shaped hearth electrode 322 " between the boundary zone can be reduced, in order to compared with prior art can reduce the electric current that will during reset operation, apply.
In addition, can adjust diode electrode 115 and L shaped bottom electrode layer 322 by the width of the first opening 327t ' " between contact area, in order to can increase contact area as much as possible, with minimum interfacial resistance.Therefore, L shaped bottom electrode layer 322 " can overcome the patterning limit, to have following structure: compared with prior art, described structure has realized small upper zone and diode electrode 115 and L shaped bottom electrode layer 322 " between the interface resistance that reduces.
Fig. 9 is diagram according to other example embodiment of the present invention, for the manufacture of the plane graph of the method for phase change memory device, and Figure 10 is the viewgraph of cross-section that line III-III ' and IV-IV ' along Fig. 9 get.The reference number C of Figure 10 and D represent the viewgraph of cross-section got along line III-III ' and the IV-IV ' of Fig. 9 respectively.
Referring to Fig. 9 and 10, can carry out with referring to the identical processing of the described method of Fig. 3 A, up in first interlayer insulative layer 107, forming diode electrode 115.
Subsequently, can form second interlayer insulative layer 117 in the substrate 100 with diode electrode 115.Second interlayer insulative layer 117 can be patterned to form linear groove 420t in second interlayer insulative layer 117, and linear groove 420t extends at the x direction of principal axis, and is exposed to the part of two adjacent diode electrodes 115 on the y direction of principal axis simultaneously.That is, can form linear groove 420t in the direction vertical with the linear groove 120t shown in Fig. 3 B.
Subsequently, can form the hearth electrode spacer at the sidewall of linear groove 420t.Can form first insulating pattern 425 of filling linear groove 420t in the substrate with hearth electrode spacer.First insulating pattern 425 can be formed by insulating barrier, described insulating barrier such as silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its combination.In addition, in according to some embodiments of the present invention, first insulating pattern 425 can be by forming with second interlayer insulative layer, 117 identical materials layers.
Alternatively, in according to some embodiments of the present invention, can form the L shaped hearth electrode pattern that has with at the L shaped hearth electrode pattern 222 ' same structure shown in Fig. 6 B at the sidewall of linear groove 420t, and not form the hearth electrode spacer.
Can be formed on the linear mask pattern that the y axle extends in the substrate with first insulating pattern 425, hearth electrode spacer and second interlayer insulative layer 117.Linear mask pattern can comprise linear opening, and described linear opening is exposed to the top area between adjacent diode electrode 115 on the x direction of principal axis.Linear mask pattern can be formed by the material layer that has etching selectivity with respect to second interlayer insulative layer 117, first insulating pattern 425 and hearth electrode spacer.
Subsequently, can use linear mask pattern to come etching second interlayer insulative layer 117, first insulating pattern 425 and hearth electrode spacer as etching mask, up to having exposed first interlayer insulative layer 107 or diode electrode 115.As a result, can form linear bottom electrode layer 422 at diode electrode 115 ".Linear bottom electrode layer 422 " can have the upper surface by x and y axis limit.Linear bottom electrode layer 422 " the width of y axle of upper surface become and equal the thickness of hearth electrode spacer.Therefore, linear bottom electrode layer 422 " the y axle of upper surface can have width less than the limit of resolution of photoetching treatment.Linear bottom electrode layer 422 on the y direction of principal axis " part can have the number " 1 " shape.
As an alternative, in according to some embodiments of the present invention, when forming L shaped hearth electrode pattern at the sidewall of linear groove 120t, can use linear mask pattern to come etching first insulating pattern 425, L shaped hearth electrode pattern and second interlayer insulative layer 117 as etching mask, up to exposing first interlayer insulative layer 107 or diode electrode 115.As a result, can form L shaped hearth electrode at diode electrode 115.L shaped hearth electrode can have the upper surface by x and y axis limit.The y axle of the upper surface of L shaped hearth electrode can have the width less than the limit of resolution of photoetching treatment.The part of the L shaped hearth electrode on the y direction of principal axis can have the symmetrical structure of L shaped shape or described L shaped shape.
Subsequently, can after removing linear mask pattern, in etching area, fill second insulating pattern 430.In order to describe this point in detail, can form second insulating barrier in the substrate with etching area, and can described second insulating barrier of complanation, up to exposing linear hearth electrode 422 " upper surface.As an alternative, can before forming second insulating barrier, not remove linear mask pattern, and can remove linear mask pattern simultaneously with second insulating barrier by the processing of complanation second insulating barrier.
In addition, the phase change memory device shown in the plane graph of Fig. 4 also can have following structure: hearth electrode 122 on the plane graph of Fig. 9 and 10 " ' and 222 " ' be rotated by 90 degrees.
Figure 11 be diagram according to the equivalent circuit figure of the part of the cell array region of the phase change memory device of other example embodiment of the present invention, Figure 12 be diagram corresponding with the equivalent circuit figure of Figure 11, according to the viewgraph of cross-section for the manufacture of the method for phase change memory device of other example embodiment of the present invention.That the Reference numeral E of Figure 12 and F represent respectively is corresponding with the equivalent circuit figure of Figure 11, according to phase change memory device viewgraph of cross-section on x and y direction of principal axis of other example embodiment of the present invention.
Referring to Figure 11, word line WL, a plurality of phase transformation pattern Rp and a plurality of transistor T a that can be included in the bit line BL that is arranged parallel to each other on the column direction, be arranged parallel to each other in the row direction according to the phase change memory device of other example embodiment of the present invention.
Bit line BL can intersect with word line WL.Phase transformation pattern Rp can be disposed in the corresponding intersection between bit line BL and the word line WL.Each phase transformation pattern Rp can be connected in series to source electrode and the drain region of a corresponding transistor T a.In addition, each phase transformation pattern Rp can be connected to a corresponding bit line BL.Each transistor T a can be connected to a corresponding word line WL.Transistor T a can be used as access device.But, can omit transistor T a.As an alternative, access device can be diode.
Referring to Figure 12, can form the separator 502 that is limited with source region 502a in substrate 500.Can form word line 505 WL at active area 502a.Can all form source electrode and drain region 506 in the adjacent active area 502a with the both sides of word line 505 WL.Can form bottom insulation layer 507 has word line 505 WL with covering substrate 500.Word line 505 WL, active area 502a and source electrode and drain region 506 can transistor formeds (Ta of Figure 11).
Can in bottom insulation layer 507, form the first connector 510a and the second connector 510b.Can form drain pad 515a and source electrode line 515b at the first connector 510a and the second connector 510b respectively.Can in bottom insulation layer 507, form drain pad 515a and source electrode line 515b.Drain pad 515a can be electrically connected to institute's favored area of source electrode and drain region 506 by the first connector 510a that penetrates bottom insulation layer 507.Source electrode line 515b can be electrically connected to another favored area of source electrode and drain region 506 by second connector, 5 10b that penetrate bottom insulation layer 507.
Subsequently, can carry out with referring to the identical processing of the described method of Fig. 3 B-3E, up to forming top electrode 137 BL.
Referring to Fig. 2,3E and 6C phase change memory device according to example embodiment of the present invention is described again now.
Referring to Fig. 2,3E and 6C, phase change memory device can have the separator 102 that is limited with source region 102a in the presumptive area of substrate 100.The semiconductor-based end such as silicon wafer or SOI wafer can be used for substrate 100.Substrate 100 can have the foreign ion of first conduction type.Separator 102 can be silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its combination.Active area 102a can have linear structure.
Can arrange first interlayer insulative layer 107 in the substrate 100 with word line WL 105 and separator 102.First interlayer insulative layer 107 can comprise silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its combination.Contact hole 108h can be arranged to pass first interlayer insulative layer 107 to expose the presumptive area of word line WL 105.First and second semiconductor patterns 110 and 112 can be deposited in the contact hole 108h in regular turn.First and second semiconductor patterns 110 and 112 can constitute diode D.
Can arrange diode electrode 115 at corresponding diode D.Diode electrode 115 can comprise from a layer of the group selection of being made up of following layer: titanium (Ti) layer, titanium silicon (TiSi) layer, titanium nitride (TiN) layer, titanium oxynitrides (TiON) layer, tungsten titanium (TiW) layer, TiAlN (TiAlN) layer, titanium oxynitrides aluminium (TiAlON) layer, titanium silicon nitride (TiSiN) layer, titanium nitride boron (TiBN) layer, tungsten (W) layer, tungsten nitride (WN) layer, nitrogen tungsten oxide (WON) layer, tungsten nitride carbon (WCN) layer, silicon (Si) layer, tantalum (Ta) layer, tantalum silicide (TaSi) layer, tantalum nitride (TaN) layer, nitrogen tantalum oxide (TaON) layer, tantalum nitride aluminium (TaAlN) layer, tantalum nitride silicon (TaSiN) layer, tantalum nitride carbon (TaCN) layer, molybdenum (Mo) layer, molybdenum nitride (MoN) layer, molybdenum nitride silicon (MoSiN) layer, molybdenum nitride aluminium (MoAlN) layer, niobium nitride (NbN) layer, zirconium nitride silicon (ZrSiN) layer, zirconium nitride aluminium (ZrAlN) layer, ruthenium (Ru) layer, cobalt silicide (CoSi) layer, nickle silicide (NiSi) layer, conduction carbon family layer, copper (Cu) layer and combination thereof.For example, diode electrode 115 can comprise TiN layer and the W layer that piles up in regular turn.
Can in contact hole 108h, form diode electrode 115.In this case, diode electrode 115 can autoregistration on corresponding diode D.As an alternative, can omit diode electrode 115.
Can arrange top interlayer insulative layer 117,125 and 130 in the substrate 100 with diode electrode 115.Linear bottom electrode layer 122 " can shown in Fig. 3 E, pass top interlayer insulative layer 117,125 and 130 and be disposed on the diode electrode 115.As an alternative, linear bottom electrode layer 222 " can shown in 6C, pass top interlayer insulative layer 117,225 and 230 and be disposed on the diode electrode 115.
Can have hearth electrode 122 " and 222 " substrate on, simultaneously and hearth electrode 122 " and 222 " arrange phase transformation pattern 135 and 235 and top electrode 137 and 237 contiguously in regular turn.Top electrode 137 and 237 can be used as bit line BL.Phase transformation pattern 135 with 235 and top electrode 137 can extend in the direction parallel or vertical with the line direction of linear groove 120t and 220t with 237.Top electrode 137 can extend in the direction vertical with word line 105 WL with 237 BL.
As an alternative, as shown in Figures 9 and 10, linear groove 420t can be as extending on Fig. 3 E be shown in direction vertical with linear groove 120t.Linear hearth electrode 422 " can be arranged to cover the sidewall of linear groove 420t.As an alternative, can arrange that L shaped hearth electrode replaces linear hearth electrode 422 ".Linear hearth electrode 422 " can have following structure: hearth electrode 122 shown in Figure 2 " be rotated by 90 degrees at plan view.
Referring to Fig. 4,5C and 7 phase change memory device according to other example embodiment of the present invention is described again now.
Referring to Fig. 4,5C and 7, phase change memory device can comprise separator 102, and it is limited to the interior active area 102a of presumptive area of substrate 100.Substrate 100 can have the foreign ion of first conduction type.Active area 102a can have linear structure.Active area 102a can comprise the foreign ion of second conduction type different with first conduction type, with as word line WL 105.Below, in order to simplify description, suppose that first and second conduction types are respectively P and N-type.But first and second conduction types also can be respectively N and P type.
Can arrange first interlayer insulative layer 107 in the substrate 100 with word line WL 105 and separator 102.Contact hole 108h can be arranged to pass the presumptive area that first interlayer insulative layer 107 exposes word line WL 105.First and second semiconductor patterns 110 and 112 can be deposited in the contact hole 108h in regular turn.First and second semiconductor patterns 110 and 112 can constitute diode D.First semiconductor pattern 110 can contact with word line WL 105.
Can arrange diode electrode 115 at corresponding diode D.Diode electrode 115 can comprise TiN layer and the W layer that piles up in regular turn.Diode electrode 115 can be disposed in the contact hole 108h.In this case, diode electrode 115 can autoregistration on corresponding diode D.As an alternative, can omit diode electrode 115.
Can arrange top interlayer insulative layer 117,125 and 130 ' in the substrate 100 with diode electrode 115.Linear bottom electrode layer 122 " ' can shown in Fig. 5 C, pass top interlayer insulative layer 117,125 and 130 ' and be disposed on the diode electrode 115.As an alternative, linear bottom electrode layer 222 " ' can shown in 7, pass top interlayer insulative layer 117,225 and 230 ' and be disposed on the diode electrode 115.
Can have hearth electrode 122 " in the substrate of ' and 222 " ', simultaneously with hearth electrode 122 " ' and 222 " ' arrange phase transformation pattern 135 and 235 and top electrode 137 and 237 contiguously in regular turn.Top electrode 137 and 237 can be used as bit line BL.Phase transformation pattern 135 with 235 and top electrode 137 can extend in the direction parallel or vertical with the line direction of linear groove 120t and 220t with 237.Top electrode 137 can extend in the direction vertical with word line 105 WL with 237 BL.
Below again referring to the phase change memory device of Figure 12 description according to other example embodiment of the present invention.
Referring to Figure 12, the separator 502 that is limited with source region 502a can be disposed in the substrate 500.Word line 505 WL can be disposed on the active area 502a.Can all form source electrode and drain region 506 in the adjacent active area 502a with the both sides of word line 505 WL.Can arrange that bottom insulation layer 507 has the substrate 500 of word line 505 WL with covering.Word line 505 WL, active area 502a and source electrode and drain region 506 can transistor formeds (Ta of Figure 11).
Can in bottom insulation layer 507, arrange the first connector 510a and the second connector 510b.Can form drain pad 515a and source electrode line 515b at the first connector 510a and the second connector 510b respectively.Can in bottom insulation layer 507, arrange drain pad 515a and source electrode line 515b.Drain pad 515a can be electrically connected to institute's favored area of source electrode and drain region 506 by the first connector 510a that penetrates bottom insulation layer 507.Source electrode line 515b can be electrically connected to another favored area of source electrode and drain region 506 by the second connector 510b that penetrates bottom insulation layer 507.
Can arrange top interlayer insulative layer 117,125 and 130 in the substrate 500 with drain pad 515a and source electrode line 515b.Linear bottom electrode layer 122 " can be arranged to penetrate top interlayer insulative layer 117,125 with 130 to contact with drain pad 515a.As an alternative, can arrange that L shaped hearth electrode replaces linear bottom electrode layer 122 ".Hearth electrode 122 " can have the upper surface by x and y axis limit.Hearth electrode 122 " the x axle of upper surface can have width less than the limit of resolution of photoetching treatment.Linear bottom electrode layer 122 on the x direction of principal axis " part can have the number " 1. " shape.The part of L shaped hearth electrode can have the symmetrical structure of L shaped shape or described L shaped shape.
Can have hearth electrode 122 " substrate on, simultaneously and hearth electrode 122 " arrange phase transformation pattern 135 and top electrode 137 contiguously in regular turn.Top electrode 137 can be used as bit line BL.Phase transformation pattern 135 can extend in the direction parallel or vertical with the line direction of linear groove 120t with top electrode 137 BL.Top electrode 137 BL can extend in the direction vertical with word line 105 WL.
Referring now to Figure 14 A-14E describe according to other example embodiment of the present invention, for the manufacture of the method for phase change memory device.In this case, the reference number C in Figure 14 A-14E and D represent the viewgraph of cross-section got along line V-V ' and the VI-VI ' of Figure 13 respectively.
Referring to Figure 13 and 14 A, can in the presumptive area of substrate 1100, be formed for being limited with the separator 1102 of source region 1102a.Can use the semiconductor-based end such as silicon wafer or SOI wafer to be used as substrate 1100.Substrate 1100 can have the foreign ion of first conduction type.Can use the STI technology to form separator 1102.Separator 1102 can be combined to form by silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its.Active area 1102a can be formed has wire shaped.
The foreign ion of second conduction type different with first conduction type can be injected in the active area 1102a, to form word line WL 1105.Below, in order to simplify description, first and second conduction types are respectively the situations of P and N-type with describing wherein.But first and second conduction types can be respectively N and P type.
Can form first interlayer insulative layer 1107 in the substrate 1100 with word line WL 1105 and separator 1102.First interlayer insulative layer 1107 can be combined to form by silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its.First interlayer insulative layer 1107 can be patterned to form contact hole 1108h, and contact hole 1108h exposes the presumptive area of word line WL 1105.
First and second semiconductor patterns 1110 and 1112 can be deposited in the contact hole 1108h in regular turn.Can use growth technology or chemical vapor deposition (CVD) technology to form first and second semiconductor patterns 1110 and 1112.First and second semiconductor patterns 1110 and 1112 can constitute diode D.
Can form diode electrode 1115 at corresponding diode D.Diode electrode 1115 can comprise from a layer of the group selection of being made up of following layer: the Ti layer, the TiSi layer, the TiN layer, the TiON layer, the TiW layer, the TiAlN layer, the TiAlON layer, the TiSiN layer, the TiBN layer, the W layer, the WN layer, the WON layer, the WSiN layer, the WBN layer, the WCN layer, the Si layer, the Ta layer, the TaSi layer, the TaN layer, the TaON layer, the TaAlN layer, the TaSiN layer, the TaCN layer, the Mo layer, the MoN layer, the MoSiN layer, the MoAlN layer, the NbN layer, the ZrSiN layer, the ZrAlN layer, the Ru layer, the CoSi layer, the NiSi layer, conduction carbon family layer, Cu layer and combination thereof.For example, can be by depositing TiN layer and W layer form diode electrode 1115 in regular turn.
Can in contact hole 1108h, form diode electrode 1115.In this case, diode electrode 1115 can autoregistration on corresponding diode D.As an alternative, can omit diode electrode 1115.
Referring to Figure 13 and 14 B, can form second interlayer insulative layer 1117 in the substrate 1100 with diode electrode 1115.Second interlayer insulative layer 1117 can be patterned to form bottom electrode contact hole 1120h, and bottom electrode contact hole 1120h exposes diode electrode 1115.Can be along forming bottom electrode layer 1122 on the suprabasil surface with bottom electrode contact hole 1120h.Bottom electrode layer 1122 can cover the diode electrode that is exposed 1115 in the bottom electrode contact hole 1120h, and can cover the sidewall of bottom electrode contact hole 1120h and the upper surface of second interlayer insulative layer 1117.
Can form the internal insulating layer 1125 of filling bottom electrode contact hole 1120h in the substrate 1100 with bottom electrode layer 1122.Internal insulating layer 1125 can be formed by insulating barrier, described insulating barrier such as silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its combination.Internal insulating layer 1125 can be by forming with second interlayer insulative layer, 1117 identical materials layers.
In other embodiments, can omit internal insulating layer 1125.In this case, can form bottom electrode layer 1122 to fill bottom electrode contact hole 1120h fully.
Referring to Figure 13 and 14 C, can partly remove internal insulating layer 1125 and bottom electrode layer 1122 in bottom electrode contact hole 1120h, to form cylinder hearth electrode 1122 ' and built-in electrical insulation pattern 1125 ' at diode electrode 115.
Particularly, can use etch-back process to carry out the formation of cylinder hearth electrode 1122 ' and built-in electrical insulation pattern 1125 '.As an alternative, can use chemico-mechanical polishing (CMP) to handle and the combination of etch-back process comes the formation of patterning cylinder hearth electrode 1122 ' and built-in electrical insulation pattern 1125 '.
For example, can use second interlayer insulative layer 1117 is handled complanation internal insulating layer 1125 and bottom electrode layer 1122 as the CMP on barrier layer.As a result, can in bottom electrode contact hole 1120h, keep internal insulating layer 1125 and bottom electrode layer 1122.
In other embodiments, at complanation internal insulating layer 1125 and bottom electrode layer 1122 behind the upper surface that has exposed second interlayer insulative layer 1117, planarization process can be carried out at least one times, in second interlayer insulative layer 1117, more to be formed uniformly the height of cylinder hearth electrode 1122 ' and built-in electrical insulation pattern 1125 '.
Cylinder hearth electrode 1122 ' can be formed around the sidewall of built-in electrical insulation pattern 1125 ' and lower surface.Cylinder hearth electrode 1122 ' can contact with corresponding diode electrode 1115.When omitting diode electrode 1115, cylinder hearth electrode 1122 ' can directly contact with diode D.The surface that is exposed of each of cylinder hearth electrode 1122 ' can have annular shape.Contact area between cylinder hearth electrode 1122 ' and the diode electrode 1115 can be less than the upper surface of diode electrode 1115.
In other embodiments, when omitting internal insulating layer 1125, each cylinder hearth electrode 1122 ' can have column.In this case, the exposed surface of each of cylinder hearth electrode 1122 ' can have annular.
Referring to Figure 13 and 14 D, can form mask pattern 1127 in the substrate 1100 with cylinder hearth electrode 1122 ' and built-in electrical insulation pattern 1125 '.Mask pattern 1127 can comprise linear opening 1127t, and it is exposed to the part of the cylinder hearth electrode 1122 ' on x axle and the y direction of principal axis.Therefore, can be by of correspondence linear opening 1127t be exposed to the part of a plurality of cylinder hearth electrodes 1122 ' of arranging on x axle or the y direction of principal axis simultaneously.Mask pattern 1127 can be hard mask pattern or photoresist pattern.
In addition, can come exposed inner insulating pattern 1125 ' by linear opening 1127t.For example, when linear opening 1127t expose cylinder hearth electrode 1122 ' 50% the time, 50% of upper surface that also can exposed inner insulating pattern 1125 '
Can use mask pattern 1127 to come etching to have cylinder hearth electrode 1122 ' and second interlayer insulative layer 1117 of expose portion as etching mask.As a result, can form linear groove 1130t to expose diode electrode 1115 and first interlayer insulative layer 1107.In this case, when the part by linear opening 1127t exposed inner insulating pattern 1125 ', the also built-in electrical insulation of etching simultaneously pattern 1125 '.As a result, can form the cylinder hearth electrode 1122 that is partly cut " and the built-in electrical insulation pattern 1125 that partly cut ".
From top view, the cylinder hearth electrode 1122 that each is partly cut " upper surface can have " C " shape, have crescent shape or " (" shape of uniform thickness.Therefore, each cylinder hearth electrode 1122 that is partly cut " upper surface can have the area littler than the annular upper surface of each cylinder hearth electrode 1122 '.
Alternatively, shown in Figure 15 A, can use mask pattern 1127 to come etching to have cylinder hearth electrode 1122 ' and second interlayer insulative layer 1117 of expose portion as etching mask, form linear groove 1130t ' thus, it exposes etched sidewall and the upper surface of cylinder hearth electrode 1122 '.In this case, when the part by linear opening 1127t exposed inner insulating pattern 1125 ', the also built-in electrical insulation of etching simultaneously pattern 1125 '.
Can form linear groove 1130t and 1130t ' at x axle or y direction of principal axis.Particularly, as shown in figure 13, linear groove 1130t can extend in the line direction vertical with word line 1105 WL with 1130t '.
As an alternative, shown in Figure 16 and 17, linear groove 1130t ' can extend in the line direction parallel with word line 1105WL.
Referring to Figure 13 and 14 E, can form insulating barrier in the substrate 1100 with linear groove 1130t, to fill described linear groove 1130t.Can the described insulating barrier of complanation, up to having exposed the cylinder hearth electrode 1122 that is partly cut " upper surface.As a result, can in corresponding linear groove 1130t, form linear insulating pattern 1132.
As an alternative, shown in Figure 15 B, can form insulating barrier in the substrate 1100 with linear groove 1130t ', to fill described linear groove 1130t '.Can the described insulating barrier of complanation up to having exposed the cylinder hearth electrode 1122 that is partly cut " upper surface.As a result, can in corresponding linear groove 1130t ', form linear insulating pattern 1132 '.
Can with the cylinder hearth electrode 1122 that is partly cut " contact in, have in the substrate 1100 of linear insulating pattern 1132 and 1132 ' sediment phase change pattern 1135 and a top electrode 1137 in regular turn.Top electrode 1137 can be used as bit line BL.Phase transformation pattern 1135 can extend in the direction vertical with word line 1105 WL with top electrode 1137 BL.As an alternative, as shown in figure 13, phase transformation pattern 1135 can extend in the direction parallel with the line direction of linear insulating pattern 1132 with top electrode 1137 BL.
Alternatively, shown in Figure 16 and 17, when linear insulating pattern 1132 ' when the line direction parallel with word line 1105 WL extended, phase transformation pattern 1135 and top electrode 1137 BL can extend in the direction vertical with the line direction of as shown in figure 16 linear insulating pattern 1132 '.As a result, at cylinder hearth electrode 1122 that the quilt of sharing phase transformation pattern 1135 partly cuts " between distance L 2 can be greater than the cylinder hearth electrode 1122 that partly cuts at the quilt shown in Figure 13 " between distance L 1.Therefore, can reduce thermal agitation between the unit.
As mentioned above, the cylinder hearth electrode 1122 that partly cuts according to the quilt of example embodiment of the present invention " upper surface can have the area littler than the annular upper surface of cylinder hearth electrode 1122 '.As a result, can reduce wherein to produce joule's heat energy, at phase transformation pattern 1135 and hearth electrode 1122 " between the boundary zone, in order to compared with prior art can reduce the electric current that will during reset operation, apply.
Figure 18 is the amplification view of annular upper surface of the cylinder hearth electrode of Figure 14 C, and Figure 19 A-19D is the plane graph of the structure that obtains by a part of using linear insulating pattern to cut the cylinder hearth electrode of Figure 18 along line of cut C1, C2, C3 and C4 respectively.Can in the position that changes line of cut, use linear insulating pattern 1132 to form the cylinder hearth electrode 1122 that is partly cut ".For example, line of cut can freely be selected from line of cut C1-C4.
Referring to Figure 18 and 19A, the plane graph of the cylinder hearth electrode 1122a that Figure 19 A is partly cut, the part of the cylinder hearth electrode 1122a that described quilt partly cuts is cut by use linear insulating pattern 1132a along line of cut C1.Line of cut C1 represents along its line with the thickness of cylinder hearth electrode 1122 ' cutting cylinder side wall.As a result, the upper surface of each of the cylinder hearth electrode 1122a that is partly cut can have " C " shape of seeing from top view, and has the area littler than the upper surface of each cylinder hearth electrode 1122 '.
Referring to Figure 18 and 19B, the plane graph of the cylinder hearth electrode 1122b that Figure 19 B is partly cut, the part of the cylinder hearth electrode 1122a that described quilt partly cuts is cut by use linear insulating pattern 1132b along line of cut C2.Line of cut C2 represents along its line with the body diameter 1120D of cylinder hearth electrode 1122 ' cutting 1/2.As a result, the upper surface of each of the cylinder hearth electrode 1122b that is partly cut can have the crescent shape of seeing from top view, and have each cylinder hearth electrode 1122 ' area 1/2.
Referring to Figure 18 and 19C, the plane graph of the cylinder hearth electrode 1122c that Figure 19 C is partly cut, the part of the cylinder hearth electrode 1122a that described quilt partly cuts is cut by use linear insulating pattern 1132c along line of cut C3.Line of cut C3 represents along its line with the body diameter 1120D of cylinder hearth electrode 1122 ' cutting 3/4.As a result, the upper surface of each of the cylinder hearth electrode 1122c that is partly cut can have ") of seeing from top view " shape, and have than 1/2 of the area of the upper surface of each cylinder hearth electrode 1122 ' little area.
Referring to Figure 18 and 19D, the plane graph of the cylinder hearth electrode 1122d that Figure 19 D is partly cut, the part of the cylinder hearth electrode 1122a that described quilt partly cuts is cut by use linear insulating pattern 1132d along line of cut C4.Line of cut C4 represents that described value obtains by deducting the cylinder thickness T from body diameter 1120D along its line with a value of cylinder hearth electrode 1122 ' cutting.In other words, the cylinder hearth electrode 1122d that is partly cut can be left the cylinder thickness T, and can use linear insulating pattern 1132d to remove remaining areas.As a result, the upper surface of each of the cylinder hearth electrode 1122d that is partly cut can have ") of seeing from top view " shape, and have the little area of upper surface than each of the cylinder hearth electrode 1122c that partly cuts at the quilt shown in Figure 19 C.
As mentioned above, the upper surface of cylinder hearth electrode 1122a, 1122b, 1122c and the 1122d that partly cuts according to the quilt of example embodiment of the present invention can have the area littler than the annular upper surface of cylinder hearth electrode 1122 '.As a result, can reduce wherein to produce joule's heat energy, the boundary zone between phase transformation pattern 1135 and hearth electrode 1122a, 1122b, 1122c and 1122d, in order to compared with prior art reduce the electric current that will during reset operation, apply.
Figure 20 is diagram according to other example embodiment of the present invention, for the manufacture of the viewgraph of cross-section of the method for phase change memory device.
Referring to Figure 20, can form the separator 1202 that is limited with source region 1202a in substrate 1200.Can form word line 1205 WL at active area 1202a.Can all form source electrode and drain region 1206 in the adjacent active area 1202a with the both sides of word line 1205WL.Can form bottom insulation layer 1207 has word line 1205 WL with covering substrate 1200.Word line 1205 WL, active area 1202a and source electrode and drain region 1206 can transistor formeds (Ta of Figure 11).
Can in bottom insulation layer 1207, form the first connector 1210a and the second connector 1210b.Can form drain pad 1215a and source electrode line 1215b at the first connector 1210a and the second connector 1210b respectively.Can in bottom insulation layer 1207, form drain pad 1215a and source electrode line 1215b.Drain pad 1215a can be electrically connected to institute's favored area of source electrode and drain region 1206 by the first connector 1210a that penetrates bottom insulation layer 1207.Source electrode line 1215b can be electrically connected to another favored area of source electrode and drain region 1206 by the second connector 1210b that penetrates bottom insulation layer 1207.
Subsequently, can carry out with referring to the identical processing of the described method of Figure 14 B-14E, up to forming top electrode 1137.
Referring to Figure 13 and 14 E phase change memory device according to example embodiment of the present invention is described again now.
Referring to Figure 13 and 14 E, phase change memory device can have the separator 1102 that is limited with source region 1102a in the presumptive area of substrate 1100.The semiconductor-based end such as silicon wafer or SOI wafer can be used as substrate 1100.Substrate 1100 can have the foreign ion of first conduction type.Separator 1102 can be silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its combination.Active area 1102a can have linear structure.
Can form first interlayer insulative layer 1107 in the substrate 1100 with word line WL 1105 and separator 1102.First interlayer insulative layer 1107 can comprise silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its combination.Contact hole 1108h can be arranged to pass first interlayer insulative layer 1107 to expose the presumptive area of word line WL 1105.First and second semiconductor patterns 1110 and 1112 can be deposited in the contact hole 1108h in regular turn.First and second semiconductor patterns 1110 and 1112 can constitute diode D.
Can form diode electrode 1115 at corresponding diode D.Diode electrode 1115 can comprise from a layer of the group selection of being made up of following layer: the Ti layer, the TiSi layer, the TiN layer, the TiON layer, the TiW layer, the TiAlN layer, the TiAlON layer, the TiSiN layer, the TiBN layer, the W layer, the WN layer, the WON layer, the WSiN layer, the WBN layer, the WCN layer, the Si layer, the Ta layer, the TaSi layer, the TaN layer, the TaON layer, the TaAlN layer, the TaSiN layer, the TaCN layer, the Mo layer, the MoN layer, the MoSiN layer, the MoAlN layer, the NbN layer, the ZrSiN layer, the ZrAlN layer, the Ru layer, the CoSi layer, the NiSi layer, conduction carbon family layer, Cu layer and combination thereof.For example, diode electrode 1115 can comprise TiN layer and the W layer that piles up in regular turn.
Can in contact hole 1108h, arrange diode electrode 1115.In this case, diode electrode 1115 can autoregistration on corresponding diode D.As an alternative, can omit diode electrode 1115.
Can arrange second interlayer insulative layer 1117 in the substrate 1100 with diode electrode 1115.The cylinder hearth electrode can pass second interlayer insulative layer 1117 and be disposed on the diode electrode 1115.Can in the cylinder hearth electrode, arrange the built-in electrical insulation pattern.Linear insulating pattern 1132 can be disposed on the x axle or y direction of principal axis in second interlayer insulative layer 1117, to cut the part of cylinder hearth electrode in vertical direction.Phase transformation pattern 1135 can with the cylinder hearth electrode 1122 that is partly cut " be disposed in when the built-in electrical insulation pattern 1125 ' that is partly cut contacts have the cylinder hearth electrode 1122 that is partly cut " and the substrate 1100 of the built-in electrical insulation pattern 1125 ' that partly cut on.Top electrode 1137 can be disposed on the corresponding phase transformation pattern 1135.Top electrode 1137 can be used as bit line BL.
From top view, the cylinder hearth electrode 1122 that is partly cut " each upper surface can have " C " shape, have crescent shape or " (" shape of uniform thickness.Therefore, each cylinder hearth electrode 1122 that is partly cut " upper surface can have the area littler than the upper surface of conventional cylinder hearth electrode.In addition, from top view, can cut the cylinder hearth electrode 1122 that described quilt partly cuts " the same section of upper surface arrange to form uniform CCC.
Linear insulating pattern 1132 can be filled in the linear groove 1130t, described linear groove 1130t cuts the part of cylinder hearth electrode in vertical direction, and penetrates second interlayer insulative layer 1117 with the part of the upper surface that exposes diode electrode 1115 and the cylinder hearth electrode 1122 that is partly cut " be cut sidewall.
Perhaps, shown in Figure 15 B, linear insulating pattern 1132 ' can be filled in the linear groove 1130t ', described linear groove 1130t ' cuts the part of cylinder hearth electrode in vertical direction, and is exposed to the cylinder hearth electrode 1122 that the quilts in second interlayer insulative layer 1117 partly cut " upper surface and the sidewall of cutting zone.
The cylinder hearth electrode 1122 that is partly cut " can comprise from a layer of the group selection of being formed by following layer: Ti layer; TiSi layer; TiN layer; TiON layer; TiW layer; TiAlN layer, the TiAlON layer, the TiSiN layer, the TiBN layer, the W layer, the WN layer, the WON layer, the WSiN layer, the WBN layer, the WCN layer, the Si layer, the Ta layer, the TaSi layer, the TaN layer, the TaON layer, the TaAlN layer, the TaSiN layer, the TaCN layer, the Mo layer, the MoN layer, the MoSiN layer, the MoAlN layer, the NbN layer, the ZrSiN layer, the ZrAlN layer, the Ru layer, the CoSi layer, the NiSi layer, conduction carbon family layer, Cu layer and combination thereof.
The built-in electrical insulation pattern 1125 that is partly cut " can be formed described insulating barrier such as silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its combination by insulating barrier.In addition, the built-in electrical insulation pattern 1125 that is partly cut " can be by forming with second interlayer insulative layer, 1117 identical materials layers.
In other embodiments, can omit the built-in electrical insulation pattern 1125 that is partly cut ".In this case, the cylinder hearth electrode 1122 that is partly cut " can have the column structure that is partly cut.
Can form linear groove 1130t and 1130t ' at x axle or y direction of principal axis.Particularly, as shown in figure 13, linear groove 1130t can extend in the line direction vertical with word line 1105WL with 1130t '.
As an alternative, shown in Figure 16 and 17, linear groove 1130t ' can extend in the line direction parallel with word line 1105WL.
As an alternative, shown in Figure 16 and 17, when linear insulating pattern 1132 ' when the line direction parallel with word line 1105WL extended, phase transformation pattern 1135 and top electrode 1137BL can extend in the direction vertical with linear insulating pattern 1132 ', shown in Figure 16.As a result, at cylinder hearth electrode 1122 that the quilt of sharing phase transformation pattern 1135 partly cuts " between distance L 2 can be greater than the cylinder hearth electrode 1122 that partly cuts at the quilt shown in Figure 13 " between distance L 1.Therefore, can reduce thermal agitation between the unit.
Top electrode 1137BL can comprise that from a layer of following group selection described group formation is Ti layer, TiSi layer, TiN layer, TiON layer, TiW layer, TiAlN layer, TiAlON layer, TiSiN layer, TiBN layer, W layer, WN layer, WON layer, WSiN layer, WBN layer, WCN layer, Si layer, Ta layer, TaSi layer, TaN layer, TaON layer, TaAlN layer, TaSiN layer, TaCN layer, Mo layer, MoN layer, MoSiN layer, MoAlN layer, NbN layer, ZrSiN layer, ZrAlN layer, Ru layer, CoSi layer, NiSi layer, conduction carbon family layer, Cu layer and combination thereof.
As mentioned above, the cylinder hearth electrode 1122 that partly cuts according to the quilt of example embodiment of the present invention " upper surface can have the area littler than the annular upper surface of cylinder hearth electrode 1122 '; the result; can reduce wherein to produce joule's heat energy, at phase transformation pattern 1135 and hearth electrode 1122 " between the boundary zone, in order to compared with prior art can reduce the electric current that will during reset operation, apply.
Referring now to Figure 20, phase-change devices according to other example embodiment of the present invention is described.
Referring to Figure 20, can arrange the separator 1202 that is limited with source region 1202a in substrate 1200.Can arrange word line 1205 WL at active area 1202a.Can all arrange source electrode and drain region 1206 in the adjacent active area 1202a with the both sides of word line 1205 WL.Can arrange that bottom insulation layer 1207 has the substrate 1200 of word line 1205 WL with covering.Word line 1205 WL, active area 1202a and source electrode and drain region 1206 can transistor formeds (Ta of Figure 11).
Can in bottom insulation layer 1207, arrange the first connector 1210a and the second connector 1210b.Can arrange drain pad 1215a and source electrode line 1215b at the first connector 1210a and the second connector 1210b respectively.Can in bottom insulation layer 1207, arrange drain pad 1215a and source electrode line 1215b.Drain pad 1215a can be electrically connected to institute's favored area of source electrode and drain region 1206 by the first connector 1210a that penetrates bottom insulation layer 1207.Source electrode line 1215b can be electrically connected to another favored area of source electrode and drain region 1206 by the second connector 1210b that penetrates bottom insulation layer 1207.
Second interlayer insulative layer 1117 can be disposed in the substrate 1100 with drain pad 1215a and source electrode line 1215b.Can pass second interlayer insulative layer 1117 is arranged in the cylinder hearth electrode on the diode electrode 1115.Can in the cylinder hearth electrode, arrange the built-in electrical insulation pattern.Can be in second interlayer insulative layer 1117, arranging linear insulating pattern 1132 on x axle or the y direction of principal axis, to cut the part of cylinder hearth electrode in vertical direction.Phase transformation pattern 1135 can with the cylinder hearth electrode 1122 that is partly cut " be disposed in when the built-in electrical insulation pattern 1125 ' that is partly cut contacts have the cylinder hearth electrode 1122 that is partly cut " and the substrate 1100 of the built-in electrical insulation pattern 1125 ' that partly cut on.Top electrode 1137 can be disposed on the corresponding phase transformation pattern 1135.Top electrode 1137 can be used as bit line BL.
From top view, the cylinder hearth electrode 1122 that is partly cut " each upper surface can have " C " shape, have crescent shape or " (" shape of uniform thickness.Therefore, each cylinder hearth electrode 1122 that is partly cut " upper surface can have the area littler than the upper surface of conventional cylinder hearth electrode.In addition, from top view, can cut the cylinder hearth electrode 1122 that described quilt partly cuts " the same section of upper surface arrange to form uniform CCC.
The cylinder hearth electrode 1122 that is partly cut " can comprise from a layer of the group selection of being formed by following layer: Ti layer; TiSi layer; TiN layer; TiON layer; TiW layer; TiAlN layer, the TiAlON layer, the TiSiN layer, the TiBN layer, the W layer, the WN layer, the WON layer, the WSiN layer, the WBN layer, the WCN layer, the Si layer, the Ta layer, the TaSi layer, the TaN layer, the TaON layer, the TaAlN layer, the TaSiN layer, the TaCN layer, the Mo layer, the MoN layer, the MoSiN layer, the MoAlN layer, the NbN layer, the ZrSiN layer, the ZrAlN layer, the Ru layer, the CoSi layer, the NiSi layer, conduction carbon family layer, Cu layer and combination thereof.
The built-in electrical insulation pattern 1125 that is partly cut " can be formed described insulating barrier such as silicon oxide layer, silicon nitride layer, silicon oxynitride layer or its combination by insulating barrier.In addition, the built-in electrical insulation pattern 1125 that is partly cut " can be by forming with second interlayer insulative layer, 1117 identical materials layers.In other embodiments, can omit the built-in electrical insulation pattern 1125 that is partly cut ".In this case, the cylinder hearth electrode 1122 that is partly cut " can have the column structure that is partly cut.
According to embodiments of the invention, linear or L shaped hearth electrode can have the upper surface by x and y axis limit, and the x axle of the upper surface of linear or L shaped hearth electrode or y axle can have the width less than the limit of resolution of photoetching treatment, as an alternative, in other embodiments, the x axle of the upper surface of linear or L shaped hearth electrode and y axle the two can have width less than the limit of resolution of photoetching treatment.Therefore, linear or L shaped hearth electrode can overcome the patterning limit to have the area littler than prior art.
In addition, from top view, the cylinder hearth electrode 1122 that is partly cut " each upper surface can have " C " shape, have crescent shape or " (" shape of uniform thickness.Therefore, each cylinder hearth electrode 1122 that is partly cut " upper surface can have the area littler than the annular upper surface of conventional cylinder hearth electrode.
As a result, can reduce wherein to produce joule's heat energy, the boundary zone between phase transformation pattern and hearth electrode, in order to compared with prior art can reduce the electric current that will during reset operation, apply.Therefore, can realize such phase change memory device, it overcomes the patterning limit, and is of value to high integration.
Though specifically illustrate and described the present invention with reference to its example embodiment, but the one of ordinary skilled in the art can understand, under the situation that does not break away from the spirit and scope of the present invention that are defined by the following claims, can carry out the various changes on form and the details therein.
Claims (30)
1. method for the manufacture of phase change memory device comprises:
Form L shaped hearth electrode, described hearth electrode contacts with suprabasil respective base pattern, and has the upper surface that is limited by the yardstick on described suprabasil x and y direction of principal axis, wherein, have than the little width of the limit of resolution for the manufacture of the photoetching treatment of described phase change memory device along the yardstick of the described x axle of the described upper surface of described hearth electrode;
Form the phase transformation pattern, described phase transformation pattern contacts with the described upper surface of described hearth electrode, and has than the described x of the described upper surface of described hearth electrode and the big width of each described yardstick on the y direction of principal axis; And
Form top electrode at described phase transformation pattern,
Wherein, the section L shaped shape of the described hearth electrode of described L shaped expression on described x direction of principal axis.
2. method according to claim 1, wherein, the yardstick on the y direction of principal axis of the described upper surface of described hearth electrode has the width of the described limit of resolution of the photoetching treatment of being equal to, or greater than.
3. method according to claim 2 wherein, forms L shaped hearth electrode and comprises:
Form interlayer insulative layer in the described substrate with described bottom pattern;
To form linear groove therein, described linear groove extends at described y direction of principal axis with described interlayer insulative layer patterning, and is exposed to the part of two adjacent on described x direction of principal axis bottom pattern simultaneously;
In the described substrate with described linear groove, form bottom electrode layer and partition layer in regular turn;
Eat-back described partition layer and described bottom electrode layer in regular turn to form L shaped hearth electrode pattern and spacer;
In the described substrate with described L shaped hearth electrode pattern and described spacer, form first insulating pattern of filling described linear groove;
Be formed on the linear mask pattern that described x direction of principal axis extends in the described substrate with described first insulating pattern and described L shaped hearth electrode pattern;
Use described linear mask pattern to come described first insulating pattern of etching, described L shaped hearth electrode pattern and described interlayer insulative layer as etching mask, up to having exposed described bottom pattern; And
In the etched zone of institute, fill second insulating pattern.
4. method according to claim 3 also comprises:
Before being formed on the described linear mask pattern that described x direction of principal axis extends, complanation has the described substrate of described first insulating pattern, described L shaped hearth electrode pattern and described spacer, with the upper surface of the described L shaped hearth electrode pattern of complanation.
5. method according to claim 2 wherein, forms L shaped hearth electrode and comprises:
Form interlayer insulative layer in the described substrate with described bottom pattern;
To form linear groove therein, described linear groove extends at described y direction of principal axis with described interlayer insulative layer patterning, and is exposed to the part of two adjacent on described x direction of principal axis bottom pattern simultaneously;
Form the hearth electrode pattern, sidewall and the lower surface of the described linear groove of described hearth electrode pattern covers;
In the described substrate with described hearth electrode pattern, form the built-in electrical insulation pattern of filling described linear groove;
Form the mask pattern with first opening and second opening in the described substrate with described built-in electrical insulation pattern and described hearth electrode pattern, described first opening is exposed to the middle section of the described built-in electrical insulation pattern on the described y direction of principal axis, and described second opening is exposed to the upper area between the described bottom pattern on the described x direction of principal axis;
Use described mask pattern to come the described built-in electrical insulation pattern of etching, described hearth electrode pattern and described interlayer insulative layer as etching mask, up to having exposed described bottom pattern; And
In the etched zone of institute, fill insulating pattern.
6. method according to claim 1, wherein, the described yardstick on the described y direction of principal axis of the described upper surface of described hearth electrode has the width littler than the limit of resolution of photoetching treatment.
7. method according to claim 6 wherein, forms described L shaped hearth electrode and comprises:
Form interlayer insulative layer in the described substrate with described bottom pattern;
To form linear groove therein, described linear groove extends at described y direction of principal axis with described interlayer insulative layer patterning, and is exposed to the part of two adjacent on described x direction of principal axis bottom pattern simultaneously;
In the described substrate with described linear groove, form bottom electrode layer and partition layer in regular turn;
Eat-back described partition layer and described bottom electrode layer in regular turn to form L shaped hearth electrode pattern and spacer;
In the described substrate with described L shaped hearth electrode pattern and described spacer, form first insulating pattern of filling described linear groove;
Be formed on the linear sacrifice pattern that described x direction of principal axis extends in the described substrate with described first insulating pattern and described L shaped hearth electrode pattern;
Sidewall at described linear sacrifice pattern forms the mask spacer;
Use described mask spacer to come the described linear sacrifice pattern of etching, described first insulating pattern, described L shaped hearth electrode pattern and described interlayer insulative layer as etching mask, up to having exposed described bottom pattern; And
In the etched zone of institute, fill second insulating pattern.
8. method according to claim 7 wherein, forms the sidewall of described linear sacrifice pattern above the respective base pattern.
9. method according to claim 1, wherein, described L shaped hearth electrode comprises the part of L shaped part and described L shaped symmetrical structure.
10. method according to claim 9, wherein, L shaped hearth electrode adjacent one another are has the L shaped structure of described symmetry.
11. method according to claim 1, wherein, described bottom pattern is formed by diode.
12. method according to claim 1, wherein, described bottom pattern is formed by the contact plunger that contacts with described substrate and the conductive pattern that is arranged on the described contact plunger.
13. method according to claim 12 also comprises:
Before forming described contact plunger, form the transistor that is electrically connected to described suprabasil respective base pattern.
14. method according to claim 1, wherein, described phase transformation pattern extends in the direction parallel with the described x axle of the described upper surface of described hearth electrode, perhaps extends in the direction parallel with the described y axle of the described upper surface of described hearth electrode.
15. method according to claim 1 wherein, forms described phase transformation pattern and described top electrode simultaneously by patterning.
16. the method for the manufacture of phase change memory device comprises:
The substrate that preparation has bottom pattern;
Form interlayer insulative layer in the described substrate with described bottom pattern;
Formation is passed described interlayer insulative layer and the cylinder hearth electrode that contacts with described bottom pattern, and described cylinder hearth electrode forms sidewall and the lower surface around the built-in electrical insulation pattern;
In described interlayer insulative layer, form insulating pattern, with a part of cutting described cylinder hearth electrode in vertical direction and the part of described interlayer insulative layer;
Form the phase transformation pattern that contacts with the top of the cylinder hearth electrode that is partly cut; And
Form top electrode at described phase transformation pattern.
17. method according to claim 16, wherein, the cylinder hearth electrode that described quilt partly cuts has crescent shape, " C " shape or " (" shape of seeing from top view.
18. method according to claim 16, wherein, described bottom pattern comprises diode and the diode electrode that piles up in regular turn.
19. method according to claim 16, wherein, described phase transformation pattern comprises the contact plunger that contacts with described substrate and the conductive pattern that is arranged on the described contact plunger.
20. method according to claim 19 also comprises: form transistor, described transistor is electrically connected to described suprabasil respective base pattern.
21. method according to claim 16 wherein, forms described insulating pattern and comprises:
A part of cutting the part of described cylinder hearth electrode and described interlayer insulative layer in vertical direction to be forming groove, and described groove exposes the sidewall that is cut of the part of upper surface of described bottom pattern and cylinder hearth electrode that described quilt partly cuts; And
In described groove, form insulating barrier.
22. method according to claim 16 wherein, forms described insulating pattern and comprises:
Cut the part of described cylinder hearth electrode and the part of described interlayer insulative layer in vertical direction, forming groove, described groove exposes upper surface and the sidewall of the cutting part of the cylinder hearth electrode that described quilt partly cuts; And
In described groove, form insulating barrier.
23. method according to claim 16 wherein, forms described cylinder hearth electrode and comprises:
The hearth electrode contact hole of described interlayer insulative layer is passed in formation, the upper surface of the described bottom pattern of described hearth electrode contact holes exposing;
Form bottom electrode layer at the described interlayer insulative layer with described hearth electrode contact hole, this bottom electrode layer covers sidewall and the lower surface of described hearth electrode contact hole;
Form the internal insulating layer of filling described hearth electrode contact hole in the described substrate with described bottom electrode layer; And
The described internal insulating layer of complanation and described bottom electrode layer are up to the upper surface that exposes described interlayer insulative layer.
24. method according to claim 23 also comprises:, behind the described upper surface that exposes described interlayer insulative layer, planarization process is carried out at least one times at the described internal insulating layer of complanation and described bottom electrode layer.
25. the method for the manufacture of phase change memory device comprises:
Form interlayer insulative layer in the substrate with bottom pattern;
Pass described interlayer insulative layer and form the cylinder hearth electrode in corresponding bottom pattern, described cylinder hearth electrode forms sidewall and the lower surface around the built-in electrical insulation pattern;
In described interlayer insulative layer, form linear insulating pattern at x axle or y direction of principal axis, with a part of removing described cylinder hearth electrode in vertical direction and the part of described interlayer insulative layer;
The phase transformation pattern that contacts at the cylinder hearth electrode that the cylinder hearth electrode partly removed forms with described quilt is partly removed; And
Form top electrode at corresponding phase transformation pattern.
26. method according to claim 25, wherein, the cylinder hearth electrode that described quilt is partly removed has crescent shape, " C " shape or " (" shape of seeing from top view.
27. method according to claim 25 wherein, is cut the same section of the cylinder hearth electrode that described quilt partly removes and is arranged to form the even CCC that sees from top view.
28. method according to claim 25, wherein, described phase transformation pattern is formed on the direction parallel or vertical with surface and extends, and the described part of wherein said cylinder hearth electrode is cut along described surface.
29. method according to claim 25 wherein, forms described linear insulating pattern and comprises:
A part of cutting the part of described cylinder hearth electrode and described interlayer insulative layer in vertical direction to be forming linear groove, and described linear groove exposes the sidewall that is cut of the part of upper surface of described bottom pattern and cylinder hearth electrode that described quilt partly cuts; And
In described linear groove, form insulating barrier.
30. method according to claim 25 wherein, forms described linear insulating pattern and comprises:
A part of cutting the part of described cylinder hearth electrode and described interlayer insulative layer in vertical direction to be forming linear groove, and described linear groove exposes upper surface and the sidewall of the cutting part of the cylinder hearth electrode that described quilt partly cuts; And
In described linear groove, form insulating barrier.
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020070070153 | 2007-07-12 | ||
| KR10-2007-0070153 | 2007-07-12 | ||
| KR1020070070153A KR20090006628A (en) | 2007-07-12 | 2007-07-12 | Phase change memory device and methods of fabricating the same |
| KR10-2007-0073521 | 2007-07-23 | ||
| KR1020070073521 | 2007-07-23 | ||
| KR1020070073521A KR101186653B1 (en) | 2007-07-23 | 2007-07-23 | Phase change memory devices having bottom electrode and methods of fabricating the same |
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| CN101393965A CN101393965A (en) | 2009-03-25 |
| CN101393965B true CN101393965B (en) | 2013-10-02 |
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| KR (1) | KR20090006628A (en) |
| CN (1) | CN101393965B (en) |
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| CN108735897A (en) * | 2017-04-18 | 2018-11-02 | 意法半导体(克洛尔2)公司 | Phase transition storage |
Families Citing this family (15)
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| KR100973273B1 (en) | 2008-04-28 | 2010-07-30 | 주식회사 하이닉스반도체 | Phase change memory device and method for manufacturing the same |
| US9246093B2 (en) | 2009-07-01 | 2016-01-26 | Micron Technology, Inc. | Phase change memory cell with self-aligned vertical heater and low resistivity interface |
| KR20110035061A (en) * | 2009-09-29 | 2011-04-06 | 삼성전자주식회사 | Phase-change memory device |
| US8198124B2 (en) * | 2010-01-05 | 2012-06-12 | Micron Technology, Inc. | Methods of self-aligned growth of chalcogenide memory access device |
| US8729521B2 (en) * | 2010-05-12 | 2014-05-20 | Macronix International Co., Ltd. | Self aligned fin-type programmable memory cell |
| CN102376878B (en) * | 2010-08-05 | 2013-07-17 | 中芯国际集成电路制造(上海)有限公司 | Manufacture method for bottom electrode of phase change memory |
| CN102376880B (en) * | 2010-08-10 | 2013-10-23 | 中芯国际集成电路制造(上海)有限公司 | Production method of memory unit for phase-change memory |
| CN102544363A (en) * | 2010-12-29 | 2012-07-04 | 中芯国际集成电路制造(上海)有限公司 | Preparation method for phase change memory bottom electrode structure |
| CN102760831A (en) * | 2011-04-27 | 2012-10-31 | 中芯国际集成电路制造(上海)有限公司 | Phase change memory and formation method thereof |
| KR20130042975A (en) | 2011-10-19 | 2013-04-29 | 삼성전자주식회사 | Method of forming non-volatile memory device having small contact and related device |
| KR20130044496A (en) * | 2011-10-24 | 2013-05-03 | 에스케이하이닉스 주식회사 | Phase change random access memory device and fabrication method thereof |
| CN102832342A (en) * | 2012-09-14 | 2012-12-19 | 中国科学院上海微系统与信息技术研究所 | Phase change storage unit containing titanium silicon nitrogen (TiSiN) material layers and preparation method of phase change storage unit |
| CN105489757B (en) * | 2015-12-04 | 2018-07-03 | 江苏时代全芯存储科技有限公司 | Phase-change memory structure and its manufacturing method |
| CN105514136A (en) * | 2016-01-26 | 2016-04-20 | 上海新储集成电路有限公司 | Method for preparing three-dimensional resistive random access memorizer |
| KR102527669B1 (en) * | 2016-08-11 | 2023-05-02 | 삼성전자주식회사 | Variable resistance memory devices and methods of manufacturing the same |
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| US6531373B2 (en) * | 2000-12-27 | 2003-03-11 | Ovonyx, Inc. | Method of forming a phase-change memory cell using silicon on insulator low electrode in charcogenide elements |
| US6589714B2 (en) * | 2001-06-26 | 2003-07-08 | Ovonyx, Inc. | Method for making programmable resistance memory element using silylated photoresist |
| US7038230B2 (en) * | 2004-01-06 | 2006-05-02 | Macronix Internation Co., Ltd. | Horizontal chalcogenide element defined by a pad for use in solid-state memories |
| KR100650724B1 (en) * | 2004-07-01 | 2006-11-27 | 주식회사 하이닉스반도체 | Method for manufacturing phase-change random access memory device |
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| CN108735897A (en) * | 2017-04-18 | 2018-11-02 | 意法半导体(克洛尔2)公司 | Phase transition storage |
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