CN101383615A - Analog/digital converter having voltage-stabilized power supply and serial port communication line - Google Patents
Analog/digital converter having voltage-stabilized power supply and serial port communication line Download PDFInfo
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- CN101383615A CN101383615A CNA2008100718331A CN200810071833A CN101383615A CN 101383615 A CN101383615 A CN 101383615A CN A2008100718331 A CNA2008100718331 A CN A2008100718331A CN 200810071833 A CN200810071833 A CN 200810071833A CN 101383615 A CN101383615 A CN 101383615A
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Abstract
The invention provides an analogue /digital converter with a stabilized voltage power supply and serial port communication wires, which relates to a conversion circuit and has the advantages of high integrity and low cost, can use only two serial port communication wires to enable a back end microprocessor to read and control the data of a front end mould/digital converter chip, and has the breaking control function of the front end mould/digital converter chip. The analogue /digital converter is provided with an analogue /digital converter, a digital interface, a stabilized voltage power supply, a clock circuit and two serial port communication wires, wherein the output end of the analogue /digital converter is connected with an input analogue signal in an external connection way, the input end of the digital interface is connected with the output end of the analogue /digital converter, the output end of the digital interface is connected with a back end chip by the two serial port communication wires in an external connection way, the clock circuit is connected with the analogue /digital converter, the digital interface, a clock input or an inside clock generator, the input power supply is connected with the analogue /digital converter via the stabilized voltage power supply, and meanwhile, the stabilized voltage power supply is output to an external sensor.
Description
Technical field
The present invention relates to a kind of change-over circuit, especially relate to a kind of high integration, low cost, the analog/digital converter of band stabilized voltage power supply and simplification serial port communication line.
Background technology
Not having on the existing analog/digital converter chip can be for the voltage-stabilized power supply circuit of external sensor use.Product description referring to the CS5460 chip of the ADS1230 of company of Texas Instruments (Texas Instrument) and U.S. Cirrus Logic company.Make these chips when being used in combination, need outside stabilized voltage power supply, provide power supply to external sensor and chip internal circuit with external sensor.In addition, these existing chip technology need at least 3 communication and control line when doing the data communication with outside other chips, are used for data output and the interior various controls of chip in the chip, comprise outage control.
Fig. 1 provided existing analog/digital converter chip a typical functional-block diagram (referring to the product specification book: 1, U.S. Texas Instruments, ADS1230 Product Data Sheet, July 2007; 2, U.S. Analog Devices, AD7798/AD7799 Product Data Sheet, 2007).Wherein input signal 01 is digital signal behind A/D conversion circuit 02, this digital signal is passed through 3 serial port communication line 04 (DOUT through digital interface 03, PD and SCK) link to each other with other chips of rear end, clock circuit 05 is connected with A/D conversion circuit 02 and digital interface 03 and clock input or internal clock generator 06 respectively, imports power supply 07 and connects A/D conversion circuit 02.
Summary of the invention
The objective of the invention is to realize of data read and the control of rear end microprocessor to front end A/D converter chip at least 3 serial port communication lines of existing analog/digital converter needs, comprise existing deficiencies such as outage control to the front end A/D converter, providing a kind of only needs 2 serial port communication lines just can realize data read and the control of rear end microprocessor to front end A/D converter chip, comprises to the high integration of the outage of front end A/D converter control, cheaply with the analog/digital converter of stabilized voltage power supply and serial port communication line.
The present invention is provided with analog/digital converter, digital interface, stabilized voltage power supply, clock circuit and 2 serial port communication lines.The external input analog signal of analog/digital converter input, digital interface input termination analog/digital converter output, the digital interface output is by 2 external back-end chip of serial port communication line, clock circuit is connected with analog/digital converter and digital interface and clock input or internal clock generator respectively, the input power supply connects analog/digital converter by stabilized voltage power supply, and stabilized voltage power supply exports external sensor to simultaneously.
2 serial port communication lines are DOL Data Output Line DOUT and incoming line PD_SCLK.DOL Data Output Line DOUT is used for dateout.
Input signal is linked to each other with microprocessor or other chips of rear end by digital interface after analog/digital converter is converted to digital signal.Analog/digital converter can be provided with programmable gain amplifier or fixed gain amplifier usually, the input termination input signal of programmable gain amplifier or fixed gain amplifier, the input of the output termination analog/digital converter of programmable gain amplifier or fixed gain amplifier.Also can be provided with digital filter, the output of digital filter input termination analog/digital converter, the output termination digital interface of digital filter.
External power source is input as the input of stabilized voltage power supply, provides stable low noise power supply through analog/digital converter in chip and the transducer outside the chip after the stabilized voltage power supply voltage stabilizing.Digital interface is delivered to other chips of rear end outside the chip with the digital signal after mould/number conversion in the chip, receives other chips of rear end simultaneously to the digital controlled signal that the analog/digital converter chip is provided, and comprises the outage control signal.
The present invention has partly done effective improvement to the serial communication of existing analog/digital converter chip technology.Utilize the clock incoming line in traditional serial port communication line,, judge that it is the clock input or is the outage input function, thereby reach the purpose of utilizing this clock incoming line to come the outage control line of double as chip according to its length that is in high or low level time.The serial port communication line of existing needs more than 3 only be kept to needs 2 serial port communication lines, just can realize the control to the analog/digital converter chip of the output of data inside chips and rear end microprocessor or other chip.
In addition, the present invention is being integrated in the analog/digital converter chip for the voltage-stabilized power supply circuit that external sensor uses.Compare with existing analog/digital converter chip, this organic combination, the total system cost is descended, and improved the system performance index of whole analog/digital converter effectively, especially improved and simplified the control and management capability of system to analog power, make whole system that more effective use power supply can be arranged, reduce the power consumption of whole system when reality is used.
Description of drawings
Fig. 1 is the functional-block diagram of an existing typical simulation/digital quantizer chip.
Fig. 2 is the functional-block diagram of the embodiment of the invention.
Fig. 3 is that the circuit of the embodiment of the invention (being applied to the electronic scale front end) is formed functional-block diagram.
Fig. 4 is used to export the sequential legend of one 24 bit data for the serial communication of the embodiment of the invention.
Fig. 5 is used for the sequential legend of chip outage control for the serial communication of the embodiment of the invention.
Embodiment
Referring to Fig. 2, the embodiment of the invention is provided with analog/digital converter 1, digital interface 2, stabilized voltage power supply 3, clock circuit 4 and 2 serial port communication lines 5 (DOL Data Output Line DOUT and incoming line PD_SCLK).Wherein input signal 6 is converted to digital signal through analog/digital converter 1, this digital signal links to each other with other chips of rear end by 2 serial port communication lines 5 (DOUT and PD_SCLK) through digital interface 2, clock circuit 4 is connected with analog/digital converter 1 and digital interface 2 and clock input or internal clock generator 7 respectively, input power supply 8 connects analog/digital converter 1 by stabilized voltage power supply 3, and stabilized voltage power supply 3 exports external sensor 9 to simultaneously.Compare with existing analog/digital converter chip, present embodiment is integrated can be for the stabilized voltage power supply 3 of external sensor use.This stabilized voltage power supply 3 can be simultaneously provides power supply for the analog circuit of chip internal and the outer transducer of chip.In addition, by serial ports input clock line in traditional serial port communication line and outage input control line are merged into an input control line, serial port communication line is reduced to 2 by traditional 3 thus.Decision logic circuit in the digital interface 2 is judged according to the length of its high level or low level time the PD_SCLK signal of input, determines that then this input signal is input of serial ports clock or outage control input (referring to Fig. 5).
Fig. 3 provides the theory of constitution block diagram that the embodiment of the invention is applied to the analog/digital converter of electronic scale front end, is provided with programmable gain amplifier 31, analog/ digital converter 32,33,2 serial port communication lines 34 of digital interface, clock circuit 35, outer bridge type magnetic sensor 36 and the stabilized voltage power supply 37 of chip.The differential voltage output signal of the external bridge type magnetic sensor 36 of the input of programmable gain amplifier 31, the input of the output termination analog/digital converter 32 of programmable gain amplifier 31, the output digital signal of analog/digital converter 32 connects digital interface 33.Clock circuit 35 and stabilized voltage power supply 37 are connected to analog/digital converter 32 and bridge type magnetic sensor 36 respectively.In Fig. 3, become the differential voltage signal V0 (V0+ that produces by outside bridge type magnetic sensor 36 because of pressing, V0-) input to the interior programmable gain amplifier 31 of chip, after analog/digital converter 32 conversions, pass through digital interface 33 again, deliver to the microprocessor of rear end again through 2 serial port communication lines 34 (DOUT and PD_SCLK).Built-in stabilized voltage power supply 37 not only provides power supply to outside bridge type magnetic sensor 36, also is used as the reference power source of analog/digital converter 32 simultaneously, stabilized voltage power supply 37 external external power sources 38.The inner generator 39 of input of clock circuit 35 external clocks or clock.
Serial port communication line 34 is made up of DOUT and two lines of PD_SCK.DOUT is a DOL Data Output Line, is used for dateout.PK_SCK is an incoming line, is used for the operate as normal and the outage of control chip, selects the different input channels and the gain of programmable amplifier, and input needed serial ports clock when reading the DOUT dateout.Wherein outage control and the serial data input clock with chip organically is combined into an incoming line, is the most important difference of the serial communication of the present invention and existing other chips, makes the serial port communication line that needs traditionally more than 3 be simplified to 2.
Fig. 4 provides this serial communication and is used to export one 24 bit data, and the sequential legend of input channel and gain selection control.Digital interface circuit in the chip is that the time length of high level (or low level) judges that this is input as still outage input of clock input according to the input signal of PD_SCK.For example, sequential chart corresponding shown in Figure 5, when PD_SCK was low level, chip was in normal operating conditions, when PD_SCK became high level from low level and remain on high level above the predefined time (being 60 μ s this legend), chip promptly entered off-position.When PD_SCK came back to low level, chip came back to normal operating conditions, as shown in Figure 5.When PD_SCK becomes high level from low level, but time that is in high level during less than predefined time (being 60 μ s in this legend), this pulse is just confirmed as the input of serial ports clock by chip.Thereby reach with an incoming line, replace the purpose of existing outage input and serial ports clock input two-lines.
In Fig. 4, Dout is the data outputs, and PD-SCK is serial ports clock and outage control input.As Dout during by high step-down, show that current data converts, data can be exported by serial ports, are the illustrated current change-over period to begin.At this moment, the input of PD-SCK should be imported 25,26 or 27 positive pulses according to the needs of next conversion.These positive pulses are read current data converted on the one hand, prepare for change selected input channel and gain next time on the other hand.Input channel can be passage A or B, and gain can be 128 or 64.
The serial port communication method of this simplification can be used implemented in many forms.As can making chip be in normal operating conditions when PD_SCK is high level, and as PD_SCK during from high level step-down level, the length that is in low level time according to PD_SCK be judged the still serial ports input clock of outage control that is input as chip.
In Fig. 5, PD-SCK is serial ports clock and outage control input.When PD-SCK was low level, chip was in normal operating conditions.Off-position is that chip power is turned off, to save the power consumption of chip when not working.
Claims (4)
1. the analog/digital converter of band stabilized voltage power supply and serial port communication line is characterized in that being provided with analog/digital converter, digital interface, stabilized voltage power supply, clock circuit and 2 serial port communication lines; The external input analog signal of analog/digital converter input, digital interface input termination analog/digital converter output, the digital interface output is by 2 external back-end chip of serial port communication line, clock circuit is connected with analog/digital converter and digital interface and clock input or internal clock generator respectively, the input power supply connects analog/digital converter by stabilized voltage power supply, the external external sensor of output end of stabilized voltage supply.
2. the analog/digital converter of band stabilized voltage power supply as claimed in claim 1 and serial port communication line is characterized in that 2 serial port communication lines are DOL Data Output Line DOUT and incoming line PD_SCLK.
3. the analog/digital converter of band stabilized voltage power supply as claimed in claim 1 and serial port communication line, it is characterized in that analog/digital converter is provided with programmable gain amplifier or fixed gain amplifier, the input termination input signal of programmable gain amplifier or fixed gain amplifier, the input of the output termination analog/digital converter of programmable gain amplifier or fixed gain amplifier.
4. the analog/digital converter of band stabilized voltage power supply as claimed in claim 1 and serial port communication line, it is characterized in that analog/digital converter is provided with digital filter, the output of digital filter input termination analog/digital converter, the output termination digital interface of digital filter.
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| CN2008100718331A CN101383615B (en) | 2008-09-19 | 2008-09-19 | Analog/digital converter having voltage-stabilized power supply and serial port communication line |
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| CN2008100718331A CN101383615B (en) | 2008-09-19 | 2008-09-19 | Analog/digital converter having voltage-stabilized power supply and serial port communication line |
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| CN101383615A true CN101383615A (en) | 2009-03-11 |
| CN101383615B CN101383615B (en) | 2011-12-07 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110515338A (en) * | 2019-09-11 | 2019-11-29 | 上海秋豪衡器有限公司 | A kind of digital sensor |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110515338A (en) * | 2019-09-11 | 2019-11-29 | 上海秋豪衡器有限公司 | A kind of digital sensor |
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