CN101379542A - Temporary memory circuits for matrix display device - Google Patents

Temporary memory circuits for matrix display device Download PDF

Info

Publication number
CN101379542A
CN101379542A CNA2006800504793A CN200680050479A CN101379542A CN 101379542 A CN101379542 A CN 101379542A CN A2006800504793 A CNA2006800504793 A CN A2006800504793A CN 200680050479 A CN200680050479 A CN 200680050479A CN 101379542 A CN101379542 A CN 101379542A
Authority
CN
China
Prior art keywords
circuit
data
temporary storage
picture element
pixel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2006800504793A
Other languages
Chinese (zh)
Inventor
D·C·伯恩斯
R·J·沃德布恩
M·I·纽萨姆
J·E·D·赫维茨
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microemissive Displays Ltd
Original Assignee
Microemissive Displays Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microemissive Displays Ltd filed Critical Microemissive Displays Ltd
Publication of CN101379542A publication Critical patent/CN101379542A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/18—Use of a frame buffer in a display terminal, inclusive of the display panel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/42—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of patterns using a display memory without fixed position correspondence between the display memory contents and the display position on the screen

Abstract

A circuit for supplying video data supplied in frames divided into timeslots to an array of pixels comprises a plurality of one-bit temporary storage elements (M), at least some of which are arranged to store data for different pixels of the array during different timeslots within a frame. The circuit can be used in an electroluminescent display in which each pixel (P) comprises an organic light-emitting diode.

Description

The buffering circuit that is used for matrix display
Technical field
The present invention relates to optoelectronic display apparatus.The invention provides Frame circuit that it is temporary before demonstration.
Background technology
A kind of known electronic console, especially miniscope are made of separately addressable picture element (pixel) matrix.Under some occasions, these matrixes are had an effect with scale-of-two, and wherein each independent pixel is accepted ON or OFF signal.The signal at this pixel place is used for light modulated or via the electrooptical material emission light that covers thereon.Typically, matrix receives the pixel of ON signal or directly or via some optical device forms the image that the observer receives enlargedly.
In the background of organic luminescent device (OLED) miniscope, because the gray scale of successfully controlling in the miniscope pixel by the change size of current is quite difficult, the numerical approach of therefore controlling required little electric current is preferred.By using a kind of numerical approach, design and optimization pixel driver current source are the maximum currents in order to realize requiring, rather than for the continuum between maximum current and the minimum current.
Width modulation is the known technology that forms gray scale on binary mode electronic display.Each frame that is displayed on the greyscale video on the picture element matrix is divided into continuous subframe or bit plane of several times.In order to reduce one group of figure place that gray shade scale is required of expression as far as possible, bit plane is generally toward each other by binary weighting.By promptly bit plane being scanned up to picture element matrix, and the number of time slot of binary weighting is distributed to each bit plane, in fact human eye integrates all bit planes to form the illusion of a gray level image.Notice that pulse width modulating scheme generally uses the sequential of video line synchronizing signal with the control modulation sequence, although be not so certain.
In the realization of typical binary mode electronic display, an information bit can be stored and show to each pixel in the picture element matrix.If information source is the stream video source, then need temporary storage to help to picture element matrix, data correctly being formatted as bit plane at loading data.Temporary storage can be implemented within the miniscope or outside.Temporary storage generally must have enough storage unit to preserve at least one complete Frame, and wherein each storage unit has the expectation number of greyscale levels that enough positions show by pixel with expression.For example, obtain 256 gray shade scales (8) in order to use width modulation on 320 * 240 picture element matrixs, wherein each pixel has 1 storage unit, need have the temporary storage of 614400 (320*240*8) 1 storage unit.
In case frame data are loaded into temporary storage, data by one time one bit plane be transformed into picture element matrix.Complicacy is and must reads bit-plane data from temporary storage with burst mode, to use up the frame time of small scale as far as possible.This generally causes the increase of the frequency of operation and the power consumption of electronic display system.
Another complicacy is the general data of preserving two whole frame of temporary storage.This permission input video stream is admitted to half of temporary storage, and second half data from temporary storage are sent to picture element matrix simultaneously.Another selection is to use the dual-port temporary memory store that can write data and sense data therein simultaneously.
Temporary storage accounts for very important part in the cost of whole electronic display system.Sheet carries if be embodied as, and it will occupy the very large ratio of total chip size.
Can eliminate by two storage unit are set each pixel from the characteristic of bursting of temporary storage traffic bit panel data, new bit plane can be loaded into a storage unit in each pixel thus, show the value in another storage unit in each pixel simultaneously.Yet this has increased the area requirements of pixel, and therefore improves the cost of display element.
Disclosed other method is for producing required all of specific quantity gray shade scale enough storage unit to be set in each pixel among the WO 02/089534, uses the binary weighting fixed time interval to select each position successively circularly then, to form gray scale.The advantage of doing like this is local storage data, does not waste the power that transmits data from outside temporary storage continuously thus, thereby allows the low-power of rest image to show.Yet the major defect of this method is that bank bit has increased the area requirements of pixel in pixel, and therefore improves the cost of display element.
US6201521 describes a kind of " divided reset " scheme that is used for the address pixel matrix, uses a simple example that divided reset approach is made best description.Suppose that a picture element matrix has 15 pixel columns, every row contains 15 pixels, and each pixel energy storage and show a position.Hypothesis requires 4 gray scales (16 gray shade scales) in addition, and so each frame time is divided into 15 equal time slots.After setting up these time slots, to the zero time slot point brilliant black pixel in the frame, it is 1 pixel that a time slot is lighted gray shade scale, and it is 2 time slot that two time slots are lighted gray shade scale, is 15 pixel up to 15 time slots being lighted gray shade scale by that analogy.In this example of divided reset approach, every row is considered to a replacement group.It also is favourable writing data to picture element matrix a delegation when the beginning (or end) of each time slot, capable thus write-in functions and PWM slot synchronization.
Fig. 1 illustrates and how in time each row to be loaded and video data.When attention begins at each time slot, must upgrade four lines.For example, when the time slot 15 in FRAME1 began, position 0 data were written to ROW15, and position 1 data are written to ROW14, and position 2 data are written to ROW12, and position 3 data are written to ROW8.Equally, when the time slot 1 in FRAME2 began, position 0 data were written to ROW1, and position 1 data are written to ROW15, and position 2 data are written to ROW13, and position 3 data are written to ROW9.
Under the present art, be used for this routine temporary storage and must preserve a complete Frame and write for four times to realize every time slot.For the simple case that provides previously, this is equivalent to have the temporary storage of 900 information, and promptly each pixel in 15 * 15 pixels in the picture element matrix needs 4.
Summary of the invention
The purpose of this invention is to provide circuit and method that a kind of temporary storage that greatly reduces by memory requirement drives electronic display pixels, still keep the gray scale of high apparent bit depth simultaneously.
The invention provides according to claim 1 and be used to drive the circuit of picture element matrix and according to the electronic console of claim 13.Preferred or optional feature of the present invention is stated in the dependent claims.
Description of drawings
Only the present invention is made more detailed description with reference to the accompanying drawings as illustration ground, in the accompanying drawings:
Fig. 1 schematically illustrates aforementioned prior art arrangement;
Fig. 2 schematically illustrates a simple embodiment of the present invention; And
Fig. 3 is illustrated in the data storage in the buffering circuit of Fig. 2.
Embodiment
Fig. 2 illustrates a kind of electronic console, and it comprises picture element matrix 1, temporary storage 2 and drive zone 3.Picture element matrix picture element matrix P capable by R and the C row constitute.Each pixel P is made of one or more storage unit and electrode driver.If pixel has more than one storage unit, then this pixel needs multiplexer, to select suitable storage unit and to make it be sent to the pixel electrode driver as control signal.The pixel electrode driver provides signal to send light or light modulated with the control pixel electrode again.
Temporary storage 2 is made of a plurality of storage unit.These storage unit can be arranged in the several rows of ADDR1-ADDRA by name, and each row has C storage unit.The number of row A depends on the number of row in desired PWM grey level bit depth and the picture element matrix in the temporary storage.If the bit depth that requires is N, then way is that temporary storage 2 is divided into (N-1) individual group easily, and wherein each group is associated with the temporal data of the certain bits weight of desired grey level bit depth.First group of temporal data that is associated with second least significant bit (LSB) (position 1), second group of temporal data that is associated with the 3rd least significant bit (LSB) (position 2) by that analogy, is associated with the temporal data of highest significant position (position (N-1)) up to (N-1) group.Perhaps, do not store the passive demonstration of data for pixel wherein, temporary storage can have N such group, comprising the group of least significant bit (LSB) (position 0).
Drive zone 3 comprises a plurality of actuator unit D.Each actuator unit D is associated with a pixel column in the picture element matrix and a column of memory cells in the temporary storage.In addition, each actuator unit D can visit any storage unit in its related column of memory cells in storage unit in any pixel in its related pixel column and the temporary storage.In addition, before data bit was sent to temporary storage and/or picture element matrix, drive zone can make up and store the input N digital video data up to delegation.
For the interpretation work principle, way is to use object lesson easily.We get back to the example that uses previously of describing divided reset approach.When 4 PWM gray scales of needs, each frame time is divided into 15 time slots suits.In addition, we suppose that picture element matrix is made of 15 pixel columns of ROW1-ROW15 by name, and each pixel column contains 15 pixel P.In addition, each pixel P comprises a storage unit and an electrode driver, and wherein this storage unit can be stored 1 data and is used for the control electrode driver.Note having usually much larger than the picture element matrix of 15 * 15 pixels with greater than 4 bit depth according to display of the present invention.
With regard to the temporary storage in this example, when N=4, can as shown in Figure 3 temporary storage be divided into the individual district of 3 (being N-1).First district, i.e. BLOCK1 is associated with the temporal data of position 1 weighted data.Second district, i.e. BLOCK2 is associated with the temporal data of position 2 weighted datas.The 3rd district, i.e. BLOCK3 is associated with the temporal data of position 3 weighted datas.Select the line number in each district, make each district can serve as circular buffer.For this example, can be by making BLOCK1 have a memory cell rows, make BLOCK2 have three memory cell rows, making BLOCK3 have eight memory cell rows to obtain the circular buffer function.
More specifically, allow district B to serve as the required line number of circular buffer to be:
Σ b = 1 B 2 b - e Equation 1
Wherein B is area code (1 to N-1), and e is correction factor (0 or 1).
More particularly, if R!=2 N-1, then need extra row.
Again specifically, if storage unit can be stored more than one position, then need more complicated equation.
Hypothesis is for the ROW1 among the FRAME1 now, and 4 digital video data symbols of input are sent to actuator unit D storage suitable in the drive zone, till the complete row of 4 bit data code elements is set up.In case set up, then begin temporary storage and picture element matrix are imported into and spread out of.Each driver D delivers to the pixel of the ROW1 Xingqi association of picture element matrix with the position 0 of the data symbols of its storage, and it is as the control signal of its pixel electrode driving circuit there.In addition, each driver D also temporary storage is delivered in the position 1 of its data symbols ADDR1 (district 1) in its related storage unit.In addition, each driver D also temporary storage is delivered in the position 2 of its data symbols ADDR2 (district 2) in its related storage unit.Its related storage unit among the ADDR5 that each driver D also delivers to temporary storage with the position 3 of its ROW1 data symbols (district 3) is arranged again.Data are stored in picture element matrix and the temporary storage till next time slot begins, and 4 bit data code elements of ROW2 pixel are sent to drive zone and deposit in simultaneously.
In case set up the data of ROW2 in drive zone, each driver D is sent to its related pixel among the ROW2 of picture element matrix with the position 0 of its data symbols.In addition, because nowadays the pixel among the ROW1 has shown their position 0 in corresponding to a time slot that uses the PWM demonstration time quantum that LSB distributed, therefore each driver D reaches ROW1 with the position that is stored among the ADDR1 in its association store unit, thereby can be below shows the position 1 of ROW1 in two time slots.Notice that nowadays the ADDR1 of temporary storage can supply to reuse, so each driver D can be sent to its related storage unit among the ADDR1 with the position 1 of ROW2 data symbols.ADDR1 serves as the circular buffer of position 1 data thus.In addition, each driver D is sent to its related storage unit among the ADDR3 of temporary storage with the position 2 of its data symbols.Have, each driver D is sent to its related storage unit among the ADDR6 of temporary storage with the position 2 of its data symbols again.
Equally, in case set up the data of ROW3 in drive zone, each driver D reaches its related pixel among the ROW3 of picture element matrix with the position 0 of its data symbols.In addition, 0 reach a time slot, so each driver D will be stored in that the position in its related storage unit reaches ROW2 among the ADDR1, thereby show the position 1 of ROW2 in the back in two time slots because nowadays the pixel among the ROW2 has shown their position.ADDR1 can supply to reuse once more, so each driver D can be sent to its related storage unit among the ADDR1 with the position 1 of its ROW3 data symbols.In addition, its related storage unit among each driver D ADDR4 of the position 2 and 3 of its data symbols being sent to temporary storage and the ADDR7.
In addition, in case set up the data of ROW4 in drive zone, each driver D reaches its related pixel among the ROW4 of picture element matrix with the position 0 of its data symbols.In addition, because nowadays the pixel among the ROW3 has shown their position 0, so the position that each driver D will be stored among the ADDR1 in its related storage unit is sent to ROW3, shows the position 1 of ROM1 with two time slots below.ADDR1 can supply to reuse once more, so each driver D can be sent to its related storage unit among the ADDR1 with the position 1 of its data symbols.In addition, because the position 1 of ROW1 has been shown two the corresponding time slots of time that distribute with them on the PWM sequence, therefore each driver D will be stored in that the position in its association store unit is sent to ROW1 among the ADDR2, show the position 2 of ROW1 with four time slots below.Nowadays the ADDR2 that notes temporary storage can supply to reuse, so each driver D can be sent to its related storage unit among the ADDR2 with the position 2 of its data symbols.Therefore ADDR2-ADDR4 among the BLOCK2 serves as the circular buffer of position 2 data.In addition, each driver D is sent to the storage unit related with it among the ADDR8 of temporary storage with the position 3 of its data symbols.
Obviously, along with this frame and the more evolution of multiframe, each time slot increases to the number of times of the access of temporary storage and picture element matrix and picture element matrix is done four times writes, and to temporary storage four times of wherein interting are read and write for four times.
Those skilled in that art can visualize suitable device so that this equipment and method are produced correct addressing and timing control signal.
Obviously, circular buffer is served as in each district in the temporary storage.For top simple case, compare 900 1 storage unit that the full frame temporary storage needs, temporary storage can adopt 180 (promptly 12 row are 15) 1 storage unit to realize, still keeps the PWM4 position gray scale of requirement simultaneously, thereby significantly reduces memory requirement.
More specifically, method and apparatus described herein also can be used for to higher pixel count and more high bit depth show that occasion significantly reduces the temporary storage requirement.For example,, temporary storage can be divided into seven districts for the miniscope of 320*240 pixel with 8 gray scales, its altogether just 247 the row 320 (1) storage unit, promptly 79040.Have the temporary storage in individual district, 614400 (320 * 240 * 8) compared to existing technology, the present invention significantly reduces memory requirement.
In an optional embodiment, the DATA line is divided into two or more unitary part, and part is at the row (or row) of pixel, and other parts are at temporary storage.By cutting apart the DATA line, can carry out visit discretely with the visit of temporary storage, and carry out visit discretely temporary storage with the visit of picture element matrix to picture element matrix.This will reduce the capacitive load of access circuit, thereby access time and/or lower power consumption faster are provided.In addition, can further the DATA signal segmentation be become two parts of two-way, thereby needn't send data, shorten the access time thus and/or reduce power consumption via full line or permutation with an addressing delegation or a row pixel.
In another optional embodiment, can use the DATA line that the analogue value is imported into and spread out of temporary storage and pixel column (or row).In simulation system, the present invention allows to use than low-qualityer storage unit of prior art (littler or higher electric leakage) and/or low-qualityer analog D ATA line drive.
Although disclose some exemplary embodiment and method here, however those skilled in that art can know by foregoing disclosure and know, under the prerequisite that does not break away from the scope of the invention that defines by claim, can these embodiment and method are modified.For example, although exemplary embodiment relates to organic light emitting diode display, yet principle of the present invention can be applicable to LCD or other display with being equal to, and wherein picture dot comprises storage unit and individually addressable or with by row or row-by-row system addressing.
In addition, can become the plurality of sub time slot to increase bit depth by the time slot dividing that will distribute to least significant bit (LSB).For example, under above-mentioned 4 situation, become three sub-slots to allow to show an additional bit this time slot dividing, thereby realize 5 gray scales.One in these three time slots is used for new least significant bit (LSB), and two other sub-slots is used for old least significant bit (LSB).Equally, this time slot dividing is become seven sub-slots then allow 6 gray scales.

Claims (15)

1. one kind the circuit that the video data that provides in the frame of a plurality of time slots offers a picture element matrix will be provided, described circuit comprises a plurality of temporary storage locations, and at least some described temporary storage locations are configured to the data of the different pixels of different time-gap stored matrix in a frame.
2. circuit as claimed in claim 1 is characterized in that, described storage unit is digital in essence, and digital value is offered pixel driver.
3. circuit as claimed in claim 1 or 2 is characterized in that, described storage unit is stored a position separately.
4. circuit as claimed in claim 1 or 2 is characterized in that, described storage unit is stored more than one position separately.
5. circuit as claimed in claim 1 is characterized in that, uses the gray scale generating technique of selecting from pulse-amplitude modulation, width modulation and pulse code modulation (PCM) that data are offered pixel and shows.
6. the described circuit of any one claim as described above is characterized in that described circuit is configured to certain data are directly offered the row or column of picture element matrix, and not with described certain data storage in temporary storage location.
7. the described circuit of any one claim as described above is characterized in that described circuit is configured to provide the plurality of data section, and each data segment is associated with a part of row or column of picture element matrix, is directly related to that part of.
8. the described circuit of any one claim as described above is characterized in that, comprises drive circuit, is used for data are delivered to temporary storage location and data are reached picture element matrix from temporary storage location.
9. circuit as claimed in claim 8 when immediate subordinate during in claim 1, is characterized in that described storage unit is simulated in itself, and can provide the analogue value to drive circuit.
10. the described circuit of any one claim as described above is characterized in that, described circuit is configured to based process data line by line.
11. the described circuit of any one claim is characterized in that as described above, described circuit is configured to pursue row based process data.
12. the described circuit of any one claim is characterized in that as described above, described circuit is the integrated circuit that comprises picture element matrix in addition.
13. one kind comprises picture element matrix and as the electroluminescent display of claim 1-11 circuit as described in any one.
14. electroluminescent display as claimed in claim 13 is characterized in that, each pixel comprises an Organic Light Emitting Diode.
15. electroluminescent display as claimed in claim 13 is characterized in that, comprises liquid crystal over silicon or digital illuminator matrix.
CNA2006800504793A 2005-11-30 2006-11-30 Temporary memory circuits for matrix display device Pending CN101379542A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0524400.9 2005-11-30
GBGB0524400.9A GB0524400D0 (en) 2005-11-30 2005-11-30 Temporary memory circuits

Publications (1)

Publication Number Publication Date
CN101379542A true CN101379542A (en) 2009-03-04

Family

ID=35601521

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2006800504793A Pending CN101379542A (en) 2005-11-30 2006-11-30 Temporary memory circuits for matrix display device

Country Status (7)

Country Link
US (1) US20110096239A1 (en)
EP (1) EP1955315A1 (en)
JP (1) JP2009517706A (en)
KR (1) KR20080108218A (en)
CN (1) CN101379542A (en)
GB (1) GB0524400D0 (en)
WO (1) WO2007063307A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020204487A1 (en) 2019-03-29 2020-10-08 Samsung Electronics Co., Ltd. Display panel and driving method of the display panel

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5934939Y2 (en) * 1980-06-06 1984-09-27 三洋電機株式会社 Memory addressing circuit
JPS59177663A (en) * 1983-03-29 1984-10-08 Fujitsu Ltd Memory access system
US6300924B1 (en) * 1994-01-03 2001-10-09 Texas Instruments Incorporated Displaying video data on a spatial light modulator
US6201521B1 (en) * 1995-09-29 2001-03-13 Texas Instruments Incorporated Divided reset for addressing spatial light modulator
US6157356A (en) * 1996-04-12 2000-12-05 International Business Machines Company Digitally driven gray scale operation of active matrix OLED displays
JPH10143131A (en) * 1996-11-06 1998-05-29 Toshiba Corp Decoded image display device and its display memory control method
GB9907931D0 (en) * 1999-04-07 1999-06-02 Univ Edinburgh An optoelectronic display
GB0024804D0 (en) * 2000-10-10 2000-11-22 Microemissive Displays Ltd An optoelectronic device
JP3578141B2 (en) * 2001-02-22 2004-10-20 セイコーエプソン株式会社 Display driver, display unit and electronic device
US6693385B2 (en) * 2001-03-22 2004-02-17 Semiconductor Energy Laboratory Co., Ltd. Method of driving a display device
GB0110802D0 (en) * 2001-05-02 2001-06-27 Microemissive Displays Ltd Pixel circuit and operating method
JP4461722B2 (en) * 2003-07-08 2010-05-12 ソニー株式会社 Image processing apparatus, image processing method, and image display apparatus
US20070200803A1 (en) * 2005-07-27 2007-08-30 Semiconductor Energy Laboratory Co., Ltd. Display device, and driving method and electronic device thereof
US7986287B2 (en) * 2005-08-26 2011-07-26 Semiconductor Energy Laboratory Co., Ltd. Display device and method of driving the same
US20080095363A1 (en) * 2006-10-23 2008-04-24 Dicarto Jeffrey M System and method for causing distortion in captured images

Also Published As

Publication number Publication date
US20110096239A1 (en) 2011-04-28
EP1955315A1 (en) 2008-08-13
JP2009517706A (en) 2009-04-30
GB0524400D0 (en) 2006-01-04
KR20080108218A (en) 2008-12-12
WO2007063307A1 (en) 2007-06-07

Similar Documents

Publication Publication Date Title
US9905159B2 (en) Digital driving of active matrix displays
US7928968B2 (en) Apparatus for displaying advertisement image
WO2018188327A1 (en) Pixel circuit and drive method therefor, display panel, and display apparatus
KR20090087445A (en) Data driver and display device
KR100804639B1 (en) Method for driving display device
US20080191977A1 (en) Method and apparatus for digitally driving an AMOLED
WO2008018113A1 (en) Pixel driving apparatus and pixel driving method
GB2553075A (en) A display
EP2116990A1 (en) Organic light emitting display and method for driving the same
KR20060019755A (en) Light emitting display and driving method thereof
WO2007004155A2 (en) Oled display with extended grey scale capability
CN101379542A (en) Temporary memory circuits for matrix display device
CN117769738A (en) Backboard and method for pulse width modulation
CN114694564B (en) Driving method for active matrix display
US8330755B2 (en) Image display device and driving method for same for collective write in
KR100606442B1 (en) Liquid crystal display device and method of driving the same
KR102098744B1 (en) Organic Light Emitting Display Apparatus and Driving method thereof
JP2007025544A (en) Display device
KR20070065063A (en) Method for driving data line and flat penal display using the same
JP4661329B2 (en) Display system, display controller, and display control method
EP2036069A1 (en) Active matrix organic light emitting display (amoled) device
CN214253824U (en) Display device and electronic apparatus
KR102660304B1 (en) Display device
CN109545131B (en) Display driver, display device and method of operating display driver
JP2006308900A (en) Display controller, display system, and display control method

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Open date: 20090304