CN101359956A - Repeater - Google Patents

Repeater Download PDF

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Publication number
CN101359956A
CN101359956A CNA2008102222631A CN200810222263A CN101359956A CN 101359956 A CN101359956 A CN 101359956A CN A2008102222631 A CNA2008102222631 A CN A2008102222631A CN 200810222263 A CN200810222263 A CN 200810222263A CN 101359956 A CN101359956 A CN 101359956A
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signal
echo
processing unit
frequency signal
digital medium
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CN101359956B (en
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张辉
王西强
张江辉
杨浴光
张卫东
李炯亮
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BEIJING BOXIN SHITONG TECHNOLOGY CO., LTD.
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Innofidei Technology Co Ltd
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Abstract

The invention discloses a repeater station, comprising a receiving side radio frequency processing unit, a first digital down conversion (DDC) unit, a base band processing unit, a digital up conversion (DUC) unit, a transmitting side radio frequency processing unit and a power amplification processing unit. The repeater station serves as reference signals ref which are directly produced by the base band processing unit itself for the closed-loop control to echo elimination, namely, base band digital signals serve as the reference signals ref for participating in the processing of echo elimination, thereby simplifying the processing complexity of echo elimination: on the one hand, the system complexity is greatly reduced because a hardware circuit need not be added for processing the reference signals, and on the other hand, the echo elimination effect can be guaranteed. Moreover, the base band processing unit has rather small delay.

Description

A kind of repeater
Technical field
The present invention relates to the mobile multimedia technology, refer to a kind of repeater especially.
Background technology
China Mobile multimedia broadcasting technology alliance abbreviates China Mobile multimedia broadcasting (CMMB as, China Mobile Multimedia Broadcasting), it is intended to develop multimedia reception technique and the equipment that is fit to move application as the technical system of serving China Mobile multimedia broadcasting.
In the networking of DMB, often run into the expansion signal cover, the requirement of filling signal coverage hole, such as, because the shadow effect of wireless transmission in the behind or the centre of skyscraper, often forms the blind area of radio broadcasting signal; Perhaps under the limited prerequisite of base station power, need to increase coverage etc.For these demands, it is extremely effective utilizing the repeater.
The major function of repeater be will receive faint subscriber signal amplify after, forward.Adopt directional antenna between the reception antenna of repeater and the base station, do not have the echo interference problem.But, owing to have coupling between the transmitting antenna of repeater and the reception antenna, and therefore, the receiver side in the repeater, the echo-signal that the transmitting antenna of repeater is coupled back can be received in the repeater, disturbs thereby form strong echo.In addition, in the application of coverage hole, because the time-delay of repeater itself has increased the time delay expansion of receiver system.
At present, most of repeaters all adopt the mode of pure analogue device to realize, disturb at the strong echo under the CMMB applicable cases, and the supression ability is very limited.In this case, disturb in order to suppress echo better, must higher insulation request be proposed to project installation, for example needing to utilize building to carry out space physics isolates, receiver side antenna and transmitter side antenna spacing are come, not only strengthened the manpower and materials expense, and unsatisfactory to the inhibition effect of echo interference.
In Chinese patent application number is CN200610147225.5, denomination of invention be " digital multi-media broadcast direct broadcast station multipath echo removing method " in first to file, the echo that produces for transmitting antenna and the coupling of eliminating owing to the repeater between reception antenna disturbs, draw retroeflection signal frequently from the transmitting antenna of repeater, reference signal as the closed-loop control that echo is eliminated, increased system complexity so undoubtedly, and, also can weaken elimination effect to echo owing to increased the hardware circuit that reference signal is handled.And, in first to file, do not relate to restriction at this to the repeater latency issue.
Summary of the invention
In view of this, main purpose of the present invention is to provide a kind of repeater, can effectively eliminate echo and disturb, and the repeater time-delay is short.
For achieving the above object, technical scheme of the present invention specifically is achieved in that
A kind of repeater comprises: receiver side RF processing unit, the first Digital Down Convert cells D DC, baseband processing unit, Digital Up Convert cells D UC, transmitter side RF processing unit and power amplification processing unit; Wherein,
The receiver side RF processing unit, be used for receiving subscriber signal by reception antenna, receive the echo-signal that is coupled back from the transmitting antenna of repeater simultaneously, obtain analog if signal after the radiofrequency signal that receives handled, and after the analog if signal after will handling is converted to digital medium-frequency signal, send to a DDC;
The one DDC is used for that the digital medium-frequency signal that receives is carried out Digital Down Convert and handles;
Baseband processing unit comprises the echo cancellation module, is used for baseband digital signal with himself output signal as the reference signal, the digital medium-frequency signal from a DDC is carried out echo eliminate and send to described DUC after handling;
DUC is used for that the digital medium-frequency signal from baseband processing unit is carried out Digital Up Convert and handles;
The transmitter side RF processing unit is used for the digital medium-frequency signal from DUC is converted to analog if signal, and obtains analog radio-frequency signal after treatment;
The power amplification processing unit is used for the pretreated analog radio-frequency signal of process amplification is amplified after the transmitting antenna emission.
Described repeater also comprises: feedback processing unit and the 2nd DDC, wherein,
The feedback processing unit is used for obtaining analog if signal after handling from the radiofrequency signal of transmitting antenna coupling, and the analog if signal after will handling sends to the 2nd DDC after being converted to digital medium-frequency signal;
The 2nd DDC is used for that the digital medium-frequency signal that receives is carried out Digital Down Convert and handles;
Described baseband processing unit also comprises the linear/non-linear processing module, is used for according to the digital medium-frequency signal from described the 2nd DDC, carries out sending to described DUC after linearity and the Nonlinear Processing to eliminating the digital medium-frequency signal of handling through echo.
Described echo cancellation module comprises: training sequence generator, diverter switch k, training sequence detector, Variable delay device, echo channel estimator, FIR filter and adder;
The input of diverter switch k is connected to training sequence generator, and the echo cancellation module enters the channel pre-estimation stage; What diverter switch k will send from training sequence generator exports to training sequence detector, Variable delay device and described linear/non-linear processing module respectively with the incoherent training sequence of subscriber signal; The training sequence detector sends to the Variable delay device with described delay parameter, and sends the enable signal of starting working to the echo channel estimator according to the delay parameter of estimating echo channel from digital medium-frequency signal and the training sequence of a described DDC;
The echo channel estimator is started working under the triggering of enable signal, and the echo cancellation module enters the open loop training stage; The Variable delay device postpones to obtain reference signal ref_d after the delay parameter time corresponding with training sequence and sends to FIR filter and echo channel estimator respectively; The FIR filter is to obtaining expecting echo-signal and send to adder after the reference signal ref_d filtering from the Variable delay device; Another road input of adder is the digital medium-frequency signal from a described DDC, adder deducts described expectation echo-signal and obtains digital medium-frequency signal after echo is eliminated from the digital medium-frequency signal from a described DDC, the error signal e that described digital medium-frequency signal after echo is eliminated is estimated as echo sends to the echo channel estimator; The echo channel estimator carries out channel estimating according to reference signal ref_d and error signal e, obtains estimator coefficients, adjusts the FIR filter coefficient according to described estimator coefficients, when described estimator coefficients restrains, sends switching signal to diverter switch;
Diverter switch switches to adder according to switching signal with its input, and the echo cancellation module enters the closed loop training stage; Described echo cancellation module begins to the digital medium-frequency signal through echo elimination of described linear/non-linear processing module output by adder output.
Described training sequence detector is used for delay parameter that basis is estimated each footpath of echo channel from digital medium-frequency signal and the training sequence of a described DDC, and estimates the delay parameter of echo channel according to each delay parameter directly of echo channel of described estimation.
Described training sequence detector is used for the delay parameter in the first footpath of the described echo channel delay parameter as the echo channel of described estimation.
Described echo channel estimator, be used for after executing an echo channel estimation, calculate once carry out this echo channel estimate all estimator coefficients of obtaining absolute value and, when each absolute value that calculates in the Preset Time section that begins from current time forward and amplitude of variation within default amplitude or from this echo channel, estimate each absolute value of calculating in the beginning preset times forward and amplitude of variation within default amplitude, and, described absolute value when non-vanishing, judge the estimator coefficients convergence.
Described echo channel estimator comprises: Minimum Mean Square Error estimator, and/or recurrence minimum variance estimator.
The filter that comprises the FIR structure on 18 rank that are used to carry out linear process in the described linear/non-linear processing module.
The multiply accumulating device that comprises 9 rank that are used to carry out Nonlinear Processing in the described linear/non-linear processing module perhaps adopts the structure of the method for look-up table, perhaps based on the structure of the method for wiener model, perhaps based on the structure of the method for hammerstein model.
Described baseband processing unit adopts programmable logic device to realize.
Described programmable logic device is on-site programmable gate array FPGA, perhaps complex programmable logic device (CPLD).
Described receiver side RF processing unit comprises: low pass filter LPF, low noise amplifier LNA, radio-frequency filter RF SW, band pass filter BPF and the corresponding second voltage controlled tuning device UHF2Tuning, attenuator ATT, frequency mixer, intermediate frequency filtering SAW, amplifier AMP, voltage-controlled automatic gain control VGC and modulus converter A/D thereof.
Described receiver side RF processing unit also comprises: high pass filter HPF and the first corresponding voltage controlled tuning device UHF 1Tuning.
Described transmitter side RF processing unit comprises: digital to analog converter D/A, baseband low pass filters BB LPF, frequency mixer, band pass filter BPF, attenuator ATT and amplification preprocessor PRE_PA.
Described feedback processing unit mainly comprises frequency mixer, amplifier AMP, intermediate frequency filtering SAW and modulus converter A/D.
As seen from the above technical solution, the present invention is directly produced by baseband processing unit self as the reference signal ref of the closed-loop control that echo is eliminated, promptly participate in echo as reference signal ref and eliminate processing with baseband digital signal, simplified the processing complexity that echo is eliminated: on the one hand, owing to need not to increase the hardware circuit that reference signal is handled, reduced system complexity greatly, on the other hand, also guaranteed elimination effect simultaneously echo.And from above-mentioned realization, the time-delay of baseband processing unit of the present invention is quite little.
Description of drawings
Fig. 1 is the composition structural representation of repeater of the present invention;
Fig. 2 is the composition structural representation of the embodiment of baseband processing unit of the present invention;
Fig. 3 is the composition structural representation of the embodiment of receiver side RF processing unit of the present invention;
Fig. 4 is the composition structural representation of the embodiment of transmitter side RF processing unit of the present invention;
Fig. 5 is the composition structural representation of the embodiment of feedback processing of the present invention unit;
Fig. 6 is the composition structural representation of the embodiment of echo cancellation module in the baseband processing unit of the present invention.
Embodiment
For making purpose of the present invention, technical scheme and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, the present invention is described in more detail.
Fig. 1 is the composition structural representation of repeater of the present invention, as shown in Figure 1, repeater of the present invention comprises: receiver side RF processing unit, the first Digital Down Convert unit (DDC), baseband processing unit, Digital Up Convert unit (DUC), transmitter side RF processing unit, power amplification processing unit, and the 2nd DDC and feedback processing unit.Wherein,
The receiver side RF processing unit, be used for receiving the radiofrequency signal of subscriber signal such as base station or launching tower or transmitting station emission by reception antenna, receive the echo-signal (radiofrequency signal) that is coupled back from the transmitting antenna of repeater simultaneously, the radiofrequency signal that receives is carried out obtaining analog if signal after the processing such as filtering, amplification, mixing, decay, and after the analog if signal after will handling is converted to digital medium-frequency signal, send to a DDC.
The one DDC is used for that the digital medium-frequency signal that receives is carried out Digital Down Convert and handles.The specific implementation of DDC belongs to technology as well known to those skilled in the art, repeats no more here.
Baseband processing unit is used for baseband digital signal as reference signal ref, the digital medium-frequency signal from a DDC is carried out echo eliminate and handle; According to digital medium-frequency signal, carry out sending to DUC after linear/non-linear is handled to eliminate the digital medium-frequency signal of handling through echo from the 2nd DDC.
DUC is used for that the digital medium-frequency signal from baseband processing unit is carried out Digital Up Convert and handles.The specific implementation of DUC belongs to technology as well known to those skilled in the art, repeats no more here.
The transmitter side RF processing unit is used for the digital medium-frequency signal from DUC is converted to analog if signal, and through obtaining analog radio-frequency signal after mixing, decay, the amplification preliminary treatment etc.
The power amplification processing unit is used for the pretreated analog radio-frequency signal of process amplification is carried out processing and amplifying after transmitting antenna is launched, and specific implementation belongs to technology as well known to those skilled in the art, no longer describes in detail here.
The feedback processing unit is used for the radiofrequency signal from transmitting antenna coupling is carried out obtaining analog if signal after the processing such as mixing, amplification, filtering, and after the analog if signal after will handling is converted to digital medium-frequency signal, sends to the 2nd DDC; The 2nd DDC is used for that the digital medium-frequency signal that receives is carried out Digital Down Convert and handles.
Among Fig. 1, baseband processing unit comprises echo cancellation module and linear/non-linear processing module, and as shown in Figure 2, Fig. 2 is the composition structural representation of the embodiment of baseband processing unit of the present invention.Wherein,
Echo cancellation module, himself output signal are used for according to reference signal ref the digital medium-frequency signal from a DDC being carried out Echo Processing as reference signal ref;
The linear/non-linear processing module is used for according to the digital medium-frequency signal from the 2nd DDC, carries out sending to DUC after linear/non-linear is handled to eliminate the digital medium-frequency signal of handling through echo.Linear process part wherein preferably can adopt the filter of the FIR structure on 18 rank, and it is delayed time less than 1.8 microseconds (us), and perhaps, under the situation that allows the increase time-delay, exponent number is high more, and the linear process performance is good more; Nonlinear Processing part can adopt the multiply accumulating device on 9 rank to realize, it delay time less than 0.6us, perhaps adopts the structure of the existing method of look-up table, the structure of perhaps complete existing method based on wiener model, hammerstein model etc.
Baseband processing unit can adopt programmable logic device, and as programmable gate array (FPGA) at the scene, perhaps CPLD (CPLD) waits and realizes.
Realization from baseband processing unit of the present invention, the present invention's conduct directly promptly participates in echo elimination processing with baseband digital signal as reference signal ref by baseband processing unit self generation to the reference signal ref of the closed-loop control that echo is eliminated, simplified the processing complexity that echo is eliminated: on the one hand, owing to need not to increase the hardware circuit that reference signal is handled, reduced system complexity greatly, on the other hand, the while has also guaranteed the elimination effect to echo.And from above-mentioned realization, the time-delay of baseband processing unit of the present invention is quite little.
Need to prove, linear/non-linear module shown in Figure 1 is in order to improve the utilance of power amplifier, also can omit, feedback processing unit and the 2nd DDC also can omit simultaneously, in this case, the signal after baseband processing unit directly will be handled after finishing echo elimination processing sends to DUC and gets final product.
Below the part in the repeater of the present invention is described in detail.
Fig. 3 is the composition structural representation of the embodiment of receiver side RF processing unit of the present invention, as shown in Figure 3, when the radiofrequency signal from reception antenna is simple signal, during as the application of repeater in CMMB, the receiver side RF processing unit can be by low pass filter (LPF), low noise amplifier (LNA), radio-frequency filter (RF SW), band pass filter (BPF) and the corresponding second voltage controlled tuning device (UHF2 Tuning) thereof, attenuator (ATT), frequency mixer, intermediate frequency filtering (SAW), amplifier (AMP), voltage-controlled automatic gain control (VGC) and analog to digital converter (A/D) are formed, its course of work is: the radiofrequency signal from reception antenna is passed through LBP successively, LNA1, enter BPF after the processing of RF SW1, and then successively through UHF2 Tuning, RF SW2, the processing of LNA2 and ATT; Obtain analog intermediate frequency signal after the radiofrequency signal process two-stage mixing (being provided with SAW1 between the two-stage mixing) through ATT, successively through obtaining the analog intermediate frequency voltage signal behind AMP, SAW2 and the VGC, the analog intermediate frequency voltage signal obtains digital medium-frequency signal through A/D to analog intermediate frequency signal again.
When the radiofrequency signal from reception antenna is the full range signal, the receiver side RF processing unit is except comprising each part mentioned above, also comprise high pass filter (HPF) and the corresponding first voltage controlled tuning device (UHF1 Tuning), the UHF1 Tuning of HPF and correspondence thereof is successively connected in series, and with BPF successively connected in series and the corresponding parallel connection of UHF2 Tuning thereof, Fig. 3 is to be that the full range signal is that example is illustrated with the radiofrequency signal from reception antenna.
Need to prove that the specific implementation of forming the each several part of receiver side RF processing unit belongs to those skilled in the art's conventional techniques means, repeats no more here.
Fig. 4 is the composition structural representation of the embodiment of transmitter side RF processing unit of the present invention, as shown in Figure 4, the transmitter side RF processing unit comprises: digital to analog converter (D/A), baseband low pass filters (BBLPF), frequency mixer, BPF, ATT and amplification preprocessor (PRE_PA), its course of work roughly comprises: will be converted to analog if signal from the digital medium-frequency signal of DUC, and pass through BBLPF successively), two mixer stages (being provided with BPF between two mixer stages), ATT and PRE_PA obtain analog radio-frequency signal after handling.Wherein, the number of BB LPF depends on the way after the D/A conversion, as long as can satisfy each road analog if signal is carried out BB LPF processing, is 2 to be that example is illustrated with the number of BB LPF among Fig. 4.
Need to prove that the specific implementation of forming the each several part of receiver side RF processing unit belongs to those skilled in the art's conventional techniques means, repeats no more here.
Fig. 5 is the composition structural representation of the embodiment of feedback processing of the present invention unit, as shown in Figure 5, the feedback processing unit mainly comprises frequency mixer, AMP, SAW and A/D, its course of work is roughly: to carrying out mixing from the radiofrequency signal of transmitting antenna coupling, carry out successively afterwards obtaining analog if signal after AMP, SAW, the AMP processing, the analog if signal after will handling at last is converted to digital medium-frequency signal.
Need to prove that the specific implementation of forming the each several part of receiver side RF processing unit belongs to those skilled in the art's conventional techniques means, repeats no more here.
Fig. 6 is the composition structural representation of the embodiment of echo cancellation module in the baseband processing unit of the present invention, as shown in Figure 6, the echo cancellation module comprises: training sequence generator, diverter switch k, training sequence detector, Variable delay device, echo channel estimator, FIR filter and adder, in addition, the echo cancellation module can also comprise: AGC.The operation principle of echo cancellation module is as follows:
At first, the input of diverter switch k is connected to training sequence generator, and at this moment, the echo cancellation module enters the channel pre-estimation stage; Diverter switch k will send from training sequence generator is divided into three the tunnel: the one tunnel with the incoherent training sequence of subscriber signal and exports the linear/non-linear processing module to, and one the tunnel exports the training sequence detector to, and one the tunnel exports the Variable delay device to; Training sequence detector basis is from the digital medium-frequency signal of a DDC and the delay parameter of estimating echo channel from the training sequence of diverter switch k, described delay parameter is sent to the Variable delay device, and send the enable signal of starting working to the echo channel estimator; Described digital medium-frequency signal from a DDC is a subscriber signal and echo-signal sum corresponding to the training sequence of described outside output.
Then, the echo channel estimator is started working under the triggering of enable signal, and the echo cancellation module enters the open loop training stage; The Variable delay device postpones to obtain reference signal ref_d after the delay parameter time corresponding with training sequence and sends to FIR filter and echo channel estimator respectively; The FIR filter is to obtaining expecting echo-signal and send to adder after the reference signal ref_d filtering from the Variable delay device; Another road input of adder is the digital medium-frequency signal from a DDC, adder deducts described expectation echo-signal and obtains digital medium-frequency signal after echo is eliminated from the digital medium-frequency signal from a DDC, owing to should mainly constitute from the digital medium-frequency signal of a DDC by subscriber signal, also comprise simultaneously faint residual echo signal, therefore, adder error signal e that described digital medium-frequency signal after echo is eliminated is estimated as echo sends to the echo channel estimator; The echo channel estimator carries out channel estimating according to reference signal ref_d and error signal e, obtains estimator coefficients, adjusts the FIR filter coefficient according to described estimator coefficients, when described estimator coefficients restrains, sends switching signal to diverter switch;
Diverter switch switches to adder according to switching signal with its input, and at this moment, the echo cancellation module enters the closed loop training stage; The echo cancellation module begins the digital medium-frequency signal through echo elimination of outwards output by adder output.After this, adder will substitute the training sequence generator in the above-mentioned second stage, will give corresponding module from the signal of adder output by diverter switch and be used for echo elimination processing.
Preferably, training sequence detector shown in Fig. 6, be used for delay parameter that basis is estimated each footpath of echo channel from digital medium-frequency signal and the training sequence of a DDC, and estimate the delay parameter of echo channel according to each delay parameter directly of echo channel of described estimation.
When estimating the delay parameter of echo channel, can adopt multiple mode according to the delay parameter in each footpath of the echo channel of estimating.For example: the delay parameter of signal that first power can be not less than a certain default power threshold is as the delay parameter of echo channel; Also can be with the delay parameter of head delay parameter directly as echo channel.
Whether the echo channel estimator shown in Fig. 6 possesses the estimator coefficients of judgement restrains, and sends the function of switching signal when convergence to diverter switch.In actual applications, described function also can be provided with an independent module and finish, perhaps with this function setting in a certain control module.Judge that the method whether estimator coefficients restrains has a lot, for example, can carry out as follows:
Whenever executing an echo channel estimates, calculate once carry out this echo channel estimate all estimator coefficients of obtaining absolute value and, when each absolute value that calculates in the Preset Time section that begins from current time forward and amplitude of variation within default amplitude or from this echo channel, estimate each absolute value of calculating in the beginning preset times forward and amplitude of variation within default amplitude, and, described absolute value when non-vanishing, judge the estimator coefficients convergence.
Further, can also comprise AGC among Fig. 6, it is arranged between adder and the diverter switch, is used to realize the gain controlling to adder output signal.
Of the present invention and the incoherent training sequence of subscriber signal can be: PN sequence, CAZAC sequence etc.Echo channel estimator of the present invention can be: Minimum Mean Square Error (LMS, Least MeanSquare) estimator, and/or recurrence minimum variance (RLS, Recursive Least Square) estimator etc.
In echo cancellation module provided by the invention, at first, the input of diverter switch k is connected to training sequence generator, and by the training sequence detector according to training sequence generator sent and the incoherent training sequence of subscriber signal is estimated the delay parameter of echo channel, the echo channel estimator is started working then, according to digital medium-frequency signal from a DDC, training sequence and delay parameter are estimated echo channel, adjust estimator coefficients, when estimator coefficients restrains, the input of diverter switch is switched to adder, after this, the echo cancellation module stops outwards to export training sequence, and beginning is the subscriber signal of output after echo is eliminated outwards.
Echo cancellation module of the present invention is before the estimator coefficients convergence; the input of diverter switch is connected training sequence generator always; therefore; from the outside output of echo cancellation module is the training sequence signal that not disturbed by echo all the time; thereby make the echo cancellation module be in stable open loop situations, can positive feedback not take place and cause radio frequency link saturated, therefore; the estimator coefficients that can guarantee the echo channel estimator restrains fast, makes the echo cancellation module enter stable operating state as early as possible.And after the estimator coefficients convergence, the input of diverter switch switches to adder, at this moment, the echo cancellation module is no longer outwards exported training sequence, and this has saved data resource on the one hand, has avoided the interference of bringing for subscriber signal because of the transmitting training sequence on the other hand.
And; used the Variable delay device in the echo cancellation module of the present invention; its delay parameter can be provided with according to the result of echo channel pre-estimation, and this can guarantee that echo elimination window covers the time range of echo multipath signal as wide as possible, thereby eliminates echo-signal as much as possible.
The above is preferred embodiment of the present invention only, is not to be used to limit protection scope of the present invention.Within the spirit and principles in the present invention all, any modification of being done, be equal to and replace and improvement etc., all should be included within protection scope of the present invention.

Claims (15)

1. a repeater is characterized in that, comprising: receiver side RF processing unit, the first Digital Down Convert cells D DC, baseband processing unit, Digital Up Convert cells D UC, transmitter side RF processing unit and power amplification processing unit; Wherein,
The receiver side RF processing unit, be used for receiving subscriber signal by reception antenna, receive the echo-signal that is coupled back from the transmitting antenna of repeater simultaneously, obtain analog if signal after the radiofrequency signal that receives handled, and after the analog if signal after will handling is converted to digital medium-frequency signal, send to a DDC;
The one DDC is used for that the digital medium-frequency signal that receives is carried out Digital Down Convert and handles;
Baseband processing unit comprises the echo cancellation module, is used for baseband digital signal with himself output signal as the reference signal, the digital medium-frequency signal from a DDC is carried out echo eliminate and send to described DUC after handling;
DUC is used for that the digital medium-frequency signal from baseband processing unit is carried out Digital Up Convert and handles;
The transmitter side RF processing unit is used for the digital medium-frequency signal from DUC is converted to analog if signal, and obtains analog radio-frequency signal after treatment;
The power amplification processing unit is used for the pretreated analog radio-frequency signal of process amplification is amplified after the transmitting antenna emission.
2. repeater according to claim 1 is characterized in that, described repeater also comprises: feedback processing unit and the 2nd DDC, wherein,
The feedback processing unit is used for obtaining analog if signal after handling from the radiofrequency signal of transmitting antenna coupling, and the analog if signal after will handling sends to the 2nd DDC after being converted to digital medium-frequency signal;
The 2nd DDC is used for that the digital medium-frequency signal that receives is carried out Digital Down Convert and handles;
Described baseband processing unit also comprises the linear/non-linear processing module, is used for according to the digital medium-frequency signal from described the 2nd DDC, carries out sending to described DUC after linearity and the Nonlinear Processing to eliminating the digital medium-frequency signal of handling through echo.
3. repeater according to claim 1 and 2 is characterized in that, described echo cancellation module comprises: training sequence generator, diverter switch k, training sequence detector, Variable delay device, echo channel estimator, FIR filter and adder;
The input of diverter switch k is connected to training sequence generator, and the echo cancellation module enters the channel pre-estimation stage; What diverter switch k will send from training sequence generator exports to training sequence detector, Variable delay device and described linear/non-linear processing module respectively with the incoherent training sequence of subscriber signal; The training sequence detector sends to the Variable delay device with described delay parameter, and sends the enable signal of starting working to the echo channel estimator according to the delay parameter of estimating echo channel from digital medium-frequency signal and the training sequence of a described DDC;
The echo channel estimator is started working under the triggering of enable signal, and the echo cancellation module enters the open loop training stage; The Variable delay device postpones to obtain reference signal ref_d after the delay parameter time corresponding with training sequence and sends to FIR filter and echo channel estimator respectively; The FIR filter is to obtaining expecting echo-signal and send to adder after the reference signal ref_d filtering from the Variable delay device; Another road input of adder is the digital medium-frequency signal from a described DDC, adder deducts described expectation echo-signal and obtains digital medium-frequency signal after echo is eliminated from the digital medium-frequency signal from a described DDC, the error signal e that described digital medium-frequency signal after echo is eliminated is estimated as echo sends to the echo channel estimator; The echo channel estimator carries out channel estimating according to reference signal ref_d and error signal e, obtains estimator coefficients, adjusts the FIR filter coefficient according to described estimator coefficients, when described estimator coefficients restrains, sends switching signal to diverter switch;
Diverter switch switches to adder according to switching signal with its input, and the echo cancellation module enters the closed loop training stage; Described echo cancellation module begins to the digital medium-frequency signal through echo elimination of described linear/non-linear processing module output by adder output.
4. repeater according to claim 3, it is characterized in that, described training sequence detector, be used for delay parameter that basis is estimated each footpath of echo channel from digital medium-frequency signal and the training sequence of a described DDC, and estimate the delay parameter of echo channel according to each delay parameter directly of echo channel of described estimation.
5. repeater according to claim 3 is characterized in that, described training sequence detector is used for the delay parameter in the first footpath of the described echo channel delay parameter as the echo channel of described estimation.
6. repeater according to claim 3, it is characterized in that, described echo channel estimator, be used for after executing an echo channel estimation, calculate once carry out this echo channel estimate all estimator coefficients of obtaining absolute value and, when each absolute value that calculates in the Preset Time section that begins from current time forward and amplitude of variation within default amplitude, or estimate from this echo channel each absolute value of calculating in the beginning preset times forward and amplitude of variation within default amplitude, and, described absolute value when non-vanishing, judge the estimator coefficients convergence.
7. repeater according to claim 3 is characterized in that, described echo channel estimator comprises: Minimum Mean Square Error estimator, and/or recurrence minimum variance estimator.
8. repeater according to claim 2 is characterized in that, comprises the filter of the FIR structure on 18 rank that are used to carry out linear process in the described linear/non-linear processing module.
9. repeater according to claim 2, it is characterized in that, the multiply accumulating device that comprises 9 rank that are used to carry out Nonlinear Processing in the described linear/non-linear processing module, perhaps adopt the structure of the method for look-up table, perhaps based on the structure of the method for wiener model, perhaps based on the structure of the method for hammerstein model.
10. repeater according to claim 1 and 2 is characterized in that, described baseband processing unit adopts programmable logic device to realize.
11. repeater according to claim 10 is characterized in that, described programmable logic device is on-site programmable gate array FPGA, perhaps complex programmable logic device (CPLD).
12. repeater according to claim 1 and 2, it is characterized in that described receiver side RF processing unit comprises: low pass filter LPF, low noise amplifier LNA, radio-frequency filter RF SW, band pass filter BPF and the corresponding second voltage controlled tuning device UHF2Tuning, attenuator ATT, frequency mixer, intermediate frequency filtering SAW, amplifier AMP, voltage-controlled automatic gain control VGC and modulus converter A/D thereof.
13. repeater according to claim 1 and 2 is characterized in that, described receiver side RF processing unit also comprises: high pass filter HPF and the first corresponding voltage controlled tuning device UHF1Tuning.
14. repeater according to claim 1 and 2, it is characterized in that described transmitter side RF processing unit comprises: digital to analog converter D/A, baseband low pass filters BB LPF, frequency mixer, band pass filter BPF, attenuator ATT and amplification preprocessor PRE_PA.
15. repeater according to claim 2 is characterized in that, described feedback processing unit mainly comprises frequency mixer, amplifier AMP, intermediate frequency filtering SAW and modulus converter A/D.
CN2008102222631A 2008-09-12 2008-09-12 Repeater Expired - Fee Related CN101359956B (en)

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