CN101349973B - Method for dynamically loading embedded type Java processor microcode instruction set - Google Patents

Method for dynamically loading embedded type Java processor microcode instruction set Download PDF

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Publication number
CN101349973B
CN101349973B CN2008101983300A CN200810198330A CN101349973B CN 101349973 B CN101349973 B CN 101349973B CN 2008101983300 A CN2008101983300 A CN 2008101983300A CN 200810198330 A CN200810198330 A CN 200810198330A CN 101349973 B CN101349973 B CN 101349973B
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instruction set
loading module
microcode
processor
loading
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CN101349973A (en
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陈挚睿
谭洪舟
陆许明
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Sun Yat Sen University
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Sun Yat Sen University
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Abstract

The invention discloses a java processor microcode instruction set dynamic loading technique, which belongs to the embedded processor design field. The invention increases an instruction set loading module on the basis of an original processor. The technique comprises: firstly reading microcode instruction set (comprising microcode instruction segment and starting code segment) from an external memory by a loading module, registering the microcode instructions in a temporary register of the loading module, then, solving the problem that the digit numbers of the external memory and an internal memory disaccord through the microcode mosaic technique, finally, writing the microcode instruction set which are spliced well into the internal memory, and starting executing starting code segment in the instruction set to enter the normal working state by the system when all internal memories finish initialization, namely after an instruction set is loaded to the inside of a chip. The invention not only enables Java programs of other platforms to operate accurately on the platform to guarantee the universality of the upper application, but also can update and optimize the microcode instructions aiming at different embedded application environments to modify the starting codes on real time and to improve the efficiency of the processor.

Description

Method for dynamically loading embedded type Java processor microcode instruction set
Technical field
The invention belongs to the flush bonding processor design field, specifically, relate to a kind of Java processor microcode instruction set dynamic loading technology.
Background technology
Existing Java processor or Java coprocessor are solidificated in local instruction set among the chip, can't be optimized instruction set.For general processor, as the processor among the PC, this kind method can satisfy application demand, because based on the upper layer application of general processor, be by the very perfect operating system support of function.And the Java processor often is applied in the embedded system, considers travelling speed and system cost, and is relative simple with its relative operation system or control function, and need do corresponding adjustment at different application scenarios.
The process of operating system executive routine maps directly to the process of the local instruction set execution of system bottom.Current Java processor or Java coprocessor are cured to local instruction set among the chip, can't instruct optimization at different Embedded Application environment, also can't develop at instruction segment varying environment, customization, it is added in the middle of the system.The requirement such as real-time, reliable, portable of embedded system is restricted.
More existing " dynamic loading " solution all is based on the FPGA technology, can satisfy the reconstruct of Java treatment mechanism because of the configurability of its hardware.But these solutions all must be carried out reprogramming to FPGA and just can realize by the change of HDL code, are not dynamic loadings truly.And the cost of FPGA and performance are compared with application specific processor, and the product that also is not suitable as batch process uses in the middle of the embedded system, can only be as the verification platform in the R﹠D process.
Summary of the invention
At above deficiency, the present invention proposes a kind of method for dynamically loading embedded type Java processor microcode instruction set.By the dynamic optimization and the loading of microcode instruction set (including micro-code instruction section and start-up code section), can satisfy real-time, reliable, portable etc. the requirement of embedded system better.Utilization can improve constantly the speed of system's operation to the optimization of the micro-code instruction section that realizes each Java bytecode.Simultaneously, increase user-defined micro-code instruction section, can expand the function of instructing easily, promote the performance of embedded system.More commonly used is, by the dynamic loading of microcode instruction set, can change the start-up code of embedded system arbitrarily, has satisfied the demand of different application occasion, convenient and efficient at the bottom of hardware.
A kind of method for dynamically loading embedded type Java processor microcode instruction set, its step comprises:
1) system powers on;
2) loading module is chosen the controller of external memory storage, and loading module includes a counter, and the counter current count value is as the current address of external memory storage, and the counter initial value is zero, i.e. the full zero-address of directed outwards storer;
3) loading module is according to the data of counter currency reading external memory current address, and be stored among the temporary register of loading module inside, whenever read the data of an address, the counter of loading module then once adds 1 operation, the i.e. next address of directed outwards storer current address to the counting currency;
4) chip internal has the storer that many group bit wides and capacity have nothing in common with each other, loading module just determines that at the bit wide of initialized internal storage and capacity micro-code instruction or start-up code splice the number of times of required reading external memory according to current, whenever read external data one time, all be temporarily stored in the temporary register of loading module, splice;
5) whole group of data after loading module is finished splicing are written to internal storage, and the address of pointing to internal storage simultaneously adds 1 operation, points to next internal storage unit;
6) repeat 3)-5) step, write and finish up to the microcode instruction set (including micro-code instruction section and start-up code section) of processor;
7) after processor was finished instruction set and write, the inner execution command of processor was concentrated the start-up code section that comprises.
Described loading module is chosen the controlled bussing technique of module priority, makes loading module priority be higher than main nuclear.
Described outside microcode memory can be chosen the Flash storer of different bit wides.
Described internal storage uses SRAM technology or Flash (EEPROM) technology.
Beneficial effect of the present invention:
1) can on this platform, move equally at the java applet that moves on other platform, guarantee the versatility of upper layer application.
2) can carry out instant renewal optimization to local instruction set at different Embedded Application environment, specificity more be arranged than other Java processor.As reduced instruction set computer, remove the microcode section that this system need not to use, make system have more spaces to deposit startup micro code program, i.e. start-up code.Or after designing the microcode section that realizes bytecode more efficiently, can upgrade original corresponding microcode section at any time.
3) can develop user-defined local microenvironment code instruction section, processor efficient is promoted.Other processor that local instruction set has been solidificated in the chip can't be realized.As embed the code of a period of time addition, and substitute basic integer addition code, can realize the time addition fast.
4) can be according to the powerful system start-up code of demand development function, and can upgrade at any time.And other Java processor must have the support of operating system if need finish corresponding contents.Comparatively speaking, but to need not the start-up code of operating system real-time update more convenient and efficient.
Description of drawings
Fig. 1 is a microcode instruction set dynamic load process flow diagram;
Fig. 2 is micro-code instruction read-write synoptic diagram;
Fig. 3 is a micro-code instruction dynamic loading structural representation.
Embodiment
The present invention will be further elaborated below in conjunction with accompanying drawing.
Microcode instruction set dynamic load process after system powers on, instructs loading module can begin to read the instruction set of depositing in advance (including micro-code instruction section and start-up code section) from the zero-address of external memory storage as shown in Figure 1.Through the home address mapping mechanism of loading module, corresponding micro-code instruction and start-up code in the instruction set are written to each storer and the register of chip internal.Correctly be stored in the storer and register of chip internal correspondence when whole microcode instruction set after, loading module is then exported the signal that the expression initialization is finished, after this moment, processor received the useful signal that initialization finishes, promptly begin to carry out chip instruction and concentrate the start-up code section that comprises, system enters normal operating conditions, and then carries out other program.
In Fig. 1, the process that is expressed as " microcode splicing " is drawn with frame of broken lines.This process mainly is the problem that solution chip exterior and chip internal storer figure place differ.If the outer storer of sheet is 8, the storer in the sheet also is 8, and then the importing of microcode data (comprising micro-code instruction and start-up code) can directly be finished by map addresses; If the outer storer of sheet is 8, and the storer in the sheet is 11, after then loading module need read twice to chip external memory, is spliced into 16 bit data, intercepts its effective 11 bit data again and is written to chip internal.So this submodule has been realized the function of data splicing, if the inside and outside storer figure place of chip is identical, this submodule can omit.
Shown the detailed process that the Java microcode instruction set reads, splices, writes among Fig. 2.After system powered on, loading module was chosen the controller of external memory storage, and the full zero-address of directed outwards storer.Begin reading corresponding data from full zero-address, sequence of addresses adds 1 then, continues to read next data.
Though the internal storage of chip has many groups and bit wide and capacity to have nothing in common with each other, but the bit wide and the capacity of each internal storage itself are fixing, so just at initialized a certain group of internal storage, can judge the number of times that is spliced into one group of required reading external memory of internal data according to current.Whenever read external data one time, all can be temporarily stored in the temporary register of loading module, splice.After splicing is finished, be about to whole group data and be written to internal storage, the address of pointing to internal storage simultaneously adds 1 operation, points to next internal memory address.
As shown in Figure 2, external memory storage is 8 bit data bit wides, and the internal storage figure place is the wideest to be 32, so temporary register also is 32.Current initialized internal storage 1 is 32 bit wides, so need read 4 secondary data from the outside, is then written in the internal storage 1 after being spliced into 32.And for example current just at initialization internal storage 2, this storer is 24 bit wides, then only need read 3 external datas can be spliced into 24, after reading 24 external datas and being stored in low 24 of temporary register, most-significant byte need not to handle, only need the data line of internal storage 2 and low 24 of temporary register are connected, can reach the purpose of data cutout.
Contain a counter in the loading module, whenever read external data one time, the currency of counter then once adds 1 operation.Because the bit wide of internal storage and capacity are fixing, so need the number of times of reading external memory to be easy to just can calculate.The purpose of usage counter is, produces the chip selection signal of the current initialized internal storage of control, and judges the number of significant digit (or splicing number of times) in the temporary register.
As shown in Figure 2, the capacity of case of internal storer 1 is 64 words, and the capacity of internal storage 2 is 128 words, and the capacity of internal storage 3 is 128 words.The figure place of corresponding each storer, internal storage 1 need read 4 external datas and be spliced into one 32 figure place, internal storage 2 need read 3 external datas and be spliced into one 24 figure place, and internal storage 3 need read 2 external datas and be spliced into one 11 figure place.Then the initialization internal storage 1 required number of times that reads external data is 64*4, promptly 256 times.So when rolling counters forward to 256 the time, internal storage 1 has been finished initialization, promptly discharges the chip selection signal of internal storage 1, the sheet choosing that makes internal storage 2 effectively, home address zero clearing simultaneously, being equivalent to internally, the zero-address of storer 2 begins to calculate.By that analogy, the internal storage 2 required number of times that read external data are 128*3, promptly 384 times.So work as rolling counters forward to 256+384, promptly 640 o'clock, internal storage 2 initialization finished, and then internal storage 3 is carried out initialization.When rolling counters forward to 896 (640+256), i.e. the whole initialization of internal storage finish, end of output signal then, and system begins to carry out start-up code, enters normal operating conditions.
Omit all the other modules of Java processor among Fig. 3, can clearly show the logical relation of loading module and main nuclear and external memory storage.After system powers on,, choose flash controller, fetch data from external read as current main control module---loading module.And will splice good data, be written to the interior register of each sheet of Java master's nuclear by group, as jump list, offset table, microcode table (depositing start-up code herein simultaneously) etc.Each storer in Java master examines is after all initialization is finished, and loading module discharges control, and this moment, Java master's nuclear served as the main control module, and system begins to execute instruction and concentrates the start-up code section that comprises, and enters normal operating conditions.
After system powers on, because of in the Java processor master nuclear without any micro-code instruction and start-up code content, so the Java processor of this moment can't be worked.After promptly powering on, must allow the micro-code instruction loading module start working automatically.At first from outside micro-code instruction memory read data, examine the figure place requirement of internal storage according to Java processor master, the data that the outside is read in are spliced or are intercepted.According to the home address mapping mechanism of instruction loading module, the microcode data of splicing or intercepting is finished are written in the middle of the internal storage of main nuclear then.When the storer in all sheets after all initialization is finished, Java processor master nuclear can begin to carry out start-up code, enters duty.
The Java processor that enters after the normal operating conditions can be according to customer requirements, and coding upgrades operation to the micro-code instruction storer of outside.When system reset once more power on after, the Java processor can use micro-code instruction and the start-up code after the renewal.
Realize that this technology has the replaceable point in several places:
1) bussing technique of connexon module.What at first work after powering on because of system is loading module, so should choose the controlled bussing technique of module priority, makes loading module priority be higher than main nuclear, as the AMBA bus.
2) outside microcode memory.Can choose the Flash storer of different bit wides according to requirement of system design.As identical in the chankings with the chip external memory bit wide, then splicing that loading procedure can omitted data and intercepting function.
3) inner microcode memory.Inner storer can use SRAM technology or Flash (EEPROM) technology.The read or write speed of SRAM is faster, but can not preserve data after system's power down; And Flash can preserve data after system's power down, can just be written into process after instruction set is upgraded, otherwise chip can directly power on and enters duty.But the reading and writing data speed of Flash (EEPROM) is compared slowly.

Claims (4)

1. a method for dynamically loading embedded type Java processor microcode instruction set is characterized in that, its step comprises:
1) system powers on;
2) loading module is chosen the controller of external memory storage, and loading module includes a counter, and the counter current count value is as the current address of external memory storage, and the counter initial value is zero, i.e. the full zero-address of directed outwards storer;
3) loading module is according to the data of counter currency reading external memory current address, and be stored among the temporary register of loading module inside, whenever read the data of an address, the counter of loading module then once adds 1 operation, the i.e. next address of directed outwards storer current address to the counting currency;
4) chip internal has the storer that many group bit wides and capacity have nothing in common with each other, loading module just determines that at the bit wide of initialized internal storage and capacity micro-code instruction or start-up code splice the number of times of required reading external memory according to current, whenever read external data one time, all be temporarily stored in the temporary register of loading module, splice;
5) whole group of data after loading module is finished splicing are written to internal storage, and the address of pointing to internal storage simultaneously adds 1 operation, points to next internal storage unit;
6) repeat 3)-5) step, write and finish up to the microcode instruction set (including micro-code instruction section and start-up code section) of processor;
7) after processor was finished instruction set and write, the inner execution command of processor was concentrated the start-up code section that comprises.
2. method for dynamically loading embedded type Java processor microcode instruction set according to claim 1 is characterized in that, described loading module is chosen the controlled bussing technique of module priority, makes loading module priority be higher than main nuclear.
3. method for dynamically loading embedded type Java processor microcode instruction set according to claim 1 is characterized in that, described outside microcode memory can be chosen the Flash storer of different bit wides.
4. method for dynamically loading embedded type Java processor microcode instruction set according to claim 1 is characterized in that, described internal storage uses SRAM technology or Flash (EEPROM) technology.
CN2008101983300A 2008-09-05 2008-09-05 Method for dynamically loading embedded type Java processor microcode instruction set Expired - Fee Related CN101349973B (en)

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CN101719055B (en) * 2009-12-03 2012-10-10 杭州中天微系统有限公司 Quick implementation, loading and storage command module
CN104866357B (en) * 2015-05-29 2019-08-23 中国电子科技集团公司第五十八研究所 The boot starting method and its starter of digital signal processor
CN106559339B (en) 2015-09-30 2019-02-19 华为技术有限公司 A kind of message processing method and device
CN106648785B (en) * 2016-12-28 2020-10-23 苏州浪潮智能科技有限公司 Design method and system of solid state disk microcode
CN108806737A (en) * 2018-06-14 2018-11-13 深圳市爱协生科技有限公司 Data inside chips processing method, module, chip and computer equipment
CN110058884B (en) * 2019-03-15 2021-06-01 佛山市顺德区中山大学研究院 Optimization method, system and storage medium for computational storage instruction set operation

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