CN101345607A - Encoding/decoding method of multidimensional crossing parallel cascade single-parity check code - Google Patents

Encoding/decoding method of multidimensional crossing parallel cascade single-parity check code Download PDF

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CN101345607A
CN101345607A CNA2008101506316A CN200810150631A CN101345607A CN 101345607 A CN101345607 A CN 101345607A CN A2008101506316 A CNA2008101506316 A CN A2008101506316A CN 200810150631 A CN200810150631 A CN 200810150631A CN 101345607 A CN101345607 A CN 101345607A
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information
parity check
bits
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CN101345607B (en
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陈彦辉
郭凯
李建东
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Xidian University
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Abstract

The invention discloses a coding method for multi-dimensional crossing parallel cascade single-parity check code comprising that input information bit frame is separately passed through M interweavers and serial to parallel conversion then enters into crossover; output of crossover generates parity check bit frame P by passing P single-parity check encoder; U and P constitutes code word C; encoder computes code word C channel prior information according to receiving signal; U channel prior information is separately interweaved by M interweavers to get M channel prior information of interweaved information bit frame and first generation iteration coding; encoder executes iteration coding and simultaneously executes local coding, then gets outer information of M interweaved information bit frame, and computing prior information of next iteration; judging logarithm likelihood ratio information for U, obtaining coding result. The invention has merits of simple encoding and coding, low error floor and is used for correcting error of receiving signal.

Description

The volume of multidimensional crossing parallel cascade single-parity check code, interpretation method
Technical field
The invention belongs to communication technical field, relate to coding, the interpretation method of channel error correction coding, particularly a kind of multidimensional crossing parallel cascade single-parity check code, can be used for wrong to received signal correction.
Background technology
In modern digital communication systems and digital storage system, the existence of the undesirable and noise of channel transfer characteristic can cause receiving terminal the mistake of received signal to occur, adopts the channel error correction coding to solve this problem usually.
In modern channel error correction coding, Turbo code and low-density checksum LDPC sign indicating number are the most important codings of two classes.Studies show that Turbo code and LDPC sign indicating number all have the performance of approaching shannon limit under long grouping.The coding structure of Turbo code is simple, but decoding complexity is very high.With respect to Turbo code, the decoding of LDPC sign indicating number is simple, but needs bigger iterations just can make the decoding convergence usually.In addition, the LDPC of standard utilizes check matrix H to be described usually, and the generator matrix that obtains thus often is not a sparse matrix, so its encoder complexity will be far above Turbo code.Simultaneously, can not be suitable for the requirement of various different code lengths usually, when code length changes, need redesign H matrix according to the LDPC sign indicating number of a certain H matrix description.In addition, in a lot of communication systems, need to support the chnnel coding of multiple code rate.
Document Tee J S K, Taylor D P, and Martin P A. " Multiple serial and parallelconcatenated single parity-check codes " .IEEE Trans.on Commun., 2003,51 (10): 1666-1675. has proposed a kind of multidimensional parallel cascade single-parity check M-PC-SPC sign indicating number, and its coding method as shown in Figure 1.This yard is made of the single-parity check code of a plurality of parallel cascades, and length interweaves for the input information bits frame U of K enters M random interleaver respectively, obtains M the back frames of information bits that interweaves; Each back frames of information bits that interweaves becomes k parallel branch behind serial to parallel conversion, enter relevant parameters for (k+1, single-parity check encoder k) encode, and export a Parity Check Bits stream that comprises K/k Parity Check Bits; M parallel Parity Check Bits stream is carried out parallel serial conversion, obtain comprising the Parity Check Bits frame P of MK/k Parity Check Bits,, obtain the long output code word C of N that is Parity Check Bits frame P and input information bits frame U multiple connection.The coding and decoding complexity of M-PC-SPC sign indicating number is lower, supports multiple code rate, and this structure can be fit to satisfy arbitrarily the requirement that K/k is the code length of integer.But there is higher wrong flat bed in this coding structure, and in than the high s/n ratio zone, its coding gain is relatively poor.
Summary of the invention
The objective of the invention is to overcome the defective of above-mentioned prior art, a kind of volume, interpretation method of multidimensional crossing parallel cascade single-parity check code are provided, to realize coding, the decoding of low complex degree, obtain higher coding gain and lower wrong flat bed, support different code length and multiple code rate simultaneously.
The object of the present invention is achieved like this:
One, the coding method of multidimensional crossing parallel cascade single-parity check code comprises the steps:
Step 1, code length and code rate according to system requirements are determined coding parameter, the number k of the parallel branch that the frames of information bits after promptly the number P of the number M of the length K of code rate R, input information bits frame U, the length N of finishing coding back output code word, interleaver, single-parity check encoder and each interweave constitutes;
Step 2 interweaves input information bits frame U respectively with M interleaver, the frames of information bits after obtaining M and interweaving
Figure A20081015063100061
M=1,2,3 ..., M;
Step 3, the frames of information bits after each is interweaved
Figure A20081015063100062
Carry out serial to parallel conversion, obtain the individual long parallel bit frame of L that is of k
Figure A20081015063100063
M=1,2,3 ..., M carries out obtaining Mk parallel bit frame behind the serial to parallel conversion to M the back frames of information bits that interweaves, i.e. interleaver input bit matrix U L * Mk G
Step 4 is to interleaver input bit matrix U L * Mk GCarry out L intersect coding operation, obtain Parity Check Bits matrix P L * P
Step 5 is to Parity Check Bits matrix P L * PCarry out and go here and there conversion, obtain Parity Check Bits frame P;
Step 6 with Parity Check Bits frame P and input information bits frame U multiple connection, constitutes output code word C=[UP], the length of C is N=K+LP, encoder bit rate is R=k/ (P+k).
Two, the interpretation method of multidimensional crossing parallel cascade single-parity check code comprises the steps:
Steps A, initialization decoding parameter, the maximum permission iterations that iterative decoding promptly is set is T, and the value of iterations counting variable t is changed to 1;
Step B, decoder is L according to the channel prior information of received signal Y compute codeword C Ch=2Y/ σ 2, wherein, Y=C+n is the signal that decoder receives from channel, and C is the signal of code word C after the BPSK modulation of coding output, and n is the additive white Gaussian noise of zero-mean, σ 2Variance for additive white Gaussian noise n;
Step C is by the channel prior information L of code word C ChPreceding K element constitute the channel prior information L of input information bits frame U a Ch(U); Channel prior information L by code word C ChK+1 to the N element constitute the channel prior information L of Parity Check Bits frame P a Ch(P);
Step D is with the prior information L of input information bits frame U a Ch(U) interweave with M interleaver respectively, obtain the channel prior information of M the back frames of information bits that interweaves
Figure A20081015063100071
M=1,2,3 ..., M, this channel prior information
Figure A20081015063100072
Constitute the prior information of M the back frames of information bits that interweaves in the iterative decoding first time Promptly L a t ( U π m ) = L a ch ( U π m ) , t=1,m=1,2,3,...,M;
Step e, in the t time iterative decoding, operate pairing coding structure at intersect coding each time, utilize the prior information of Mk the information bit that participates in the operation of this time intersect coding, and this time intersect coding is operated the prior information of P the Parity Check Bits that is generated, carry out maximum posteriori decoding, the external information of Mk information bit of output, i.e. a partial decode; At the operation of L intersect coding, carry out L time partial decode simultaneously, obtain the individual external information of frames of information bits afterwards that interweaves of M in the t time iterative decoding
Figure A20081015063100075
M=1,2,3 ..., M;
Step F judges that whether iterations counting variable t allows iterations T greater than the maximum of setting in the steps A, then changes step H over to if satisfy, otherwise changes step G over to;
Step G utilizes M external information of frames of information bits U afterwards that interweaves in the t time iterative decoding that obtains in the step e
Figure A20081015063100076
And the channel prior information of the M that obtains among the step D the back frames of information bits that interweaves
Figure A20081015063100077
Calculate the prior information of M the back frames of information bits that interweaves in the t+1 time iteration: L a t + 1 ( U π m ) = L a ch ( U π m ) + π m [ Σ p = 1 , p ≠ m M π p - 1 [ L e t ( U π p ) ] ] , M=1,2,3 ..., M, and the value of iterations counting variable t added 1, return step e and proceed iterative decoding;
Step H after T iterative decoding finished, utilizes the channel prior information L of input information bits frame U a Ch(U), the external information of M the back frames of information bits that interweaves and in the T time iterative decoding
Figure A200810150631000710
M=1,2,3 ..., M, the judgement log-likelihood ratio information of calculating input information bits frame U: L ( U ) = L a ch ( U ) + Σ m = 1 M π m - 1 [ L e T ( U π m ) ] , And L (U) carried out hard decision, obtain decode results
Figure A200810150631000713
The present invention has following advantage:
A) the present invention is owing to adopt an interleaver and P single-parity check fgs encoder device, between P single-parity check encoder, made up new contact by interleaver, thereby changed the relation between input information bits and the Parity Check Bits, can reduce the wrong flat bed of bit error rate, to obtain better performance of BER.
B) the present invention is owing to adopt M interleaver, an interleaver and P the coding structure that single-parity check fgs encoder device constitutes, and its code rate is k/ (P+k), and is irrelevant with the number M of interleaver, thereby more convenient flexible when the adjustment code rate.
C) the present invention has been owing to adopted the operation of L intersect coding in coding method, thereby as long as the length K of input information bits frame U satisfies L=K/k, all can use this coding method to encode, thus the requirement of adaptation different code length.
Description of drawings
Fig. 1 is the coding method schematic diagram of existing multidimensional parallel cascade single-parity check code;
Fig. 2 is the coding method schematic diagram of multidimensional crossing parallel cascade single-parity check code of the present invention;
Fig. 3 is the intersect coding operation chart of multidimensional crossing parallel cascade single-parity check code of the present invention;
Fig. 4 is the interpretation method schematic diagram of multidimensional crossing parallel cascade single-parity check code of the present invention;
Fig. 5 is the intersect coding operational instances schematic diagram of multidimensional crossing parallel cascade single-parity check code of the present invention;
Fig. 6 is to the encode performance of BER simulation curve figure of example of the present invention.
Embodiment
With reference to Fig. 2, coding method of the present invention is as follows:
The first step is determined coding parameter.
According to the length K of the desired input information bits stream of channel coded system and the length N of output bit flow, determine coding parameter, promptly determine the number k of the parallel branch that the frames of information bits after the number P of number M, single-parity check encoder of the length K of code rate R=K/N, input information bits frame U, the length N of finishing coding back output code word, interleaver and each interweave constitutes.Wherein the number M of interleaver gets the integer of 2≤M≤10 usually; The number P of single-parity check encoder is got the integer of P 〉=1 usually; The number k of parallel branch need satisfy k=PR/ (1-R), is the integer of an aliquot K and 1≤k≤K.
Second step, the input information bits that interweaves frame U.
Input information bits frame U to be encoded is interweaved the frames of information bits after obtaining M and interweaving respectively with M interleaver U π m = π m [ U ] , m=1,2,3,...,M。π wherein mM interleaver of [U] expression is with each bit rearrangement among the input information bits frame U.
The 3rd goes on foot, and the frames of information bits after M is interweaved is carried out serial to parallel conversion.
Frames of information bits after each is interweaved
Figure A20081015063100082
Carry out serial to parallel conversion, one road serial bit stream is become the individual long parallel bit frame of L=K/k that is of k, this k parallel bit frame can be expressed as
Figure A20081015063100083
M=1,2,3 ..., M; M the back frames of information bits that interweaves carried out serial to parallel conversion respectively, obtain Mk parallel bit frame altogether, this Mk parallel bit frame constitutes interleaver input bit matrix U L × Mk G = U L × k π 1 U L × k π 2 . . . U L × k π M .
The 4th step is to interleaver input bit matrix U L * Mk GCarry out L intersect coding operation, obtain Parity Check Bits matrix P L * P
With interleaver input bit matrix U L * Mk GMk bit in first row is input to interleaver and carries out the intersect coding operation, exports P Parity Check Bits, constitutes Parity Check Bits matrix P L * PFirst the row; Again with U L * Mk GMk bit in second row is input to interleaver and carries out the intersect coding operation, exports P Parity Check Bits, constitutes Parity Check Bits matrix P L * PSecond the row; By that analogy, with U L * Mk GThe third line, fourth line ..., the bit of the Mk in L is capable is input to interleaver and carries out the intersect coding operation, exports P Parity Check Bits, constitutes Parity Check Bits matrix P L * PL capable.
The intersect coding operation is one, and (this process can be with reference to figure 3 for P, the Mk) cataloged procedure of block code.The intersect coding operation comprises: interleaver outputs to Mk the bit of importing in the different output branch roads according to intersecting rule, and p one of output branch road output of interleaver comprises η pThe bit stream of individual bit, p=1,2,3 ..., P; With P the bit stream that the output branch road is exported of interleaver, be input to respectively in each self-corresponding single-parity check encoder; P single-parity check encoder is to η pIndividual bit carries out mould 2 and adds, and exports a Parity Check Bits, p=1, and 2,3 ..., P; This P single-parity check encoder exported P Parity Check Bits altogether.
Intersection rule described in the intersect coding operation has determined each bit that enters interleaver will be exported, and this rule is by cross matrix G from which interleaver output branch road Mk * PDescribe: G Mk * PBe that a Mk is capable, the matrix of P row, its element is " 0 " or " 1 "; The interior dotted line of interleaver has been represented all possible connection among Fig. 3, but not all in esse connections, if G Mk * P(i, j)=1, then i input branch road of interleaver is solid line to the line of j output branch road among Fig. 3, the bit that expression is imported from i input branch road of interleaver will be output to j the output branch road.Each input bit can be output at most in P the output branch road, the most can not be output in any one output branch road; The output bit flow of each output branch road comprises Mk bit at most, is 0 bit the most at least.Cross matrix G Mk * PStill be (P, Mk) generator matrix of block code simultaneously.
The 5th step is to Parity Check Bits matrix P L * PCarry out and the string conversion.
With Parity Check Bits matrix P L * PP row longly longly be the serial bit stream of LP for the Parity Check Bits rheology of L is one, obtaining growing is the Parity Check Bits frame P of LP.
In the 6th step, produce the output code word.
With Parity Check Bits frame P and input information bits frame U multiple connection, constitute output code word C=[U P], the length of C is N=K+LP.
With reference to Fig. 4, interpretation method of the present invention is as follows:
The 1st step, initialization decoding parameter.
The maximum permission iterations that iterative decoding is set is T, and the value of iterations counting variable t is changed to 1.
The 2nd step, the channel prior information L of compute codeword C Ch
The signal that receives from channel according to decoder is Y=C+n, and the channel prior information of compute codeword C is L Ch=2Y/ σ 2, wherein C is the signal of code word C after the BPSK modulation of coding output, and " 0 " bit modulation among the output code word C is " 1 ", and " 1 " bit modulation in the output code word is "+1 "; N for obey N (0, σ 2) additive white Gaussian noise that distributes, its average is zero; σ 2Variance for additive white Gaussian noise n.
The 3rd goes on foot, and obtains the channel prior information of input information bits frame U and Parity Check Bits frame P.
Channel prior information L from code word C ChK element before middle the taking-up, the channel prior information L of formation input information bits frame U a Ch(U); Channel prior information L from code word C ChMiddle N the element of K+1 to that take out, the channel prior information L of formation Parity Check Bits frame P a Ch(P).
The 4th step, the channel prior information L of the input information bits that interweaves frame U a Ch(U).
Prior information L with input information bits frame U a Ch(U) interweave with M interleaver respectively, obtain the channel prior information of M the back frames of information bits that interweaves
Figure A20081015063100101
Promptly according to the interlacing rule of each interleaver prior information L to input information bits frame U a Ch(U) element rearrangement is expressed as L a m ( U π m ) = π m [ L a ch ( U ) ] , m=1,2,3,...,M。The channel prior information of M the back frames of information bits that interweaves
Figure A20081015063100104
Constitute the prior information of M the back frames of information bits that interweaves in the iterative decoding first time respectively Promptly L a t ( U π m ) = L a ch ( U π m ) , t=1,m=1,2,3,...,M。
The 5th step, carry out iterative decoding the t time, finish partial decode L time.
In the t time iterative decoding, in the coding method each time intersect coding operate pairing coding structure, carry out partial decode one time.Partial decode refers to utilize the prior information of Mk the information bit that participates in the operation of this time intersect coding, and this time intersect coding operates the prior information of P the Parity Check Bits that is generated, and is G to generator matrix Mk * P(P, Mk) block code is carried out soft inputting and soft output maximum posteriori decoding, the external information of Mk information bit of output.In each partial decode, the prior information of Mk information bit, according to the position of this Mk information bit in M interweaves the back frames of information bits, M is individual from the t time iteration interweave after the prior information of frames of information bits
Figure A20081015063100108
The element of correspondence position obtain, m=1,2,3 ..., M; The prior information of P Parity Check Bits is according to the position of this P Parity Check Bits in Parity Check Bits frame P, from the channel prior information L of Parity Check Bits frame P a ChThe element of correspondence position (P) obtains.In cataloged procedure, carry out L intersect coding operation, correspondingly, when decoding, need finish L time partial decode.This L time partial decode is carried out simultaneously, to reduce decoding delay.After L partial decode finishes, obtain M external information of frames of information bits afterwards that interweaves in the t time iterative decoding
Figure A20081015063100109
M=1,2,3 ..., M.
In the 6th step, judge whether iterations counting variable t satisfies stopping criterion for iteration.
Allow iterations T to compare the maximum of iterations counting variable t and setting in the 1st step,, otherwise changed for the 7th step over to if t>T then changes the judgement of the 8th stepping row decoding over to.
In the 7th step, calculate M prior information of frames of information bits afterwards that interweaves in the t+1 time iteration
Figure A20081015063100111
The external information of M the back frames of information bits that interweaves that obtains after utilizing the t time iterative decoding to finish
Figure A20081015063100112
And the channel prior information of the 4th M that obtains the back frames of information bits that interweaves in the step
Figure A20081015063100113
Calculate the prior information of M the back frames of information bits that interweaves in the t+1 time iteration Promptly L a t + 1 ( U π m ) = L a ch ( U π m ) + π m [ Σ p = 1 , p ≠ m M π p - 1 [ L e t ( U π p ) ] ] , Wherein
Figure A20081015063100117
Expression will according to the deinterleaving rule of p interleaver
Figure A20081015063100118
In element rearrange according to the order of corresponding bit among the input information bits frame U; T adds 1 with the iterations counting variable, and returns for the 5th step and proceed iterative decoding.
In the 8th step, calculate judgement log-likelihood ratio information L (U), and adjudicate decoding.
After whole T iterative decodings are finished, utilize the channel prior information L of input information bits frame U a ChAnd the external information of the M that obtains in the T time iterative decoding the back frames of information bits that interweaves (U),
Figure A20081015063100119
Calculating is used to adjudicate the judgement log-likelihood ratio information L (U) of input information bits frame U, promptly L ( U ) = L a ch ( U ) + Σ m = 1 M π m - 1 [ L e T ( U π m ) ] ; Each element to L (U) carries out hard decision: greater than 0, then the information bit with correspondence is judged to " 1 " as if element value, and less than 0, then the information bit with correspondence is judged to " 0 ", obtains the decode results of input information bits frame U at last as if element value
Figure A200810150631001112
Embodiment
Coding example of the present invention is as follows:
The first step, length K=1000 according to the desired input information bits stream of channel coded system, the length N of the desired output bit flow of channel coded system=2000, the parameter of setting code device is as follows: code rate R=K/N=1000/2000=0.5, length K=1000 of input information bits frame U, length N=2000 of output code word C; The number M=5 of interleaver; The number P of single-parity check code coder=5; The number k=PR/ (1-R)=5 * 0.5/ (1-0.5)=5 of the parallel branch that the frames of information bits after each interweaves constitutes.
Second step was that 1000 input information bits frame U imports 5 interleavers respectively with length, and 5 interleavers are exported the frames of information bits afterwards that interweaves respectively
Figure A200810150631001113
The interlacing rule of 5 interleavers in the present embodiment is: the 1st interleaver kept original order of each bit among the input information bits frame U; 2nd, 3,4,5 interleavers produce based on the method for designing of pseudo random interleaver, need simultaneously to meet the following conditions: 5 back frames of information bits that interweave after 5 interleavers rearrangements
Figure A200810150631001114
With
Figure A200810150631001115
To in the 3rd step, generate interleaver input bit matrix U 200 * 25 G, U 200 * 25 GMust derive from the diverse location of input information bits frame U with 25 bits in the delegation.
The 3rd step is to 5 back frames of information bits that interweave
Figure A20081015063100121
With
Figure A20081015063100122
Carry out serial to parallel conversion respectively, with each length be 1000 interweave the back frames of information bits become 5 long be 200 parallel branch, promptly
Figure A20081015063100123
With
Figure A20081015063100124
Obtain interleaver input bit matrix U at last 200 * 25 G, promptly U 200 × 25 G = U 200 × 5 π 1 U 200 × 5 π 2 U 200 × 5 π 3 U 200 × 5 π 4 U 200 × 5 π 5 .
The 4th step is to interleaver input bit matrix U 200 * 25 GCarry out 200 intersect coding operations, obtain Parity Check Bits matrix P 200 * 5: at first with interleaver input bit matrix U 200 * 25 G25 bits in first row are input to interleaver and carry out the intersect coding operation, export 5 Parity Check Bits, constitute Parity Check Bits matrix P 200 * 5First the row; Again with U 200 * 25 G25 bits in second row are input to interleaver and carry out the intersect coding operation, export 5 Parity Check Bits, constitute Parity Check Bits matrix P 200 * 5Second the row; By that analogy, with U 200 * 25 GThe third line, fourth line ..., 25 bits in the 200th row are input to interleaver and finish the intersect coding operation, export 5 Parity Check Bits, constitute Parity Check Bits matrix P 200 * 5The 200th the row.
This coding example the intersect coding operating process as shown in Figure 5: at first with U 200 * 25 G25 bit input interleavers in first row are shown u=[u with this row table of bits 1u 2u 3... u 24u 25], at U 200 * 25 GIn be to arrange from left to right, order is arrangement from top to bottom in Fig. 5.These 25 bits from 5 back frames of information bits that interweave, are specially respectively:
Figure A20081015063100126
These 25 bits constitute 25 input branch roads of interleaver respectively.After 5 bits of 5m the input branch road of (m-1) 5+1 to the of interleaver are duplicated m time, send into m respectively, m-1 ..., 1 output branch road, m=1,2,3 ..., 5.The cross matrix G of this intersection rule is described 25 * 5For:
G 25 × 5 = 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 1 0 0 1 1 1 0 0 1 1 1 0 0 1 1 1 0 0 1 1 1 0 0 1 1 1 1 0 1 1 1 1 0 1 1 1 1 0 1 1 1 1 0 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
The bit that output bit flow comprised of 5 output branch roads of interleaver is as follows:
Interleaver output branch road sequence number The input information bits that the interleaver output bit flow is comprised
1 u 1、u 2、u 3、u 4、u 5、u 6、u 7、u 8、u 9、u 10、u 11、u 12、u 13、 u 14、u 15、u 16、u 17、u 18、u 19、u 20、u 21、u 22、u 23、u 24、u 25
2 u 6、u 7、u 8、u 9、u 10、u 11、u 12、u 13、u 14、u 15、 u 16、u 17、u 18、u 19、u 20、u 21、u 22、u 23、u 24、u 25
3 u 11、u 12、u 13、u 14、u 15、u 16、u 17、 u 18、u 19、u 20、u 21、u 22、u 23、u 24、u 25
4 u 16、u 17、u 18、u 19、u 20、u 21、u 22、u 23、u 24、u 25
5 u 21、u 22、u 23、u 24、u 25
The bit stream of 5 output branch roads of interleaver is sent into 5 single-parity check code coders respectively.M single-parity check code coder carries out mould 2 to (6-m) 5 bits of importing and adds, and exports 1 check bit, m=1, and 2,3 ..., 5.5 single-parity check code coders are exported 5 Parity Check Bits p respectively 1, p 2, p 3, p 4, p 5, the verification between 25 information bits of these 5 Parity Check Bits and input is closed and is:
p 1 = u 1 ⊕ u 2 ⊕ u 3 ⊕ u 4 ⊕ u 5 ⊕ u 6 ⊕ u 7 ⊕ u 8 ⊕ u 9 ⊕ u 10 ⊕ u 11 ⊕ u 12 ⊕ u 13 ⊕ u 14 ⊕ u 15 ⊕ u 16 ;
⊕ u 17 ⊕ u 18 ⊕ u 19 ⊕ u 20 ⊕ u 21 ⊕ u 22 ⊕ u 23 ⊕ u 24 ⊕ u 25
p 2 = u 6 ⊕ u 7 ⊕ u 8 ⊕ u 9 ⊕ u 10 ⊕ u 11 ⊕ u 12 ⊕ u 13 ⊕ u 14 ⊕ u 15 ⊕ u 16 ⊕ u 17 ⊕ u 18 ⊕ u 19 ⊕ u 20 ;
⊕ u 21 ⊕ u 22 ⊕ u 23 ⊕ u 24 ⊕ u 25
p 3 = u 11 ⊕ u 12 ⊕ u 13 ⊕ u 14 ⊕ u 15 ⊕ u 16 ⊕ u 17 ⊕ u 18 ⊕ u 19 ⊕ u 20 ⊕ u 21 ⊕ u 22 ⊕ u 23 ⊕ u 24 ⊕ u 25 ;
p 4 = u 16 ⊕ u 17 ⊕ u 18 ⊕ u 19 ⊕ u 20 ⊕ u 21 ⊕ u 22 ⊕ u 23 ⊕ u 24 ⊕ u 25 ;
p 5 = u 21 ⊕ u 22 ⊕ u 23 ⊕ u 24 ⊕ u 25 .
The 5th step is to Parity Check Bits matrix P 200 * 5Carry out and go here and there conversion, with Parity Check Bits matrix P 200 * 55 row length be 200 parallel Parity Check Bits stream, become one long be that 1000 serial Parity Check Bits flows, obtain comprising the Parity Check Bits frame P of 1000 Parity Check Bits.
In the 6th step, with Parity Check Bits frame P and input information bits frame U multiple connection, structure is grown into 2000 output code word C=[U P].
Decoding example procedure of the present invention is as follows:
In the 1st step, the maximum of iterative decoding allows iterations to be set to 80, and the value of iterations counting variable t is changed to 1.
In the 2nd step, the length that receives from channel according to decoder is 2000 signal Y=C+n, and the channel prior information of compute codeword C is L Ch=2Y/ σ 2, wherein C is the signal of code word C after the BPSK modulation of coding output, and " 0 " bit modulation among the output code word C is " 1 ", and " 1 " bit modulation in the output code word is "+1 "; N for obey N (0, σ 2) additive white Gaussian noise that distributes, its average is zero; σ 2Variance for additive white Gaussian noise n.
The 3rd step is from the channel prior information L of code word C ChMiddle preceding 1000 elements, the channel prior information L of formation input information bits frame U of taking out a Ch(U), promptly L a ch ( U ) = L ch ( 1 : 1000 ) ; Channel prior information L from code word C ChMiddle the 1001st to the 2000th element, the channel prior information L of formation Parity Check Bits frame P of taking out a Ch(P), promptly L a ch ( P ) = L ch ( 1001 : 2000 ) .
The 4th step is with the channel prior information L of input information bits frame U a Ch(U) import respectively in 5 interleavers and interweave, promptly respectively according to the interlacing rule of each interleaver with L a Ch(U) 1000 element rearrangements are expressed as L a m ( U π m ) = π m [ L a ch ( U ) ] , M=1,2,3 ..., 5, obtain 5 channel prior informations of frames of information bits afterwards that interweave
Figure A200810150631001411
With
Figure A200810150631001412
Utilize the channel prior information of 5 back frames of information bits that interweave, constitute the prior information of 5 back frames of information bits that interweave in the iterative decoding first time
Figure A20081015063100151
With
Figure A20081015063100152
Promptly L a 1 ( U π 1 ) = L a ch ( U π 1 ) , L a 1 ( U π 2 ) = L a ch ( U π 2 ) , L a 1 ( U π 3 ) = L a ch ( U π 3 ) , L a 1 ( U π 4 ) = L a ch ( U π 4 ) , L a 1 ( U π 5 ) = L a ch ( U π 5 ) .
The 5th step, in the t time iterative decoding, in the cataloged procedure each time intersect coding operate pairing coding structure, carry out partial decode respectively one time: according to participating in the information bit u that this time intersect coding is operated 1, u 2, u 3, u 4, u 5In first back frames of information bits that interweaves
Figure A20081015063100159
In the position, from this iterative decoding
Figure A200810150631001510
Prior information
Figure A200810150631001511
The element value of correspondence position constitutes the prior information of these 5 information bits; According to same quadrat method, participate in the information bit u of this time intersect coding operation 6, u 7, u 8, u 9, u 10Prior information from The middle acquisition; u 11, u 12, u 13, u 14, u 15Prior information from
Figure A200810150631001513
The middle acquisition; u 16, u 17, u 18, u 19, u 20Prior information from The middle acquisition; u 21, u 22, u 23, u 24, u 25Prior information from The middle acquisition; 5 Parity Check Bits p that operation is generated according to this time intersect coding 1, p 2, p 3, p 4, p 5Position in Parity Check Bits frame P is from the channel prior information L of Parity Check Bits frame P a Ch(P) the element value of correspondence position in constitutes the prior information of these 5 Parity Check Bits; Utilize the prior information of 25 information bits and 5 Parity Check Bits, the bcjr algorithm that adopts block code is to cross matrix G 25 * 5Described parameter is the block code of (5,25), promptly coding structure shown in Figure 6 is carried out soft inputting and soft output maximum posteriori decoding, the external information of 25 information bits of output.Need to carry out 200 intersect coding operations in cataloged procedure, correspondingly need carry out 200 times partial decode when decoding, these 200 partial decode are carried out simultaneously to reduce decoding delay.After 200 partial decode finish, obtain in this iterative decoding the external information of each bit in 5 back frames of information bits that interweave, utilize the external information of these bits to constitute 5 back frames of information bits external informations in this iterative decoding that interweave With
Figure A200810150631001517
The 6th step allowed iterations 80 to compare the maximum of setting in the value of iterations counting variable t and the first step, if t>80 then change the judgement of the 8th stepping row decoding over to, went on foot otherwise change the 7th over to.
The 7th goes on foot, and utilizes the external information of 5 back frames of information bits that interweave in the t time iterative decoding that obtains in the 5th step With
Figure A200810150631001519
And the channel prior informations of the 4th obtain 5 the back frames of information bits that interweave in the step
Figure A200810150631001520
With
Figure A200810150631001521
Calculate the prior information of 5 back frames of information bits that interweave in the t+1 iteration
Figure A200810150631001522
Figure A200810150631001523
With
Figure A200810150631001524
That is:
L a t + 1 ( U π 1 ) = L a ch ( U π 1 ) + π 1 [ Σ p = 2 5 π p - 1 [ L e t ( U π p ) ] ] ;
L a t + 1 ( U π 2 ) = L a ch ( U π 2 ) + π 2 [ Σ p = 1 , p ≠ 2 5 π p - 1 [ L e t ( U π p ) ] ] ;
L a t + 1 ( U π 3 ) = L a ch ( U π 3 ) + π 3 [ Σ p = 1 , p ≠ 3 5 π p - 1 [ L e t ( U π p ) ] ] ;
L a t + 1 ( U π 4 ) = L a ch ( U π 4 ) + π 4 [ Σ p = 1 , p ≠ 4 5 π p - 1 [ L e t ( U π p ) ] ] ;
L a t + 1 ( U π 5 ) = L a ch ( U π 5 ) + π 5 [ Σ p = 1 4 π p - 1 [ L e t ( U π p ) ] ] .
The value of iterations counting variable t is added 1, and returned for the 5th step and proceed iterative decoding.
In the 8th step, after whole 80 iterative decodings are finished, utilize the channel prior information L of input information bits frame U a Ch(U), the external informations of 5 back frames of information bits that interweave and in the 80th iterative decoding
Figure A20081015063100164
Figure A20081015063100165
With
Figure A20081015063100166
Calculate the judgement log-likelihood ratio information L (U) of input information bits frame U, promptly L ( U ) = L a ch ( U ) + Σ m = 1 5 π m - 1 [ L e 80 ( U π m ) ] ; Each element to L (U) carries out hard decision: greater than 0, then the information bit with correspondence is judged to " 1 " as if element value, and less than 0, then the information bit with correspondence is judged to " 0 ", obtains the decode results of input information bits frame U at last as if element value
Figure A20081015063100168
Effect of the present invention can further specify by following emulation:
Emulation 1 at the coding example, adopts above-mentioned interpretation method and decoding parameter to decipher, and utilizes the MATLAB program that the performance of decoding is carried out Computer Simulation.All adopt the BPSK modulation in the emulation, in awgn channel, transmit; Each signal to noise ratio point of emulation finishes in emulation emulation when 100 erroneous frame occurring; The performance of BER simulation curve that emulation obtains is shown in the curve A among Fig. 6.Can see from curve A, when bit error rate reaches 10 -6The time, the phenomenon of wrong flat bed has just appearred in multidimensional crossing parallel cascade single-parity check code.
Emulation 2 to having classics (37, the 21) Turbo code of equal length and code check with the multidimensional parallel cascade single-parity check code, is carried out bit error rate emulation under identical modulation system, same channel conditions; Turbo code adopts pseudo random interleaver, and iterations is 30 times; The performance of BER simulation curve that emulation obtains is shown in the curve B among Fig. 6.Curve A and curve B are compared, can see: the wrong flat bed of given multidimensional crossing parallel cascade single-parity check code is starkly lower than the wrong flat bed of classics (37,21) Turbo code among the embodiment; Bit error rate is 4 * 10 -6The time, the specific embodiment of multidimensional crossing parallel cascade single-parity check code is compared the gain of nearly 1dB with classical (37,21) Turbo code.
Emulation 3 is carried out bit error rate emulation to the multidimensional parallel cascade single-parity check code with identical parameters under identical modulation system, same channel conditions; The multidimensional parallel cascade single-parity check code adopts pseudo random interleaver, and iterations is similarly 80 times; The performance of BER simulation curve that emulation obtains is shown in the curve C among Fig. 6.Can see from curve C, be 7 * 10 in bit error rate -3The time, the phenomenon of wrong flat bed has appearred in the multidimensional parallel cascade single-parity check code.Curve A from Fig. 6 can be seen with curve C: multidimensional crossing parallel cascade single-parity check code given among the embodiment is compared with the multidimensional parallel cascade single-parity check code, and the mistake flat bed has obtained reducing effectively; Bit error rate is 2 * 10 -6The time, the specific embodiment of multidimensional crossing parallel cascade single-parity check code is compared with the multidimensional parallel cascade single-parity check code, the gain of nearly 3.5dB.
More than coding, the interpretation method of multidimensional crossing parallel cascade single-parity check code that the present invention is proposed be described in detail, but it only be preferred embodiment of the present invention, not in order to limit the present invention.Under the situation that does not break away from thought of the present invention and scope, to any modification that the present invention made, be equal to and replace and improvement etc., all should be included within protection scope of the present invention.

Claims (6)

1. the coding method of a multidimensional crossing parallel cascade single-parity check code comprises the steps:
Step 1, code length and code rate according to system requirements are determined coding parameter, the number k of the parallel branch that the frames of information bits after promptly the number P of the number M of the length K of code rate R, input information bits frame U, the length N of finishing coding back output code word, interleaver, single-parity check encoder and each interweave constitutes;
Step 2 interweaves input information bits frame U respectively with M interleaver, the frames of information bits after obtaining M and interweaving
Figure A2008101506310002C1
M=1,2,3 ..., M;
Step 3, the frames of information bits after each is interweaved
Figure A2008101506310002C2
Carry out serial to parallel conversion, obtain the individual long parallel bit frame of L that is of k
Figure A2008101506310002C3
M=1,2,3 ..., M carries out obtaining Mk parallel bit frame behind the serial to parallel conversion to M the back frames of information bits that interweaves, i.e. interleaver input bit matrix U L * Mk G
Step 4 is to interleaver input bit matrix U L * Mk GCarry out L intersect coding operation, obtain Parity Check Bits matrix P L * P
Step 5 is to Parity Check Bits matrix P L * PCarry out and go here and there conversion, obtain Parity Check Bits frame P;
Step 6 with Parity Check Bits frame P and input information bits frame U multiple connection, constitutes output code word C=[UP], the length of C is N=K+LP, encoder bit rate is R=k/ (P+k).
2. coding method according to claim 1, wherein step 4 is carried out according to the following procedure:
(4a) with interleaver input bit matrix U L * Mk GMk bit in first row is input to interleaver and carries out the intersect coding operation, exports P Parity Check Bits, constitutes Parity Check Bits matrix P L * PFirst the row;
(4b) with U L * Mk GMk bit in second row is input to interleaver and carries out the intersect coding operation, exports P Parity Check Bits, constitutes Parity Check Bits matrix P L * PSecond the row;
(4c) by that analogy, with U L * Mk GThe third line, fourth line ..., the bit of the Mk in L is capable is input to interleaver and carries out the intersect coding operation, exports P Parity Check Bits, constitutes Parity Check Bits matrix P L * PL capable.
3. coding method according to claim 2, wherein the intersect coding operation is: output in the different output branch roads according to Mk the bit of intersection rule with input, p one of output branch road output of interleaver comprises η pThe bit stream of individual bit, p=1,2,3 ..., P; With P the bit stream that the output branch road is exported of interleaver, be input to respectively in each self-corresponding single-parity check encoder, p single-parity check encoder is to η pIndividual bit carries out mould 2 and adds, and exports a Parity Check Bits, p=1, and 2,3 ..., P, this P single-parity check encoder exported P Parity Check Bits altogether.
4. the interpretation method of a multidimensional crossing parallel cascade single-parity check code comprises the steps:
Steps A, initialization decoding parameter, the maximum permission iterations that iterative decoding promptly is set is T, and the value of iterations counting variable t is changed to 1;
Step B, decoder is L according to the channel prior information of received signal Y compute codeword C Ch=2Y/ σ 2, wherein, Y=C+n is the signal that decoder receives from channel, and C is the signal of code word C after the BPSK modulation of coding output, and n is the additive white Gaussian noise of zero-mean, σ 2Variance for additive white Gaussian noise n;
Step C is by the channel prior information L of code word C ChPreceding K element constitute the channel prior information L of input information bits frame U a Ch(U); Channel prior information L by code word C ChK+1 to the N element constitute the channel prior information L of Parity Check Bits frame P a Ch(P);
Step D is with the channel prior information L of input information bits frame U a Ch(U) interweave with M interleaver respectively, obtain the channel prior information of M the back frames of information bits that interweaves M=1,2,3 ..., M, this channel prior information
Figure A2008101506310003C2
Constitute the prior information of M the back frames of information bits that interweaves in the iterative decoding first time
Figure A2008101506310003C3
Promptly L a t ( U π m ) = L a ch ( U π m ) , t=1,m=1,2,3,...,M;
Step e, in the t time iterative decoding, operate pairing coding structure at intersect coding each time, utilize the prior information of Mk the information bit that participates in the operation of this time intersect coding, and this time intersect coding is operated the prior information of P the Parity Check Bits that is generated, carry out maximum posteriori decoding, the external information of Mk information bit of output, i.e. a partial decode; At the operation of L intersect coding, carry out L time partial decode simultaneously, obtain the individual external information of frames of information bits afterwards that interweaves of M in the t time iterative decoding
Figure A2008101506310003C5
M=1,2,3 ..., M;
Step F judges that whether iterations counting variable t allows iterations T greater than the maximum of setting in the steps A, then changes step H over to if satisfy, otherwise changes step G over to;
Step G utilizes M external information of frames of information bits U afterwards that interweaves in the t time iterative decoding that obtains in the step e
Figure A2008101506310003C6
And the channel prior information of the M that obtains among the step D the back frames of information bits that interweaves
Figure A2008101506310003C7
Calculate the prior information of M the back frames of information bits that interweaves in the t+1 time iteration: L a t + 1 ( U π m ) = L a ch ( U π m ) + π m [ Σ p = 1 , p ≠ m M π p - 1 [ L e t ( U π p ) ] ] , M=1,2,3 ..., M, and the value of iterations counting variable t added 1, return step e and proceed iterative decoding;
Step H after T iterative decoding finished, utilizes the channel prior information L of input information bits frame U a Ch(U), the external information of M the back frames of information bits that interweaves and in the T time iterative decoding M=1,2,3 ..., M, the judgement log-likelihood ratio information of calculating input information bits frame U: L ( U ) = L a ch ( U ) + Σ m = 1 M π m - 1 [ L e T ( U π m ) ] , And L (U) carried out hard decision, obtain decode results
5. interpretation method according to claim 4, the prior information of Mk information bit of described this time intersect coding of step e operation wherein, according to the position of this Mk information bit in M interweaves the back frames of information bits, M prior information of frames of information bits afterwards that interweaves from the t time iteration The element of correspondence position obtain, m=1,2,3 ..., M.
6. interpretation method according to claim 4, the prior information of P Parity Check Bits being generated of described this time intersect coding of step e operation wherein, according to the position of this P Parity Check Bits in Parity Check Bits frame P, from the channel prior information L of Parity Check Bits frame P a ChThe element of correspondence position (P) obtains.
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