CN101339340A - Liquid crystal display panel and its mending method - Google Patents
Liquid crystal display panel and its mending method Download PDFInfo
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- CN101339340A CN101339340A CNA2007101274422A CN200710127442A CN101339340A CN 101339340 A CN101339340 A CN 101339340A CN A2007101274422 A CNA2007101274422 A CN A2007101274422A CN 200710127442 A CN200710127442 A CN 200710127442A CN 101339340 A CN101339340 A CN 101339340A
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Abstract
A method of remedying a defect in a liquid crystal panel comprises: providing an array substrate and a plurality of pixel areas positioned above the array substrate, wherein at least one of the pixel areas comprises a transistor, a pixel electrode, a storage capacitor comprising an upper electrode and a lower electrode and a defect positioned in the storage capacitor; dividing the pixel electrode areas into a first part and a second part being disconnected with each other through a cutting technology, wherein the first part of the pixel electrode is corresponding to the storage capacitor comprising the defect; and finally, electrically connecting the second part of the pixel electrode to a scanning line.
Description
Invention field
The present invention relates to a kind of LCD Panel and Mending Method, and relate in particular to and a kind ofly can repair the bright spot on the array base palte that is positioned at display panels or the method for other picture element flaw problems.
Technical background
The tradition display panels has generally included a thin-film transistor array base-plate (arraysubstrate), one colored filter substrate (CF substrate) has a common electrode thereon, be arranged at the array base palte top, and a liquid crystal layer is arranged between the two.Please refer to Fig. 1 to Fig. 2.Fig. 1 to Fig. 2 is the synoptic diagram of the array base palte of known display panels.Fig. 1 is the part top view of array base palte, and Fig. 2 is the diagrammatic cross-section along the line segment PP ' of array base palte shown in Figure 1.To shown in Figure 2, known array base palte 10 includes a plurality of sweep traces 12, a plurality of data lines 14, a plurality of pixel region 16 that is defined by sweep trace 12 and data line 14 and a plurality of and sweep trace 12 staggered common lines 20 as Fig. 1.Each pixel region 16 has an at least one thin film transistor (TFT) 18 and a pixel electrode 22 corresponding to thin film transistor (TFT) 18.Pixel electrode 22 is in the face of the common electrode (not shown) of colored filter substrate, and liquid crystal then is set between pixel electrode 22 and the common electrode.In addition, pixel electrode 22 forms a storage capacitors with the overlay region of common line 20 on common line 20.Each thin film transistor (TFT) 18 can be considered the switch that is arranged in each pixel region 16.When display frame, the common electrode of colored filter substrate can receive energising altogether usually and press.Then, receive the one scan signal by corresponding sweep trace 12 and select a particular pixel areas, the pixel electrode 22 of pixel region 16 receives data-signal by corresponding data line 14 and writes a pixel voltage then.Therefore, the voltage official post liquid crystal molecule between between pixel electrode 22 and common electrode rotates to a predetermined direction to control the illumination of sending from colored filter substrate, finishes a picture then and shows.
Storage capacitors helps the normal operation of pixel region 16, yet any defective workmanship or the particulate (practice) that occurs in storage capacitors all can cause storage capacitors to operate.For instance, expectedly fall into the storage capacitors district if there is a particulate 24 not have, this particulate 24 will cause producing a short circuit between pixel electrode 22 and 20 on common line.In the case, the voltage of pixel electrode 22 will be consistent with the voltage of common line 20.Because common line 20 has identical voltage usually with the common electrode of colored filter, the voltage of pixel electrode 22 will be identical with the common electrode of colored filter substrate.Therefore, will cause pixel region 16 to operate.Illustrate further, if LCD is the white picture formula of normality LCD (normallywhite type LCD), backlightly will penetrate layer of liquid crystal molecule, and because between between pixel electrode 22 and common electrode voltage difference and produce a fleck defect not.Except particulate, make the other defect of pixel electrode 22 and common line 20 short circuits, as: a dielectric layer damaged (dielectriclayer loss) or a common line damaged (dielectric layer loss) also will make in the white picture formula of the normality LCD and produce fleck defect.
Therefore, provide a simple and effective pixel method for repairing and mending to need by the problem in the demonstration that particulate or other defect were produced to solve.
Summary of the invention
Fundamental purpose of the present invention is to provide a LCD Panel and Mending Method to solve fleck defect and other picture element flaw problems.
According to a preferred embodiment of the invention, disclosed the method that a kind of repairing is arranged in a defective of a display panels.Array basal plate at first is provided.This array base palte includes a plurality of sweep traces and a plurality of data lines, is arranged on this array base palte, defines a plurality of pixel regions jointly, and a defective, is arranged in this storage capacitors.At least one this pixel region includes a transistor, a pixel electrode, is electrically connected to this transistorized source, a storage capacitors, has a top electrode and a bottom electrode, and wherein this pixel electrode is electrically coupled to this storage capacitors.Then, carry out a cutting technology this pixel electrode is divided into discrete each other one first part and one second part, wherein this of this pixel electrode first is partly corresponding to this storage capacitors with this defective.At last, this second part with this pixel electrode is electrically connected to this sweep trace.
Description of drawings
Fig. 1 to Fig. 2 is the synoptic diagram of the array base palte of known display panels;
Fig. 3 to Fig. 8 repairs the method synoptic diagram of the defective on the array base palte that is positioned at display panels for first embodiment of the invention;
Fig. 9 repairs the method synoptic diagram of the defective on the array base palte that is positioned at display panels for second embodiment of the invention;
Figure 10 repairs the method synoptic diagram of the defective on the array base palte that is positioned at display panels for third embodiment of the invention;
Figure 11 repairs the method synoptic diagram of the defective on the array base palte that is positioned at display panels for fourth embodiment of the invention.
[main element symbol description]
10 array base paltes, 12 sweep traces
14 data lines, 16 pixel regions
18 thin film transistor (TFT)s, 20 common lines
22 pixel electrodes, 24 particulates
30 array base paltes, 32 sweep traces
34 data line 34a connect bridge
35 grids, 36 pixel regions
37 source/drains, 38 thin film transistor (TFT)s
40 common lines 401 first interrupt side partly
402 second interrupt partly 42 pixel electrodes of side
421 first parts 422 second partly
423 the 3rd parts, 44 dielectric layers
46 protective seams, 47 Cutting Roads
48 defectives, 50 array base paltes
52 sweep traces, 54 data lines
56 pixel regions, 58 thin film transistor (TFT)s
62 pixel electrodes 621 first partly
622 second parts, 64 auxiliary electrodes
66 defectives
Embodiment
Please refer to Fig. 3 to Fig. 8.Fig. 3 to Fig. 8 repairs the method and the board structure synoptic diagram of the defective on the array base palte that is positioned at display panels for first embodiment of the invention.Fig. 3, Fig. 5 and Fig. 7 are the top view of array base palte, Fig. 4 a that Fig. 4 comprises and Fig. 4 b are the sectional view of the array base palte of Fig. 3 along line segment AA ', Fig. 6 is the sectional view of the array base palte of Fig. 5 along line segment BB ', and Fig. 8 is the sectional view of the array base palte of Fig. 7 along line segment CC '.As shown in Figure 3 and Figure 4, provide array basal plate 30.Array base palte 30 includes a plurality of sweep traces that are arranged in parallel 32, a plurality of are perpendicular to data lines 34 that sweep trace is arranged, and is arranged at array base palte 30 tops, a plurality of pixel region 36 that is defined by sweep trace 32 and data line 34, a plurality of thin film transistor (TFT) 38 in each pixel region 36 and a plurality of and sweep trace 32 staggered common lines 40 of being arranged at.Common line 40 generally can form by identical lithography process with sweep trace 32, and common line 40 generally to mean with sweep trace 32 be the 1st metal (M1).Data line 34 forms after sweep trace 32, thus data line 34 to mean usually be the 2nd metal (M2).Array base palte 30 also includes plurality of pixel electrodes 42 and is arranged in each pixel region 36, and is electrically connected on the source/drain of each thin film transistor (TFT) 38 by a through hole (through hole or contact hole) D.As shown in Figure 4, array base palte 30 also has a middle layer (intermediary layer), and it includes a dielectric layer (dielectric layer) 44 and one protective seam (passivation layer) 46 and is arranged between common line 40 and the pixel electrode 42.It should be noted that array base palte 30 also includes one and connects bridge (connecting bridge) 34a (as shown in Figure 3 and Figure 4) in each pixel region 36, as the usefulness of repairing.Connect bridge 34a and be formed in the 2nd metal level, its function will be in the following detailed description of doing.
This embodiment sets forth the LCD that storage capacitors is positioned at the type (Cst on common type) on the common line, so the some of each pixel electrode 42 is overlapped in common line 40 in each pixel region 36 to form a storage capacitors district.In this storage capacitors district, common line 40 and pixel electrode 42 are considered as a bottom electrode and a top electrode of storage capacitors respectively, and dielectric layer 44 is considered as a capacitance dielectric layer to form a storage capacitors in each pixel region 36 with protective seam 46.
Yet, in the manufacture process of array base palte, owing to can't expect that defective may occur in the storage capacitors district.As Fig. 3, Fig. 4 and shown in Figure 5; if a defective 48 does not have the storage capacitors district that expectedly occurs in the pixel region 36; damaged and part protective seam 46 damaged (shown in Fig. 4 b) as the part of particle defects (shown in Fig. 4 a) or dielectric layer 44, pixel region 36 will normal operation.In the present embodiment, defective tube 48 is not particle defects or defect flaw, and pixel electrode 42 can produce with common line 40 and be electrically connected, thereby forms short circuit.But it should be noted that, method of the present invention not only is applied to make when defective 48 situation of pixel electrode 42 and common line 40 short circuits, also can be applicable to storage capacitors can't be operated or the situation of undesired running when defective 48, above-mentioned application mode will be described below.
With the defect flaw is example (shown in Fig. 4 b), and when detecting defectiveness 48, the pixel region 36 with defective 48 needs to repair.As Fig. 5 and shown in Figure 6, along pixel electrode 42 being divided into first 421, second the 422 and the 3rd part 423 partly partly of discrete each other one corresponding common line 40, to finish a cutting technology near the both sides (as Fig. 5 and Cutting Road 47 shown in Figure 6) of common line.In the present embodiment, cutting technique can be a laser cutting parameter, but is not limited to this.In addition, the degree of depth of cutting is not limited to only reach the degree of depth of pixel electrode 42, and can be darker, even reaches the upper surface (as shown in Figure 6) of array base palte 30.In order to determine that pixel electrode 42 and common line 40 for being electrically insulated, can be cut to protective seam 46 or dielectric layer 44 with pixel electrode 42 together in cutting technique.Hence one can see that, and line of cut is along the both sides of common line 40, but be electrically connected in cutting process with common line 40 for fear of pixel electrode 42, and line of cut should not be too near to the both sides of common line.After cutting technique, pixel electrode 42 is divided into three parts, and will have defective 48 first partly 421 and second partly the 422 and the 3rd part 423 keep apart.
As Fig. 7 and shown in Figure 8, then, by weld source/drain 37 and grid 35 at E point place, second part 422 of pixel electrode 42 can be electrically connected to the grid 35 of sweep trace 32, and, then the 3rd of pixel electrode 42 the partly 423 can be electrically connected to another sweep trace 32 by being welded to connect bridge 34a and pixel electrode 42 respectively at F point place and being welded to connect bridge 34a and another gate line 32 at G point place.In the present embodiment, partly 422 reach with fetching by Laser Welding (LBW) between second, but be not limited to the method between being electrically connected of the 3rd part 423 and 32 of another sweep traces with 35 of grids.As Fig. 7 and shown in Figure 8, the source/drains 37 that electrically contacts via through hole D and pixel electrode 42 are overlapped in the grid 35 of thin film transistor (TFT) 38, and therefore, source/drain 37 and grid 35 can directly be welded together, as shown in Figure 8.On the other hand, the 3rd part 423 and another sweep trace 32 and underlapped.In the case, as shown in Figure 8, connection bridge 34a is a part of of second metal level and is arranged between the 3rd part 423 and the sweep trace 32, is considered as between the be connected media of the 3rd part 423 with sweep trace 32.Therefore, the 3rd partly 423 can be connected to sweep trace 32 via connecting bridge 34a by welding.Because second partly the 422 and the 3rd partly 423 is connected to sweep trace 32 respectively, and the voltage of one scan line 32 is provided, thus second partly 422 with the colored filter substrate common electrode of (figure does not show) between and between the 3rd part 423 and common electrode, will have a voltage difference respectively.Therefore, begin display frame when LCD is the white picture type of normality, then fleck defect can be eliminated.Though and between first part 421 and common electrode, do not have voltage difference, backlight will being covered by common line 40.So the fleck defect of first part 421 also is eliminated.
Please refer to Fig. 9.Fig. 9 repairs the method synoptic diagram of the defective on the array base palte that is positioned at display panels for second embodiment of the invention.Present embodiment is also set forth the LCD of storage capacitors the type in common line on similar to first embodiment, so components identical uses identical label to indicate, and the part that repeats no longer describes in detail.As shown in Figure 9, provide array basal plate 30, and a defective expectedly appears in nothing.Be different from the defective that is in second embodiment 48 damaged or damage of first embodiment for common line.As shown in Figure 9, a common line is damaged can make common line interruption usually and have two fractures partly, the first fracture side portion 401 and the second fracture side portion 402.The storage capacitors that the damaged or fracture of common line not only causes having the pixel region 36 of defective 48 can't operate, and also can allow the pixel region 36 of all shared identical common lines 40 operate.
Then, carry out pixel electrode 42 that a cutting technology will have a defective 48 and divide into discrete each other one first partly 421, it is corresponding to common line 40 and include defective 48, one second partly 422 and the 3rd partly 423.First partly 421 also have two partly corresponding and be overlapped in two fracture portions 401 and 402 of common line 40.Then, partly 422 be electrically connected to sweep trace 32, and partly 423 utilize laser bonding to be electrically connected to another sweep trace 32 via connecting bridge 34a with the 3rd with second.In addition, the first fracture side portion 401 by the common line 40 of interruption at welded H point place respectively and first partly 421 and the second fracture side portion of the common line 40 of interruption at welding I point place and first partly 421, first part 421 of pixel electrode 42 can be electrically connected to the common line 40 of interruption.
In the present embodiment, first part 421 of pixel electrode 42 is kept apart with second part the 422 and the 3rd part 423 in cutting technique, and be electrically connected to common line 40 by laser welding process.First part 421 allows first part 421 can be considered a replacement circuit with being electrically connected of 40 on common line.According to above-mentioned, by being electrically connected second partly the 422 and the 3rd partly 423 to corresponding sweep trace 32, fleck defect can be eliminated, and common line is damaged can interrupt common line 40 to first parts 421 and be repaired by being electrically connected.
Please refer to Figure 10.Figure 10 repairs the method synoptic diagram of the defective on the array base palte that is positioned at display panels for third embodiment of the invention.As shown in Figure 3, array base palte 50 includes the data line 54 that a plurality of sweep traces that are arranged in parallel 52, a plurality of vertical scan lines 52 are arranged, be arranged at array base palte 50 tops, a plurality of pixel region 56 by sweep trace 52 and data line 54 define, plurality of films transistor 58 is arranged in each pixel region 56 and plurality of pixel electrodes 62 is arranged in each pixel region 56 and be electrically connected to the source/drain of each thin film transistor (TFT) 58.Be that with the difference of the foregoing description present embodiment is a LCD of setting forth the type (Cst on gate type) of storage capacitors on grid, also have an auxiliary electrode (auxiliary electrode) 64 to make by second metal, electrically contact pixel electrode 62 via through hole J, and overlapping scan line 52.
In the ordinary course of things, auxiliary electrode 64 there is no and is electrically connected to data line 54.But owing in the manufacture process of array base palte, produce the factor that some do not have expection, make that auxiliary electrode 64 and data line 54 may short circuits, thereby form a defective 66, the residue of second metal (residue) as is known, as shown in figure 10.Because auxiliary electrode 64 is electrically connected to pixel electrode 62, make the short circuit of 54 of auxiliary electrode 64 and data lines cause can't operating of pixel electrode 56.
In the present embodiment, carry out a cutting technology, as laser cutting parameter, pixel electrode 62 is divided into discrete each other one first 621 and 1 second part 622 partly with defective 66.Then, partly 622 be electrically connected to sweep trace 52 by laser bonding with second at K point place.Because it is isolated to have first part, 621 and second part 622 of defective 66, and second partly 622 is electrically connected to sweep trace 52, will have a voltage difference between second part 622 of pixel electrode 62 and the common electrode of colored filter substrate (not shown), the effect of defective 66 can be eliminated.
Please refer to Figure 11.Figure 11 repairs the method synoptic diagram of the defective on the array base palte that is positioned at display panels for fourth embodiment of the invention.The also the same LCD of setting forth the type of storage capacitors on common line of present embodiment, so the identical label sign of similar elements use with first embodiment, and the part that repeats repeats no more.As shown in figure 11, provide array basal plate 30.Array base palte 30 includes a defective 48, is positioned at the storage capacitors zone.For instance, as discussed previously, defective 48 can be the damaged or particulate of dielectric layer that causes short circuit between pixel electrode 42 and the common line 40.The array base palte 30 of present embodiment does not comprise the aforementioned connection bridge that is arranged at each pixel region 36.
Subsequently, finish pixel electrode 42 that a cutting technology will have a defective 48 divide into discrete each other one include defective 48 first partly 421 and one distant likeness, one U type structure (or C type structure) second partly 422.In cutting technique, please note that common line 40 also is cut out, partly kept apart with other so have the part of the common line 40 of defective 48.
Then, be electrically connected first part 421 of pixel electrode 42 to one scan line 32 at L point place by welding, and respectively at second 422 the dual-side partly of the two-end-point of corresponding U type structure, as M point and N point place, be electrically connected second part 422 of pixel electrode 42 to common line 40 corresponding to second part 422 by welding.In the present embodiment, first part 421 to the sweep trace 32 that is electrically connected pixel electrode 42 can be eliminated fleck defect.On the other hand, be electrically connected second part 422 to common line 40 (promptly with second part, 422 replacement circuits), but the pixel region 36 of shared identical common line 40 is with normal operation as common line 40 with defective 48.
The above only is the preferred embodiments of the present invention, and all equalizations of doing according to claims of the present invention change and modify, and all should fall within the scope of protection of the present invention.
Claims (28)
1, a kind of method of repairing defects of liquid crystal display panel includes:
Array basal plate is provided, includes:
A plurality of sweep traces and a plurality of data lines, be arranged on the described array base palte, define a plurality of pixel regions jointly, and at least one described pixel region includes a transistor, a pixel electrode, is electrically connected to described transistorized source, a storage capacitors, described storage capacitors has a top electrode and a bottom electrode, and wherein said pixel electrode is electrically coupled to described storage capacitors; And
One defective is arranged in described storage capacitors;
Carry out a cutting technology described pixel electrode is divided into discrete each other one first part and one second part, described first part of wherein said pixel electrode is corresponding to the described storage capacitors with described defective; And
Described second of described pixel electrode partly is electrically connected to a described sweep trace.
2, the method for claim 1, wherein described bottom electrode some that is described sweep trace, and described top electrode is electrically coupled to described pixel electrode.
3, the method for claim 1, wherein described array base palte also includes a plurality of common lines, and described bottom electrode is the some of described common line, and the some of the described very described pixel electrode that powers on.
4, the method for claim 1, wherein described storage capacitors also includes a middle layer, be arranged between described top electrode and the described bottom electrode, and described defective is arranged in described middle layer.
5, method as claimed in claim 3, wherein, described defective is a metal residue, makes described top electrode be electrically connected to described data line.
6, method as claimed in claim 3, wherein, described defective is that to be positioned at a common line of described common line damaged.
7, method as claimed in claim 3, wherein, described cutting technique also include with described pixel electrode divide into one be not connected to described first partly with described second partly the 3rd partly, and described the 3rd part is electrically connected to another described sweep trace.
8, method as claimed in claim 7 wherein, is carried out described cutting technique and is: cuts described pixel electrode described pixel electrode is divided into described first partly, described second partly and the described the 3rd partly by the dual-side along described common line.
9, method as claimed in claim 7, wherein, described pixel region also includes one and connects bridge, and connects the described the 3rd and partly to the step of another described sweep trace be: be electrically connected the described the 3rd partly to described connection bridge and the described bridge that is connected of electrical connection to another described sweep trace.
10, method as claimed in claim 6, wherein, described cutting technique also include with described pixel electrode divide into one be not connected to described first partly or described second partly the 3rd partly, be electrically connected the described the 3rd then partly to another described sweep trace, and be electrically connected described first partly to having the damaged described common line of described common line.
11, method as claimed in claim 10, wherein, described pixel region also includes one and connects bridge, and connects the described the 3rd and partly to the step of another described sweep trace be: be electrically connected the described the 3rd partly to described connection bridge and the described bridge that is connected of electrical connection to another described sweep trace.
12, method as claimed in claim 10, wherein, described common line has two and interrupts side portion, it is respectively one first and interrupts side portion and one second interruption side portion, and connecting described first partly to the step of described common line is: weld described first respectively and interrupt described common line and the described first of side portion, and weld the described second described common line and described first part of interrupting side portion.
13, the method for claim 1, wherein described cutting technique is a laser cutting parameter.
14, described second part to the step of described sweep trace that the method for claim 1, wherein connects described pixel electrode is reached by laser bonding.
15, described second part to the step of described sweep trace that the method for claim 1, wherein connects described pixel electrode utilizes welding described source/drain of electrical connection and described sweep trace to reach.
16, a kind of method of repairing defects of liquid crystal display panel includes:
Array basal plate is provided, includes:
A plurality of sweep traces and a plurality of data lines, be arranged at described array base palte top, define a plurality of pixel regions jointly, and at least one described pixel region includes a transistor, a pixel electrode, is electrically connected to described transistorized source, a storage capacitors, described storage capacitors has a top electrode and a bottom electrode, the some of the wherein said very described pixel electrode that powers on;
A plurality of common lines, wherein said bottom electrode are the some of described common line; And
One defective is arranged in described storage capacitors;
Carry out described pixel electrode that a cutting technology will have a described storage capacitors of described defective and divide into discrete each other one first partly and one second partly, and will described common line partly insulate corresponding to other of the part of described first part and described common line;
Described first part that is electrically connected described pixel electrode is to a described sweep trace; And
Be electrically connected described second partly to the part of described common line corresponding to described second part.
17, method as claimed in claim 16, wherein, described second of described pixel electrode is a U type structure or C type structure partly.
18, method as claimed in claim 16, wherein, described first part to the step of described sweep trace that connects described pixel electrode utilizes welding described source/drain of electrical connection and described sweep trace to reach.
19, method as claimed in claim 17, wherein, connect described second partly to other of described common line partly be partly to reach with described second by the part of welding corresponding described U type structure of described common line or C type structure two-end-point.
20, a kind of display panels includes:
Array basal plate;
A plurality of sweep traces and a plurality of data lines, be arranged at described array base palte top, define a plurality of pixel regions jointly, and at least one described pixel region includes a transistor, a pixel electrode, is electrically connected to described transistorized source, a storage capacitors, described storage capacitors has a top electrode and a bottom electrode, and wherein said pixel electrode is electrically coupled to described storage capacitors; And
One defective is arranged in described storage capacitors;
Wherein said pixel electrode includes discrete each other one first partly, corresponding to the described storage capacitors that includes described defective, with one second part; And
Described second of wherein said pixel electrode partly is electrically connected to a described sweep trace.
21, display panels as claimed in claim 20, wherein, described bottom electrode is the some of described sweep trace, and described top electrode is electrically coupled to described pixel electrode.
22, display panels as claimed in claim 20, wherein, described array base palte also includes a plurality of common lines, and described bottom electrode is the some of described common line, and the some of the described very described pixel electrode that powers on.
23, display panels as claimed in claim 20, wherein, described storage capacitors includes a middle layer, be arranged between described top electrode and the described bottom electrode, and described defective is positioned at described middle layer.
24, display panels as claimed in claim 22, wherein, described pixel electrode also includes one the 3rd and partly is not connected to described first part and described second part, and the described the 3rd partly is electrically connected to another described sweep trace.
25, display panels as claimed in claim 34, wherein, described pixel electrode also includes one the 3rd and partly is not connected to described first part and described second part, and the described the 3rd partly is electrically connected to another described sweep trace, and described first partly is electrically connected to described common line.
26, display panels as claimed in claim 25, wherein, described pixel region also includes one and connects bridge, and the described the 3rd partly with being connected to of another described sweep trace: by being electrically connected the described the 3rd partly and described bridge and described bridge and another the described sweep trace of being connected of electrical connection of being connected.
27, a kind of display panels includes:
Array basal plate;
A plurality of sweep traces and a plurality of data lines, be arranged at described array base palte top, define a plurality of pixel regions jointly, and at least one described pixel region includes a transistor, a pixel electrode, is electrically connected to described transistorized source, a storage capacitors, described storage capacitors has a top electrode and a bottom electrode, and wherein said pixel electrode is electrically coupled to described storage capacitors;
A plurality of common lines, wherein said bottom electrode are the some of described common line;
One defective is arranged in described storage capacitors, and corresponding to a described common line;
Wherein said pixel electrode includes discrete each other one first partly, and corresponding to the described storage capacitors that includes described defective, and one second partly, and described common line partly insulate corresponding to described first partly other of part and described common line;
First of wherein said pixel electrode partly is electrically connected to described sweep trace; And
Wherein said second partly is electrically connected to the described common line corresponding to described second part.
28, display panels as claimed in claim 27, wherein, described second of described pixel electrode is a U type structure or a C type structure partly.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200710127442A CN100587575C (en) | 2007-07-05 | 2007-07-05 | Liquid crystal display panel and its mending method |
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| CN200710127442A CN100587575C (en) | 2007-07-05 | 2007-07-05 | Liquid crystal display panel and its mending method |
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| Application Number | Title | Priority Date | Filing Date |
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| CN200910225002XA Division CN101706636B (en) | 2007-07-05 | 2007-07-05 | Liquid crystal display (LCD) panel and remedying method thereof |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015100836A1 (en) * | 2013-12-31 | 2015-07-09 | 深圳市华星光电技术有限公司 | Thin film transistor array substrate, liquid crystal display panel, and method for repairing liquid crystal display panel |
| CN104166289B (en) * | 2014-08-29 | 2017-03-29 | 南京中电熊猫液晶显示科技有限公司 | TFT LCD arrays substrate and its manufacture method |
| CN110609425A (en) * | 2019-09-29 | 2019-12-24 | 成都中电熊猫显示科技有限公司 | Array substrate, panel, repairing method and display panel |
-
2007
- 2007-07-05 CN CN200710127442A patent/CN100587575C/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015100836A1 (en) * | 2013-12-31 | 2015-07-09 | 深圳市华星光电技术有限公司 | Thin film transistor array substrate, liquid crystal display panel, and method for repairing liquid crystal display panel |
| CN104166289B (en) * | 2014-08-29 | 2017-03-29 | 南京中电熊猫液晶显示科技有限公司 | TFT LCD arrays substrate and its manufacture method |
| CN110609425A (en) * | 2019-09-29 | 2019-12-24 | 成都中电熊猫显示科技有限公司 | Array substrate, panel, repairing method and display panel |
| CN110609425B (en) * | 2019-09-29 | 2022-08-12 | 成都中电熊猫显示科技有限公司 | Array substrate, panel, repairing method and display panel |
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| CN100587575C (en) | 2010-02-03 |
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