CN101324869B - 一种基于axi总线的多路复用器 - Google Patents
一种基于axi总线的多路复用器 Download PDFInfo
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- CN101324869B CN101324869B CN200810116126XA CN200810116126A CN101324869B CN 101324869 B CN101324869 B CN 101324869B CN 200810116126X A CN200810116126X A CN 200810116126XA CN 200810116126 A CN200810116126 A CN 200810116126A CN 101324869 B CN101324869 B CN 101324869B
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CN200810116126XA CN101324869B (zh) | 2008-07-03 | 2008-07-03 | 一种基于axi总线的多路复用器 |
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CN200810116126XA CN101324869B (zh) | 2008-07-03 | 2008-07-03 | 一种基于axi总线的多路复用器 |
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CN101324869A CN101324869A (zh) | 2008-12-17 |
CN101324869B true CN101324869B (zh) | 2010-04-14 |
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Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101741722A (zh) * | 2009-12-10 | 2010-06-16 | 中兴通讯股份有限公司 | 数据交互方法及装置 |
CN102103564B (zh) * | 2009-12-22 | 2013-08-07 | 中兴通讯股份有限公司 | 用于实现总线连接的方法及系统 |
CN102135946A (zh) * | 2010-01-27 | 2011-07-27 | 中兴通讯股份有限公司 | 一种数据处理方法和装置 |
CN102025934B (zh) * | 2010-10-15 | 2012-01-11 | 西安交通大学 | 基于AXI总线的数字电视SoC的存储控制方法 |
CN102736997B (zh) * | 2011-04-01 | 2017-05-03 | 中兴通讯股份有限公司 | 一种片上互联总线的仲裁方法和系统 |
WO2011137813A2 (zh) | 2011-05-24 | 2011-11-10 | 华为技术有限公司 | 先进可扩展接口总线以及相应的数据传输方法 |
CN105634661A (zh) * | 2014-11-05 | 2016-06-01 | 华为技术有限公司 | 传输信号的装置、传输链路和传输信号的方法 |
CN109828938B (zh) * | 2018-12-13 | 2021-09-03 | 山东亚华电子股份有限公司 | 一种基于芯片的通信方法和装置 |
CN109947580A (zh) * | 2019-03-27 | 2019-06-28 | 上海燧原智能科技有限公司 | 中断处理方法、装置、设备和存储介质 |
CN112368676A (zh) * | 2019-09-29 | 2021-02-12 | 深圳市大疆创新科技有限公司 | 处理数据的方法和设备 |
CN111752881A (zh) * | 2020-06-22 | 2020-10-09 | 深圳鲲云信息科技有限公司 | 一种模块间通信方法及系统 |
CN112559399A (zh) * | 2020-11-27 | 2021-03-26 | 山东云海国创云计算装备产业创新中心有限公司 | 一种多axi接口的ddr控制器及其控制方法 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5553249A (en) * | 1995-03-08 | 1996-09-03 | Unisys Corporation | Dual bus adaptable data path interface system |
US5687371A (en) * | 1993-09-27 | 1997-11-11 | Intel Corporation | Selection from a plurality of bus operating speeds for a processor bus interface during processor reset |
CN1189956A (zh) * | 1996-03-19 | 1998-08-05 | 索尼公司 | 数据多路复用装置及其方法 |
CN1516030A (zh) * | 2003-01-15 | 2004-07-28 | 威盛电子股份有限公司 | 重排多个数据存取指令的方法与装置 |
US7254657B1 (en) * | 2005-04-29 | 2007-08-07 | Unisys Corporation | Dual mode capability for system bus |
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5687371A (en) * | 1993-09-27 | 1997-11-11 | Intel Corporation | Selection from a plurality of bus operating speeds for a processor bus interface during processor reset |
US5553249A (en) * | 1995-03-08 | 1996-09-03 | Unisys Corporation | Dual bus adaptable data path interface system |
CN1189956A (zh) * | 1996-03-19 | 1998-08-05 | 索尼公司 | 数据多路复用装置及其方法 |
CN1516030A (zh) * | 2003-01-15 | 2004-07-28 | 威盛电子股份有限公司 | 重排多个数据存取指令的方法与装置 |
US7254657B1 (en) * | 2005-04-29 | 2007-08-07 | Unisys Corporation | Dual mode capability for system bus |
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