CN101312018A - Method for driving display panel - Google Patents
Method for driving display panel Download PDFInfo
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- CN101312018A CN101312018A CNA2007101041884A CN200710104188A CN101312018A CN 101312018 A CN101312018 A CN 101312018A CN A2007101041884 A CNA2007101041884 A CN A2007101041884A CN 200710104188 A CN200710104188 A CN 200710104188A CN 101312018 A CN101312018 A CN 101312018A
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Abstract
The invention relates to a driving method for a display panel. Firstly, a first gate line is enabled and first data is provided to sub-pixel coupled with the first gate line at the first moment. Then, the first gate line is enabled and second data is provided to the sub-pixel coupled with the first gate line at the second time, wherein, the second time is after the first moment and the second data is the displayed data of the coupled sub-pixel by the first gate line and the first data is the displayed data of the coupled sub-pixel by the second gate line.
Description
Invention field
The present invention relates to a kind of driving method, and relate in particular to a kind of driving method of display panel.
Technical background
Generally when confirming the picture quality of display panels, all can adopt a kind of display frame that is called single-point check pattern (check 1-dot pattern) to judge, as shown in Figures 1 and 2.For convenience of description, the display panel of the following stated all adopts normality to deceive picture (normally black) display mode.
Single-point when Fig. 1 and Fig. 2 are presented at N and N+1 picture respectively check patterns, and the sub-pixel that is all coupled with K bar gate line in the display panel and K+1 bar gate line is example, wherein N and K are natural number.In Fig. 1 and Fig. 2, R, G and B are expressed as respectively and show red, green and blue sub-pixel (sub-pixel), + number expression is loaded into the voltage of video data of this sub-pixel greater than the common electric potential of this sub-pixel, and-number expression is loaded into the voltage of video data of this sub-pixel less than the common electric potential of this sub-pixel.All represent a pixel (pixel) as for each light areas and each darker regions, and the brightness of light areas is greater than the brightness of darker regions, and the voltage swing of the loaded video data of pixel that is to say light areas is greater than the voltage swing of the loaded video data of pixel of darker regions.
Yet, under situation about display frame being judged,, will make picture produce colour cast if display panel still uses known gate line type of drive (promptly in same picture cycle each gate line of activation in regular turn once) with single-point check pattern.Why can produce color offset phenomenon, get the hardware configuration of understanding each sub-pixel earlier, and then do explanation at the well-known operations mode of each pixel.
Fig. 3 is the hardware configuration of each TN-Mode sub-pixel.In Fig. 3, indicate 301 and 302 expression source electrode lines (source line), 303 and 304 expression gate lines (gate line), 305～307 expression thin film transistor (TFT) (thin film transistor, TFT) the common electric potential line of array base palte side, 308 remarked pixel electrodes, 309 expression one thin film transistor (TFT)s.Fig. 4 is the equivalent circuit diagram of structure shown in Figure 3.In Fig. 4, indicate 301,302,303,304 and 309 correspondences that are respectively among Fig. 3 and indicate the object of being censured, be expressed as the current potential of common electric potential line 305～307 as for AVcom, CVcom then is expressed as the common electric potential of the subtend substrate of thin-film transistor array base-plate, i.e. the common electric potential of colorized optical filtering (color filter) substrate-side.Indicate 401 expression source electrode lines 301 to the stray capacitance between the common electric potential AVcom, 402 expression source electrode lines 302 are to the stray capacitance between the common electric potential AVcom, storage capacitors between 403 remarked pixel electrodes 308 and the common electric potential 305～307,404 liquid crystal capacitances between remarked pixel electrode 308 and the subtend substrate then.
Can know that by the equivalent electrical circuit that Fig. 4 is shown when making thin film transistor (TFT) 309 conductings when gate line 304 activations, the signal on the source electrode line 302 just can influence the accurate position of common electric potential AVcom by storage capacitors 403.Below with Fig. 5 Fig. 1 that arranges in pairs or groups, and with the arrange in pairs or groups formation reason of the inclined to one side phenomenon of light colour Fig. 2 of Fig. 6, and only with among Fig. 1 and Fig. 2, the more serious light areas of color offset phenomenon is done explanation.
Fig. 5 is the operation signal waveform key diagram of the wherein light areas of Fig. 1.Please refer to Fig. 5, wherein G1 represents K+1 bar gate line current potential, when the gate line voltage G 1 of the sub-pixel that couples this light areas indication presented noble potential (high), the source electrode line that couples these sub-pixels just was written into video data VR, VG and VB respectively to red sub-pixel R, green sub-pixels G and blue subpixels B.Yet at this moment, because video data VR and VB all are by the negative potential current potential of becoming a full member, but only there is video data VG to change negative potential by positive potential alone, and these video datas VR, VG and VB influence the accurate position of common electric potential AVcom respectively by the storage capacitors 403 among red sub-pixel R, green sub-pixels G and the blue subpixels B, and then make accurate the direction of common electric potential AVcom promote toward positive polarity, just return to accurate of script up to time point T.
As shown in Figure 5, when gate line voltage G1 transfers electronegative potential (low) to by noble potential, the pressure reduction of video data VR and VB the two and common electric potential CVcom, can be less than the pressure reduction of video data VG and common electric potential CVcom, make the brightness of green sub-pixels G than red sub-pixel R and blue subpixels B come bright, therefore cause the shown picture of this light areas green partially.
Fig. 6 is the operation signal waveform key diagram of the wherein light areas of Fig. 2.Please refer to Fig. 6, wherein G1 represents K+1 bar gate line current potential, when the gate line voltage G1 of the sub-pixel that couples this light areas indication presented noble potential, the source electrode line that couples these sub-pixels just was written into video data VR, VG and VB respectively to red sub-pixel R, green sub-pixels G and blue subpixels B.Yet at this moment, because video data VR and VB change negative potential by positive potential, video data VG is but only arranged alone by the negative potential current potential of becoming a full member, and these video datas VR, VG and VB influence the accurate position of common electric potential AVcom respectively by the storage capacitors 403 among red sub-pixel R, green sub-pixels G and the blue subpixels B, and then make accurate the direction of common electric potential AVcom reduce toward negative polarity, just return to accurate of script up to time point T.
As shown in Figure 6, when gate line voltage G1 transfers electronegative potential to by noble potential, therefore the pressure reduction of video data VR and VB the two and common electric potential CVcom also can still cause the shown picture of this light areas green partially less than the pressure reduction of video data VG and common electric potential CVcom.
Summary of the invention
Purpose of the present invention just provides a kind of driving method of display panel, to improve the color offset phenomenon of display panel, improves quality of display pictures.
Based on above-mentioned and other purpose, the present invention proposes a kind of driving method of display panel.At first, in the very first time, activation one first grid polar curve, and provide first data to the sub-pixel that couples first grid polar curve.Then, in second time, activation first grid polar curve, and provide second data to the sub-pixel that couples first grid polar curve.Wherein and second data were the video data of the sub-pixel that coupled of first grid polar curve after the very first time second time, and the video data of the sub-pixel that first data are a second grid line to be coupled.
Described according to one embodiment of the invention, the above-mentioned very first time and second time are very first time length, and the difference of the very first time and second time is second time span, and second time span is the odd-multiple of very first time length.
Described according to another embodiment of the present invention, the above-mentioned very first time and second time are very first time length, and the difference of the very first time and second time is second time span, and second time span equals very first time length.The step of this driving method also was included in for the 3rd time, activation second grid line, and provide the 3rd data to the sub-pixel that couples the second grid line.Then, in the above-mentioned very first time, activation second grid line, and provide above-mentioned first data to the sub-pixel that couples the second grid line.Wherein, the very first time, the 3rd time was very first time length after the 3rd time, and the difference of the 3rd time and the very first time is second time span, and the 3rd data are the video data of the sub-pixel that coupled of one the 3rd gate line.In the 4th time, activation 1 the 4th gate line, and provide the 4th data to the sub-pixel that couples the 4th gate line.Then, in the 5th time, activation the 4th gate line, and provide the 5th data to the sub-pixel that couples the 4th gate line.Wherein, the 4th time and the 5th time are very first time length, the 4th time is between the 3rd time and the very first time, the 5th time is between the very first time and second time, and the 5th data are the video data of the sub-pixel that coupled of the 4th gate line, and the video data of the sub-pixel that the 4th data are one the 5th gate line to be coupled.
Described according to an embodiment more of the present invention, the above-mentioned very first time and second time are very first time length, and the difference of the very first time and second time is second time span, and second time span is three times a very first time length.The step of this driving method also was included in for the 3rd time, activation second grid line, and provide the 3rd data to the sub-pixel that couples the second grid line.Then, in the above-mentioned very first time, activation second grid line, and provide above-mentioned first data to the sub-pixel that couples the second grid line.Wherein, the very first time, the 3rd time was very first time length after the 3rd time, and the difference of the 3rd time and the very first time is second time span, and the 3rd data are the video data of the sub-pixel that coupled of one the 3rd gate line.In the 4th time, activation 1 the 4th gate line, and provide the 4th data to the sub-pixel that couples the 4th gate line.Then, in the 5th time, activation the 4th gate line, and provide the 5th data to the sub-pixel that couples the 4th gate line.Wherein, the 4th time and the 5th time are very first time length, the 4th time abutted against after the 3rd time, the 5th time abutted against after the very first time, and the 5th data are the video data of the sub-pixel that coupled of the 4th gate line, and the video data of the sub-pixel that the 4th data are one the 5th gate line to be coupled.In the 6th time, activation 1 the 6th gate line, and provide the 6th data to the sub-pixel that couples the 6th gate line.Then, in the 7th time, activation the 6th gate line, and provide the 7th data to the sub-pixel that couples the 6th gate line.Wherein, the 6th time and the 7th time are very first time length, the 6th time abutted against after the 4th time, the 7th time abutted against after the 5th time, and the 7th data are the video data of the sub-pixel that coupled of the 6th gate line, and the video data of the sub-pixel that the 6th data are one the 7th gate line to be coupled.In the 8th time, activation 1 the 8th gate line, and provide the 8th data to the sub-pixel that couples the 8th gate line.Then, in the 9th time, activation the 8th gate line, and provide the 9th data to the sub-pixel that couples the 8th gate line.Wherein, the 8th time and the 9th time are very first time length, the 8th time abutted against after the 6th time, the 9th time abutted against after the 7th time, and the 9th data are the video data of the sub-pixel that coupled of the 8th gate line, and the video data of the sub-pixel that the 8th data are one the 9th gate line to be coupled.
Described according to another embodiment of the present invention, the above-mentioned very first time and second time are very first time length, and the difference of the very first time and second time is zero.
The step of this driving method also was included in for the 3rd time, and activation second grid line also provides the 3rd data to the sub-pixel that couples the second grid line.Then, in the very first time, activation second grid line, and provide first data to the sub-pixel that couples the second grid line.Wherein, the 3rd time was very first time length, and the very first time abutted against after the 3rd time, and the 3rd data are the video data of the sub-pixel that coupled of one the 3rd gate line.
Described according to an embodiment more of the present invention, the above-mentioned very first time is a very first time length, and second time was second time span, and the difference of the very first time and second time is zero.The step of this driving method also was included in for the 3rd time, activation second grid line, and provide the 3rd data to the sub-pixel that couples the second grid line.In the very first time, activation second grid line, and provide first data to the sub-pixel that couples the second grid line.Wherein, the 3rd time was second time span, and the very first time abutted against after the 3rd time, and the 3rd data are the video data of the sub-pixel that coupled of one the 3rd gate line.
The present invention is because in the very first time, activation first grid polar curve, and provide first data to the sub-pixel that couples first grid polar curve.Then, in second time, activation first grid polar curve, and provide second data to the sub-pixel that couples first grid polar curve.And the second above-mentioned time is after the very first time, and the video data of the sub-pixel that second data are first grid polar curve to be coupled, and first data are the video data of the sub-pixel that coupled of a second grid line.Therefore, the very first time, the storage capacitors 403 that couples in the sub-pixel of first grid polar curve has just stored the voltage that first data are provided earlier, and when the sub-pixel that couples first grid polar curve is written into its required video data (i.e. second data), because first data and second data pressure reduction and not quite between the two, therefore second data just can not influence the accurate position of AVcom by the storage capacitors in the sub-pixel 403, cause the pressure reduction of video data VR, VG and VB three and common electric potential AVcom all can be the same.Like this, when showing real picture, just can avoid colour cast to take place.
For above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below.
Description of drawings
Single-point check patterns when Fig. 1 and Fig. 2 are presented at N and N+1 picture respectively;
Fig. 3 is the hardware configuration of sub-pixel;
Fig. 4 is the equivalent circuit diagram of structure shown in Figure 3;
Fig. 5 is the operation signal waveform key diagram of the wherein light areas of Fig. 1;
Fig. 6 is the operation signal waveform key diagram of the wherein light areas of Fig. 2;
Fig. 7 is the gate line signal according to one embodiment of the invention;
Fig. 8 is the gate line signal sequence synoptic diagram according to the gate line signal of Fig. 7;
Fig. 9 is the gate line signal according to another embodiment of the present invention;
Figure 10 is the gate line signal sequence synoptic diagram according to the gate line signal of Fig. 9;
Figure 11 is the gate line signal according to further embodiment of this invention;
Figure 12 is the gate line signal sequence synoptic diagram according to the gate line signal of Figure 11;
Figure 13 is the process flow diagram according to the driving method of the display panel of one embodiment of the invention.
[main element symbol description]
301,302: source electrode line
303,304, K, K-1, K-2, K-3, K-4: gate line
305,306,307: the common electric potential line
308: pixel electrode
309: thin film transistor (TFT)
401,402: stray capacitance
403: storage capacitors
404: liquid crystal capacitance
701,702,801,802,803,804,805,901,902,1101,1102: pulse
1301,1302: step
AVcom, CVcom: common electric potential
B: blue subpixels
G: green sub-pixels
G1: gate line voltage
R: red sub-pixel
T: time point
T1, T2, T3: time span
VR, VG, VB: video data
Embodiment
For convenience of description, the display panels of the following stated all adopts normality to deceive the picture display mode, and picture displayed is single-point check pattern (check 1-dot or title checksubpixel), yet it will be appreciated by those skilled in the art that utilization of the present invention is not as limit.
Fig. 7 is the gate line signal according to one embodiment of the invention.In Fig. 7, indicate 701 expression gate line pulses originally, 702 expression compensated pulses, and compensated pulse 702 and gate line pulse 701 the two institute's interlude length are T2, the two time span of gate line pulse 701 and compensated pulse 702 is T1, and T2 equals T1.Why adopt such gate line signal, please refer to the explanation of Fig. 8.
Fig. 8 is the sequential synoptic diagram of the gate line signal of display panel, and it adopts gate line signal shown in Figure 7, and enumerates the gate line signal of four adjacent gate lines K-3～K.All source electrode lines of supposing display panel are all according to the driving order of gate line K-3～K, and correspondence provides the video data of the sub-pixel that driven gate line couples.Can find by Fig. 8 that so when the gate line pulse 801 of K-3 bar gate line presented noble potential, K-3 bar gate line was enabled, and the compensated pulse 802 of K-1 bar gate line also presents noble potential at this moment, makes K-1 bar gate line also be enabled.Because this moment, all source electrode lines equal correspondences provided the video data of the sub-pixel that K-3 bar gate line coupled, therefore the sub-pixel that coupled of K-1 bar gate line also can receive identical video data.That is to say that the storage capacitors 403 (as shown in Figure 4) in each sub-pixel that K-1 bar gate line is coupled can be stored into the video data of the corresponding sub-pixel that K-3 bar gate line coupled.
Like this, when the gate line pulse 803 of K-1 bar gate line also presents noble potential, because this moment, all source electrode lines equal correspondences provided the video data of the sub-pixel that K-1 bar gate line coupled, yet the sub-pixel that K-1 bar gate line is coupled has stored aforesaid video data, therefore only need a spot of variation in voltage just can reach the voltage swing that really will show, so the time loaded video data just can influence the accurate position of AVcom hardly by the storage capacitors in the sub-pixel 403, and then make that the pressure reduction of video data and common electric potential AVcom of each sub-pixel all can be the same, take place so when activation K-1 bar gate line, just do not have the situation of colour cast.Same reason, the gate line pulse 804 of K-2 bar gate line and the compensated pulse 805 of K bar gate line be activation simultaneously also, and the situation that does not therefore also have colour cast when activation K bar gate line takes place.If total gate line all adopts method shown in Figure 8, the colour cast that just can significantly improve display panel and taken place.
In like manner, by the teaching of Fig. 8, can be the odd-multiple (for example shown in Figure 9) of T1 also with compensated pulse and the two institute's interlude Design of length of gate line pulse, it can improve the problem of display frame colour cast equally.
Fig. 9 is the gate line signal according to another embodiment of the present invention.In Fig. 9, indicate 901 expression gate line pulses originally, 902 expression compensated pulses, and compensated pulse 902 and gate line pulse 901 the two institute's interlude length are T3, the two time span of gate line pulse 901 and compensated pulse 902 is T1, and T3 approximates three times T1.
Figure 10 is the sequential synoptic diagram of the gate line signal of display panel, and it adopts gate line signal shown in Figure 9, and enumerates the gate line signal of five adjacent gate lines K-4～K.Because method shown in Figure 10 and method shown in Figure 8 are extremely similar, the user just repeats no more at this when understanding the rest by analogy.
Based on Fig. 8 and the described design concept of Figure 10, can also expand another kind of embodiment, it can avoid display panel generation colour cast equally, as shown in figure 11.Figure 11 is the gate line signal according to further embodiment of this invention.In Figure 11, indicate 1101 expression gate line pulses originally, 1102 expression compensated pulses, the two time span of gate line pulse 1101 and compensated pulse 1102 is T1, and compensated pulse 1102 and gate line pulse 1101 the two institute's interlude length are zero.In other words, exactly the pulse width of gate line pulse is originally widened.Figure 12 is the sequential synoptic diagram of the gate line signal of display panel, and it adopts gate line signal shown in Figure 11, and enumerates the gate line signal of four adjacent gate lines K-3～K.
Certainly, gate line signal shown in Figure 11 is that gate line pulse 1101 width are originally added two times of greatly former width, right in the described method of Figure 12, the user, equally can implement as long as the width that is increased is the multiple of the pulse width of script gate line pulse 1101 when understanding.
By the teaching of the various embodiments described above, can summarize a general principle, as shown in figure 13.Figure 13 is the process flow diagram according to the driving method of the display panel of one embodiment of the invention.Please refer to Figure 13, at first, in the very first time, activation first grid polar curve, and provide first data to the sub-pixel that couples first grid polar curve (shown in step 1301).Then, in second time, activation first grid polar curve, and provide second data to the sub-pixel that couples first grid polar curve.Wherein and second data were the video data of the sub-pixel that coupled of first grid polar curve after the very first time second time, and the video data (shown in step 1302) of the sub-pixel that first data are the second grid line to be coupled.
Though the various embodiments described above teaching the part embodiment, but those of ordinary skills should know, the present invention can be used in the white display mode of normality equally, and also can apply to show general picture, and non-limiting is used to show when single-point is checked pattern.
In sum, the present invention is because before gate line pulse originally, added a compensated pulse again, or with gate line pulse widening originally, in making at one time, have two gate lines and be enabled simultaneously, so that gate line wherein, the sub-pixel that it coupled can receive the video data of the corresponding sub-pixel that another gate line couples.Therefore, by the gate line of compensated pulse activation, storage capacitors 403 in each sub-pixel that it coupled can store some voltages earlier, when this gate line during again by gate line pulse activation one time, all source electrode lines just in time can be exported the required video data of sub-pixel that this gate line couples, so each sub-pixel that gate line coupled only needs minimum variation in voltage, just can reach required voltage quasi position.So when driving this gate line, just can avoid colour cast to take place.
Though the present invention discloses as above with preferred embodiment; but it is not in order to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; can make suitable change and retouching, so protection scope of the present invention is when being as the criterion with the scope that appending claims was defined.
Claims (17)
1, a kind of driving method of display panel, it applies to show single-point check pattern, this method comprises:
In a very first time, activation one first grid polar curve, and provide one first data to the sub-pixel that couples this first grid polar curve; And
In one second time, this first grid polar curve of activation, and provide one second data to the sub-pixel that couples this first grid polar curve,
Wherein this second time after this very first time, and the video data of the sub-pixel that coupled for this first grid polar curve of these second data.
2, the method for claim 1, wherein these first data are the video data of the sub-pixel that coupled of a second grid line.
3, the method for claim 1, wherein should the very first time and the time span of this second time be equal to each other.
4, method as claimed in claim 3, wherein should the very first time and this second time time span of being separated by be the odd-multiple of the time span of this very first time.
5, method as claimed in claim 2 also comprises:
In one the 3rd time, this second grid line of activation, and provide one the 3rd data to the sub-pixel that couples this second grid line; And
In this very first time, this second grid line of activation, and provide these first data to the sub-pixel that couples this second grid line,
Wherein should the very first time after the 3rd time.
6, method as claimed in claim 5, wherein should the very first time and the time span of the 3rd time be equal to each other.
7, method as claimed in claim 6, wherein should the very first time and the 3rd time time span of being separated by be the odd-multiple of the time span of this very first time.
8, method as claimed in claim 5 wherein should the very first time, the time span of this second time and the 3rd time is equal to each other.
9, the method for claim 1 also comprises:
In one the 4th time, activation 1 the 3rd gate line, and provide one the 4th data to the sub-pixel that couples the 3rd gate line; And
In one the 5th time, activation the 3rd gate line, and provide one the 5th data to the sub-pixel that couples this first grid polar curve,
The video data of the sub-pixel that coupled for the 3rd gate line of the 5th data wherein, and should the very first time, this second time, the 4th time and the 5th time non-overlapping each other.
10, method as claimed in claim 9, wherein the time span of the 4th time and the 5th time is equal to each other.
11, method as claimed in claim 9 wherein should the very first time, the time span of this second time, the 4th time and the 5th time is equal to each other.
12, method as claimed in claim 11, wherein should the very first time and this second time time span of being separated by be the odd-multiple of the time span of the 4th time.
13, the method for claim 1, wherein should the very first time and length interval time of this second time be zero.
14, method as claimed in claim 5, wherein should the very first time and length interval time of this second time be zero, and should the very first time and length interval time of the 3rd time also be zero.
15, method as claimed in claim 14 wherein should the very first time, the time span of this second time and the 3rd time is equal to each other.
16, the method for claim 1, wherein this first grid polar curve couples a plurality of pixels, and each pixel comprises a plurality of sub-pixels, and wherein each sub-pixel can show red, green and blue one of them.
17, method as claimed in claim 16, wherein the polarity that is adjacent between sub-pixel of each this sub-pixel is opposite each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101041884A CN101312018A (en) | 2007-05-21 | 2007-05-21 | Method for driving display panel |
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| CNA2007101041884A CN101312018A (en) | 2007-05-21 | 2007-05-21 | Method for driving display panel |
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| CNA2007101041884A Pending CN101312018A (en) | 2007-05-21 | 2007-05-21 | Method for driving display panel |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101763809B (en) * | 2010-01-13 | 2014-02-12 | 友达光电股份有限公司 | Display device and driving method of display panel thereof |
| CN106023939A (en) * | 2016-07-29 | 2016-10-12 | 深圳市华星光电技术有限公司 | Liquid crystal display and driving method thereof |
-
2007
- 2007-05-21 CN CNA2007101041884A patent/CN101312018A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101763809B (en) * | 2010-01-13 | 2014-02-12 | 友达光电股份有限公司 | Display device and driving method of display panel thereof |
| CN106023939A (en) * | 2016-07-29 | 2016-10-12 | 深圳市华星光电技术有限公司 | Liquid crystal display and driving method thereof |
| CN106023939B (en) * | 2016-07-29 | 2019-02-22 | 深圳市华星光电技术有限公司 | Liquid Crystal Display And Method For Driving |
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