CN101311806B - Lower substrate, display apparatus having the same and method of manufacturing the same - Google Patents
Lower substrate, display apparatus having the same and method of manufacturing the same Download PDFInfo
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- CN101311806B CN101311806B CN2008101272775A CN200810127277A CN101311806B CN 101311806 B CN101311806 B CN 101311806B CN 2008101272775 A CN2008101272775 A CN 2008101272775A CN 200810127277 A CN200810127277 A CN 200810127277A CN 101311806 B CN101311806 B CN 101311806B
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- 239000000758 substrate Substances 0.000 title claims abstract description 80
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- 238000009413 insulation Methods 0.000 claims description 119
- 239000012212 insulator Substances 0.000 claims description 64
- 238000000034 method Methods 0.000 claims description 23
- 239000000203 mixture Substances 0.000 claims description 20
- 239000004973 liquid crystal related substance Substances 0.000 claims description 6
- 230000005540 biological transmission Effects 0.000 description 100
- 101150098716 SWA2 gene Proteins 0.000 description 9
- ZIWNJZLXPXFNGN-GXTQQWMXSA-N (z)-7-[(3r,4s)-3-[(e,3s)-3-hydroxyoct-1-enyl]-4-bicyclo[3.1.1]heptanyl]hept-5-enoic acid Chemical compound OC(=O)CCC\C=C/C[C@@H]1[C@@H](/C=C/[C@@H](O)CCCCC)CC2CC1C2 ZIWNJZLXPXFNGN-GXTQQWMXSA-N 0.000 description 7
- 229910021417 amorphous silicon Inorganic materials 0.000 description 6
- 238000005260 corrosion Methods 0.000 description 6
- 230000007797 corrosion Effects 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 101100367244 Arabidopsis thaliana SWA1 gene Proteins 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 239000011651 chromium Substances 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 101150027801 CTA1 gene Proteins 0.000 description 3
- 101100273295 Candida albicans (strain SC5314 / ATCC MYA-2876) CAT1 gene Proteins 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- VVTQWTOTJWCYQT-UHFFFAOYSA-N alumane;neodymium Chemical compound [AlH3].[Nd] VVTQWTOTJWCYQT-UHFFFAOYSA-N 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 2
- 229910000583 Nd alloy Inorganic materials 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000013256 coordination polymer Substances 0.000 description 2
- MGRWKWACZDFZJT-UHFFFAOYSA-N molybdenum tungsten Chemical compound [Mo].[W] MGRWKWACZDFZJT-UHFFFAOYSA-N 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- RNWHGQJWIACOKP-UHFFFAOYSA-N zinc;oxygen(2-) Chemical compound [O-2].[Zn+2] RNWHGQJWIACOKP-UHFFFAOYSA-N 0.000 description 2
- 210000003771 C cell Anatomy 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000000427 thin-film deposition Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
- G02F1/133553—Reflecting elements
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
- Geometry (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
In a lower substrate, a display apparatus having the lower substrate and a method of manufacturing the lower substrate, the lower substrate includes a pixel area and a circuit area. An image is displayed in the pixel area. A first signal electrode is disposed in a circuit area. A first insulating layer includes an opening, through which the first signal electrode is exposed. A second signal electrode is disposed on the first insulating layer in the circuit area, and spaced apart from the first signal electrode. A second insulating layer is disposed on the first insulating layer, and includes a contact hole, through which the first and second signal electrodes are exposed. A conductive layer electrically connects the first signal electrode to the second signal electrode. Therefore, a manufacturing process is simplified so that a yield of the lower substrate is increased.
Description
To be Samsung Electronics Co., Ltd be called " following substrate, have the display device of this time substrate and make the method for this time substrate ", application number in the name of application on October 20th, 2004 to the application is dividing an application of 200410087491.4 application for a patent for invention.
Technical field
The present invention relates to a kind of down substrate, have the display device of following substrate and make the method for this time substrate.More specifically, the present invention relates to a kind of following substrate of boosting productivity, have the display device of this time substrate and make the method for this time substrate.
Background technology
Usually, traditional liquid crystal display (LCD) device comprises substrate, last substrate and the liquid crystal layer between upper and lower substrate down.
Following substrate comprises the peripheral region of viewing area and contiguous this viewing area.A plurality of pixels are arranged on the viewing area, and these pixels are arranged with matrix form.Each pixel comprises gate line, data line, thin film transistor (TFT) (TFT) and pixel electrode.TFT is electrically connected on pixel electrode, gate line and the data line.
One driving voltage is applied on the grid-driving integrated circuit (IC) of gate line and is formed in the peripheral region.Gate driving IC is formed on the layer identical with TFT.When gate driving IC is formed on down on the substrate with TFT, can reduce the volume and the size of LCD device.
Yet gate driving IC is the meeting defectiveness in manufacturing process, may form stray capacitance between gate driving IC and last substrate, thereby the throughput rate of substrate is reduced.
Summary of the invention
The invention provides a kind of following substrate that can boost productivity.
The present invention also provides a kind of above-mentioned display device of substrate down that contains.
The present invention also provides a kind of above-mentioned method of substrate down of making.
Following substrate according to a feature of the present invention comprises pixel region and circuit region.Image shows at pixel region.
First signal electrode is arranged in circuit region.This first signal electrode exposes by the opening of first insulation course.On first insulation course of secondary signal arrangement of electrodes in circuit region, and spaced apart with first signal electrode.Second insulation course is arranged on first insulation course, and comprises contact hole.First and second signal electrodes expose by this contact hole.Conductive layer is electrically connected to the secondary signal electrode with first signal electrode.
According to another feature of the present invention, following substrate comprises pixel region and circuit region.Image shows at pixel region.
First signal electrode is arranged in the circuit region.First signal electrode exposes by the opening of first insulation course.The secondary signal arrangement of electrodes is on first insulation course of circuit region, and is and spaced apart with first signal electrode.Second insulation course is arranged on first insulation course, and comprises first contact hole.First and second signal electrodes expose by this first contact hole.The 3rd insulation course is arranged on second insulation course, and comprises second contact hole.Second insulation course and first and second signal electrodes of contiguous first contact hole expose by second contact hole.Conductive layer is electrically connected to the secondary signal electrode by first and second contact holes with first signal electrode.
According to a feature of the present invention, display device comprises following substrate and corresponding to the last substrate of this time substrate.
This time substrate comprises: first signal electrode that is arranged in circuit region; First insulation course with opening; Secondary signal electrode, this secondary signal arrangement of electrodes are on first insulation course of circuit region and spaced apart with first signal electrode; Second insulation course, this second insulation course are arranged on first insulation course to comprise contact hole; And conductive layer, this conductive layer is electrically connected to the secondary signal electrode by this contact hole with first signal electrode.First signal electrode exposes by the opening of first insulation course.First and second signal electrodes expose by contact hole.
According to another feature of the present invention, display device comprises following substrate and corresponding to the last substrate of this time substrate.
This time substrate comprises: first signal electrode that is arranged in circuit region; First insulation course, this first insulation course comprises opening; Secondary signal electrode, this secondary signal arrangement of electrodes are on first insulation course of circuit region and spaced apart with first signal electrode; Second insulation course, this second insulation course are arranged on first insulation course to comprise first contact hole; The 3rd insulation course, the 3rd insulation course are arranged on second insulation course to comprise second contact hole; And conductive layer, this conductive layer is electrically connected to the secondary signal electrode by first and second contact holes with first signal electrode, and first signal electrode exposes by the opening of first insulation course.This first and second signal electrode exposes by first contact hole on first insulation course.Second insulation course and first and second signal electrodes of contiguous first contact hole expose by second contact hole.
According to a feature of the present invention, provide a kind of method of making down substrate as follows.Following substrate comprises pixel region and circuit region.
First signal electrode is formed in the circuit region.First insulation course is formed on the circuit region with first signal electrode.The secondary signal electrode is formed on first insulation course.The secondary signal electrode and first signal electrode are spaced apart.Second insulation course is formed in the circuit region with first insulation course and secondary signal electrode.With the first and second insulation course compositions to form contact hole.First and second signal wires expose by this contact hole.Form conductive layer, this conductive layer is electrically connected to the secondary signal electrode with first signal electrode.
According to another feature of the present invention, provide a kind of method of making down substrate as follows.Following substrate comprises pixel region and circuit region.
First signal electrode is formed in the circuit region.First insulation course is formed on the circuit region with first signal electrode.The secondary signal electrode is formed on first insulation course.The secondary signal electrode and first signal electrode are spaced apart.Second insulation course is formed on first insulation course and the secondary signal electrode.The 3rd insulation course is formed on second insulation course.With the 3rd insulation course composition to form first contact hole.Second insulation course corresponding to first and second signal electrodes exposes by first contact hole.With the first and second insulation course compositions to form second contact hole.First and second signal wires expose by this contact hole.Second contact hole is littler than first contact hole.Form conductive layer, this conductive layer is electrically connected to the secondary signal electrode with first signal electrode.
Therefore, insulation course comprises opening, and first and second signal electrodes expose by this opening, and first signal electrode is electrically connected to the secondary signal electrode by conductive layer, prevents the conductive layer open circuit corresponding with the contact hole adjacent areas thus.
Description of drawings
By the example embodiment that the reference accompanying drawing is described in detail, above-mentioned and other advantage of the present invention will be more obvious, wherein:
Fig. 1 shows the cross-sectional view according to the reflection and transmission LCD device of example embodiment of the present invention;
Fig. 2 shows the planimetric map according to the reflection and transmission LCD device of example embodiment of the present invention;
Fig. 3 shows the planimetric map according to the grid circuit zone of example embodiment of the present invention;
Fig. 4 A is the cross-sectional view along II-II ' line of Fig. 3;
Fig. 4 B is the cross-sectional view along III-III ' line of Fig. 3;
Fig. 5 A to 5G shows the cross-sectional view of the method for substrate under the manufacturing of the example embodiment according to the present invention;
Fig. 6 shows the cross-sectional view of the reflection and transmission LCD device of another example embodiment according to the present invention;
Fig. 7 shows the planimetric map in the grid circuit zone of another example embodiment according to the present invention;
Fig. 8 shows the cross-sectional view of the reflection and transmission LCD device of another example embodiment according to the present invention;
Fig. 9 shows the planimetric map in the grid circuit zone of another example embodiment according to the present invention;
Figure 10 A to 10D shows the cross-sectional view of the method for substrate under the manufacturing of another example embodiment according to the present invention;
Figure 11 shows the cross-sectional view of the reflection and transmission LCD device of another example embodiment according to the present invention;
Figure 12 shows the planimetric map in the grid circuit zone of another example embodiment according to the present invention;
Figure 13 shows the cross-sectional view of the reflection and transmission LCD device of another example embodiment according to the present invention;
Figure 14 shows the planimetric map in the grid circuit zone of another example embodiment according to the present invention;
Figure 15 A is the cross-sectional view along VIII-VIII ' line of Figure 14;
Figure 15 B is the cross-sectional view along IX-IX ' line of Figure 14; And
Figure 16 A to 16D shows the cross-sectional view according to the method for substrate under the manufacturing of another example embodiment of the present invention.
Embodiment
Hereinafter, describe the present invention with reference to the accompanying drawings in detail.
Fig. 1 shows the cross-sectional view of the reflection and transmission LCD device of the example embodiment according to the present invention.Fig. 2 shows the planimetric map of the reflection and transmission LCD device of one example embodiment according to the present invention.
With reference to Fig. 1, reflection and transmission LCD device 400 comprises down substrate 100, corresponding to the last substrate 200 of this time substrate 100 and between about liquid crystal layer 300 between the substrate 100 and 200.
With reference to Fig. 2, following substrate 100 comprises the pixel region PP that contains a plurality of pixels, with pixel region PP disposed adjacent to drive grid circuit zone GCP and the data circuit region D CP of this pixel region PP.
Pixel region PP comprises a plurality of pixel portion, and a plurality of gate lines and data line GL and the DL of this pixel portion by mutual vicinity defines.Gate lines G L is basically perpendicular to data line DL.In each pixel parts, be provided with and have the pixel of TFT 120, first transmission electrode 151 that is electrically connected to TFT 120 and first reflecting electrode 161.
Grid circuit zone GCP is electrically connected to gate lines G L successively to provide signal to gate lines G L.Data I C cells D CP is electrically connected to data line DL and gives data line DL with outputting data signals.
Grid circuit zone GCP is formed on the layer identical with the pixel of pixel region PP.Grid circuit zone GCP and pixel are formed on down on the substrate 100 by the thin film deposition operation.
Referring again to Fig. 1, following substrate 100 comprises the first grid electrode 121a and the second gate electrode 121b.First grid electrode 121a is formed on the pixel region PP of first plate 110, and the second gate electrode 121b is formed on the grid circuit zone GCP of first plate 110.
The first data electrode 123a and be formed on ohmic contact layer 125 and the gate insulator 122 with the isolated second data electrode 123b of the first data electrode 123a.Therefore, TFT120 is formed on the pixel region PP.In addition, the 3rd data electrode 123c is formed on the gate insulator 122 corresponding to grid circuit zone GCP.The 3rd data electrode 123c and the second gate electrode 121b are spaced apart.
First reflecting electrode 161 is arranged on first transmission electrode 151, and is electrically connected on the second data electrode 123b.Second reflecting electrode 162 is arranged on second transmission electrode 152, and is electrically connected on the 3rd data electrode 123c and the second gate electrode 121b.
First reflecting electrode 161 partly covers first transmission electrode 151.Therefore, pixel region PP comprises reflector space RA and regional transmission TA.First reflecting electrode 161 is formed in the reflector space RA.First transmission electrode 151 exposes by first reflecting electrode 161 in regional transmission TA.Alternately, first transmission electrode 151 can partly expose by first reflecting electrode 161 in regional transmission TA.Offer the first light beam L of LCD device by the outside
1In reflector space RA, reflect by first reflecting electrode 161.The second light beam L by the generation of back lighting device (not shown)
2See through first transmission electrode 151 in regional transmission TA.
Fig. 3 shows the planimetric map according to the grid circuit zone of example embodiment of the present invention.Fig. 4 A is the cross-sectional view along II-II ' line of Fig. 3.Fig. 4 B is the cross-sectional view along III-III ' line of Fig. 3.
Expose by second contact hole 142 in the GCP of grid circuit zone with reference to Fig. 1 and 3, the three data electrode 123c and the second gate electrode 121b.Alternately, the 3rd data electrode 123c and the second gate electrode 121b can partly expose by second contact hole 142.Thereby second transmission electrode 152 be arranged in make second transmission electrode 152 in second contact hole 142 be formed on organic insulator 140 and first plate 110 between step part independent, thereby prevent that second transmission electrode 152 from opening a way.
The second electrode region EA
2Be arranged in the first region territory EA
1In, this second electrode region EA
2Comprise second reflecting electrode 162, and this first region territory EA
1Comprise second transmission electrode 152.
With reference to Fig. 3 and 4A, the end of the end of second transmission electrode 152 and second reflecting electrode 162 is arranged on the organic insulator 140, corresponding to the zone of the boundary between contiguous the 3rd data electrode 123c and the organic insulator 140.Therefore, second transmission electrode 152 and second reflecting electrode 162 cover the part that the 3rd data electrode 123c exposes by second contact hole 142.Alternately, the 3rd data electrode 123c can partly expose by second contact hole 142.
With reference to Fig. 3 and 4B, the end of the end of second transmission electrode 152 and second reflecting electrode 162 is arranged on the organic insulator 140, corresponding to the zone of the boundary between contiguous second gate electrode 121b and the organic insulator 140.Therefore, second transmission electrode 152 and second reflecting electrode 162 cover the part that the second data electrode 123b exposes by second contact hole 142.Alternately, the second data electrode 121b can partly expose by second contact hole 142.
Referring again to Fig. 1, last substrate 200 comprises second plate 210, color filter 220 and public electrode 230.Color filter 220 is arranged on second plate 210, and comprises redness (R) color filter, green (G) color filter and blueness (B) color filter.Public electrode 230 comprises transparent conductive material.
Fig. 5 A to 5G shows the cross-sectional view according to the method for substrate under the manufacturing of example embodiment of the present invention.
With reference to Fig. 5 A, comprise aluminium (Al), the first metal layer (not shown) of chromium (Cr) or molybdenum tungsten (Mo-W) alloy is deposited on first plate 110 by sputtering method, and this first plate 110 for example has as glass, the insulating material of pottery etc.The first metal layer (not shown) then by photoetching process with first mask, 171 compositions.Therefore, the first and second gate electrode 121a and 121b are respectively formed on pixel region PP and the grid circuit zone GCP.First grid electrode 121a is formed on the layer identical with the second gate electrode 121b.
With reference to Fig. 5 B, silicon nitride is deposited on first plate 110 to form gate insulator 122, and this first plate 110 comprises first and second gate electrode 121a and the 121b.Silicon nitride can deposit by the chemical vapour deposition technique (PECVD) that plasma strengthens.
With reference to Fig. 5 C, amorphous silicon layer (not shown) and N+ doped amorphous silicon layer (not shown) are formed on the gate insulator 122.Amorphous silicon layer (not shown) and N+ doped amorphous silicon layer (not shown) can deposit by on-the-spot (in-situ) PECVD method in process chamber.
With amorphous silicon layer (not shown) and N+ doped amorphous silicon layer (not shown) composition with formation active layer 124 and ohmic contact layer 125 in corresponding to the zone of first grid electrode 121a.
The second metal level (not shown) is formed on first plate 110 that contains ohmic contact layer 125.The second metal level (not shown) can comprise chromium (Cr).The second metal level (not shown) can form by sputtering method.The second metal level (not shown) by photoetching process with second mask, 172 compositions so that the first and second data electrode 123a and 123b are formed in the pixel region PP and the 3rd data electrode 123c is formed in the GCP of grid circuit zone.
The first and second data electrode 123a are formed on the layer identical with the 3rd data electrode 123c with 123b.The 3rd data electrode 123c is electrically connected to the exposed portions serve of the second gate electrode 121b corresponding to second contact hole 142.
The exposed portions serve that is arranged in the ohmic contact layer 125 between the first and second data electrode 123a and the 123b is removed, make a part that is arranged in the active layer 124 between the first and second data electrode 123a and the 123b expose.The ohmic contact layer 125 that exposes can be removed by reactive ion etching (RIE) method.The active layer 124 that exposes plays the channel layer of TFT.Therefore, TFT 120 is formed in the pixel region PP.
With reference to Fig. 5 D, the inorganic insulation layer 130 that contains silicon nitride (SiNx) or monox (SiOx) then is formed on pixel region PP and the grid circuit zone GCP.
With reference to Fig. 5 E, comprise that the organic insulator 140 of photosensitive third rare resin is formed on the inorganic insulation layer 130.Inorganic insulation layer 130 and organic insulator 140 usefulness the 3rd mask composition are to form first contact hole 141 and second contact hole 142.The second data electrode 123b exposes by first contact hole 141, and the 3rd data electrode 123c and the second gate electrode 121b expose by second contact hole 142.Alternately, the second data electrode 123b can partly expose by first contact hole 141, and the 3rd data electrode 123c and the second gate electrode 121b can partly expose by second contact hole 142.
With reference to Fig. 5 F, the first conductive layer (not shown) then is formed on down on the substrate 100, and this first conductive layer comprises such as tin indium oxide (ITO), the transparent conductive material of indium zinc oxide (IZO) or zinc paste (ZO) and so on.Then, the first conductive layer (not shown) with the 4th mask 174 compositions to form first and second transmission electrodes 151 and 152.First and second transmission electrodes 151 and 152 are separately positioned in pixel region PP and the grid circuit zone GCP.
The first region territory EA
1Be arranged in second contact hole 142.Second transmission electrode 152 is arranged in the first region territory EA
1Thereby in make the electrical characteristics of second transmission electrode 152 be formed on organic insulator 140 and first plate 110 between the electrical characteristics of step part independent, thereby prevent that second transmission electrode 152 from opening a way.
With reference to Fig. 5 G, comprise that the second conductive layer (not shown) of aluminium neodymium alloy (Al-Nd) is formed on down on the substrate 100.The second conductive layer (not shown) with the 5th mask 175 compositions to form first and second reflecting electrodes 161 and 162.First reflecting electrode 161 is arranged in the pixel region PP, and second reflecting electrode 162 is arranged in the GCP of grid circuit zone.
First reflecting electrode 161 is electrically connected to the second data electrode 123b by first transmission electrode 151.Second reflecting electrode 162 is electrically connected to the 3rd data electrode 123c and the second gate electrode 121b by second transmission electrode 152.
Second reflecting electrode 162 is redundant electrodes for second transmission electrode 152.Therefore, second reflecting electrode 161 keeps being electrically connected between the 3rd data electrode 123c and the second gate electrode 121b, although second transmission electrode 152 is opened a way in process of production.
During the composition of second reflecting electrode 162, couple corrosion can be formed between aluminium neodymium (A1-Nd) alloy and second transparency electrode 152.Particularly when second transparency electrode 152 comprised IZO, because the difference of the ionization trend between aluminium neodymium alloy and the zinc, couple corrosion strengthened greatly.
Therefore, second reflecting electrode 162 is arranged on the set the first region territory EA of second transmission electrode 152
1In.So, the area that Al-Nd is contacted with IZO reduces, thereby prevents couple corrosion.
Fig. 6 shows the cross-sectional view of the reflection and transmission LCD device of another example embodiment according to the present invention.Fig. 7 shows the planimetric map in the grid circuit zone of another example embodiment according to the present invention.Except following substrate, identical among Fig. 6 and 7 reflection and transmission LCD device and Fig. 1 to 3.So, identical Reference numeral will be used for reference to the identical or similar parts of describing with Fig. 1 to 3, and omit any more explanation.
With reference to Fig. 6 and 7, following substrate 100 comprises second plate 110, inorganic insulation layer 130 and organic insulator 140.Inorganic insulation layer 130 and organic insulator 140 are formed on second plate 110 continuously.Inorganic insulation layer 130 and organic insulator 140 comprise second contact hole 142.The 3rd data electrode 123c and the second gate electrode 121b expose by second contact hole 142 in the GCP of grid circuit zone.Alternately, the 3rd data electrode 123c and the second gate electrode 121b can partly expose by second contact hole 142 in the GCP of grid circuit zone.
The 3rd transmission electrode 153 is electrically connected to the 3rd data electrode 123c and the second gate electrode 121b by second contact hole 142.Second contact hole 142 is arranged on the first region territory EA that is formed with the 3rd transmission electrode 153
1In.Promptly the end of the 3rd transmission electrode 153 is arranged on the organic insulator 140 corresponding to the zone of contiguous second contact hole 142.
The 3rd reflecting electrode 163 is arranged on the 3rd transmission electrode 153, thereby the 3rd reflecting electrode 163 is electrically connected to the 3rd data electrode 123c and the second gate electrode 121b.Be formed with the second electrode region EA of the 3rd reflecting electrode 163
2Be arranged in the first region territory EA
1In, thereby prevent couple corrosion between the 3rd reflecting electrode 163 and the 3rd transmission electrode 153.
Fig. 8 shows the cross-sectional view of the reflection and transmission LCD device of another example embodiment according to the present invention.Fig. 9 shows the planimetric map in the grid circuit zone of another example embodiment according to the present invention.Except following substrate, identical among Fig. 8 and 9 reflection and transmission LCD device and Fig. 1 to 3.So, identical Reference numeral will be used for reference to the identical or similar parts of describing with Fig. 1 to 3, and omit any more explanation.
With reference to Fig. 8, inorganic insulation layer 130 and organic insulator 180 are formed on down on the pixel region PP and grid circuit zone GCP of substrate 100.Inorganic insulation layer 130 and organic insulator 180 comprise the 3rd contact hole 181 and the 4th contact hole 182.The second data electrode 123b of TFT 120 exposes by the 3rd contact hole 181.Alternately, the second data electrode 123b of TFT 120 can partly expose by the 3rd contact hole 181.The 3rd data electrode 123c and the second gate electrode 121b expose by the 4th contact hole 182.Alternately, the 3rd data electrode 123c and the second gate electrode 121b can partly expose by the 4th contact hole 182.
The first contact area CTA1 is arranged in the 3rd contact hole 181.The second contact area CTA2 is arranged in the 4th contact hole 182.Organic insulator 180 comprises the first side wall region S WA1 of the contiguous first contact area CTA1 and the second sidewall areas SWA2 of the contiguous second contact area CTA2.Xsect corresponding to the organic insulator 180 of the first and second sidewall areas SWA1 and SWA2 has curved shape.
Be arranged on reference to Fig. 8 and 9, the four transmission electrodes 154 on the organic insulator 180 of exposed portions serve of the second data electrode 123b that exposes corresponding to pixel region PP and by the 3rd contact hole 181.The 5th transmission electrode 155 is electrically connected to the 3rd data electrode 123c and the second gate electrode 121b by the 4th contact hole 182 in the GCP of grid circuit zone.
The part of the 5th transmission electrode 155 is arranged on the organic insulator 180 of contiguous the 4th contact hole 182.Therefore, the second contact area CTA2 corresponding to the 4th contact hole 182 is arranged on the first region territory EA
1In.The 5th transmission electrode 155 is formed on the first region territory EA
1In.
Xsect corresponding to the organic insulator 180 of the second sidewall areas SWA2 has curved shape, thus the contiguous organic insulator 180 and first plate 110 between the xsect of organic insulator 180 of boundary tilt gradually.Therefore, although the part of the 5th transmission electrode 155 is arranged on the organic insulator 180, also can prevent the open circuit of the 5th transmission electrode 155 in the second sidewall areas SWA2.
The 4th reflecting electrode 164 is arranged on the 4th interior transmission electrode 154 of pixel region PP, thereby makes the 4th reflecting electrode 164 be electrically connected to the second data electrode 123b.The 5th reflecting electrode 165 is arranged on the 5th interior transmission electrode 155 of grid circuit zone GCP, thereby makes the 5th reflecting electrode 165 be electrically connected to the 3rd data electrode 123c and the second gate electrode 121b.The second electrode region EA corresponding to the 5th reflecting electrode 165
2Be arranged on the first region territory EA corresponding to the 5th transmission electrode 155
1In.
Figure 10 A to 10D shows the cross-sectional view of the method for substrate under the manufacturing of another example embodiment according to the present invention.
With reference to Figure 10 A, comprise that the organic insulator 180 of photosensitive third rare resin is formed on the inorganic insulation layer 130.Organic insulator 180 usefulness are arranged on the 6th mask 176 compositions on the organic insulator 180, to form the 5th contact hole 183 and the 6th contact hole 184.Inorganic insulation layer 130 corresponding to the second data electrode 123b partly exposes by the 5th contact hole 183.Alternately, the inorganic insulation layer 130 corresponding to the second data electrode 123b can partly expose by the 5th contact hole 183.Inorganic insulation layer 130 corresponding to the 3rd data electrode 123c and the second gate electrode 121b exposes by the 6th contact hole 184.Alternately, the inorganic insulation layer 130 corresponding to the 3rd data electrode 123c and the second gate electrode 121b can partly expose by the 6th contact hole 184.
With reference to Figure 10 B, the 7th mask 177 that contains the first transparent part 177a and the second transparent part 177b is arranged on the organic insulator 180, thereby the organic insulator 180 of contiguous the 5th contact hole 183 and the organic insulator 180 of contiguous the 6th contact hole 184 are exposed by the first and second transparent part 177a and 177b respectively.Alternately, being close to the organic insulator 180 of the 5th contact hole 183 and the organic insulator 180 of contiguous the 6th contact hole 184 can partly expose by the first and second transparent part 177a and 177b respectively.The first and second transparent part 177a and 177b are bigger than the 5th and the 6th contact hole 183 and 184 respectively.
Therefore, be formed in organic insulator 180 and the inorganic insulation layer 130 corresponding to the 3rd contact hole 181 of the 5th contact hole 183 with corresponding to the 4th contact hole 182 of the 6th contact hole 184.Xsect corresponding to the organic insulator 180 of the first and second sidewall areas SWA1 and SWA2 has curved shape, thereby the xsect of the organic insulator 180 of the boundary between the contiguous organic insulator 180 and first plate 110 tilts gradually.Contiguous separately first and second contact area CTA1 and the CTA2 of the first and second sidewall areas SWA1 and SWA2.
With reference to Figure 10 C, comprise ITO, the first conductive layer (not shown) of IZO or ZO is formed on down on the substrate 100.The first conductive layer (not shown) is with the 8th mask 178 compositions, to form the 4th and the 5th transmission electrode 154 and 155.The the 4th and the 5th transmission electrode 154 and 155 is separately positioned in pixel region PP and the grid circuit zone GCP.
The end of the 5th transmission electrode 155 is arranged on the organic insulator 180 of contiguous second contact hole 182.The 4th contact hole 182 is arranged on the first region territory EA corresponding to the 5th transmission electrode 155
1In.
Xsect corresponding to the organic insulator 180 of the first and second sidewall areas SWA1 and SWA2 has curved shape, thereby the xsect of the organic insulator 180 of the boundary between the contiguous organic insulator 180 and first plate 110 tilts gradually, therefore can prevent second transmission electrode, 152 open circuits.
With reference to Figure 10 D, comprise that the second conductive layer (not shown) of Al-Nd alloy is formed on down on the substrate 100.The second conductive layer (not shown) with the 9th mask 179 compositions to form the 4th and the 5th reflecting electrode 163 and 165.The 4th reflecting electrode 164 is arranged in the pixel region PP.The 5th reflecting electrode 165 is arranged in the GCP of grid circuit zone.
The 5th reflecting electrode 165 is electrically connected to the 3rd data electrode 123c and the second gate electrode 121b by the 5th transmission electrode 155.The second electrode region EA corresponding to the 5th reflecting electrode 165
2Be arranged in the first region territory EA corresponding to the 5th transmission electrode 155
1In.Therefore, the 5th reflecting electrode 165 reduces with the area that the 5th transmission electrode 155 contacts, thereby prevents couple corrosion.
Figure 11 shows the cross-sectional view of the reflection and transmission LCD device of another example embodiment according to the present invention.Figure 12 shows the planimetric map in the grid circuit zone of another example embodiment according to the present invention.Except following substrate 100, identical among Figure 11 and 12 reflection and transmission LCD device and Fig. 1 to 3.So, identical Reference numeral will be used for reference to the identical or similar parts of describing with Fig. 1 to 3, and omit any more explanation.
Be arranged in the second contact area CTA2 of grid circuit zone GCP with reference to Figure 11 and 12, the six transmission electrodes 156.The 4th contact hole 182 is formed in the second contact area CTA2.Corresponding to the second electrode region EA
2The 6th reflecting electrode 166 be arranged on the first region territory EA corresponding to the 6th transmission electrode 156
1In.
The part of the part of the 6th transmission electrode 156 and the 6th reflecting electrode 166 is arranged on the organic insulator 180 of contiguous the 3rd data electrode 123c and the second gate electrode 121b.So, the 6th transmission electrode 156 and the 6th reflecting electrode 166 cover corresponding to the 3rd data electrode 123c of the 4th contact hole 182 with corresponding to the second gate electrode 121b of the 4th contact hole 182.
The xsect of the organic insulator 180 of the contiguous second contact area CTA2 has curve form in the second sidewall areas SWA2, thereby prevents the 6th transmission electrode 156 and the 6th reflecting electrode 166 open circuits in the second sidewall areas SWA2.
Figure 13 shows the cross-sectional view of the reflection and transmission LCD device of another example embodiment according to the present invention.Figure 14 shows the planimetric map in the grid circuit zone of another example embodiment according to the present invention.Except following substrate, identical among the reflection and transmission LCD device of Figure 13 and 14 and Fig. 1 to 3.So, identical Reference numeral will be used for reference to the identical or similar parts of describing with Fig. 1 to 3, and omit any more explanation.
With reference to Figure 13 and 14, inorganic insulation layer 130 and organic insulator 140 are formed on down in the pixel region PP and grid circuit zone GCP of substrate 100.
The 7th transmission electrode 157 is arranged in the 3rd data electrode 123c, the exposed portions serve of the second gate electrode 121b and inorganic insulation layer 130, thus make the 3rd data electrode 123c be electrically connected to the second gate electrode 121b.
The 7th reflecting electrode 167 is arranged on the 7th transmission electrode 157, thereby makes the 7th reflecting electrode 167 be electrically connected to the 3rd data electrode 123c and the second gate electrode 121b by the 7th transmission electrode 157.The second electrode region EA corresponding to the 7th reflecting electrode 167
2Be arranged on the first region territory EA corresponding to the 7th transmission electrode 157
1In.
Figure 15 A is the cross-sectional view along VIII-VIII ' line of Figure 14.Figure 15 B is the cross-sectional view along IX-IX ' line of Figure 14.
With reference to Figure 15 A and 15B, the end of the 7th transmission electrode 157 is arranged on the inorganic insulation layer 130, to cover the exposed portions serve of the 3rd data electrode 123c and the second gate electrode 121b.
The 7th reflecting electrode 167 is arranged on the 7th transmission electrode 157, and the part of the 7th reflecting electrode 167 corresponds to the part of the inorganic insulation layer 130 of the end of containing the 7th transmission electrode 157 on the inorganic insulation layer 130.The second electrode region EA corresponding to the 7th reflecting electrode 167
2Than the first region territory EA corresponding to the 7th transmission electrode 157
1Littler.
Figure 16 A to 16D shows the cross-sectional view of the method for substrate under the manufacturing of another example embodiment according to the present invention.
With reference to Figure 16 A, comprise that the organic insulator 140 of photosensitive third rare resin is formed on the inorganic insulation layer 130.Organic insulator 140 is then with the tenth mask 191 compositions that contain first transparent part, to form the 8th contact hole 143.Inorganic insulation layer 130 corresponding to the 3rd data electrode 123c and the second gate electrode 121b exposes by the 8th contact hole 143.Alternately, the inorganic insulation layer 130 corresponding to the 3rd data electrode 123c and the second gate electrode 121b can partly expose by the 8th contact hole 143.
With reference to Figure 16 B, the 11 mask 192 with second transparent part is arranged on the exposed portions serve and patterned organic insulator 140 of inorganic insulation layer 130, and this second transparent part is littler than first transparent part.Inorganic insulation layer 130 usefulness the 11 mask 192 corresponding to second transparent part is removed, thereby will expose corresponding to the 3rd data electrode 123c and the second gate electrode 121b of second transparent part, and will keep corresponding to the exposed portions serve of the inorganic insulation layer 130 of the 8th contact hole 143.Alternately, the 3rd data electrode 123c and the second gate electrode 121b corresponding to second transparent part can partly expose.
With reference to Figure 16 C, comprise that the first conductive layer (not shown) of ITO, IZO or ZO is formed on down on the substrate 100.The first conductive layer (not shown) makes to form the 7th transmission electrode 157 in the GCP of grid circuit zone with the 12 mask 193 compositions.
The 7th transmission electrode 157 is electrically connected to the 3rd data electrode 123c and the second gate electrode 121b by the 8th contact hole 143.The 8th contact hole 143 is arranged on the first region territory EA that is formed with the 7th transmission electrode 157
1In, thereby prevent the 7th transmission electrode 157 open circuits.
In addition, the end of the 7th transmission electrode 157 is arranged on the exposed portions serve of inorganic insulation layer 130, and this inorganic insulation layer 130 exposes by the 8th contact hole 143.Therefore, the 7th transmission electrode 157 covers the exposed portions serve of the 3rd data electrode 123c and the second gate electrode 121b, the exposed portions serve of the 3rd data electrode 123c and the second gate electrode 121b is exposed by the 8th contact hole 143, and the 7th transmission electrode 157 is not to be arranged on the organic insulator 140.
With reference to Figure 16 D, comprise that the second conductive layer (not shown) of Al-Nd alloy is formed on down on the substrate 100.The second conductive layer (not shown) then with the 13 mask 194 compositions in the GCP of grid circuit zone, to form the 7th reflecting electrode 167.
The 7th reflecting electrode 167 is electrically connected to the 3rd data electrode 123c and the second gate electrode 121b by the 7th transmission electrode 157.The second electrode region EA corresponding to the 7th reflecting electrode 167
2Be arranged on the first region territory EA corresponding to the 7th transmission electrode 157
1In, therefore can prevent the couple corrosion between the 7th transmission electrode 157 and the 7th reflecting electrode 167.
According to the present invention, the organic insulator and the inorganic insulation layer of following substrate comprise opening, and second gate electrode and the 3rd data electrode expose by this opening, and second transmission electrode is electrically connected to second gate electrode and the 3rd data electrode by second reflecting electrode.
Therefore, can be by the open circuit of the conductive layer that prevents to form by the step part between the organic insulator and first plate, thus improve substrate down and contain the throughput rate of the display device of this time substrate.
The present invention who requires at present is described with reference to example embodiment.Yet obviously the description those of ordinary skill in the art according to the front clearly can carry out multiple alternative modification and modification to the present invention.Therefore, the present invention comprises selectable modification and the modification in all spirit and scope that drop on accessory claim.
Claims (6)
1. liquid crystal indicator comprises:
Following substrate, this time substrate comprises: be arranged on first signal electrode in the circuit region; First insulation course, this first insulation course has opening, and first signal electrode exposes by this opening; The secondary signal electrode, this secondary signal electrode is arranged on first insulation course of circuit region, and spaced apart with first signal electrode; Second insulation course, this second insulation course is arranged on first insulation course, and to comprise first contact hole, first and second signal electrodes expose by this first contact hole; The 3rd insulation course, the 3rd insulation course are arranged on second insulation course, and to comprise second contact hole, second insulation course and first and second signal electrodes of contiguous first contact hole expose by this second contact hole; And conductive layer, this conductive layer is electrically connected to the secondary signal electrode with first signal electrode by first and second contact holes; And
Last substrate, substrate is corresponding to this time substrate on this.
2. a manufacturing is used for the method for the following substrate of liquid crystal indicator, comprising:
In circuit region, form first signal electrode;
In the circuit region that is formed with first signal electrode, form first insulation course;
Form the secondary signal electrode on first insulation course, this secondary signal electrode and first signal electrode are spaced apart;
On first insulation course and secondary signal electrode, form second insulation course;
On second insulation course, form the 3rd insulation course;
Composition the 3rd insulation course to be forming first contact hole, exposes by this first contact hole corresponding to second insulation course of first and second signal electrodes;
Composition first and second insulation courses are to form second contact hole, and first and second signal electrodes expose by this second contact hole, and second contact hole is littler than first contact hole; And
Form conductive layer, this conductive layer is electrically connected to the secondary signal electrode with first signal electrode.
3. according to the method for claim 2, wherein second insulation course of contiguous second contact hole exposes by first contact hole, and the end of conductive layer is arranged on the exposed portions serve of second insulation course.
4. according to the method for claim 2, wherein second insulation course comprises inorganic insulation layer, and the 3rd insulation course comprises organic insulator.
5. a manufacturing is used for the method for the following substrate of liquid crystal indicator, comprising:
In circuit region, form first signal electrode;
In the circuit region that is formed with first signal electrode, form first insulation course;
Form the secondary signal electrode on first insulation course, this secondary signal electrode and first signal electrode are spaced apart;
On first insulation course and secondary signal electrode, form second insulation course;
On second insulation course, form the 3rd insulation course;
Composition the 3rd insulation course to be forming first contact hole, exposes by this first contact hole corresponding to second insulation course of first and second signal electrodes;
Remove contiguous first contact hole the 3rd insulation course, second insulation course exposed portions serve and corresponding to first insulation course of the exposed portions serve of second insulation course, to form second contact hole, first and second signal electrodes expose by this second contact hole; And
Form conductive layer, this conductive layer is electrically connected to the secondary signal electrode with first signal electrode.
6. according to the method for claim 5, wherein second insulation course comprises inorganic insulation layer, and the 3rd insulation course comprises organic insulator.
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR72907/03 | 2003-10-20 | ||
| KR1020030072907A KR100987714B1 (en) | 2003-10-20 | 2003-10-20 | Lower substrate, display apparatus having the same and method of manufacturing the same |
| KR77222/03 | 2003-11-03 | ||
| KR1020030077222A KR100987713B1 (en) | 2003-11-03 | 2003-11-03 | Lower substrate, display apparatus having the same and method of manufacturing the same |
| KR78191/03 | 2003-11-06 | ||
| KR1020030078191A KR100987723B1 (en) | 2003-11-06 | 2003-11-06 | Method of manufacturing lower substrate |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004100874914A Division CN100444011C (en) | 2003-10-20 | 2004-10-20 | Lower substrate, display apparatus having the same and method of manufacturing the same |
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| CN101311806A CN101311806A (en) | 2008-11-26 |
| CN101311806B true CN101311806B (en) | 2011-04-06 |
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| CN2008101272775A Active CN101311806B (en) | 2003-10-20 | 2004-10-20 | Lower substrate, display apparatus having the same and method of manufacturing the same |
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| CN (1) | CN101311806B (en) |
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| CN105785635A (en) * | 2016-01-29 | 2016-07-20 | 上海天马微电子有限公司 | Semi-reflective and semi-transparent array substrate, manufacturing method, display panel and display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1399161A (en) * | 2001-07-21 | 2003-02-26 | 三星电子株式会社 | Film transistor substrate for liquid crystal display board and its manufacture |
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| JP3663261B2 (en) * | 1995-10-05 | 2005-06-22 | 株式会社東芝 | Array substrate for display device and manufacturing method thereof |
| JP3916349B2 (en) * | 1999-06-15 | 2007-05-16 | 株式会社アドバンスト・ディスプレイ | Liquid crystal display |
| KR100451659B1 (en) * | 2000-11-01 | 2004-10-08 | 엘지.필립스 엘시디 주식회사 | method for fabricating a Transflective liquid crystal display device and the same |
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| CN1399161A (en) * | 2001-07-21 | 2003-02-26 | 三星电子株式会社 | Film transistor substrate for liquid crystal display board and its manufacture |
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| CN101311806A (en) | 2008-11-26 |
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