CN101311775A - Optical attenuator - Google Patents

Abstract

A method of generating a pulse width modulated (PWM) signal comprises: receiving digital demand data V>control< comprising at least one more significant bit (bit>7< to bit 14>) and at least one less significant bit (bit0 to bit6). The PWM signal comprises a sequence of one or more frames (100), each frame: comprising a plurality of PWM pulses (W1 to W127) whose duty cycle is substantially governed by the at least one more significant bit (bit7 to bit14); and having at least one of its PWM pulses selected to have its duty cycle modified in response to the at least one less significant bit (bit0 to bit6); each of the at least one less significant bit (bit0 to bit6) uniquely mapping onto the at least one selected PWM pulse of the frame (100). The invention is also concerned with apparatus operable according to the above method and an optical attenuator whose optical attenuation is dependent upon its temperature and in which the temperature an hence attenuation is controlled using the above PWM signal.

Description

Optical attenuator

The application be the following international application for a patent for invention submitted to March 23 calendar year 2001 divide an application international application no: PCT/GB01/01309, national applications number: 01807041.8, denomination of invention: " production method of pulse-width signal and equipment and by the optical attenuator of pulse-width signal control "

Technical field

The present invention relates to the method and apparatus of a kind of generation width modulation (PWM) signal.More particularly, the present invention relates to the temperature controlling of electro optical element, such as attenuator, wave filter and solid state laser.These elements are used in the optical communication system.Although fully non-, the present invention relate generally to one be used in the optical communication system, optical attenuator that resolution is improved.

Background technology

In traditional optical communication system, adopt optical attenuator adjust with control system in the optical radiation propagation power.This decay is for responsive optical element, as detecting device and image intensifer, avoids taking place saturated phenomenon and to make it avoid being flooded by noise be necessary for guaranteeing optical radiation to have sufficient intensity.Saturated meeting causes losing of information and therefore causes system transmissions communication service mistake.

Adopt a large amount of different optical element structures in traditional optical attenuator, such as, one or more Mach-Sen De (Mach-Zehnder) interferometer can be adopted, modulation liquid crystal shutter and chromatic dispersion effects modulator.In communication system, adopt the thermal change optical attenuator to seem particularly convenient, because the optical attenuator of thermal change optical attenuator depends on the temperature of attenuator.Thereby, can select the needed dough softening by the temperature of regulating the thermal change attenuator.

A thermoelectric element is set in the thermal change attenuator can realizes the temperature adjustment easily.The principle of work of thermoelectric element is a thermoelectric effect, and it both can heat also and can cool off attenuator selectively, specifically depended on the demand of the optical element in the attenuator.Yet the operation of thermoelectric element usually consumes quite a few energy, and during such as the electric current that passes to 0.5 ampere under 5 volt signal current potentials drive, the power of consumption is 2.5 watts.

In the conventional optical communication systems, be configured to a plurality of nodes that fibre-optic waveguide is connected to each other usually, by these fibre-optic waveguides, the communication data that is carried in the optical radiation can be propagated mutually between node.Usually comprise the optics and the electronic signal process equipment that are arranged in a large number on the equipment rack in the node, such as 19 inches frames of tradition.The said equipment possesses numerous above-mentioned thermal change attenuator samples usually.Owing to contain these thermal change attenuator samples, the heat that attenuator distributed has accounted for sizable ratio in the thermal load that needs are lowered the temperature, and cooling system can be as fan, to provide cooling draught in equipment rack.

The inventor has realized that the heat radiation power that reduces attenuator is worthless, and this is because the heat radiation of attenuator is the essential characteristic of associated hot electric device.Reduction provides the heat radiation power of the electric driver circuit of electric energy to be good to attenuator.As everyone knows, adopt traditional circuit that comprises linear non-on-off element, comprise the drives thermoelectric element that bipolar power transistor is regulated in the series connection that is driven by the traditional analog operational amplifier, regulate drive current such as employing.The shortcoming of sort circuit is: the power consumption in the power tube is near the power consumption of associated hot electric device.For overcoming these shortcomings, the inventor advises adopting another kind of circuit to drive the thermoelectric element of thermal change optical attenuator, wherein this circuit adopts width modulation (PWM) technology to produce drive signal in order to drive thermoelectric element, this circuit is compared with traditional circuit mentioned above, and the former has lower heat radiation power.Yet, the inventor finds, when drive signal is in known manner by digital when synthetic, this PWM technology can not provide enough resolution to control the temperature of attenuator, thereby cause the lack of resolution of corresponding optical attenuator, lack of resolution then can cause problem in associated communication system.

As everyone knows, traditional pwm signal comprises a string repetition pulse, and the width of each pulse is t _p, the null value width t between each pulse and the adjacent pulse _nTherefore, pulse is with pulsewidth t _p+ t _nRepeat, and provided the mean value V of pwm signal in the equation 1 (Eq1):

$V=\frac{(A-B)\&CenterDot;t_p}{t_n+t_p}+B---\mathrm{Eq}.1$

Wherein

Signal value between the A=pulse area; And

The signal value in B=pulse null value interval.

In addition, pulse has frequency f _p, frequency f _pBy relational expression 2 decisions (equation 2)

$f_p=\frac{1}{t_n+t_p}---\mathrm{Eq}.2$

In existing width modulation design, produce signal with the digital counter circuit usually, the digital counter circuit is at master clock frequency f _ClkFollowing work.Adopt the result of this digital circuit to be, width t _pAnd t _nCan only carry out the classification adjustment, progression M can calculate (Eq.3) by equation 3:

$M=\frac{f_{\mathrm{clk}}}{f_p}---\mathrm{Eq}.3$

Be increase progression M, or must increase f _Clk, perhaps must reduce pulse repetition rate f _pIn some application, the instantaneous change of pulse value V may cause problem, therefore to f _pSet a lower limit value.The method of traditional raising PWM resolution is to adopt higher master clock frequency f _ClkThis method can sharply increase the cost of respective digital circuit and increase the operation power consumption of circuit.And the digital circuit clock frequency that can reach is conditional in actual applications.

The inventor finds, can effectively increase progression M by pulse being grouped into the F pulse frame, wherein the time width of the high level of other pulses in the same pulse frame of one or more ratio of pulse length to the total cycle length in each pulse frame.This pulse frame technology is increased to MF with the level of resolution number, and caused transient swing can not surpass one-level.And the inventor finds also and can select one or more pulses to make it than the high one-level of other pulse with specific method that the harmonic component in the pwm signal that produces is then relatively low.Be used for controlling the situation of electric current greatly at pwm signal, it is very important reducing harmonic component, such as, in optical communication system, the interference between the electronic package that suppresses to cause because of the PEM current fluctuation is very important.

Summary of the invention

Target of the present invention is to manage to provide a kind of optical attenuator and relevant control circuit, and this control circuit provides power validity to the PWM operation, and has enough decay adjusting resolution, is used for optical communication system.

According to a first aspect of the invention, a kind of method that produces width modulation (PWM) signal according to the digital instruction data word has been proposed, the digital instruction data word comprises a large amount of significance bits, the method is characterized in that: produce the pwm pulse that comprises a frame sequence, each pulse frame comprises a row pwm pulse, the duty cycle of these pulses (duty cycle) is controlled by a large amount of higher significance bit of director data fully, and each of command adapted thereto data is than low order, at least a pwm pulse is made amendment, wherein the pwm pulse number is modified and is chosen in the position in the pulse frame, makes each is mapped to relevant pwm pulse uniquely than low order.

This method has following advantage: compare with traditional pwm signal production method, contain lower harmonic component in the pwm signal that the former produced.

Preferably, this method comprises produces pwm signal that from clock signal its feature also is: to revise the duty ratio of pwm pulse corresponding to the amount of single clock cycle.

In preferred embodiments, pwm pulse according to each than low order bit _iMake amendment, wherein i is a subscript, and its scope is from 0 to Q-1, and Q is the figure place than low order, and the value of Q depends on following relational expression:

S _p＝INT(2 ^Q-i)

Corresponding integer function of INT wherein.S _pThe recurrent interval that remains to be revised.Recurrent interval by the definition of above-mentioned relation formula can guarantee that the pulse that each significance bit is selected evenly distributes in pulse, thereby has lowered the harmonic component of pwm signal.

Preferably, the first pulse Cp in each frame is according to than low order bit _iMake amendment, the value of I is defined as follows from 1 to Q-1:

C _p＝1/2INT(2 ^Q-i)

Select first pulse by this way, can guarantee that also selected pulse can be evenly distributed in giving on the location of every frame.And, under specific situation, such as at bit ₀Be under the situation of I=0, the most handy C _p=S _pFirst pulse in every frame is made amendment.Bit ₀This system of selection, can simplify the design of digital circuit.

In one embodiment of the invention, each data word comprises 15 significance bits, and promptly 8 higher significance bits and 7 are eaily than low order.

According to another aspect of the present invention, provide a kind of equipment that produces pwm signal according to said method.Preferably, this equipment comprises at the clock apparatus according to the processing clocking of method of the present invention, to produce corresponding pwm signal.

Preferably, this equipment also comprises the switchgear that electric current is provided to the corresponding load of pwm signal, and comparatively preferably, this switchgear is connected in the bridge-type knot circuit.The said equipment is compared with traditional PWM equipment, has following advantage: promptly can provide the pwm signal that contains less harmonic component to load.

Expediently, wish to decay and stop the relative higher harmonics component of pwm signal to arrive load in conjunction with filter.By filtering, can reduce the harmonic components in the load, and these harmonic waves may the Transient State Influence load running.Preferably, filter comprises the passive element with a constant impedance, and these impedances almost are net resistances, such as at least one inductor and at least one capacitor.More preferably, for the consideration of physics compactedness aspect and lower cost aspect, what adopt in the telefault is FERRITE CORE.

Preferably, include thermoelectric element in the load.The work of thermoelectric element needs higher relatively electric current usually, and in electronic system, the conversion of the pulsed of electric current is to produce the reason of interfering.Thereby,, be particularly useful for controlling power supply with said elements according to equipment of the present invention.

Preferably, thermal coupling is carried out in a place or the many places of thermoelectric element and optical attenuator, controls their temperature with laser instrument or optical filter, thereby controls their optical characteristics.The laser instrument that this equipment provided is compared with traditional PWM controller with wave filter, and is less to the interference of attenuator.

The present invention is specially adapted to temperature control, and controls the optical attenuator that is used in the optical communication thus.Thereby, according to another aspect of the present invention, providing a kind of optical attenuator to receive according to drive signal and the decay input radiation, and corresponding output radiation is provided, above-mentioned attenuating device can be decayed to radiation, and the dough softening then depends on temperature; Attenuating device comprises temperature adjustment device, temperature adjustment device can be adjusted temperature according to the corresponding driving signal, and comprise control device, be used for the needed marking signal of receiving attenuation and produce corresponding drive signal, it is characterized in that drive signal derives from pwm signal, corresponding frame of each wherein in pwm signal cycle, a plurality of continuous single frames have just constituted a multi-frame, can adjust the frame in each multi-frame or the duty ratio of a plurality of frames by operating control device, thereby improve the decay resolution of attenuator.

The present invention has following advantage, and promptly according to the present invention, attenuator can improve the level of resolution of the dough softening and can improve power efficiency by the use pwm signal.

Expediently, control device comprises filter, and filter can filter pwm signal and produce drive signal.This filtering brings following advantage: i.e. PWM cyclic fluctuation is not subjected to directly the influencing of attenuating device (experienced), is diffused into possibility in the output light thereby reduced these fluctuations.

The cycle of pwm signal is preferably constant, and filter can by operate in corresponding frequency of PWM cycle under, decay pwm signal composition.The main fluctuation harmonic components in the pwm signal can be effectively eliminated in filtering like this.Expediently, wave filter is a passive filter that comprises inductor and capacitor; Inductor and capacitor have lower energy loss, thereby can realize that higher energy conversion produces drive signal to pwm signal.

More preferably, the adjustment to the duty ratio of the single frames in each multi-frame should be evenly distributed in each single frames of multi-frame.This order of magnitude that helps lower the relatively low frequency disturbance in the drive signal that is evenly distributed with.Preferably can increase the duty ratio of every frame step by step, the corresponding one-level deviation of the adjustment of duty ratio.

Expediently, each multi-frame comprises 2-1000 single frames.This scope can to increase resolution and lower between the frequency signal fluctuation in the drive signal contradiction trade off.Preferably, each multi-frame comprises 64 frames, is optimal compromise.

Comparatively preferably, attenuator can provide stabilized power source for output radiation by adopting negative feedback loop.For obtaining this stability, attenuator also comprises: pick-up unit is used for receiving unit output radiation and produce a relevant detection ripple; And the multiplying arrangement that comprises control device inside, multiplying arrangement can with detection signal and reference signal compares and adjust by the temperature adjustment device of attenuator, so that output radiation is associated with the radiation energy that reference signal is determined.

In the practical application of attenuator, wish to realize control device by the gate array (FPGA) of field programmable.Using the advantage of FPGA is reconfigurable property, can adopt relative less elements number simultaneously.Preferably, the clock frequency of FPGA is 30MHz.

When attenuating device heats or cool off higher relatively temperature, need provide bigger electric current could drive these operations to temperature adjustment device.Thereby, expediently, can produce pwm signal by operation FPGA, by mos field effect transistor (MOSFET) these pwm signals are cushioned back output, to drive attenuating device.

Description of drawings

Below, the method that adopts example describes embodiment of the present invention also in conjunction with hereinafter with reference to the accompanying drawings, wherein:

Fig. 1 is a synoptic diagram, illustrates according to a pwm circuit of the present invention, and this circuit is used for controlling the input current according to the heating of Seebeck effect work;

Fig. 2 is the formed TEC momentary signal of illustrated circuit figure among Fig. 1; And

Fig. 3 is a Ji type network, is included in the circuit of Fig. 1, is used for filtering the harmonic content in the electric current that flows to different elements.

Fig. 4 is the synoptic diagram of an attenuator that is improved according to resolution of the present invention, according to the present invention, and the use that combines with pwm circuit of this attenuator.

Fig. 5 is the synoptic diagram of the low-pass filter in the attenuator of the PWM output stage of FPGA and Fig. 4; And

Fig. 6 is a synoptic diagram, illustrates the pulsed reset frame structure by the pwm signal that FPGA produced in the Figure 4 and 5.

Embodiment

With reference to figure 1, illustrate pwm circuit 10 among Fig. 1, this circuit is used for controlling the electric current that enters Seebeck effect heating 30.To illustrate that hereinafter heating is commonly used to control temperature and therefore operates electro optical element, such as attenuator, wave filter or solid state laser.

Circuit 10 comprises the controller 20 of PWM, and four switch mosfet SW1, SW2, SW3, SW4." peltier-element " of element 30 known to being.Controller 20 comprises 50, one counter logic unit 60 of a master clock generator and an interface logic unit 70.

Next the connection between each element in the circuit 10 is described, interconnecting relation is described among Fig. 1.

Switch SW 1, SW2, SW3, among the SW4, each comprises one first electrode, one second electrode and a relevant grid G.On grid G, load a current potential to control the electric current that flows to the second electrode E2 from the first electrode E1.Switch SW 1～SW4 is connected in the bridge circuit, and switch SW 1 and SW3 constitute first brachium pontis, and switch SW 2 and SW4 constitute second brachium pontis.The first electrode E1 of switch SW 1 and SW2 links to each other with the anodal P+ of current potential, and the second electrode E2 of switch SW 3 and SW4 links to each other with the negative pole P-of current potential.In addition, the second electrode E2 of switch SW 1 links to each other with the first electrode E1 of switch SW 3, and links to each other with the first end T1 of element 30.Equally, the second end T2 of first electrode of second electrode of switch SW 2 and switch SW 4 and element 30 links together.Switch SW 1, SW2, SW3, SW4 grid G 1 separately, G2, G3, G4 respectively with the drive output D1 of interface logic unit 70, D2, D3, D4 links to each other.

In PWM controller 20, the output terminal C0 of clock generator 50 links to each other with the input end of clock of counter logic unit 60.Counter unit 60 comprises that also receives a control input V _ControlInput end.In addition, counter unit 60 comprises output TECA and the TECB that links to each other with interface unit 70.

Below, in conjunction with Fig. 1 the operation of circuit 10 is described.

When electric current when T1 end flows to the T2 end, element 30 can cool off and its electro optical element of thermal coupling (not drawing among the figure) mutually.On the contrary, when electric current when T2 end flows to the T1 end, 30 effects of playing heating of element.Thereby when switch SW 1 and SW4 are in conducting and switch SW 2 and SW3 when being in shutoff simultaneously, element 30 is realized refrigerating functions.And being in conducting simultaneously and switch SW 1 and SW4 when being in shutoff as switch SW 2 and SW3, element 30 is realized heating functions.Switch SW 1, SW2, SW3, the conducting of SW4 or shutoff are respectively by driving output D1, D2, D3, the logic state control of D4.As output D1, D2, D3, the one or more outputs among the D4 are high level (H), just are in conducting state between so pairing switch its electrode E1 and the E2.Equally, as output D1, D2, D3, the one or more outputs among the D4 are low level (L), just are turned off between so pairing switch its electrode E1 and the E2.The driving output state is exported the logic state of TECA and TECB and is controlled, and specifically describes and sees Table 1.

Table 1

Note	TEC A	TEC B	D 1	D 2	D 3	D 4
							Turn-off	Logic state	0	Logic state 0	L	L	L	L
Refrigeration	Logic state	0	Logic state 1	H	L	L									H
							Heating	Logic state	1	Logic state 0	L	H	H	L
Forbid	Logic state 1	Logic state 1	-	-	-	-

Drive output TECA, TECB pwm signal be provided, pwm signal periodically turn-on and turn-off switch SW 1 to SW4.These signals with by V _ControlThe duty ratio of decision is relevant.

Clock generator 50 produces continuous logic clock signal with the frequency of 15.36MHz.Counter unit 60 receive clock signals and with 8 binary counters with it divided by the factor 256, and repeat to produce output signal TECA, TECB with the frequency of 60KHz basically.And counter unit 60 is configured and can exports TECA, TECB with block form, also refers to 128 continuous impulse frames, and paired pulses is controlled, and these frames are with the frequency repetition of 470Hz basically.Will be appreciated that hereinafter 8 digit counters and the use that comprises the frame of 128 pulses can effectively provide 15 control resolution to circuit 10.

Counter unit 60 is configured makes TECA, TECB not be in logic state 1 simultaneously.In fact, before TECB converts state 1 to by state 0, allow TECA with two clock period, be i.e. 130 times nanosecond basically, convert logic state 0 to by logic state 1.Equally, before TECA converts state 1 to by state 0, allow TECB with two clock period, promptly the time of 120 nanoseconds converts logic state 0 to by logic state 1.Allow switch or brachium pontis to reach nonconducting state, can bring the pulsation of current of upper frequency, and cause the increase of instantaneous energy consumption in the switch with the time in two cycles.

Signal V _ControlProvide numerical data, with deciding the electric current duty ratio that inputs to element 30, signal V _ControlHave the word structure of numeral, as shown in table 2.

Table 2

Bit14 in the word is a highest significant position, and bit0 then is a least significant bit (LSB).These words are used for control circuit 10 makes it reach basic 1/32000 resolution.Validity below in conjunction with the word structure in Fig. 2 his-and-hers watches 2 is discussed.Among Fig. 2, the form of the circuit 10 of illustrated TECA, TECB momentary signal.Above-mentioned two clock period are followed in TECA, TECB output, and these two clock period are left in the basket in describing word structure and significance bit at interval.

Counter unit 60 produces TECA or TECB signal, so that comprise the repeating frame of 128 pulses, sees shown in 100 among the figure.Each pulse is configured, and shown among the figure 120, carries out repetition at interval, time t in 256 cycle corresponding equations with 256 clock period _n+ t _pTime.The width of each pulse is N clock period, corresponding t _pLength, null value time of 256N clock period at interval between the adjacent pulse, the time t in the corresponding equation 1 _nIn this frame, the N value by one or more specific pulses increases by 1 resolution that improves circuit 10.In the word of table 2, counter unit 60 is controlled the value of N by processing bit7 and bit14, and decides the relevant N value increase by 1 of which pulse in the frame by processing bit0 and bit6.When bit7～bit14 was logical zero entirely, the value of N was 0; Equally, when bit7～bit14 was logical one entirely, the value of N was 255; And when bit7～bit13 be logical zero entirely, and bit14 is when being logical one, the value of N is 127, or the like.

Among bit0～bit6 each all is mapped to the certain relevant pulse W0～W127 in the frame, the corresponding increase of N value of certain pulses among W0～W127.Table 3 has provided all and the corresponding relation of pulse.

Table 3

The position	In each frame related one or more multiple-pulse its N value is increased progressively
		bit 0	W127
bit 1	W31，W95
		bit 2	W15，W47，W79，W111
bit 3	W7，W23，W39，W55，W71，W87，W103
		bit 4	W3，W11，W19，W27，W35，W43，W51，W59，W67，W75，W83，W91，W99，W107，W115，W123
bit 5	W1，W5，W9，W13，W17，W21，W25，W29，W33，W37，W41，W45，W49，W53，W57，W61，W65，W69，W73，W77，W81，W85，W89，W93，W97，W101，W105，W109，W113，W117，W121，W125
		bit 6	W0，W2，W4，W6，W8，W10，W12，W14，W16，W18，W20，W22，W24，W26，W28，W30，W32，W34，W36，W38，W40，W42，W44，W46，W48，W50，W52，W54，W56，W58，W60，W62，W64，W66，W68，W70，W72，W74，W76，W78，W80，W82，W84，W86，W88，W90，W92，W94，W96，W98，W100，W102，W104，W106，W108，W110，W112，W114，W116，W118，W120，W122，W124，W126

As can be seen from Table 3, each is mapped to the coherent pulse in every frame uniquely in the position.Usually, mapping determines (Eq4 and Eq5) by following equation 4 and 5:

S _p＝INT(2 ^Q-i) Eq.4

i＝0，1，2，3，...

Wherein

S _p: the recurrent interval in the frame;

Q: in the frame because the V that increase provided of N value _ControlThe number of the position in the word;

I: be used for S _pThe subscript of the position of calculating;

INT: integer function rounds up.

C _p＝ ¹/ ₂INT(2 ^Q-i) Eq.5

i＝0，1，2，3，...

C _p: the initial pulse in the frame;

C during i=0 _p=INT (2 ^Q-i)

Such as, work as Q=6, during i=5, interval S in the table 3 _p=4, per 4 pulses are selected in the frame; Equation 4 returns a value 4.Equally, work as Q=6, the initial pulse among the i=5, table 3 is W1, and promptly second pulse equation 5 returns a value 2; W0 is first pulse.

The technician of pwm circuit design field will approve: the word structure in the table 2 just is illustrated as an example, and the word structure of other length also is feasible, such as, with 12 15 of replacing in the literary composition.

The information of listing in the table 3 is listed in the pulse of describing in the table 4 in every frame alternative expression, when the certain bits in the word of table 2 is set at logical one, can influence each frame pulse in the table 4.If pulse is affected, then fill out " 1 " in the corresponding bit field in the word of table 2.

Table 4

Pulse	Bit6	Bit5	Bit4	Bit3	Bit2	Bit1	Bit0	Pulse	Bit6	Bit5	Bit4	Bit3	Bit2	Bit1	Bit0
																W0
	1							W65		1
																W1		1						W66	1
W2	1							W67			1
																W3			1					W68	1
W4	1							W69		1
																W5		1						W70	1
W6	1							W71				1
																W7				1				W72	1
W8	1							W73		1
																W9		1						W74	1
W10	1							W75			1
																W11			1					W76	1
W12	1							W77		1
																W13		1						W78	1
W14	1							W79					1
																W15					1			W80	1
W16	1							W81		1

Table 4 (continuing)

Pulse	Bit6	Bit5	Bit4	Bit3	Bit2	Bit1	Bit0	Pulse	Bit6	Bit5	Bit4	Bit3	Bit2	Bit1	Bit0
																W17
		1						W82	1
																W18	1							W83			1
W19			1					W84	1
																W20	1							W85		1
W21		1						W86	1
																W22	1							W87				1
W23				1				W88	1
																W24	1							W89		1
W25		1						W90	1
																W26	1							W91			1
W27			1					W92	1
																W28	1							W93		1
W29		1						W94	1					1
																W30	1							W95
W31
							1		W96	1
W32																	1							W97		1
	W33		1						W98	1
W34																	1							W99			1
	W35			1					W100	1
W36																	1							W101		1
	W37		1						W102	1
W38																	1			1				W103				1
	W39								W104		1
W40																	1							W105		1
	W41		1						W106	1
W42																	1							W107			1
	W43			1					W108	1
W44																	1							W109		1
	W45		1						W110	1
W46																	1							W111					1
	W47					1			W112	1
W48																	1							W113		1
	W49		1						W114	1
W50																	1							W115			1
	W51			1					W116	1
W52																	1							W117		1
	W53		1						W118	1
W54																	1							W119				1
	W55				1				W120	1
W56																	1							W121		1
	W57		1						W122	1
W58																	1							W123			1
	W59			1					W124	1
W60																	1							W125		1
	W61		1						W126	1
W62																	1							W127							1
	W63
W64
		1

As can be seen from Table 4, after the value of the word of table 2 is changed, have only pulse W63 not to be adjusted.If desired, can adjust pulse W63, rather than pulse W127, in this case, equation 5 is changed to equation 6 come initial pulse in the descriptor frame with bit0.

C _p＝ ¹/ ₂INT(2 ^Q-i) Eq.6

i＝0，1，2，3，...

For advantage of the present invention is described, between conventional P WM method and method of the present invention, once compare below.For simplicity, adopt 12 the word that comprises 8 highest significant positions and 4 least significant bit (LSB)s.8 highest significant positions are used for controlling the duty ratio of each pulse, and 4 least significant bit (LSB)s are used for controlling the increment of the specific pulse in 16 pulse frames.Thereby the corresponding above-mentioned N value of Aw does not have the pulse of increase, the pulse of the then corresponding N value of Bw through increasing.

For comparing, in classic method, (be referenced herein as first method), be combined into one group through value-added pulse, and (be referenced herein as second method) in the method for the invention, through value-added pulse according to above-mentioned table 3 and 4 and equation 4 and 5 distribute, only make amendment with 12 words.

So in first method, the instantaneous sequence of pulse is arranged (giving an example) in the following order in the pulse frame, from left to right:

Aw Aw Aw Aw Aw Aw Aw Aw Bw Bw Bw Bw Bw Bw Bw Bw

That is, together through value-added pulse arrangements.

Yet in according to second method of the present invention, the instantaneous sequence of pulse is arranged in the following order in the frame, from left to right:

Aw Bw Aw Bw Aw Bw Aw Bw Aw Bw Aw Bw Aw Bw Aw Bw

That is, arrange according to the relation of equation 4 and 5 through value-added pulse.

The inventor adopts the fast Fourier transform (FFT) analysis, derives harmonic component from Aw Bw pulse train, and above-mentioned 12 pairing scopes are 4096, and the value of Aw Bw correspondence is 2056, and promptly mean value is 0.50195.Frequency is normalized to the frame harmonic wave.And harmonic wave 0 corresponding average is 0.50171, and is very approaching with average 0.50195, and main difference is higher hamonic wave in two kinds of methods.Table 5 has been listed the result of calculation after the fast fourier transform.

Table 5

As can be seen from Table 5, adopt the harmonic component of second method relatively low; As adopting second method, the component of first harmonic has reduced 14.36db.

It is more desirable adopting passive filter in circuit 10, reduces high-frequency harmonic component in the circuit such as combined the series connection with element 30 of inductor and capacitor.In the second approach, by the humorous wave energy in the electric current of circuit 10 input elements 30, more be transferred in the high relatively secondary frequencies that is easier to eliminate.Passive filter preferably comprises a ferrite core inductor, can make, and as Ji type network, sees Fig. 3.

In Fig. 3, by capacitor C 1, C2 links to each other with negative potential P-respectively for electrode T1, T2.Electrode T1, T2 also link to each other with second brachium pontis with first brachium pontis with FERRITE CORE inductance L 2 by open core inductance L 1 respectively.Ji type network is used for weakening the 60KHz that inputs to element 30 or the electric current composition of higher frequency, guarantees that element 30 is not subjected to the impact of these radio-frequency components.Ji type network can also weaken the following composition of 60KHz, such as the electric current composition of 1KHz.

Illustrate below in conjunction with Fig. 4, indicate 200 part among Fig. 4 and be one according to the optical attenuator of resolution of the present invention through improving.For clarity sake, similar components is marked with identical label.Attenuator 200 comprises an attenuator module 210, module 210 and thermoelectric element 30 thermal couplings, the pwm control circuit 10 that attenuator 200 also comprises an optical splitter 220 and an optical detector 230 and is used for controlling the operation of attenuator module 210.Pwm control circuit comprises the gate array (FPGA) 240 of a field programmable, and FPGA240 links to each other with corresponding clock 250, and comprises an output low-pass filter 260.Attenuator 200 also comprises first waveguide 270 that links to each other with the input end of attenuator module 210, be used for carrying optical radiation input signal Pi, comprise second waveguide 280 that links to each other with the output terminal of attenuator module 210, comprise the 3rd waveguide 290 that links to each other with first output terminal of optical splitter 220, comprise the 4th waveguide 300 that links to each other with the input end of second output terminal of optical splitter 220 and optical detector 230 respectively.Waveguide 270,280,290,300 all is single mode light waveguide; Certainly they also can be the multi-mode waveguides.The output electrode T3 of detecting device 230 links to each other with the input electrode I1 of FPGA240.FPGA240 also comprises an output electrode V0, and in operational process, pwm signal is by output electrode V0 output; Output electrode V0 links to each other with the input electrode J1 of low-pass filter 260.The output electrode J2 of wave filter 260 links to each other with the input electrode I3 of thermoelectric element 30.At last, clock 250 comprises the electric output terminal that links to each other with the input end of clock of FPGA240.

Attenuator module 210 combines with optical element, can weaken input radiation Pi and propagate into output terminal from the input end of module 210.Optical element can provide in a way decay through operation, and this is the function of temperature.Thermoelectric element 30 is thermally coupled in these optical elements, and influences the temperature of optical element by heating or cooling.The Seebeck effect of utilizing thermoelectric element 30 realizes heating or cooling.

Optical splitter 220 is fiber couplers, and optical splitter can be distributed to first output terminal to 90% of the radiation P0 that receives from light input end, and 10% distributes to second output terminal; In actual conditions, the ratio of distribution can be from 98%: 2%～85%: 15%.Detecting device 230 comprises a photodiode, can receive the optical radiation of 0.1P0 at light input end through operation, and produces corresponding electric signal at output terminal T3.

Low-pass filter 260 is passive filter networks.Comprise inductor and associated capacitor.Wave filter 260 can weaken from the pwm signal of output terminal V0 greater than near the signal signal content, the especially 40KHz of 10KHz.Thereby wave filter 260 can convert pwm signal to corresponding low frequency dc signal, is used for driving thermoelectric element 30.

FPGA240 is a semiconductive logic device with row's logic gate, and the user can be provided with these logic gates and customize specific function.In attenuator 200, FPGA240 can carry out timing with the frequency of 40MHz by clock 250 through being provided with.The function that FPGA240 also has enlarging function and produces pwm signal.

Attenuator 200 adopts enlarging functions to realize negative feedback loop, is used for adjusting the dough softening that is provided by attenuator module 210, produces generators to arrive detecting device 230, and produces pwm signal successively and be used for controlling the energy that flows to thermoelectric element 30.

The pwm signal generator can produce pwm signal, and from the output of V0 output terminal, these signals are periodically changed between high level and low level with binary mode.The cycle of signal is 25 microseconds, and corresponding frequency is 40KHz, in other words, and the cycle of 1000 clocks 70.Select the pwm signal of 40KHz compromise as both:

(a) select a kind of frequency, wave filter 260 can actually adopt inductor and capacitor under this frequency.

(b) select a kind of sufficiently high frequency, making can be to propagating into the amplitude modulation(PAM) of optical radiation from the electric fluctuation of the output of wave filter 260 by attenuator 210; And

(c) select enough low frequency to guarantee the having PWM digital signal that enough resolution is adjusted to be derived from the high frequency major clock.

The speed that the clock 250 of generation 40MHz clock frequency can turn-off with the logic gate in FPGA240 is controlled.The energy that flows to thermoelectric element 30 depends on the recurrent interval rate of pwm signal, in other words, depends on the ratio of each pwm signal in the cycle length of cycle length of first kind of state and second kind of state.In the attenuator 200, the state of 1: 1 recurrent interval rate correspondence is: provide 0 power to thermoelectric element 30.Determined it is with the deviation of 1: 1 ratio to attenuator module 210 families heating or cooling.

Because each PWM cycle equals 1000 clock period, so attenuator can provide 500 grades cooling resolution and add temperature resolution; This is corresponding to 9 heating or cooling resolution.

Below, in conjunction with Fig. 4 the operation of attenuator 200 is described.Input radiation Pi propagates into attenuator module 210 along first waveguide.Radiation Pi propagates along attenuator module 210, and decays to radiation P0 in module 210, propagates into optical splitter 220 through attenuated radiation P0, and obtains decomposing in 220, wherein 10% passes to detecting device 230 by waveguide 300.Detecting device 230 receives this partial radiation and produces electric signal T3, and electric signal T3 is transferred to the input end I1 of FPGA240.FPGA240 adopts analog to digital converter (ADC) that electric signal T3 is converted to digital signal corresponding T3; Analog to digital converter also converts reference signal PR to digital signal PR.Then, magnification function produces corresponding variation by the deviation of calculating between T3 digital signal and the PR digital signal.Variation sends the PWM function to from magnification function, and the recurrent interval rate of pwm signal is subjected to the control of variation.Then, pwm signal is exported from FPGA240 through MOSFET impact damper power tube (not drawing among the figure), and outputs to thermoelectric element 30 by wave filter 260.FPGA240 can adjust the radiation energy through attenuated radiation PODE effectively, makes it reach the energy level identical with reference signal PR.If reference signal PR keeps constant, attenuator 200 is attempted to be adjusted into radiation P0 in the decay adjustable extent and the constant energy level in 210 resolving range that can provide of attenuator module so.

Hereinafter will be described in more detail foregoing mosfet transistor and wave filter 260 in conjunction with Fig. 5.FPGA240 has two output logic gates 310,320, and output logic gate 310 and 320 output quantity are just opposite mutually on phase place, one for timing another for negative.The output terminal of logic gate 310 link to each other with the grid of first metal oxide semiconductor field-effect power tube (FET1).Equally, the output terminal of logic gate 320 link to each other with the grid of second metal oxide semiconductor field-effect power tube (FET2).The drain electrode of the one MOSFET links to each other with positive pole+ve, and the source electrode of the 2nd MOSFET links to each other with negative electrode-ve.The drain electrode of source electrode the 2nd MOSFET of the one MOSFET connects together and links to each other with the input end J1 of wave filter.

Wave filter 260 has an inductor L1 in parallel with capacitor C1, and in addition, wave filter 260 also has an inductor L2 who connects with capacitor C2.Input end J1 links to each other with the first node of the antiresonant circuit that L1 and C1 constitute.The Section Point of antiresonant circuit links to each other with the end of inductor L2.The other end of inductor then links to each other with capacitor C2 and by capacitor grounding (the earth point current potential is 0v).Electrode (+ve ,-ve) and between the earth potential (0v) be symmetrical distribution.In addition, resonance frequency in parallel and series resonant circuit is designed to 40khz, the purpose of selecting 40KHZ is in order to hold the component of 40khz the pwm signal of importing can not pass through wave filter 260 from J1, thereby can guarantee that the electric signal of importing from the I3 end of thermoelectric element is low frequency " direct current " fully, promptly avoid AC compounent.

In operating process, when the recurrent interval of pwm signal, rate was 1: 1, from the signal of J1 input end input by MOSFET (FET1) be connected to positive electrode (+ve), the tie-time is passed through the 2nd MOSFET (FET2) with input end J1, and (time that ve) links to each other is identical with negative electrode.1: 1 recurrent interval rate makes that the average potential that is carried on the thermoelectric element 30 is 0, and the electric current that promptly flows through thermoelectric element 30 is 0.When the recurrent interval, rate departed from 1: 1, electric current just can flow through thermoelectric element 30 from positive dirction and negative direction, thereby can correspondingly attenuator module 210 be heated or cool off.Such as, if the most of the time electromotive force of output K is for just, the most of the time of a MOSFET (FET1) is in conducting state so, thereby the input end I3 of a forward current by wave filter 260 inflow elements 30 is provided, and flow to earth point 0 potential point, thereby module 210 is heated.On the contrary, if the output terminal K most of the time is a negative potential, the most of the time of the 2nd MOSFET (FET2) is in conducting state so, thereby provide a negative current to flow into the input end I3 of element 30 by wave filter 260, and flow to earth point 0 potential point, thereby module 210 is cooled off.

In the said process, can produce the resolution problem of shut off damper 210.It is the result who trades off that pwm signal adopts 40KHZ, and simultaneously, the adjusting resolution that element 30 is provided when flowing through forward current and flowing through negative current all is 500 grades.Find pairing 9 bit resolutions of above-mentioned 500 grades resolution in actual applications,, usually seem too coarse for adopting attenuator 20 adjusting to the needed resolution of communication system through attenuated radiation; Resolution is coarse to be one problem to be solved.Theoretically, 16 bit resolutions just can be satisfied the demand, but this requires the clock frequency of FPGA240 can reach 2.5GHz, and this is infeasible.A way that addresses this problem is to select lower pwm signal frequency; In order to obtain 16 bit resolutions, the pwm signal frequency must be reduced to 620hz, considers the component value of wave filter, and this also is infeasible.Another kind of solution is that PWM is taked batch operation, and adopts linear adjusting method; Yet linear the adjustment also is infeasible for the above-mentioned ground connection power division of mentioning.

The present invention adopts the multiframe method to produce pwm signal in above-mentioned FPGA240, thereby has solved the problems referred to above.Below in conjunction with Fig. 6 the multiframe method is further described.

Among Fig. 6,40 parts that marked illustrate the multiframe structure of pwm signal.The width in each the pwm signal cycle that is produced by FPGA240 is the t025 microsecond, and is appointed as a frame.64 above-mentioned single frames constitute the multi-frame with 64 times of t0.Each frame of t1 cycle all be in high level state (+ve), then be in low level (ve) state in the t2 cycle.Cycle, t0+t1 equaled t0.FPGA240 produces the clock frequency of 40MHz, makes cycle t1 and t2 have the resolution of 25 nanosecond ts levels, and cycle t1 can represent (Eq7) with following equation:

t ₁＝n ₁t _s Eq7

N wherein ₁Time stage t in the=cycle t1 _sNumber.

In addition, cycle t2 can represent (Eq 8) with equation 8

${\mathrm{<figure-callout\; id="1"\; label="t"\; filenames="A20081012845400281.png"\; state="\{\{state\}\}">t</figure-callout>}}_1=(\frac{t_0}{t_s}-n)t_s---\mathrm{Eq}8$

n ₁Size can in scope 1～1000, adjust by FPGA240; As previously described, in optical communication system, 1000 grades resolution is not enough.Although the inventor has realized that it is impossible increasing resolution in each frame, the width of adjusting one or more single frames in each multi-frame is fully feasible.Adjustment is remained on a t _sIn the time range, the amplitude of Tiao Zhenging is quite little so, and this is unobvious for output from attenuator module 210 through attenuated radiation P0.

Such as, under the situation of n1=500, be necessary to increase slightly the drive current of thermoelectric element for all 64 single frames in the multi-frame.After adopting the multiframe method, can be set at 500 from the value of the n1 of single frames 1 to 63, and the value of the n1 of single frames 64 can be set at 501.Thereby the mean value of the n1 of each single frames is 500.015625 in the multi-frame that this method provides.Thereby, the use that comprises the multi-frame of 64 single frames has increased by 6 bit resolutions, can reach 16 effective resolutions with 10 bit resolutions (1000counts) addition that each frame had, this resolution is enough for the operation that above is used in the attenuator 10 in the communication system.

Must consider following problem when multi-frame has the count value of a plurality of single frames need increase a counting (count), promptly this problem relates to and selects in the multi-frame which single frames as the object that increases count value.When the count value that two single frames are arranged in the multi-frame need increase by 1, preferably adopt single frames 32 and 64, this just makes corresponding disturbance evenly to distribute in multi-frame; The Transient Thermal that helps stop in the thermoelectric element 30 that is evenly distributed with of disturbance fluctuates, and these heat fluctuations are can be detected as the modulation signal in attenuated radiation P0.If selection will increase certain zone that the single frames of count value concentrates on multi-frame in groups, so above-mentioned heat fluctuation can cause problem.Equally, need to increase the count value of three single frames in multi-frame, so preferably adopt single frames 21,43,64 as the object that increases, or the like.When control resolution compares t _sWhen level wanted high, the single frames of required increase count value was listed in table 6.

Table 6

The numbering of frame, each frame have its n1 value that increases progressively 1 counting	Concrete frame in the multiframe that remains to be increased progressively
		1	64
2	32，64
		3	21，43，64
4	16，32，48，64
		5	13，26，38，51，64
6	11，21，32，43，53，64
		7	9，18，27，37，48，55，64
8	8，16，24，32，40，48，56，64
		9	7，14，21，28，36，43，50，59，64
10	6，13，19，26，32，38，45，51，58，64
		11	5，12，17，23，29，35，41，47，52，58，64
12	5，11，16，21，27，32，37，43，48，53，59，64
		13	5，10，15，20，25，30，34，39，44，49，54，59，64
14	5，9，14，18，23，27，32，37，41，46，50，55，59，64
		15	4，9，13，17，21，26，30，34，38，43，50，51，55，60，64
16	4，8，12，16，20，24，28，32，36，40，44，48，52，56，60，64
		17	4，8，11，15，19，23，26，30，34，38，41，45，49，53，56，60，64
18	4，7，11，14，18，21，25，28，32，36，39，43，46，50，53，57，60，64
		19	3，7，10，13，17，20，24，27，30，37，37，40，44，47，51，54，57，61，64
20	3，6，10，13，16，19，22，26，29，32，35，38，42，45，48，51，54，58，61，64
		21	3，6，9，12，15，18，21，24，27，30，34，37，40，43，46，49，52，55，58，61，64
22	3，6，9，12，15，17，20，23，26，29，32，35，38，41，44，47，49，52，55，58，61，64
		23	3，6，8，11，14，17，19，22，25，28，31，33，36，39，42，45，47，50，53，56，58，61，64
24	3，5，8，11，13，16，19，21，24，27，29，32，35，37，40，43，45，48，51，53，56，59，61，64
		25	3，5，8，10，13，15，18，20，23，26，28，31，33，36，38，41，44，46，49，51，54，56，59，61， 64
26	2，5，7，10，12，15，17，20，22，25，27，30，32，34，37，39，42，44，47，49，52，54，57，59， 62，64
		Or the like be distributed to with being equal to
58	1，2，3，4，6，7，8，9，10，11，12，13，14，15，17，18，19，20，21，22，23，24，25，26，28，29， 30，31，32，33，34，35，36，38，39，40，41，42，43，44，45，46，47，49，50，51，52，54，55， 56，57，58，59，60，61，62，63，64
		59	1，2，3，4，5，7，8，9，10，11，12，13，14，15，16，17，18，20，21，22，23，24，25，26，27，28， 29，30，31，33，34，35，36，37，38，39，40，41，42，43，44，46，47，48，49，50，51，52，53， 54，55，56，57，59，60，61，62，63，64
60	1，2，3，4，5，6，7，9，10，11，12，13，14，15，16，17，18，19，20，21，22，23，25，26，27，28， 29，30，31，32，33，34，35，36，37，38，39，41，42，43，44，45，46，47，48，49，50，51，52， 53，54，55，57，58，59，60，61，62，63，64
		61	1，2，3，4，5，6，7，8，9，10，11，13，14，15，16，17，18，19，20，21，22，23，24，25，26，27， 28，29，30，，31，33，34，35，36，37，38，39，40，41，42，43，44，45，46，47，48，49，50，51， 52，54，55，56，57，58，59，60，61，62，63，64
62	1，2，3，4，5，6，7，8，9，10，11，12，13，14，16，17，18，19，20，21，22，23，24，25，26，27， 28，29，30，31，32，33，34，35，36，37，38，39，40，41，42，43，44，45，46，47，49，50，51， 52，53，54，55，56，57，58，59，60，61，62，63，64
		63	1，2，3，4，5，6，7，8，9，10，11，12，13，14，15，16，17，18，19，20，21，22，23，24，25，26， 27，28，29，30，31，33，34，35，36，37，38，39，40，41，42，43，44，45，46，47，48，49，50， 51，52，53，54，55，56，57，58，59，60，61，62，63，64
64	1，2，3，4，5，6，7，8，9，10，11，12，13，14，15，16，17，18，19，20，21，22，23，24，25，26， 27，28，29，30，31，32，33，34，35，36，37，38，39，40，41，42，43，44，45，46，47，48，49， 50，51，52，53，54，55，56，57，58，59，60，61，62，63，64

As can be seen from Table 6, in multi-frame, to increase count value and obtain t _sThe single frames of resolution of fraction part, in multi-frame, distribute as far as possible equably.

Adopt the multiframe method and adopt lower frame rate to obtain high-resolution and compare and have remarkable advantages, this is because the former when increasing resolution, minimum disturbance only occurs in the multi-frame; This means that producing pwm signal with the frequency that adopts the reduction single frames compares, the transient power that adopts the multi-frame method to cause departs from smaller relatively.Thereby the designed attenuator 200 of the present invention has not only improved resolution, but also provides and the relevant power efficiency of pwm signal control, and FPGA240 is operated under the convenient frequency of 40MHZ.

Obviously, can make amendment and can not deviate from scope of the present invention attenuator 200 and pwm circuit.Although Fig. 4 illustrates the FPGA240 of local negative feedback loop of the radiation power with stabilising decay radiation P0 for FPGA240, can receive control signal from other circuit, such as detector circuit, the downstream position of attenuator 200 that can also be from communication system receives control signal, only adopts the multiframe technology that is used in the PWM drive signal mentioned above to control thermoelectric element.In addition, above Shuo Ming multi-frame comprises 64 single frames, and multi-frame also can comprise the single frames of other quantity fully, can from 2 to 1000 such as the scope of single frames number, specifically depend on resolution requirement.Also have, although the clock frequency of above-mentioned FPGA240 is 40MHz, it also can send the clock frequency that is not less than 30MHz, as long as wave filter is done corresponding the adjustment.

In addition, although pwm circuit is the element that is used for controlling optical communication system, relevant devices and method also can be applied in other PWM Current Control fields, such as at electric system, and mechanical servo, robot system, or the like.

Claims (10)

1. optical attenuator, this optical attenuator be used to receive input radiation and the decay input radiation so that corresponding output radiation to be provided, above-mentioned attenuator comprises attenuating device, described attenuating device receives input radiation and decay input radiation so that described output radiation to be provided according to drive signal, and the dough softening that described attenuating device produces by operation depends on its temperature; Described attenuating device comprises temperature adjustment device and control device, and described temperature adjustment device can be adjusted temperature according to drive signal, described control device be used for the required dough softening of receiving flag signal and produce corresponding drive signal,

It is characterized in that,

Described drive signal is derived from a pwm signal, corresponding frame of each wherein in pwm signal cycle, a plurality of continuous this single frames constitute multi-frames, adjust the frame in each multi-frame or the duty ratio of a plurality of frames by operating control device, thus the resolution decay that has improved attenuator.

2. optical attenuator according to claim 1, wherein pwm signal almost has the constant cycle, and described in addition optical attenuator also comprises filter, and described filter is decayed to the pwm signal component with the frequency corresponding to this cycle through operation.

3. optical attenuator according to claim 1 and 2 wherein to the modification of the duty ratio of the single frames in each multi-frame, is evenly distributed in multi-frame basically.

4. optical attenuator according to claim 2, wherein the duty ratio of each frame can incremental classification, and the amended difference of the duty ratio of each frame is an one-level.

5. according to the described optical attenuator of one of claim 1～4, wherein to comprise the scope of single frames number be 2～1000 to each multi-frame.

6. optical attenuator according to claim 5, wherein each multi-frame comprises 64 single frames.

7. according to the described optical attenuator of one of claim 1～6, also comprise:

Pick-up unit, this pick-up unit are used for receiving unit output radiation and produce a relevant detection signal;

Be installed in the multiplying arrangement in the control device, be used for the difference between comparison detection signal and the reference signal and be used for by the temperature that temperature adjustment device is adjusted attenuating device make output radiation be associated by the determined radiation power of reference signal.

8. according to the described optical attenuator of one of claim 1～7, wherein said control device (10) is realized by the gate array (FPGA) of field programmable.

9. optical attenuator according to claim 8 wherein can move FPGA and produce pwm signal, and pwm signal carries out buffer memory by power MOSFET and exports to drive this attenuating device.

10. according to Claim 8 or 9 described optical attenuators, wherein FPGA carries out clock timing with the frequency of 30MHz at least.

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