CN101308902A - Phase changeable storage device and manufacture method thereof - Google Patents
Phase changeable storage device and manufacture method thereof Download PDFInfo
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- CN101308902A CN101308902A CNA2007101039333A CN200710103933A CN101308902A CN 101308902 A CN101308902 A CN 101308902A CN A2007101039333 A CNA2007101039333 A CN A2007101039333A CN 200710103933 A CN200710103933 A CN 200710103933A CN 101308902 A CN101308902 A CN 101308902A
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- 238000000034 method Methods 0.000 title claims abstract description 52
- 238000004519 manufacturing process Methods 0.000 title claims description 31
- 238000003860 storage Methods 0.000 title description 4
- 239000012782 phase change material Substances 0.000 claims abstract description 83
- 238000010438 heat treatment Methods 0.000 claims abstract description 75
- 230000003647 oxidation Effects 0.000 claims abstract description 20
- 125000006850 spacer group Chemical group 0.000 claims abstract description 19
- 239000000463 material Substances 0.000 claims abstract description 16
- 230000009467 reduction Effects 0.000 claims description 43
- 230000008859 change Effects 0.000 claims description 42
- 238000000576 coating method Methods 0.000 claims description 34
- 239000011248 coating agent Substances 0.000 claims description 33
- 239000000758 substrate Substances 0.000 claims description 18
- 150000001786 chalcogen compounds Chemical class 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 4
- 239000007772 electrode material Substances 0.000 claims description 4
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 3
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 2
- 230000008569 process Effects 0.000 abstract description 7
- 238000007254 oxidation reaction Methods 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 149
- 239000004020 conductor Substances 0.000 description 11
- 238000001259 photo etching Methods 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 239000011521 glass Substances 0.000 description 6
- 238000005240 physical vapour deposition Methods 0.000 description 6
- 238000000059 patterning Methods 0.000 description 5
- 239000004411 aluminium Substances 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 4
- 239000010937 tungsten Substances 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 238000004528 spin coating Methods 0.000 description 3
- 239000005380 borophosphosilicate glass Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- GDFCWFBWQUEQIJ-UHFFFAOYSA-N [B].[P] Chemical group [B].[P] GDFCWFBWQUEQIJ-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 239000011232 storage material Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
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Abstract
Disclosed is a method for reducing the contact area between a heating electrode and a phase-change material layer, including the following steps: a first dielectric layer is provided, inside which a heating electrode is arranged; the heating electrode, at a first diameter, has an exposed part which extends out of the surface of the first dielectric layer; oxidation process is carried out so as to develop an oxide layer on the top of the exposed part and the side wall of the heating electrode, then the diameter of the exposed part is reduced to a second diameter which is smaller than the first diameter; part of the oxide layer is removed so as to expose the top of the exposed part of the heating electrode, and oxide spacer material is left on the side wall of the exposed part of the heating electrode; a phase-change material layer is formed on the exposed part of the heating electrode, making sure that the phase-change material layer at least contacts with the top of the exposed part and the top of the oxide spacer material.
Description
Technical field
The present invention relates to a kind of storage arrangement, and be particularly related to a kind of phase change memory apparatus and manufacture method thereof.
Background technology
The speciality that phase transition storage has is non-volatile, height reads signal, high density, high erasable number of times and low-work voltage/electric current, be quite potential nonvolatile memory.Wherein improving storage density, reducing operating current is the important techniques index.
Phase-change material can present at least two kinds solid-state, comprise crystalline state and noncrystalline attitude, the conversion between the binary states is carried out in the change of general using temperature, owing to the atomic arrangement of noncrystalline attitude confusion has higher resistance, therefore can distinguish the crystalline state and the noncrystalline attitude of phase-change material easily by simple electrically measurement.Since phase-change material change a kind of reversible reaction mutually into, when therefore phase-change material is used for being used as storage material, be to store, that is to say that bank bit rank (0,1) are to utilize between binary states the difference of resistance to distinguish by the conversion between noncrystalline attitude and the crystalline state binary states.
Please refer to Fig. 1, part has shown a kind of section situation of known phase-change memory cell structure.As shown in Figure 1, phase-change memory cell structure has comprised silicon base 10, and it is provided with the hearth electrode 12 as aluminium or tungsten material.On hearth electrode 12, then be provided with dielectric layer 14.Be provided with heating electrode 16 in one one of dielectric layer 14, on dielectric layer 14, then pile up the phase-change material layers 20 that patterning is arranged.The phase-change material layers 20 of patterning is arranged in another dielectric layer 18 that is formed on the dielectric layer 14, and the bottom surface of phase-change material layers 20 is part Contact Heating electrode 12 then.On dielectric layer 18, then be provided with another dielectric layer 24.Be provided with top electrode 22 in dielectric layer 24, the top electrode 22 that top electrode 22 parts have covered dielectric layer 24 and part has penetrated dielectric layer 24, thereby has contacted the phase-change material layers 20 of its below.
When writing pattern, heating electrode 16 will produce electric current with the interface of heating between 16 of phase-change material layers 20 and heating electrodes, and then the magnitude of current of looking the heating electrode 16 of flowing through makes a (not shown) of phase-change material layers 20 be transformed into amorphous state mutually or the crystalline state phase with time length.
Known phase-change memory cell structure as shown in Figure 1 has following shortcoming, when writing pattern owing to need great reset currents (reset current) successfully to change the phase of phase-change material, therefore can produce phase transformation reaction again for reset current being reduced, one of employed method is for reducing the contact area of heating electrode 16 and phase-change material layers 20, for example be to realize, and then make current density be maintained or improve by the diameter D0 that reduces heating electrode 16.
Yet the diameter D0 of heating electrode 16 still is subject to the ability of present photoetching process, and then it is limited to make that its degree of dwindling is, thus the solution that adds high current density can't further be provided, thereby be unfavorable for the micro of phase-change memory cell structure.
Therefore, just need a kind of phase change memory apparatus and manufacture method thereof, to address the above problem.
Summary of the invention
In view of this, the invention provides a kind of phase change memory apparatus and manufacture method thereof, to solve above-mentioned known problem.Moreover.The present invention also provides between a kind of reduction heating electrode and phase-change material layers and has contacted Method for Area.
According to an embodiment, phase change memory apparatus of the present invention comprises:
Hearth electrode is positioned in the substrate; First dielectric layer is positioned on this hearth electrode; Heating electrode, be embedded in and also partly protrude in this first dielectric layer in this first dielectric layer, comprise: be embedded in the intrinsic portion in this first dielectric layer, this intrinsic portion has first diameter and is stacked in a reduction portion in this intrinsic portion, this reduction portion has second diameter less than this first diameter, and is stacked in this intrinsic portion and around the oxide spacer of the sidewall of this reduction portion of coating; Phase-change material layers, be arranged at the part this first dielectric layer on and coat this heating electrode, wherein this phase-change material layers has contacted the end face of this reduction portion of this heating electrode; And a top electrode, be positioned on this phase-change material layers and contact this phase-change material layers.
According to an embodiment, the manufacture method of phase change memory apparatus of the present invention comprises the following steps:
Substrate is provided, and it is provided with first conductive layer; In this first conductive layer and this substrate, form first dielectric layer; Form heating electrode in an one of this first dielectric layer, this heating electrode penetrates this first dielectric layer and has contacted this first conductive layer; Implement first etching program, expose this heating electrode with the thickness that reduces this first dielectric layer and part one one; Implement the oxidation program, on the end face of this one that this heating electrode was exposed and sidewall, to form oxide skin(coating); Implement second etching program, with remove the part this oxide skin(coating), expose this one that protrudes in this first dielectric layer end face this heating electrode and on the sidewall of this one, form oxide spacer; One one on this first dielectric layer forms phase-change material layers, and this phase-change material layers has coated this heating electrode and this oxide spacer, and wherein this phase-change material layers has contacted this heating electrode of this end face of this one that protrudes in this first dielectric layer; And on this phase-change material layers, form second conductive layer and contact this phase-change material layers.
According to another embodiment, the manufacture method of phase change memory apparatus of the present invention comprises the following steps:
Substrate is provided, and it is provided with first conductive layer; In this first conductive layer and this substrate, form first dielectric layer; Form heating electrode in an one of this first dielectric layer, this heating electrode penetrates this first dielectric layer and has contacted this first conductive layer; Implement first etching program, expose this heating electrode with the thickness that reduces this first dielectric layer and part one one; Implement the oxidation program, with formation first oxide skin(coating) on the end face of this one that this heating electrode was exposed and sidewall; On this first dielectric layer, form second dielectric layer, and coat this first oxide skin(coating); Implement the planarization program, removing this second dielectric layer and this oxide skin(coating) of part, and then expose this end face of this one that this heating electrode exposes and on the sidewall of this one, stay second oxide skin(coating); One one on this second dielectric layer forms phase-change material layers, and wherein this phase-change material layers only contacts the end face of this heating electrode and this oxide skin(coating); And on this phase-change material layers, form second conductive layer and contact this phase-change material layers.
For above and other objects of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and cooperate appended diagram, be described in detail below
Description of drawings
Fig. 1 is a profile, has shown known phase change device memory cell;
Fig. 2～8 are a series of profiles, have shown the manufacture method according to the phase change memory apparatus of one embodiment of the invention; And
Fig. 9～12 are a series of schematic diagrames, have shown the manufacture method according to the phase change memory apparatus of another embodiment of the present invention.
Description of reference numerals
10～silicon base;
12～hearth electrode;
14～dielectric layer;
16～heating electrode;
18～dielectric layer;
20～phase-change material layers;
22～top electrode;
24～dielectric layer;
The diameter of D0～heating electrode;
100～substrate;
102～conductive layer;
104～dielectric layer;
104b～through the dielectric layer of reduced down in thickness;
106～opening;
108～conductive electrode;
The intrinsic portion of 108a～conductive electrode;
The reduction portion of 108b～conductive electrode;
110～etching program;
112～oxidation program;
114～oxide skin(coating);
114a～oxide spacer;
114b～oxide skin(coating);
116～etching program;
The end face of the reduction portion of 120～conductive electrode;
122～phase-change material layers;
124～dielectric layer;
126～conductive layer;
140～dielectric layer;
140a～through the reduction dielectric layer;
142～phase-change material layers;
144～dielectric layer;
146～conductive layer;
The height of the exposed portions serve of H～conductive electrode;
The diameter of the intrinsic portion of D1～conductive electrode;
The diameter of the reduction portion of D2～conductive electrode.
Embodiment
The embodiment of phase change memory apparatus of the present invention and manufacture method thereof will cooperate the diagram that hereinafter reaches Fig. 2～12 and be explained orally, wherein Fig. 2～8 have illustrated the manufacture method of the phase change memory apparatus of first embodiment of the invention, his 9～12 manufacture methods that then illustrated the phase change memory apparatus of second embodiment of the invention.
First embodiment:
Please refer to Fig. 2, substrate 100 at first is provided, for example is the substrate of the semi-conducting material of silicon base, can be provided with as element and retes such as transistor or diode and dielectric layers in substrate 100.For the purpose of simplicity of illustration, only illustrate to smooth substrate in this substrate 100 and not show rete formed thereon and element.
Please refer to Fig. 3, then in substrate 100, form layer of conductive material and by follow-up photoetching and etch process (not shown) with its patterning, thereby in substrate 100 formation conductive layer 102.The material of conductive layer 102 can be electric conducting materials such as polysilicon, aluminium, tungsten.Conductive layer 102 is as the usefulness of hearth electrode.
Please refer to Fig. 3, follow the smooth dielectric layer 104 that forms on conductive layer 102 with covering, the material of dielectric layer 104 for example is boron phosphorus silicate glass (Borophosphosilicate glass, BPSG), silica or spin-coating glass (spin on glass, SOG), silicon nitride, it can form by methods such as physical vapour deposition (PVD) or rotary coating.The enforcement that then utilizes technology (not shown)s such as photoetching and etching is with one one of definition dielectric layer 104, thereby forms the opening 106 that penetrates dielectric layer 104, and 106 parts of opening have been exposed the conductive layer 102 of below.
Please continue with reference to Fig. 3, then smoothly on dielectric layer 104 deposit layer of conductive material with covering and fill up opening 106, and utilization is as the execution of the planarization program (not shown) of CMP (Chemical Mechanical Polishing) process, to remove the electric conducting material part that is higher than dielectric layer 104, thereby the conductive electrode 108 that in opening 106, stays, and expose the end face of conductive electrode 108.At this, the material of conductive electrode 108 for example is silicon materials, SiGe (SiGe) material, tungsten titanium (TiW) or the titanium nitride electric conducting materials such as (TiN) through mixing through mixing.
Please refer to Fig. 4, then implement etching program 110, to remove the dielectric layer 104 of part, as the part that adopts dotted line to represent at dielectric layer 104.Etching program 110 implement finish after, part exposed conductive electrode 108 and stays dielectric layer 104b through reduced down in thickness.At this, the exposed portions serve of conductive electrode 108 has the height H between 10～5000 dusts substantially, and height H is preferably between 100～4000 dusts.In addition, conductive electrode 108 has diameter D1, and this diameter D1 then decides on the photolithographic process capability that is used to form the opening 106 in Fig. 3.Conductive electrode 108 is as the usefulness of the heating electrode of the phase-change material layers of the follow-up formation of heating.
Please refer to Fig. 5, then implement oxidation program 112, exposed portions serve with partial oxidation conduction interlayer thing 108, thereby having formed one deck oxide skin(coating) 114 on the surface of the conductive electrode 108 that exposes, it has coated the end face of conductive electrode 108 exposed divisions and sidewall and and then has extended downward the part that is lower than dielectric layer 104b surface.As shown in Figure 5, this moment 108 of conductive electrodes comprised two major parts, be size through the reduction the 108b of reduction portion and size without the reduction the 108a of intrinsic portion.The end face of the 108b of reduction portion and sidewall sections are oxide layer 114 complete coatings, and the 108a of intrinsic portion then still is embedded in the dielectric layer 104b and is not subjected to the influence of above-mentioned oxidation program 112.In addition, the 108b of reduction portion is stacked in the intrinsic portion on the 108a according to axis direction substantially, and the bottom surface of the 108b of reduction portion is a little less than the end face of dielectric layer 104b.Oxidation program 112 for example is the furnace oxidation program, and it implements temperature approximately between 500～1000 ℃, and the execution time is then approximately between 1～600 minute.The execution temperature and time of oxidation program 112 is then looked employed conductive electrode 108 materials and can be changed slightly, is not to exceed with above-mentioned execution condition.By the execution of oxidation program 112, the 108b of reduction portion of conductive electrode 108 can thereby have the diameter D2 less than the diameter D1 of the 108a of intrinsic portion that is positioned at its below.At this, the visual technology of D2 is required and have diameter between 5～1000 dusts.
Please refer to Fig. 6, then implement etching program 116, with etch-back oxide layer 114, and then expose the end face 120 of the 108b of reduction portion of conductive electrode 108, and on the sidewall of the 108b of reduction portion, stayed oxide spacer (oxide spacer) 114a.
Please refer to Fig. 7, then smooth 108b of reduction portion and the oxide spacer 114a that forms one deck phase-change material with covering and covered conductive electrode 108 on dielectric layer 104b.Then utilize the execution of (all not showing) of photoetching and etching program, to define above-mentioned phase-change material, on dielectric layer 104b, to form the phase-change material layers 122 of patterning.As shown in Figure 7, phase-change material layers 122 has also coated the 108b of reduction portion of conduction interlayer thing 108, but its only contacted the 108b of reduction portion end face and and the sidewall of reduction portion 108b between separated by oxide spacer 114a.The material of phase-change material layers 122 for example is a chalcogen compound, for example is Ge-Sb-Te ternary chalcongen compound or Te-Sb binary chalcogen compound.
Please refer to Fig. 8, then forming dielectric layer 124 and the smooth end face that has covered the phase-change material layers 122 that is positioned on the dielectric layer 104b on the dielectric layer 104b with covering.Then define one one of dielectric layer 124, and in this one, form opening OP1 by follow-up photoetching and etching program (all showing).Opening OP has then exposed an one of phase-change material layers 122.The material of dielectric layer 124 for example is silica, silicon nitride or spin-coating glass (spin on glass, SOG), and it can form by methods such as physical vapour deposition (PVD) or rotary coating.Then smooth formation layer of conductive material and fill up the opening OP1 that is formed in the dielectric layer 124 on dielectric layer 124 with covering, and by follow-up photoetching and etching program (all showing) to define this layer electric conducting material, and then formed conductive layer 126, with usefulness as top electrode.One one of lead 126 has penetrated dielectric layer 124 and has contacted phase-change material layers 122, and its material for example is electric conducting materials such as aluminium, tungsten.
Compare known phase-change memory cell structure as shown in Figure 1, the diameter of the heating electrode appropriateness reduction by mode of oxidizing in the phase change memory apparatus in present embodiment, and then reach the contact area of reducing between phase-change material layers and heating electrode, thereby have the current density of the phase-change material layers that has promoted supply and reduce the reset current effects such as (reset current) that the phase-change material in the phase-change material layers is transformed into amorphous phase by crystalline phase.The manufacture method of present embodiment does not possess the problem that is subject to photolithographic process capability in the manufacture method as known phase-change memory cell structure, and mode of oxidizing can be applied in the technology of phase change memory apparatus of other type or technology kenel, with the contact area of further reduction heating electrode and phase-change material interlayer.
Second embodiment:
Fig. 9～12 are a series of schematic diagrames, have shown the manufacture method according to the phase change memory apparatus of second embodiment of the invention.Present embodiment is the variation example of first embodiment, and wherein the part processing step is same as first embodiment, only shows different steps at this, and with simplicity of illustration, and the member that is same as in first embodiment also is denoted as identical label.
Please refer to Fig. 9, by such as Fig. 2～5 among first embodiment the execution of description technology, to provide as shown in Figure 5 structure as initial structure.Follow the smooth dielectric layer 140 that forms on this initial structure, with the planarization integral surface with covering.As shown in Figure 9.On dielectric layer 104b, form dielectric layer 140 and coated oxide skin(coating) 114, and conductive electrode comprises (reduced portion) 108b of reduction portion and the 108a of intrinsic portion (intrinsic portion) having diameter D2 and D1 respectively 108 this moments.
Please refer to Figure 10, by implementing a planarization program (not shown), for example be a chemico-mechanical polishing (CMP) program or an etch-back (etch-back) program, with parts such as the oxide skin(coating) that removes the reduction portion 108b surface that is higher than conductive electrode 108 and dielectric layers, and then exposed the end face of the 108b of reduction portion and on its sidewall, stayed monoxide layer 114b, and the dielectric layer 140a that stays a reduced down in thickness.
Please refer to Figure 11, follow smooth one deck phase-change material that forms on dielectric layer 140a, with covering to cover the 108b of reduction portion, oxide spacer 114b and the dielectric layer 140a of conductive electrode 108.Then utilize the execution of photoetching and etching program (all show), to define above-mentioned phase-change material and on the dielectric layer 140a of part, to form the phase-change material layers 142 of patterning.As shown in figure 11, phase-change material layers 142 also coated conductive electrode 108 the 108b of reduction portion end face and be positioned on the oxide skin(coating) 114b on the 108b of the reduction portion sidewall.The material of phase-change material layers 142 for example is a chalcogen compound, for example is Ge-Te-Sb ternary chalcongen compound or Te-Sb binary chalcogen compound.
Please refer to Figure 12, then forming dielectric layer 144 and the smooth end face that has covered the phase-change material layers 142 that is positioned on the dielectric layer 140a on the dielectric layer 140a with covering.Then define one one of dielectric layer 144, and in this one, form opening OP2 by follow-up photoetching and etching program (all showing).Opening OP2 has then exposed an one of phase-change material layers 142.The material of dielectric layer 144 for example is silica, silicon nitride or spin-coating glass (spin on glass, SOG), and it can form by methods such as physical vapour deposition (PVD) or rotary coating.Then smooth formation layer of conductive material and fill up the opening OP2 that is formed in the dielectric layer 144 on dielectric layer 144 with covering, and by follow-up photoetching and etching program (all showing) to define this layer electric conducting material, and then formed conductive layer 146, with usefulness as top electrode.One one of conductive layer 146 has then penetrated dielectric layer 144 and then has contacted phase-change material layers 144, and its material for example is electric conducting materials such as aluminium, tungsten.
Compare known phase-change memory cell structure as shown in Figure 1, the diameter of the heating electrode appropriateness reduction by method for oxidation in the phase change memory apparatus in present embodiment, and then reach the contact area of reducing between phase-change material layers and heating electrode, thereby have the current density of the phase-change material layers that has promoted supply and reduce the reset current effects such as (reset current) that the phase-change material in the phase-change material layers is transformed into amorphous phase by crystalline phase.The manufacture method of present embodiment does not possess the problem that is subject to photolithographic process capability in the manufacture method as known phase-change memory cell structure, and method for oxidation can be applied in the technology of phase change memory apparatus of other type or technology kenel, with the contact area of further reduction heating electrode and phase-change material interlayer.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; when can being used for a variety of modifications and variations, so protection scope of the present invention is as the criterion when looking appended the claim scope person of defining.
Claims (25)
1. phase change memory apparatus comprises:
Hearth electrode is positioned in the substrate;
First dielectric layer is positioned on this hearth electrode;
Heating electrode is embedded in this first dielectric layer and part protrudes in this first dielectric layer, and wherein this heating electrode comprises:
Intrinsic portion is embedded in this first dielectric layer, has first diameter;
Reduction portion is stacked in this intrinsic portion, has second diameter less than this first diameter; And
Oxide spacer is stacked in this intrinsic portion and around the sidewall of this reduction portion of coating;
Phase-change material layers, be arranged at the part this first dielectric layer on and coat this heating electrode, wherein this phase-change material layers has contacted an end face of this reduction portion of this heating electrode; And
Top electrode is positioned on this phase-change material layers and contacts this phase-change material layers.
2. phase change memory apparatus as claimed in claim 1, wherein this second diameter of this reduction portion of this heating electrode is between 5～1000 dusts.
3. phase change memory apparatus as claimed in claim 1, wherein this reduction portion of this heating electrode is stacked in this intrinsic portion of this heating electrode according to axis direction substantially.
4. phase change memory apparatus as claimed in claim 1, wherein this reduction portion of this heating electrode and this phase-change material layers is separated by this oxide spacer.
5. phase change memory apparatus as claimed in claim 1, wherein the bottom surface of this reduction portion of this heating electrode is a little less than the end face of this first dielectric layer.
6. phase change memory apparatus as claimed in claim 1 also comprises second dielectric layer, be positioned on this first dielectric layer and around the sidewall of this phase-change material layers, and this top electrode is positioned on this second dielectric layer.
7. phase change memory apparatus as claimed in claim 1, wherein this phase-change material layers comprises chalcogen compound.
8. the manufacture method of a phase change memory apparatus comprises the following steps:
Substrate is provided, and it is provided with first conductive layer;
In this first conductive layer and this substrate, form first dielectric layer;
Form heating electrode in an one of this first dielectric layer, this heating electrode penetrates this first dielectric layer and has contacted this first conductive layer;
Implement first etching program, expose this heating electrode with the thickness that reduces this first dielectric layer and part one one;
Implement the oxidation program, on the end face of this one that this heating electrode was exposed and sidewall, to form oxide skin(coating);
Implement second etching program, with remove the part this oxide skin(coating), expose this one that protrudes in this first dielectric layer end face this heating electrode and on the sidewall of this one, stay oxide spacer;
One one on this first dielectric layer forms phase-change material layers, and this phase-change material layers has coated this heating electrode and this oxide spacer, and wherein this phase-change material layers has contacted this heating electrode of this end face of this one that protrudes in this first dielectric layer; And
On this phase-change material layers, form second conductive layer and contact this phase-change material layers.
9. the manufacture method of phase change memory apparatus as claimed in claim 8, wherein this oxidation program was being implemented under 500～1000 ℃ temperature 1～600 minute.
10. the manufacture method of phase change memory apparatus as claimed in claim 8, wherein this oxidation program diameter of reducing this conductive electrode is between 5～1000 dusts.
11. the manufacture method of phase change memory apparatus as claimed in claim 8, wherein the material of this conductive electrode is silicon, SiGe, titanium nitride or the tungsten titanium through mixing through mixing.
12. the manufacture method of phase change memory apparatus as claimed in claim 8, wherein the bottom surface of this oxide spacer is lower than the end face of this first dielectric layer substantially.
13. the manufacture method of phase change memory apparatus as claimed in claim 8, wherein this oxide skin(coating) has inverted U-shaped substantially profile.
14. the manufacture method of phase change memory apparatus as claimed in claim 8, wherein this phase-change material layers comprises chalcogen compound.
15. the manufacture method of a phase change memory apparatus comprises the following steps:
Substrate is provided, and it is provided with first conductive layer;
In this first conductive layer and this substrate, form first dielectric layer;
Form heating electrode in an one of this first dielectric layer, this heating electrode penetrates this first dielectric layer and has contacted this first conductive layer;
Implement first etching program, expose this heating electrode with the thickness that reduces this first dielectric layer and part one one;
Implement the oxidation program, with formation first oxide skin(coating) on the end face of this one that this heating electrode was exposed and sidewall;
On this first dielectric layer, form second dielectric layer, and coat this first oxide skin(coating);
Implement the planarization program, removing this second dielectric layer and this oxide skin(coating) of part, and then expose this end face of this one that this heating electrode exposes and on the sidewall of this one, stay second oxide skin(coating);
One one on this second dielectric layer forms phase-change material layers, and this phase-change material layers only contacts the end face of this electrode and this oxide skin(coating); And
On this phase-change material layers, form second conductive layer and contact this phase-change material layers.
16. the manufacture method of phase change memory apparatus as claimed in claim 15, wherein this oxidation program was being implemented under 500～1000 ℃ temperature 1～600 minute.
17. the manufacture method of phase change memory apparatus as claimed in claim 16, wherein the reduction of this oxidation program protrudes in the diameter of this one of this conductive electrode of this first dielectric layer between 5～1000 dusts.
18. the manufacture method of phase change memory apparatus as claimed in claim 16, wherein the material of this conductive electrode is silicon, SiGe, titanium nitride or the tungsten titanium through mixing through mixing.
19. the manufacture method of phase change memory apparatus as claimed in claim 16, wherein the bottom surface of this oxide spacer is lower than the end face of this first dielectric layer substantially.
20. the manufacture method of phase change memory apparatus as claimed in claim 16, wherein this first oxide skin(coating) has inverted U-shaped substantially profile.
21. the manufacture method of phase change memory apparatus as claimed in claim 16, wherein this phase-change material layers comprises chalcogen compound.
22. one kind is reduced between heating electrode and phase-change material layers and contacts Method for Area, comprises the following steps:
First dielectric layer is provided, is embedded with heating electrode in it, this heating electrode has the exposed division that exceeds this first dielectric layer surface, and this heating electrode has first diameter;
Implement the oxidation program, forming oxide skin(coating) on the end face of this exposed division that this heating electrode was exposed and sidewall, and reduce size to the second diameter of this exposed division, this second diameter is less than this first diameter;
Remove this oxide skin(coating) of part, with the end face of this exposed division of exposing this heating electrode and on the sidewall of this exposed division, stay oxide spacer; And
Form phase-change material layers on this exposed division of this heating electrode, this phase-change material layers contacts the end face of this exposed division and this oxide spacer at least.
23. contact Method for Area between reduction heating electrode as claimed in claim 22 and phase-change material layers, this oxide skin(coating) that wherein removes part is realized by etching mode.
24. contact Method for Area between reduction heating electrode as claimed in claim 22 and phase-change material layers, before this oxide skin(coating) that removes part, also be included on this first dielectric layer the step that forms second dielectric layer, this second dielectric layer has also covered the exposed division of this oxide skin(coating) and this heating electrode.
25. contact Method for Area between reduction heating electrode as claimed in claim 24 and phase-change material layers, this oxide skin(coating) that wherein removes part is realized by cmp method.
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| CN200710103933A CN100585900C (en) | 2007-05-15 | 2007-05-15 | Phase changeable storage device and manufacture method thereof |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101877355A (en) * | 2009-04-29 | 2010-11-03 | 旺宏电子股份有限公司 | Memory devices and methods for manufacturing and methods for operating |
| CN106415869A (en) * | 2014-02-19 | 2017-02-15 | 密克罗奇普技术公司 | Resistive memory cell with sloped bottom electrode |
| US10056545B2 (en) | 2013-03-13 | 2018-08-21 | Microchip Technology Incorporated | Sidewall-type memory cell |
-
2007
- 2007-05-15 CN CN200710103933A patent/CN100585900C/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101877355A (en) * | 2009-04-29 | 2010-11-03 | 旺宏电子股份有限公司 | Memory devices and methods for manufacturing and methods for operating |
| CN101877355B (en) * | 2009-04-29 | 2012-02-08 | 旺宏电子股份有限公司 | Memory devices and methods for manufacturing and methods for operating the device |
| US10056545B2 (en) | 2013-03-13 | 2018-08-21 | Microchip Technology Incorporated | Sidewall-type memory cell |
| CN106415869A (en) * | 2014-02-19 | 2017-02-15 | 密克罗奇普技术公司 | Resistive memory cell with sloped bottom electrode |
Also Published As
| Publication number | Publication date |
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| CN100585900C (en) | 2010-01-27 |
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