CN101308868B - Floating grid with multiple layer hetero quantum point structure applicable for memory unit - Google Patents
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Abstract
The invention relates to a stacked quantum dot structure floating gate which is applicable in a memory cell. The stacked quantum dot structure floating gate comprises a buffer layer at the lower part, and a first quantum dot growth layer, a first filling medium layer, an intermediate layer, a second quantum dot growth layer, a second filing medium layer and a filling protective layer at the top, which are arranged on the buffer layer. The cross section of the stacked quantum dot structure floating gate applied in a memory cell is a rectangular, oval or regular hexagonal loop. The invention further relates to a radioprotective nonvolatile memory and a micro-magnetic sensor, which are based on stacked quantum dots and take above stacked quantum dot structure floating gates as memory cells. The stacked quantum dot structure floating gate, the radioprotective nonvolatile memory and the micro-magnetic sensor which are based on the stacked quantum dot structure floating gates, have radiation resistances and overcome the problems of electricity leakage and data storage failure caused by the coupling of the quantum dots.
Description
Technical Field
The invention relates to a multilayer quantum dot structure floating gate for a storage unit, and an anti-radiation nonvolatile memory and a micro magnetic sensor based on the multilayer quantum dot structure floating gate.
Background
From the function of solid-state electronic memories, the memory can be divided into volatile (vollatile) and non-volatile (nonvolatile) types. Volatile memories, represented by Dynamic Random Access Memories (DRAMs), are widely used in electronic computer memories because of their relatively high speed and low cost. However, in such a memory, as the integration degree is increased from 512Mbit to 1GBit, the power consumption is increased sharply, thereby almost occupying the total power consumption when the computer is in standby. On the other hand, due to the volatility of the DRAM, the information in the memory must be read from the hard disk and stored again each time the computer is turned on for use and turned off, which not only increases the turn-on and turn-off time of the computer, but also limits the application in some occasions.
In order to improve the performance of computers, nonvolatile memories are now used to replace DRAMs in computers. Flash memories using a floating gate MOSFET as a basic unit are mostly used, and the purpose of storing information is achieved by controlling a channel current of a field effect transistor by an electrostatic potential of charges stored in a gate. Since the operation of such a memory device requires a high-sensitivity electric field and strict leakage control to prolong the storage time, the thickness of the tunneling gate must be increased, and the increase of the thickness of the gate dielectric layer leads to the increase of the control voltage, thereby reducing the access speed.
In order to solve the comprehensive contradiction of power consumption, speed, manufacturing difficulty and the like existing in the nonvolatile memory, scientists explore a new way for manufacturing the memory device from multiple aspects of new materials, new structures, new technologies and the like. For example, quantum dot memory (QDAM) based on semiconductor nano silicon quantum dots to construct nano silicon quantum dot coulomb blockade effect of semiconductor non-volatile floating gate nano memory is used, which spans the obstacles of processing technology, and can satisfy the requirement of low power consumption while further improving the storage density, storage speed and storage time. Due to the nature of the quantized energy levels, the physical system of such devices is determined to be small to a certain scale (quantum dots), which will exhibit energy quantization when compared to the de broglie wavelength of electrons; meanwhile, the nano electronic device has the characteristic of charge quantization due to the very small capacitance, so that the nano electronic device based on the semiconductor quantum dots can show a series of characteristics different from those of a classical device. However, in the conventional semiconductor quantum dot material memory, charge loss inevitably occurs after the quantum dot density is increased and the size is reduced, and coupling interaction occurs between quantum dots to a certain extent, which causes quantum dot leakage and information loss.
Disclosure of Invention
The invention aims to solve the problems of electric leakage and information storage failure caused by coupling between quantum dots of the conventional quantum dot floating gate, so that the hollow multi-layer quantum dot structure floating gate which can not generate the electric leakage phenomenon and the information storage failure and can be used for a storage unit is provided.
Another objective of the present invention is to provide a radiation-resistant nonvolatile memory based on a hollow multi-layered quantum dot structure floating gate, which does not generate the problems of leakage and information storage failure and has radiation-resistant capability.
The invention further aims to provide a micro-magnetic sensor based on a hollow multi-layer quantum dot structure floating gate, which does not generate the problems of electric leakage and information storage failure and has radiation resistance.
The purpose of the invention is realized by the following technical scheme:
the invention provides a multilayer quantum dot structure floating gate capable of being used for a storage unit, which comprises a lower buffer layer, a first quantum dot growth layer, a first filling dielectric layer, an intermediate layer, a second quantum dot growth layer, a second filling dielectric layer and a top landfill protective layer, wherein the first quantum dot growth layer, the first filling dielectric layer, the intermediate layer, the second quantum dot growth layer, the second filling dielectric layer and the top landfill protective layer are sequentially grown on the lower buffer layer;
the multilayer quantum dot structure floating gate for the memory unit is provided with a hollowed-out cross section which is a rectangular ring, an elliptical ring or a regular hexagonal ring;
wherein, the minor face of rectangle intra-annular be 10 ~ 100000nm, the minor face of outer loop is 20 ~ 200000nm, the ratio on minor face and long limit is 1: 1-5, and the ring width is 10-100000 nm;
the minor axis of the inner ring of the elliptical ring is 10-100000 nm, the minor axis of the outer ring is 20-200000 nm, and the ratio of the minor axis to the major axis is 1: 1-5, and the ring width is 10-100000 nm;
the side length of the inner ring of the regular hexagonal ring is 10-100000 nm, the side length of the outer ring is 20-200000 nm, and the ring width is 10-100000 nm.
In the technical scheme of the invention, the lower buffer layer can be various common semiconductor substrate materials, preferably Si, Ge, SiC and SiNsOr directly using high resistivity oxide easily deposited with semiconductor quantum dots as buffer layer material, such as SiO2、GeO4And the like. The lower buffer layer is 3-100 nm. When the gate oxide layer of SOI CMOS meets the condition of high resistivity and is easy to grow with semiconductor quantum dots, the buffer layer can be omitted and directly replaced by the gate oxide layer of SOI CMOS.
The component materials of the quantum dots in the first quantum dot growth layer and the second quantum dot growth layer are semiconductor materials, magnetic materials or superconducting materials; the quantum dots are oval or round, the diameter of the round is 5-100 nm, the minor axis of the oval is 5-50 nm, and the ratio of the minor axis to the major axis is 1: 1-5; and the diameters of the quantum dots in the two quantum dot growth layers can be different.
The semiconductor material is preferably a semiconductor material or a semiconductor compound material such as Si, Ge, GaAs, or SiC.
The magnetic material comprises a magnetic metal material, a magnetic semi-metal material and a magnetic semiconductor material; the magnetic metal material is preferably Fe, Co, CoFe, Ni, NiCoFe, CoFeB, CoFeSiB and the like; the magnetic semi-metal material is preferably Fe3O4、CrO2、LaSrMnO3Or Heuseler alloys, etc.; the magnetic semiconductor material is preferably GaMnAs, InMnAs, CdMnSe, SiMnN and the like.
The superconducting material comprises an element superconductor material with superconducting property, preferably Al, Ga, Zn, Cd, In, Sn and the like; also included are compound superconductor materials having high temperature superconductivity, such as YBaCuO, LaCuO, and the like.
The first filling dielectric layer and the second filling dielectric layer are made of compound insulator materials, including semiconductor compound insulator materials, metal compound insulator materials and ferroelectric insulator materials; preferably a semiconducting compound material such as SiO2、GeO2、SiNxEtc.; preferably a metal compound insulator material such as Al2O3、MgO2ZnO, etc.; preferably a ferroelectric insulating material ScTiO3、BaTiO3、PbTiO3Etc.; the thickness of the first filling medium layer is the same as the diameter of the quantum dots in the first quantum dot growth layer; the thickness of the second filling medium layer is the same as the diameter of the quantum dots in the second quantum dot growth layer.
The intermediate layer is made of a compound insulator material and comprises a semiconductor compound insulator material, a metal compound insulator material and a ferroelectric insulator material; preferably a semiconducting compound material such as SiO2、GeO2、SiNxEtc.; preferably a metal compound insulator material such as Al2O3、MgO2ZnO, etc.; preferably a ferroelectric insulating material ScTiO3、BaTiO3、PbTiO3Etc.; the thickness of the layer is 1-30 nm.
The top buried protective layer is made of a compound insulator material and comprises a semiconductor compound insulator material and a metal compound insulator material; preferably a semiconducting compound material such as SiO2、GeO2、SiNxEtc.; preferably a metal compound insulator material such as Al2O3、MgO2ZnO, etc.; the thickness of the layer is 5-1000 nm.
The invention provides a radiation-resistant nonvolatile memory based on multilayer quantum dots, which comprises an SOI CMOS substrate, a memory unit integrated in the SOI CMOS substrate, a transition metal layer, a ground wire, a bit line and a write word line, wherein the transition metal layer is a metal layer;
the SOI CMOS substrate comprises: the back grid metal lead layer is sequentially grown on the first semiconductor material layer, the buried oxide layer and the second semiconductor material layer on the back grid metal lead layer; according to different environments, various types of SOI CMOS such as full depletion type, double-gate type, high temperature resistant type, pulse resistant type, high pressure resistant type and the like can be selected; the second semiconductor material layer is composed of a drain electrode, a grid electrode and a source electrode of the transistor;
the memory cell is the floating gate with the multilayer quantum dot structure for the memory cell; the multi-layer quantum dot structure floating gate for the memory unit can comprise two or more than two quantum dot growth layers; the floating gate structure with more than two layers of quantum dots is a structure obtained by periodically copying the intermediate layer and the second layer of quantum dots;
one end of the memory unit and the source electrode of the transistor are interconnected through a transition metal layer, the bit line is also the grid electrode of the transistor, and the bit line is arranged above the transistor and is vertical to the transition metal lead layer; the transition metal lead layer is positioned right above the memory unit; the ground lines are parallel to the bit lines and perpendicular to the write word lines.
The invention provides a micro-magnetic sensor based on multilayer quantum dots, which comprises an SOI CMOS substrate, a micro-magnetic sensor unit integrated in the SOI CMOS substrate, a transition metal layer, a ground wire, a bit line and a write word line, wherein the transition metal layer is a metal layer;
the SOI CMOS substrate comprises: the first semiconductor material layer is sequentially grown on the buried oxide layer and the second semiconductor material layer on the first semiconductor material layer; according to different environments, various types of SOI CMOS such as full depletion type, double-gate type, high temperature resistant type, pulse resistant type, high pressure resistant type and the like can be selected; the second semiconductor material layer is composed of a drain electrode, a grid electrode and a source electrode of the transistor;
the micro-magnetic sensor unit is the floating gate with the multi-layer quantum dot structure for the storage unit, the quantum dots in the quantum dot growth layer are made of magnetic materials, and the quantum dots are oval quantum dots; the hollow multi-layer quantum dot structure floating gate for the memory unit can comprise two or more than two quantum dot growth layers; the floating gate structure with more than two layers of quantum dots is a structure obtained by periodically copying the intermediate layer and the second layer of quantum dots;
one end of the micro magnetic sensor unit is interconnected with the source electrode of the transistor through a transition metal layer, the bit line is also the grid electrode of the transistor, and the bit line is arranged above the transistor and is vertical to the transition metal lead layer; the transition metal lead layer is positioned right above the micro magnetic sensor unit; the ground lines are parallel to the bit lines and perpendicular to the write word lines.
The multilayer quantum dot structure floating gate for the memory unit, the anti-radiation nonvolatile memory and the micro-magnetic sensor based on the multilayer quantum dot structure floating gate all use the hollow-out quantum dot structure multilayer film floating structure as a functional unit, so that the invention has the following advantages:
the memory utilizes the voltage applied to the floating gate multilayer film to regulate and control the layer where the corresponding quantum dot can enter. The charge characteristics of quantum dots of different layers, into which electrons enter, are utilized to modulate the transport characteristics of electrons in a channel of a gate region in the SOICMOS transistor, so that the magnitude of current output from the drain of the transistor is controlled. So as to achieve the function of marking information and further complete information storage.
In the existing single-layer quantum dot floating gate structure memory, in order to generate a state of '0' or '1', voltage must be increased to discharge charges into a CMOS channel through a gate, so that a partial potential barrier of the quantum dot floating gate structure in contact with the CMOS gate cannot be too high, thereby increasing the probability of electron tunneling into the channel when unnecessary discharge occurs, and affecting the effectiveness of data storage; or, in order to obtain a high-sensitivity electric field and strict leakage current control, the thickness of the gate is reduced, thereby resulting in an increase in control voltage and a reduction in access speed. In addition, the cross section of the existing memory functional unit based on the quantum dots is in a non-hollow shape, which is not beneficial to thoroughly eliminating the information loss problem caused by the coupling effect between the quantum dots, reducing the read-write current, inhibiting the noise and solving the radiation resistance problem of the device.
Compared with the prior memory based on the quantum dot structure, the invention adopts the hollow multi-layer quantum dot floating gate structure as the memory unit, thereby thoroughly eliminating the coupling effect among the quantum dots from the manufacturing process and ensuring the stability of information; the structure enables effective voltage to be more concentrated on a quantum dot region needing to be acted, so that the magnitude of read-write current is reduced; the hollow cross section of the structure increases the heat dissipation area, and is beneficial to controlling the generation of thermal noise; the hollow-out cross section structure is a closed geometric pattern, so that electromagnetic field is closed in space, and radiation resistance of devices of the device is facilitated. In addition, electrons are limited among the multiple layers of quantum dots, the part of the electrons, which is in contact with the COMS gate, can be made of a material with a higher potential barrier, the thickness of the tunneling gate can be increased, the electrons are not suitable to tunnel in the material to cause a leakage phenomenon, and the structure of the multiple layers of quantum dots has the advantages of radiation resistance, difficult volatilization of data, simple operation and the like. The SOI CMOS substrate has the characteristics of small dependence on environment, radiation resistance, high temperature resistance and the like, so that the environmental adaptability of the storage structure is enhanced, and the application range of the storage structure is expanded. The hollow-out pattern is used in the structure, so that the process is facilitated to be realized, and the storage density can be improved. Therefore, the design scheme of the memory fundamentally solves the problem of dependence of the quantum dot device on the environment and improves the storage density.
The micro-magnetic sensor utilizes the quantum energy level drift characteristic of a magnetic material quantum dot to a micro magnetic field, and judges the drift response of a drain working curve to the micro field by regulating and controlling the scanning voltage at two ends of a floating gate, thereby determining the size of the magnetic field. Due to the characteristic that the quantization energy level of the magnetic material quantum dot is very sensitive to a magnetic field, compared with the traditional sensor, the sensor can distinguish the change of a weak magnetic field; and because the functional unit and the substrate have radiation resistance, the device can work under the radiation condition, and the characteristics of high temperature resistance and the like of the substrate also enhance the application range of the device.
Drawings
FIG. 1 is a cross-sectional view of a floating gate with a multi-layered quantum dot structure, which can be used in a memory cell according to the present invention;
FIG. 2 is a cross-sectional view of a radiation-resistant nonvolatile memory based on multi-layered quantum dots with a hollow shape according to the present invention;
FIG. 3 is an equivalent diagram of the radiation-hard nonvolatile memory shown in FIG. 2;
FIG. 4 is a schematic diagram illustrating the operation of the radiation-resistant nonvolatile memory according to the present invention;
FIG. 5 is a cross-sectional view of a micro-magnetic sensor based on multi-layered quantum dots with a hollowed-out shape according to the present invention;
FIG. 6 is a schematic diagram of the operating principle of the micro-magnetic sensor of the present invention;
FIG. 7 is an equivalent schematic diagram of the micro-magnetic sensor shown in FIG. 5;
wherein,
101 is a back gate metal lead layer, 102 is a p-type body silicon layer,
1 is a buried oxide layer, 21 is a source region (N-type) of a transistor,
22 is the gate region (P-type) of the transistor, 23 is the drain region (N-type) of the transistor,
31 is a metal lead layer (GND Line) connected to 21, GND denotes that 31 is connected to ground,
33 are metal wiring layers (Bit lines) connected to 23, Bit lines indicate that 33 are connected to Bit lines,
32 is a gate insulating dielectric layer, 41 is a lower buffer layer,
42 an intermediate layer, 43 a top buried protective layer,
51 is a first quantum dot growth layer, 52 is a second quantum dot growth layer,
61 is a first filling dielectric layer, 62 is a second filling dielectric layer,
7 is a Writing Word Line (WWL),
8 is a device protection region filled with an insulating medium,
9 is the floating gate of the multi-layer quantum dot structure of the invention, and TR represents an SOI CMOS transistor.
Detailed Description
The cross-sectional view of the hollow-out multi-layer quantum dot structure floating gate for a memory cell provided by the invention is shown in fig. 1, and comprises a lower buffer layer 41, and a first quantum dot growth layer 51, a first filling dielectric layer 61, an intermediate layer 42, a second quantum dot growth layer 52, a second filling dielectric layer 62 and a top buried protection layer 43 which are sequentially grown on the lower buffer layer.
Examples 1,
As shown in FIGS. 2 and 3, the memory cell array of the quantum dot structure floating gate multilayer film memory unit is formed by combining a large number of QADM units. In a QADM memory cell, a hollow quantum dot structure floating gate multilayer film memory cell 9, an SOI CMOS transistor TR, and a set of wirings, i.e., a bit line 33, a write word line 7, a back gate metal lead 101, and a ground line GND31 are included.
The multilayer film structure in the hollow quantum dot structure floating gate multilayer film memory storage unit is as follows: sequentially depositing a lower buffer layer SiN with the thickness of 2nm, a first layer Si quantum dot with the diameter of 5nm and a first layer filling dielectric layer SiO with the thickness of 5nm on an SOI CMOS oxide gate substrate2Intermediate layer SiO with thickness of 2nm2A second layer of Si quantum dots with the diameter of 5nm, a second layer of filling dielectric layer with the thickness of 5nm, and a compound insulating material SiN with the thickness of 10 nm.
The etching shape of the multilayer film structure of the hollow quantum dot structure floating gate multilayer film memory storage unit is as follows: rectangle annular structure, the minor face of rectangle ring inner ring be 100nm, the minor face of outer loop is 200nm, the ratio on minor face and long limit is 1: 2.
the hollow quantum dot structure floating gate multilayer film memory storage unit is connected with an SOI CMOS transistor TR through a gate insulating medium layer 32 and a lower buffer layer 41. The write word line 7 is arranged above the floating gate multilayer film memory cell in the layout and directly connected with the memory cell.
As shown in fig. 2 and 3, the whole QDAM unit is made up of several layers 41, 42, 51, 52, 61, 62. The nonfunctional areas in these layers are formed by an insulating buried dielectric 8 such as SiO2Etc. are buried. In the QDAM cell, the metal wiring layers are only three layers, i.e., a layer in which the write word line 7 is located, a layer in which the ground line GND31 and the bit line 33 are located, and a layer 101 in which the back gate metal wiring is located. WhereinThe ground line GND31 is directly connected to the source region 21 of the SOI CMOS transistor, the bit line 33 is directly connected to the drain region 23 of the SOI CMOS transistor, and the back gate metal lead 101 is directly connected to the bulk silicon substrate layer 102 of the SOI CMOS transistor.
The radiation-resistant nonvolatile memory based on the hollow-out multilayer quantum dots realizes information storage operation by changing the magnitude and direction of the voltage between the write word line and the back gate lead wire layer in the memory cell, and judges the state of the stored information according to the magnitude of the current in the bit line. In the process of reading and writing the memory cell, according to the quantum mechanical principle described in the background art, when the voltage at two ends of the floating gate multilayer film, i.e. the voltage between the back gate metal lead layer 101 and the write word line 7, is smaller than a specific first critical value V1When the quantum dots are arranged in the first layer or the second layer, the filling state of electrons in the quantum dots in the first layer or the second layer is not influenced. At this time, if a constant voltage of an appropriate magnitude is applied between the bit line 33 and the ground line 31, the current in the bit line does not change due to the change in voltage between the back gate metal lead layer 101 and the write word line 7. This is the principle of information reading. When the voltage between the back gate metal lead layer 101 and the write word line 7 is larger than a specific first threshold value V1Then, electrons will be filled into the second layer of quantum dots; at this time, if the voltage between the bit line 33 and the ground line 31 is the same as the voltage at the time of reading information, the current in the bit line increases due to the change in the voltage between the back-gate metal lead layer 101 and the write word line 7, and the voltage between the back-gate metal lead layer 101 and the write word line 7 is less than the second threshold voltage V2Does not change with the increase of the number of the optical fibers. When the voltage between the back gate metal lead layer 101 and the write word line 7 is larger than a specific second threshold value V2Then, electrons will be filled into the first layer of quantum dots; at this time, if the voltage between the bit line 33 and the ground line 31 is the same as the voltage at the time of reading information, the current in the bit line increases due to the change in the voltage between the back-gate metal lead layer 101 and the write word line 7, and the voltage between the back-gate metal lead layer 101 and the write word line 7 is higher than the second threshold voltage V2Does not change with the increase of the number of the optical fibers. Therefore, by changing the voltage between the back gate metal wiring layer 101 and the write word line 7, the magnitude of the current in the bit line can be controlled, and the use of the voltage can be madeThe high-low change of the current judges the information state. That is, the write operation of the memory operates as shown in fig. 4. The specific operation process can be expressed as follows:
when the voltage across the floating gate multilayer film in the quantum dot structure floating gate multilayer film memory unit, i.e. the voltage between the back gate metal lead layer 101 and the write word line 7, is less than a specific first critical value V1At this time, electrons cannot pass through the top buried layer 43 and enter the second layer of quantum dots 62, nor the first layer of quantum dots 61. At this time, the information state in the quantum dot structure floating gate multilayer film memory unit is not changed. In this way, a current (i.e., a voltage that is not changed in any process is applied between the ground line and the bit line) is applied to the bit line 33, and the information state in the memory cell can be determined according to the magnitude of the current, thereby implementing the reading operation of information.
When the voltage at two ends of the floating gate multilayer film in the quantum dot structure floating gate multilayer film memory unit, namely the voltage between the back gate metal lead layer 101 and the write word line 7, is greater than a first critical value V1And is less than the second critical value V2Then electrons may gain sufficient energy to cross the top buried layer 43 into the second layer of quantum dots 62, but not gain sufficient energy to cross the intermediate layer 42 into the first layer of quantum dots 61. That is, the information state in the quantum dot structure floating gate multilayer film memory cell is changed, and the stored data is in a state of "0". At this time, if the above-mentioned less than V is applied to the cell1And a current is passed through bit line 33 to read the memory cell; the current flowing in the bit line 33 will be in a smaller state, i.e., a state storing data "0". This is a write operation to record information as "0".
When the voltage at two ends of the floating gate multilayer film in the quantum dot structure floating gate multilayer film memory unit, namely the voltage between the back gate metal lead layer 101 and the write word line 7, is greater than a second critical value V2And saturation breakdown voltage (saturation breakdown voltage refers to the voltage required to drain electrons into the SOI CMOS gate region, which is generally related to the thickness of the gate insulating dielectric) Electrons may gain sufficient energy across the multilayer film structure into the first layer quantum 61, but not across the gate insulating dielectric layer 32 into the gate region of soi cmos. That is, the information state in the quantum dot structure floating gate multilayer film memory cell is changed, and the stored data is in a state of "1". At this time, if the above-mentioned less than V is applied to the cell1And a current is passed through bit line 33 to read the memory cell; the current flowing in the bit line 33 will be in a larger state, i.e., a state storing data "1". This is a write operation to record information as "1".
If, at this time, a proper reverse voltage (generally V) is applied across the floating gate multi-layer film in the quantum dot structure floating gate multi-layer film memory cell2-V1<|V|<V2) The electrons in the first layer of quantum dots in the memory cell can again cross the intermediate layer 42 into the second layer of quantum dots. Thereby realizing the writing process of the information from '1' to '0'.
When the quantum dot structure floating gate multilayer film storage unit carries out first read-write operation, enough voltage needs to be applied to two ends of the floating gate multilayer film for the sake of insurance, and charges in quantum dots are emptied; then, the writing operation of the information of 0 is carried out. In addition, in each reading and writing process, information is read from the storage unit and compared with known information to determine which reading and writing mode is adopted, so that the storage correctness of the information in the use of the information unit is ensured.
The invention utilizes the characteristics of the quantum dot structure floating gate multilayer film memory cell to modulate the current in the bit line so as to judge the memory state of the information. The working principle is shown in the schematic diagram of fig. 4. And, since the electrons that store information are based on the quantum mechanics principle: when no enough external electric field is applied, electrons do not overflow, so that the electrons are confined in the two layers of quantum dot structures; therefore, the information is not lost after power failure, and the nonvolatile information storage is completed.
Examples 2,
According to the method in the embodiment 1, a multi-layer quantum dot structure floating gate for a memory unit is constructed, and the core structure of the multi-layer quantum dot structure floating gate comprises the following steps: sequentially depositing a lower buffer layer SiN with the thickness of 2nm, a first layer GaMnAs diluted magnetic quantum dot with the diameter of 5nm and a first layer filling dielectric layer SiO with the thickness of 5nm on an SOI CMOS oxide gate substrate2Intermediate layer SiO with thickness of 2nm2A second layer of GaMnAs diluted magnetic quantum dots with the diameter of 5nm, a second layer of filling medium layer with the thickness of 5nm and a compound insulating material SiN with the thickness of 10 nm.
The etching shape of the multilayer film structure of the hollow quantum dot structure floating gate multilayer film memory storage unit is as follows: rectangle annular structure, the minor face of rectangle ring inner ring be 100nm, the minor face of outer loop is 200nm, the ratio on minor face and long limit is 1: 2.
then, the hollow quantum dot structure floating gate multilayer film memory storage unit and the SOI CMOS transistor TR are constructed into a radiation-resistant nonvolatile memory based on multilayer quantum dots according to the method in the embodiment 1, and the working principle and the specific read-write operation method are the same as those in the embodiment 1.
Examples 3,
According to the method in the embodiment 1, a multi-layer quantum dot structure floating gate for a memory unit is constructed, and the core structure of the multi-layer quantum dot structure floating gate comprises the following steps: sequentially depositing a lower buffer layer SiN with the thickness of 2nm, a first layer LaCuO quantum dot with the diameter of 5nm and a first layer filling dielectric layer SiO with the thickness of 5nm on an SOI CMOS oxide gate substrate2Intermediate layer SiO with thickness of 2nm2A second layer of LaCuO quantum dots with the diameter of 5nm, a second layer of filling dielectric layer with the thickness of 5nm, and a compound insulating material SiN with the thickness of 10 nm.
The etching shape of the multilayer film structure of the hollow quantum dot structure floating gate multilayer film memory storage unit is as follows: rectangle annular structure, the minor face of rectangle ring inner ring be 100nm, the minor face of outer loop is 200nm, the ratio on minor face and long limit is 1: 2.
then, the hollow quantum dot structure floating gate multilayer film memory storage unit and the SOI CMOS transistor TR are constructed into a radiation-resistant nonvolatile memory based on multilayer quantum dots according to the method in the embodiment 1, and the working principle and the specific read-write operation method are the same as those in the embodiment 1.
Examples 4,
According to the method in the embodiment 1, a multi-layer quantum dot structure floating gate for a memory unit is constructed, and the core structure of the multi-layer quantum dot structure floating gate comprises the following steps: sequentially depositing a lower buffer layer SiN with the thickness of 2nm, a first layer Si quantum dot with the diameter of 5nm and a first layer filling dielectric layer SiO with the thickness of 5nm on an SOI CMOS oxide gate substrate2Intermediate layer SiO with thickness of 2nm2A second layer of Si quantum dots with the diameter of 5nm, a second layer of filling dielectric layer with the thickness of 5nm, and a compound insulating material SiN with the thickness of 10 nm.
The etching shape of the multilayer film structure of the hollow quantum dot structure floating gate multilayer film memory storage unit is as follows: an elliptical ring structure, wherein the outer major axis of the elliptical ring is 200nm, the length of the outer minor axis is 100nm, and the ratio of the major axis to the minor axis is 2: 1; the length of the inner long axis is 100nm, the length of the inner short axis is 50nm, and the ratio of the long axis to the short axis is 2: 1, and the elliptical ring has no eccentricity.
Then, the hollow quantum dot structure floating gate multilayer film memory storage unit and the SOI CMOS transistor TR are constructed into a radiation-resistant nonvolatile memory based on multilayer quantum dots according to the method in the embodiment 1, and the working principle and the specific read-write operation method are the same as those in the embodiment 1.
Examples 5,
According to the method in the embodiment 1, a multi-layer quantum dot structure floating gate for a memory unit is constructed, and the core structure of the multi-layer quantum dot structure floating gate comprises the following steps: sequentially depositing a lower buffer layer SiN with the thickness of 2nm, a first layer GaMnAs diluted magnetic quantum dot with the diameter of 5nm and a first layer filling dielectric layer SiO with the thickness of 5nm on an SOI CMOS oxide gate substrate2Intermediate layer SiO with thickness of 2nm2Diameter ofA second layer of GaMnAs diluted magnetic quantum dots with the thickness of 5nm, a second layer of filling medium layer with the thickness of 5nm and a compound insulating material SiN with the thickness of 10 nm.
The etching shape of the multilayer film structure of the hollow quantum dot structure floating gate multilayer film memory storage unit is as follows: an elliptical ring structure. The external major axis of the elliptical ring is 200nm, the length of the external minor axis is 100nm, and the ratio of the major axis to the minor axis is 2: 1; the length of the inner long axis is 100nm, the length of the inner short axis is 50nm, and the ratio of the long axis to the short axis is 2: 1, and the elliptical ring has no eccentricity.
Then, the hollow quantum dot structure floating gate multilayer film memory storage unit and the SOI CMOS transistor TR are constructed into a radiation-resistant nonvolatile memory based on multilayer quantum dots according to the method in the embodiment 1, and the working principle and the specific read-write operation method are the same as those in the embodiment 1.
Examples 6,
According to the method in the embodiment 1, a multi-layer quantum dot structure floating gate for a memory unit is constructed, and the core structure of the multi-layer quantum dot structure floating gate comprises the following steps: sequentially depositing a lower buffer layer SiN with the thickness of 2nm, a first layer LaCuO quantum dot with the diameter of 5nm and a first layer filling dielectric layer SiO with the thickness of 5nm on an SOI CMOS oxide gate substrate2Intermediate layer SiO with thickness of 2nm2A second layer of LaCuO quantum dots with the diameter of 5nm, a second layer of filling dielectric layer with the thickness of 5nm, and a compound insulating material SiN with the thickness of 10 nm.
The etching shape of the multilayer film structure of the hollow quantum dot structure floating gate multilayer film memory storage unit is as follows: an elliptical ring structure. The external major axis of the elliptical ring is 200nm, the length of the external minor axis is 100nm, and the ratio of the major axis to the minor axis is 2: 1; the length of the inner long axis is 100nm, the length of the inner short axis is 50nm, and the ratio of the long axis to the short axis is 2: 1, and the elliptical ring has no eccentricity.
Then, the hollow quantum dot structure floating gate multilayer film memory storage unit and the SOI CMOS transistor TR are constructed into a radiation-resistant nonvolatile memory based on multilayer quantum dots according to the method in the embodiment 1, and the working principle and the specific read-write operation method are the same as those in the embodiment 1.
Example 7,
As shown in fig. 5 and 7, the composition of the micro magnetic sensor based on the quantum dot structure floating gate multilayer film includes a hollow quantum dot structure floating gate multilayer film unit, an SOI CMOS transistor TR and a set of wirings, i.e., a bit line 33, a write word line 7 and a ground line GND 31.
The multilayer film structure in the hollow quantum dot structure floating gate multilayer micro-magnetic sensor unit is as follows: sequentially depositing a lower buffer layer SiN with the thickness of 2nm on an SOI CMOS oxidation gate substrate; the first layer of GaMnAs quantum dots is an elliptical quantum dot, the minor axis of the ellipse is 15nm, and the ratio of the major axis to the minor axis is 2: 1; and a first layer of filling dielectric layer SiO with the thickness of 5nm2(ii) a Intermediate layer SiO with thickness of 2nm2(ii) a Then a second layer of GaMnAs quantum dots which are oval quantum dots, wherein the minor axis of the oval is 15nm, and the ratio of the major axis to the minor axis is 2: 1; a second layer of filling dielectric layer with the thickness of 5 nm; and finally, a compound insulating material SiN with the thickness of 10 nm.
The etching shape of the multilayer film structure of the hollow quantum dot structure floating gate multilayer film micro-magnetic sensor unit is as follows: rectangle annular structure, the minor face of rectangle ring inner ring be 100nm, the minor face of outer loop is 200nm, the ratio on minor face and long limit is 1: 2.
then, the hollow quantum dot structure floating gate multilayer film micro magnetic sensor unit and the SOICMOS transistor TR are connected through the gate insulating medium layer 32 and the lower buffer layer 41. The write word line 7 is arranged above the floating gate multilayer film unit on the layout and is directly connected with the sensor core working unit.
As shown in fig. 5 and 7, the whole floating gate multilayer film micro-magnetic sensor unit is composed of several layers 41, 42, 43, 51, 52, 61, 62. The nonfunctional areas in these layers are formed by an insulating buried dielectric 8 such as SiO2Etc. are buried. In this cell there are only two layers of metal wiring layers, namely the layer where the write word line 7 is located, the ground line GND31 and the bit line 33 are locatedIn layers. The ground line GND31 is directly connected to the source region 21 of the SOI CMOS transistor, the bit line 33 is directly connected to the drain region 23 of the SOI CMOS transistor, and the back gate metal lead 101 is directly connected to the bulk silicon substrate layer 102 of the SOI CMOS transistor.
According to the quantum effect introduced in the background technology, the invention provides a control method of the quantum dot structure floating gate multilayer film micro-magnetic sensor. As shown in fig. 6, the principle of this method is to measure the magnitude of the magnetic field by measuring the change in the electron filling level in the quantum dot due to an external magnetic field. The specific operation is as follows:
when no external magnetic field exists, a first critical value V smaller than a specific value is applied between the ground wire 31 and the write wire 7 of the quantum dot structure floating gate multilayer film micro-magnetic sensor1At the voltage of (2), electrons cannot cross the top buried layer 43 and enter the second layer of quantum dots 62, nor the first layer of quantum dots 61. At this time, a voltage with a constant magnitude in any process is applied between the ground line and the bit line, and the magnitude of the current passing through the bit line is measured, namely the background current of the device, which is in a very small current working state.
If a first critical value V is applied between the ground wire 31 and the write wire 7 of the quantum dot structure floating gate multilayer film micro-magnetic sensor1And a second critical value V2Can cross the top buried layer 43 into the second layer of quantum dots 62, but cannot enter the first layer of quantum dots 61. At this time, the voltage between the ground line and the bit line is not changed, and the magnitude of the current passing through the bit line is measured, namely the first working state current of the device is the working state with smaller current.
If a voltage larger than the second critical value V is applied between the ground line 31 and the write line 7 of the quantum dot structure floating gate multilayer film micro-magnetic sensor2Can cross the multilayer film structure into the first layer of quantum dots 61. At this time, the voltage between the ground line and the bit line is not changed, and the magnitude of the current passing through the bit line is measured, namely the second working state current of the device is the working state of larger current.
When an external magnetic field exists, the existence of the external magnetic field can cause the quantization energy level of the magnetic material quantum dots to change, so that the filling state of electrons is influenced. And because the quantization energy level of the magnetic material quantum dot is very sensitive, the measurement precision is determined according to the sensitivity degree of the quantization energy level magnetic field, thereby achieving the measurement of any micro magnetic signal.
At this time, a voltage greater than a first critical value V is applied between the ground line 31 and the write line 7 of the quantum dot structure floating gate multi-layer film micro-magnetic sensor1And starts voltage sweep (gradually increasing the voltage value). Meanwhile, a voltage with a constant magnitude in any process is added between the ground line and the bit line, the magnitude of the current passing through the bit line is measured, whether the second working state current occurs in the working current is judged, and the magnitude of the scanning voltage between the ground line 31 and the write word line 7 when the working state changes is read. Comparing the voltage with a second critical value V when there is no magnetic field2Different, how much different; thereby judging whether the external magnetic field exists and the magnitude of the external magnetic field (note: the change of the second critical value can be positive or negative according to different materials). Thus, the sensor function is completed.
In order to ensure the measuring accuracy, the invention needs to carry out zero calibration on the micro magnetic sensor which is used for the first time or starts a new measuring process. Namely, a larger than V is applied between the ground wire 31 and the write wire 7 of the quantum dot structure floating gate multilayer film micro-magnetic sensor2To drain residual charge in the quantum dots; and placing the device in an operating state at a first on-state current. Thereby starting a first or new measurement procedure.
Example 8,
According to the method in the embodiment 7, a multi-layer quantum dot structure floating gate for a memory unit is constructed, and the core structure of the multi-layer quantum dot structure floating gate comprises the following steps: sequentially depositing a lower buffer layer SiN with the thickness of 2nm on an SOI CMOS oxidation gate substrate, wherein the ratio of the elliptical short axis to the long axis to the short axis is 15nm and 2: 1 first layer of GaMnAs quantum dots, and a first layer of filling medium layer SiO with the thickness of 5nm2Intermediate layer SiO with thickness of 2nm2Elliptical, with a minor axis of 15nm and a ratio of major to minor axes of 2: 1, a second layer of filling medium layer with the thickness of 5nm, and a compound insulating material SiN with the thickness of 10 nm.
The etching shape of the multilayer film structure of the hollow quantum dot structure floating gate multilayer film micro-magnetic sensor unit is as follows: rectangle annular structure, the minor face of rectangle ring inner ring be 100nm, the minor face of outer loop is 300nm, the ratio on minor face and long limit is 1: 2.
then, the hollow quantum dot structure floating gate multilayer film micro-magnetic sensor unit and the soi cmos transistor TR are constructed into a multi-layer quantum dot based micro-magnetic sensor according to the method in embodiment 7, and the working principle and the specific read-write operation method thereof are the same as those in embodiment 7.
Examples 9,
According to the method in the embodiment 7, a multi-layer quantum dot structure floating gate for a memory unit is constructed, and the core structure of the multi-layer quantum dot structure floating gate comprises the following steps: sequentially depositing a lower buffer layer SiN with the thickness of 2nm on an SOI CMOS oxidation gate substrate, wherein the ratio of the elliptical short axis to the long axis to the short axis is 15nm and 2: 1 first layer of GaMnAs quantum dots, and a first layer of filling medium layer SiO with the thickness of 5nm2Intermediate layer SiO with thickness of 2nm2Elliptical, with a minor axis of 15nm and a ratio of major to minor axes of 2: 1 second layer of GaMnAs quantum dots, a second layer of filling medium layer with the thickness of 5nm and a compound insulating material SiN with the thickness of 10 nm.
The etching shape of the multilayer film structure of the hollow quantum dot structure floating gate multilayer film micro-magnetic sensor unit is as follows: the major axis of the outer ring of the elliptical ring is 200nm, the minor axis of the outer ring of the elliptical ring is 100nm, the major axis of the inner ring is 100nm, the minor axis of the inner ring is 50nm, and the elliptical ring is free of eccentricity.
Then, the hollow quantum dot structure floating gate multilayer film micro-magnetic sensor unit and the soi cmos transistor TR are constructed into a multi-layer quantum dot based micro-magnetic sensor according to the method in embodiment 7, and the working principle and the specific read-write operation method thereof are the same as those in embodiment 7.
Examples 10,
According to the method in the embodiment 7, a multi-layer quantum dot structure floating gate for a memory unit is constructed, and the core structure of the multi-layer quantum dot structure floating gate comprises the following steps: sequentially depositing a lower buffer layer SiN with the thickness of 2nm on an SOI CMOS oxidation gate substrate, wherein the ratio of the elliptical short axis to the long axis to the short axis is 15nm and 2: 1 first layer of GaMnAs quantum dots, and a first layer of filling medium layer SiO with the thickness of 5nm2Intermediate layer SiO with thickness of 2nm2Elliptical, with a minor axis of 15nm and a ratio of major to minor axes of 2: 1 second layer of GaMnAs quantum dots, a second layer of filling medium layer with the thickness of 5nm and a compound insulating material SiN with the thickness of 10 nm.
The etching shape of the multilayer film structure of the hollow quantum dot structure floating gate multilayer film micro-magnetic sensor unit is as follows: an elliptical ring structure, wherein the major axis of the outer ring is 300nm and the minor axis is 100 nm; the major axis of the inner ring is 150nm and the minor axis is 50nm, and the elliptical ring has no eccentricity.
Then, the hollow quantum dot structure floating gate multilayer film micro-magnetic sensor unit and the soi cmos transistor TR are constructed into a multi-layer quantum dot based micro-magnetic sensor according to the method in embodiment 7, and the working principle and the specific read-write operation method thereof are the same as those in embodiment 7.
Claims (12)
1. The utility model provides a fretwork form multilayer quantum dot structure floating gate that can be used to memory cell which characterized in that: the quantum dot structure floating gate comprises a lower buffer layer, and a first quantum dot growth layer, a first filling dielectric layer, a middle layer, a second quantum dot growth layer, a second filling dielectric layer and a top landfill protection layer which are sequentially grown on the lower buffer layer, wherein the cross section of the multilayer quantum dot structure floating gate is in a geometric hollow shape.
2. The hollowed-out floating gate with multi-layered quantum dot structure for memory cells according to claim 1, wherein: the thickness of the lower buffer layer is 3-100 nm;
the component materials of the quantum dots in the first quantum dot growth layer and the second quantum dot growth layer are semiconductor materials, magnetic materials or superconducting materials; the quantum dots are oval or round, the diameter of the round is 5-100 nm, the minor axis of the oval is 5-50 nm, and the ratio of the minor axis to the major axis is 1: 1-5;
the first filling dielectric layer and the second filling dielectric layer are made of compound insulator materials, and the thickness of the first filling dielectric layer is the same as the diameter of the quantum dots in the first quantum dot growth layer; the thickness of the second filling medium layer is the same as the diameter of the quantum dots in the second quantum dot growth layer;
the intermediate layer is made of a compound insulator material, and the thickness of the intermediate layer is 1-30 nm;
the top buried protection layer is made of a compound insulator material and has a thickness of 5-1000 nm.
3. The hollowed-out floating gate with multi-layered quantum dot structure for memory cells according to claim 1, wherein: the geometry hollow shape be the rectangular ring of fretwork form, the minor face of rectangular ring inner loop be 10 ~ 100000nm, the minor face of outer loop is 20 ~ 200000nm, the ratio on minor face and long limit is 1: 1 to 5, and a ring width of 10 to 100000 nm.
4. The hollowed-out floating gate with multi-layered quantum dot structure for memory cells according to claim 2, wherein: the geometry hollow shape be the rectangular ring of fretwork form, the minor face of rectangular ring inner loop be 10 ~ 100000nm, the minor face of outer loop is 20 ~ 200000nm, the ratio on minor face and long limit is 1: 1 to 5, and a ring width of 10 to 100000 nm.
5. The hollowed-out floating gate with multi-layered quantum dot structure for memory cells according to claim 1, wherein: the geometric hollow shape is an elliptical ring with a hollow shape, the minor axis of the inner ring of the elliptical ring is 10-100000 nm, the minor axis of the outer ring is 20-200000 nm, and the ratio of the minor axis to the major axis is 1: 1 to 5, and a ring width of 10 to 100000 nm.
6. The hollowed-out floating gate with multi-layered quantum dot structure for memory cells according to claim 2, wherein: the geometric hollow shape is an elliptical ring with a hollow shape, the minor axis of the inner ring of the elliptical ring is 10-100000 nm, the minor axis of the outer ring is 20-200000 nm, and the ratio of the minor axis to the major axis is 1: 1 to 5, and a ring width of 10 to 100000 nm.
7. The hollowed-out floating gate with multi-layered quantum dot structure for memory cells according to claim 1, wherein: the geometric hollow shape is a hollow regular hexagonal ring, the side length of the inner ring of the regular hexagonal ring is 10-100000 nm, the side length of the outer ring is 20-200000 nm, and the ring width is 10-100000 nm.
8. The hollowed-out floating gate with multi-layered quantum dot structure for memory cells according to claim 2, wherein: the geometric hollow shape is a hollow regular hexagonal ring, the side length of the inner ring of the regular hexagonal ring is 10-100000 nm, the side length of the outer ring is 20-200000 nm, and the ring width is 10-100000 nm.
9. A radiation-resistant non-volatile memory comprising a memory cell, characterized in that: the memory cell uses the hollow multi-layer quantum dot structure floating gate which can be used for the memory cell and is described in one of claims 1 to 8.
10. The radiation-resistant nonvolatile memory as in claim 9, wherein: the floating gate with the multilayer quantum dot structure is integrated on an SOI CMOS substrate, and the SOI CMOS substrate comprises: the back gate metal lead layer is sequentially grown on the first semiconductor material layer, the buried oxide layer and the second semiconductor material layer on the back gate metal lead layer; the second semiconductor material layer is composed of a drain electrode, a grid electrode and a source electrode of the transistor;
one end of the memory unit is interconnected with the source electrode of the transistor through a transition metal layer, a bit line is also the grid electrode of the transistor, and the bit line is arranged above the transistor and is vertical to the transition metal layer; the transition metal layer is positioned right above the storage unit; the ground lines are parallel to the bit lines and perpendicular to the write word lines.
11. A micro-magnetic sensor comprising a micro-magnetic sensor cell, characterized by: the micro-magnetic sensor unit uses the multi-layer quantum dot structure floating gate of one of claims 1 to 8, the material of the quantum dots in the quantum dot growth layer is a magnetic material, and the quantum dots are oval quantum dots.
12. The micro-magnetic sensor of claim 11, wherein: the floating gate with the multilayer quantum dot structure is integrated on an SOI CMOS substrate, and the SOI CMOS substrate comprises: the semiconductor device comprises a first semiconductor material layer, a buried oxide layer and a second semiconductor material layer, wherein the buried oxide layer and the second semiconductor material layer are sequentially grown on the first semiconductor material layer; the second semiconductor material layer is composed of a drain electrode, a grid electrode and a source electrode of the transistor;
one end of the micro magnetic sensor unit is interconnected with the source electrode of the transistor through a transition metal layer, a bit line is also the grid electrode of the transistor, and the bit line is arranged above the transistor and is vertical to the transition metal layer; the transition metal layer is positioned right above the micro magnetic sensor unit; the ground lines are parallel to the bit lines and perpendicular to the write word lines.
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| CN1490876A (en) * | 2002-10-14 | 2004-04-21 | ���ǵ�����ʽ���� | Silicon memory for permanent silicon/oxide/nitride/silicon/nitride/oxide |
| US7105874B2 (en) * | 2003-02-07 | 2006-09-12 | Samsung Electronics Co., Ltd. | Single electron transistor having memory function |
| CN2819480Y (en) * | 2005-07-15 | 2006-09-20 | 清华大学 | Semiconductor non-volatile memory of self-aligning quantum-point reinforced FN tunnel |
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| CN1464563A (en) * | 2002-06-28 | 2003-12-31 | 中国科学院物理研究所 | Composite quantum point device and a process for making it |
| CN1490876A (en) * | 2002-10-14 | 2004-04-21 | ���ǵ�����ʽ���� | Silicon memory for permanent silicon/oxide/nitride/silicon/nitride/oxide |
| US7105874B2 (en) * | 2003-02-07 | 2006-09-12 | Samsung Electronics Co., Ltd. | Single electron transistor having memory function |
| CN2819480Y (en) * | 2005-07-15 | 2006-09-20 | 清华大学 | Semiconductor non-volatile memory of self-aligning quantum-point reinforced FN tunnel |
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