CN101286519A - Image sensor and method for forming same - Google Patents
Image sensor and method for forming same Download PDFInfo
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- CN101286519A CN101286519A CNA2007100394785A CN200710039478A CN101286519A CN 101286519 A CN101286519 A CN 101286519A CN A2007100394785 A CNA2007100394785 A CN A2007100394785A CN 200710039478 A CN200710039478 A CN 200710039478A CN 101286519 A CN101286519 A CN 101286519A
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Abstract
The invention provides an image sensor which comprises: a component isolating layer positioned between the photorectifier regions of neighboring pixel unit regions; a first doping well with a first conduction type and positioned in the photorectifier region under the surface of the semiconductor substrate and a second doping well with a second conduction type and positioned under the first doping well; a deep trench passing through the component isolating layer is formed in the semiconductor substrate, and the bottom of the deep trench is positioned under the second doping well. By adopting the deep trench to isolate the photorectifier regions between the pixel units, the invention can effectively prevent the photorectifier regions of the neighboring pixel units to produce leakage electric current; simultaneously, as the deep trench passes through the component insulation layer, the bottom is positioned under the first doping well of the photorectifier, so the photorectifier region area is not reduced, thus leading the photorectifier performance to be guaranteed.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly imageing sensor and forming method thereof.
Background technology
(charge coupled device is the main solid-state figure image sensing device of practicability CCD) to charge coupled device, and it has, and the noise of reading is low, dynamic range big, the response sensitivity advantages of higher at present.(promptly the imageing sensor based on CCD is difficult to realize that single-chip is integrated for Complementary-Metal-Oxide-Semiconductor, CMOS) the compatible mutually shortcoming of technology but CCD has the complementary metal oxide semiconductors (CMOS) that is difficult to main flow simultaneously.And cmos image sensor (CMOS Image sensor, CIS) owing to adopted identical CMOS technology, pixel unit array and peripheral circuit can be integrated on the same chip, compare with CCD, CIS has that volume is little, in light weight, low in energy consumption, programming is convenient, be easy to control and advantage that average unit cost is low.
Dark current (Dark Current) is one of difficult problem of facing of CIS technology.For semiconductor device, as long as its temperature is not an absolute zero, in the dynamic equilibrium that the electron-hole pair of device inside just will be in generation, moves and bury in oblivion, temperature is high more, and the speed that electron-hole pair produces and moves is just fast more, and dark current is just big more.It has been generally acknowledged that, dark current is the magnitude of current that photodiode discharged when not having incident light, its dark current of desirable imageing sensor should be zero, but, actual state is that the photodiode in each pixel cell serves as electric capacity simultaneously again, when electric capacity slow release electric charge, even without incident light, the voltage of dark current also can be suitable with the output voltage of low-light level incident light.Therefore, these the time display on " image " still can be observed, this discharges mainly due to electric charge that electric capacity accumulated and causes.Therefore, manufacture craft how to optimize photodiode becomes the matter of utmost importance that those skilled in the art face with the dark current that reduces CIS.
Usually, cmos image sensor comprises that at least one has the pixel cell of photo sensitive area.Each pixel cell comprises light sensor and at least one transistor that is formed at photo sensitive area.Incide photo sensitive area as light and prick surely such as the surface on the photodiode area of (PIN), accumulation in the photodiode is because the photoelectron electric charge that incident light produces.Transistor controls is exported the signal of telecommunication that converts to of photoelectron electric charge.
The photodiode area of prior art is illustrated with reference to Figure 1A, is formed with field oxide 102 and is used for device isolation on p N-type semiconductor N substrate 101.Field oxide 102 can adopt selective oxidation silicon (LOCOS) to form, and perhaps adopts shallow trench isolation to form from (STI) method.Then, form p type electric charge barrier layer 103 for 102 times at field oxide and cause interfering with each other of adjacent pixel unit to stop generation leakage current between the device.
With reference to Figure 1B, expose photodiode area 3a and 3b at formation ion injecting mask version (not shown) on the Semiconductor substrate 101 on p N-type semiconductor N substrate 101, to form opening, carry out first ion then and inject to form n type first dopant well 104.Then, carrying out low-energy second ion of high dose injects to form second dopant well 105 of p type below first dopant well, 104 semiconductor-on-insulator substrates, 101 surfaces.Then, Semiconductor substrate 101 is annealed, so that first dopant well 104 of injection and second dopant well 105 are spread.The purpose that forms second dopant well 105 is pricked the photodiode of surface charge surely for forming.Each photodiode comprises second dopant well 105 of p type, first dopant well 104 of n type and the p N-type semiconductor N substrate 101 of first dopant well below 104 of n type.
Yet, adopting a critical defect of the imageing sensor of above-mentioned technology formation is the leakage current that produces between the photodiode of adjacent pixel unit, although electric charge barrier layer 103 is positioned at device isolation layer below 102, because first dopant well 104 is to inject by the low dosage high-energy to form, the injection degree of depth is deep, and the leakage current of generation can not effectively be stoped.Incide the light of adjacent pixel unit because abnormal signal is introduced in the shading meeting of interconnect metallization lines (interconnect step height); Simultaneously, the leakage current of adjacent pixel unit has been introduced the larger interference signal, has reduced the signal to noise ratio of imageing sensor.
For this reason, the patent No. a kind of imageing sensor that has been 6545302 U.S. Patent Publication, with reference to Fig. 2, this inventive images transducer comprises first pixel cell and second pixel cell, and each pixel cell comprises Semiconductor substrate 301 with first conduction type and the device isolation layer 302 that is formed in the Semiconductor substrate 301; Be formed at the electric charge barrier layer 303 under the device isolation layer 302; Be formed at the photodiode area of first pixel cell and second pixel cell and the deep trench 305 between the device isolation layer 302; Be formed at first dopant well 306 with first conduction type of photodiode area of first pixel cell on Semiconductor substrate 301 surfaces; And the insulating barrier in deep trench 305 311 (insulating member); And be formed at second dopant well 308 under first dopant well 306 of being positioned in the Semiconductor substrate 301 with second conduction type.
Above-mentioned patent adopts deep trench that the photodiode area of adjacent pixel unit is isolated, and to stop leakage current, prevents to produce between the adjacent pixel unit interference signal.But adopt above-mentioned technology, exist between the adjacent photodiode zone, reduced the effective area of photodiode, so pixel cell all can descend to the response speed of light and quality and influences the performance of pixel cell because deep trench and device isolation layer are parallel.
Summary of the invention
The problem that the present invention solves be the big and deep trench between the photodiode of adjacent pixel unit of cmos image sensor produces in the prior art dark current and device isolation layer side by side, reduced the effective area of photodiode, made pixel cell all can descend and influence the performance of pixel cell the response speed of light and quality.
For addressing the above problem, the invention provides a kind of imageing sensor, comprise: have the Semiconductor substrate of first conduction type, described Semiconductor substrate comprises first pixel cell zone and the second pixel cell zone, and each pixel cell zone has photodiode area; Device isolation layer between the photodiode area in the photodiode area in Semiconductor substrate, the first pixel cell zone and the second pixel cell zone; Be positioned at first dopant well that photodiode area has second conduction type, described second conduction type and first conductivity type opposite; And be positioned at second dopant well on first dopant well under the semiconductor substrate surface with first conduction type; Also be formed with deep trench in Semiconductor substrate, described deep trench runs through device isolation layer, and described deep trench has bottom and sidewall, and the bottom of described deep trench is positioned under first dopant well; Be positioned at first insulating barrier of bottom, sidewall and the semiconductor substrate surface of deep trench; Be filled in the conductive layer on first insulating barrier in the deep trench; And be positioned at metal line layer on the conductive layer.
Described deep trench is around around first pixel cell zone and the second pixel cell zone.The width of described deep trench is 0.15 to 0.5 micron, and the degree of depth is 4 to 7 microns.
Described first insulating barrier be in silica, silicon nitride, the silicon oxynitride a kind of or its constitute.
Be arranged in Semiconductor substrate device isolation layer lower area and also be formed with electric charge barrier layer, described deep trench runs through electric charge barrier layer, and described electric charge barrier layer has first conduction type.
Described electric charge barrier layer is between the bottom of the separator bottom and first dopant well.
Photodiode area in each pixel cell zone also is formed with the 3rd dopant well, and described the 3rd dopant well is positioned under the deep trench, and described the 3rd dopant well has first conduction type.
Described device isolation layer is the field oxide of local oxidation (LOCOS) formation or is that shallow trench isolation is from (STI).
Correspondingly, the invention provides a kind of formation method of imageing sensor, comprise: the Semiconductor substrate with first conduction type is provided, and described Semiconductor substrate comprises first pixel cell zone and the second pixel cell zone, and each pixel cell zone has photodiode area; In Semiconductor substrate, between the photodiode area in the photodiode area in the first pixel cell zone and the second pixel cell zone, form device isolation layer; Form deep trench in Semiconductor substrate, described deep trench runs through device isolation layer, and described deep trench has bottom and sidewall, and the bottom of described deep trench is positioned under first dopant well; Bottom, sidewall and semiconductor substrate surface in deep trench form first insulating barrier; On first insulating barrier, form conductive layer to fill deep trench; On conductive layer, form metal line layer; Form first dopant well with second conduction type, described second conduction type and first conductivity type opposite at photodiode area; Under semiconductor substrate surface, form second dopant well on first dopant well with first conduction type; Semiconductor substrate annealed the dopant ion in first dopant well and second dopant well is spread evenly.
Described deep trench has the bottom, and described bottom is than the second doping well depth.
Described deep trench be positioned at first pixel cell zone and the second pixel cell zone around.
The width of described deep trench is 0.15 to 0.5 micron, and the degree of depth is 4 to 7 microns.
Described first insulating barrier be in silica, silicon nitride, the silicon oxynitride a kind of or its constitute.
Also be included in device isolation layer lower area formation electric charge barrier layer in the Semiconductor substrate after forming the device isolation layer step, described deep trench runs through electric charge barrier layer, and described electric charge barrier layer has first conduction type.
Described electric charge barrier layer is between separator bottom and first dopant well bottom.
Form the photodiode area that also is included in each pixel cell zone after second dopant well and form the 3rd dopant well, described the 3rd dopant well is positioned under the deep trench, and described the 3rd dopant well has first conduction type.
Described device isolation layer is the field oxide of local oxidation (LOCOS) formation or is that shallow trench isolation is from (STI).
Compared with prior art, the present invention has the following advantages: the present invention isolates the photodiode area between the pixel cell by adopting deep trench, can stop the leakage current of the photodiode area generation of adjacent pixel unit effectively; Because deep trench runs through device isolation layer, its bottom is positioned under first dopant well of photodiode, does not therefore reduce the photodiode area area, makes the photodiode performance be guaranteed simultaneously.Simultaneously, by adding positive voltage to being filled on the conductive layer in the deep trench at metal line layer, can further reduce leakage current between the adjacent pixel unit comprise dark current and when light cross produce when strong overflow charge carrier (overflow carrier).
Description of drawings
Figure 1A to 1B is the structural representation of the formation cmos image sensor of prior art;
Fig. 2 is the structural representation of the formation cmos image sensor of another prior art;
Fig. 3 A, Fig. 3 B, Fig. 3 C, Fig. 3 D, Fig. 3 E, Fig. 3 F, Fig. 3 G, Fig. 3 H are embodiment of formation cmos image sensor structural representation of the present invention;
Fig. 3 B ' is the vertical view of the formation deep groove structure of one embodiment of the present of invention.
Embodiment
The invention provides a kind of imageing sensor that adopts trench isolations adjacent photodiode zone.The present invention adopts deep trench that imageing sensor is isolated, and deep trench runs through device isolation layer, its bottom is positioned under first dopant well of photodiode, the leakage current that can stop the photodiode area generation of adjacent pixel unit effectively, simultaneously, do not reduce the photodiode area area, make the photodiode performance be guaranteed.
The present invention at first provides a kind of formation method of imageing sensor, comprise: the Semiconductor substrate with first conduction type is provided, described Semiconductor substrate comprises first pixel cell zone and the second pixel cell zone, and each pixel cell zone has photodiode area; In Semiconductor substrate, between the photodiode area in the photodiode area in the first pixel cell zone and the second pixel cell zone, form device isolation layer; Form deep trench in Semiconductor substrate, described deep trench runs through device isolation layer, and described deep trench has bottom and sidewall, and the bottom of described deep trench is positioned under first dopant well; Bottom, sidewall and semiconductor substrate surface in deep trench form first insulating barrier; On first insulating barrier, form conductive layer to fill deep trench; On conductive layer, form metal line layer; Form first dopant well with second conduction type, described second conduction type and first conductivity type opposite at photodiode area; Under semiconductor substrate surface, form second dopant well on first dopant well with first conduction type; Semiconductor substrate annealed the dopant ion in first dopant well and second dopant well is spread evenly.
Formation method to imageing sensor of the present invention is described in detail with reference to the accompanying drawings.
At first, with reference to accompanying drawing 3A, Semiconductor substrate 201 with first conduction type is provided, described Semiconductor substrate 201 can be silicon, silicon on insulator (SOI), GaAs etc., Semiconductor substrate 201 in the present embodiment is a silicon, affiliated first conduction type can be p type or n type, and the Semiconductor substrate 201 in the present embodiment is the p type.
Described Semiconductor substrate 201 is comprised first pixel cell zone I and second pixel cell zone II, and each pixel cell zone has photodiode area; In Semiconductor substrate 201, form device isolation layer 202 between the photodiode area of the photodiode area of first pixel cell zone I and second pixel cell zone II.Described device isolation layer 202 can adopt selective oxidation silicon (LOCOS) to form, and perhaps adopts shallow trench isolation to form from (STI) method.
Then, device isolation layer 202 lower areas form electric charge barrier layer 203 in Semiconductor substrate 201, and described electric charge barrier layer 203 has first conduction type, i.e. p type in the present embodiment.The purpose that forms described electric charge barrier layer 203 is the unsteady electric charge that stops the photodiode area generation of adjacent pixel unit, produces leakage current and the phase mutual interference.The technology that forms described electric charge barrier layer 203 is: form first photoresist layer on Semiconductor substrate 201, exposure place device isolation layer 202 zones, carrying out p type ion to device isolation layer 202 zones injects, the ion that described p type ion injects is the B ion, and the dosage range of injection is 1.0 * 10E12 to 5.0 * 10E13cm
-2, the energy range of injection is 200 to 800KeV.
Then; with reference to Fig. 3 B; for in Semiconductor substrate 201, forming deep trench 204 structural representations; described deep trench 204 runs through device isolation layer 202 and electric charge barrier layer 203; running through of present embodiment can be in any position of device isolation layer 202 regions; can not exceed device isolation layer 202 regions in principle; the waste that promptly can not cause each photodiode area area is all within protection scope of the present invention; deep trench 204 in the present embodiment is positioned at the center of device isolation layer 202 regions, should too much not limit protection scope of the present invention at this.Described deep trench 204 has bottom and sidewall.The depth bounds of described deep trench 204 is 4 to 7 microns, and the width of deep trench is 0.15 to 0.5 micron.Described deep trench 204 be positioned at first pixel and second pixel around, specifically please refer to Fig. 3 B '.The deep trench 204 of present embodiment can not cause the waste of the photodiode area area in pixel cell zone through device isolation layer 202 and electric charge barrier layer 203, has prevented from simultaneously to produce leakage current between the photodiode of adjacent pixel unit.
With reference to Fig. 3 C, form after the deep trench 204, form first insulating barrier 205 on the surface of bottom, sidewall and the Semiconductor substrate 201 of deep trench 204, described first insulating barrier 205 can be insulating material such as silica, silicon nitride, silicon oxynitride.
With reference to Fig. 3 D, in deep trench 204, form conductive layer 206 on first insulating barrier 205 to fill deep trench 204, carry out planarization then.Described conductive layer 206 can be metal or doped polycrystalline silicon materials.As an embodiment of the invention, the polycrystalline silicon material of described conductive layer 206 for mixing.Forming described conductive layer is present technique field personnel's known technology, does not give unnecessary details at this.
With reference to Fig. 3 E, on conductive layer 206, form metal line layer 207.Described metal line layer 207 is metal A l.External voltage is applied to conductive layer 206 by metal line layer 207.
With reference to Fig. 3 F, photodiode area carries out n type ion injection in Semiconductor substrate 201, form first dopant well 209, described first dopant well 209 has second conduction type, described second conduction type and first conductivity type opposite, in the present embodiment, second conduction type is the n type, as a utmost point of photodiode.The ion that a described n type ion injects is As ion or P ion, and the energy range that a n type ion injects is 80 to 600KeV; Dosage range is 5.0 * 10E11 to 8.0 * 10E12cm
-2The bottom of described isolation well 204 is positioned at that depth bounds is 3 to 5 microns under first dopant well 209.
With reference to Fig. 3 G, on first dopant well 209 under Semiconductor substrate 201 surfaces, form second dopant well 210, described second dopant well 210 has first conduction type.Form described second dopant well 210 and form for injecting by the 2nd p type ion, the ion that the 2nd p type ion injects is the B ion, and the dosage range of injection is 1.0 * 10E12 to 5.0 * 10E13cm
-2, energy range is 10 to 100KeV.The purpose that forms second dopant well 210 prevents the generation of dark current for deciding the movable charge on calendering electric diode surface.
With reference to 3H, the photodiode area in each pixel cell zone forms the 3rd dopant well 208, and described the 3rd dopant well 208 is positioned under the deep trench 204.Described the 3rd dopant well 208 has first conduction type, i.e. the p type.The purpose that forms described the 3rd dopant well 208 realizes better buffer action for cooperating deep trench.Forming described the 3rd dopant well 208 technologies is: carry out the 3rd p type ion and inject in Semiconductor substrate 201, described p type ion is the B ion, and described the 3rd p type ion implantation energy is 1 to 5MeV; The dosage that described the 3rd p type ion injects is 2.5 * 10E12 to 2.5 * 10E13cm
-2
After the injection of the one n type ion, the 2nd p type and the 3rd p type ion inject, Semiconductor substrate is annealed, so that the ion of the injection in first dopant well 209, second dopant well 210 and the 3rd dopant well 208 is spread evenly.
Then, on metal line layer 207, add positive voltage Vcc, comprise dark current and overflow charge carrier (overflow carrier) when what light was crossed generation when strong to reduce leakage current between the adjacent pixel unit.
After above-mentioned process implementing, form a kind of imageing sensor of the present invention, with reference to Fig. 3 G, comprise: Semiconductor substrate 201 with first conduction type, described Semiconductor substrate 201 comprises first pixel cell zone I and second pixel cell zone II, and each pixel cell zone has photodiode area; Device isolation layer 202 between the photodiode area of photodiode area in Semiconductor substrate 201, first pixel cell zone I and second pixel cell zone II; Be positioned at first dopant well 209 that photodiode area has second conduction type, described second conduction type and first conductivity type opposite; And be positioned at second dopant well 210 on first dopant well 209 under the semiconductor substrate surface with first conduction type; Also be formed with deep trench 204 in Semiconductor substrate 201, described deep trench 204 runs through device isolation layer 202, and described deep trench 204 has bottom and sidewall, and the bottom of described deep trench 204 is positioned under first dopant well 209; Be positioned at first insulating barrier 205 on bottom, sidewall and Semiconductor substrate 201 surfaces of deep trench 204; Be filled in the conductive layer 206 on first insulating barrier 205 in the deep trench 204; And be positioned at metal line layer 207 on the conductive layer 206.
Imageing sensor of the present invention is isolated the photodiode area between the pixel cell by adopting deep trench, can stop the leakage current of the photodiode area generation of adjacent pixel unit effectively.Because deep trench runs through device isolation layer, its bottom is positioned under first dopant well of photodiode, does not therefore reduce the photodiode area area, makes the photodiode performance be guaranteed simultaneously.Simultaneously, add positive voltage by being filled in 207 pairs of metal line layers on the conductive layer 206 in the deep trench 204, can further reduce leakage current between the adjacent pixel unit comprise dark current and when light cross produce when strong overflow charge carrier (overflow carrier).
Though oneself discloses the present invention as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art without departing from the spirit and scope of the present invention, all can do various changes and modification, so protection scope of the present invention should be as the criterion with claim institute restricted portion.
Claims (17)
1. imageing sensor comprises:
Semiconductor substrate with first conduction type, described Semiconductor substrate comprise first pixel cell zone and the second pixel cell zone, and each pixel cell zone has photodiode area;
Device isolation layer between the photodiode area in the photodiode area in Semiconductor substrate, the first pixel cell zone and the second pixel cell zone;
Be positioned at first dopant well that photodiode area has second conduction type, described second conduction type and first conductivity type opposite;
And be positioned at second dopant well on first dopant well under the semiconductor substrate surface with first conduction type;
It is characterized in that also be formed with deep trench in Semiconductor substrate, described deep trench runs through device isolation layer, described deep trench has bottom and sidewall, and the bottom of described deep trench is positioned under first dopant well; Be positioned at first insulating barrier of bottom, sidewall and the semiconductor substrate surface of deep trench; Be filled in the conductive layer on first insulating barrier in the deep trench; And be positioned at metal line layer on the conductive layer.
2. imageing sensor according to claim 1 is characterized in that, described deep trench is around around first pixel cell zone and the second pixel cell zone.
3. imageing sensor according to claim 1 is characterized in that, the width of described deep trench is 0.15 to 0.5 micron, and the degree of depth is 4 to 7 microns.
4. imageing sensor according to claim 1 is characterized in that, described first insulating barrier be in silica, silicon nitride, the silicon oxynitride a kind of or its constitute.
5. imageing sensor according to claim 1 is characterized in that, is arranged in Semiconductor substrate device isolation layer lower area and also is formed with electric charge barrier layer, and described deep trench runs through electric charge barrier layer, and described electric charge barrier layer has first conduction type.
6. imageing sensor according to claim 5 is characterized in that, described electric charge barrier layer is between the bottom of the separator bottom and first dopant well.
7. imageing sensor according to claim 1 is characterized in that, the photodiode area in each pixel cell zone also is formed with the 3rd dopant well, and described the 3rd dopant well is positioned under the deep trench, and described the 3rd dopant well has first conduction type.
8. imageing sensor according to claim 1 is characterized in that, described device isolation layer is the field oxide of local oxidation (LOCOS) formation or is that shallow trench isolation is from (STI).
9. the formation method of an imageing sensor is characterized in that, comprising:
Semiconductor substrate with first conduction type is provided, and described Semiconductor substrate comprises first pixel cell zone and the second pixel cell zone, and each pixel cell zone has photodiode area;
In Semiconductor substrate, between the photodiode area in the photodiode area in the first pixel cell zone and the second pixel cell zone, form device isolation layer;
Form deep trench in Semiconductor substrate, described deep trench runs through device isolation layer, and described deep trench has bottom and sidewall, and the bottom of described deep trench is positioned under first dopant well;
Bottom, sidewall and semiconductor substrate surface in deep trench form first insulating barrier;
On first insulating barrier, form conductive layer to fill deep trench;
On conductive layer, form metal line layer;
Form first dopant well with second conduction type, described second conduction type and first conductivity type opposite at photodiode area;
Under semiconductor substrate surface, form second dopant well on first dopant well with first conduction type;
Semiconductor substrate annealed the dopant ion in first dopant well and second dopant well is spread evenly.
10. the formation method of imageing sensor according to claim 9 is characterized in that, described deep trench has the bottom, and described bottom is than the second doping well depth.
11. the formation method of imageing sensor according to claim 9 is characterized in that, described deep trench be positioned at first pixel cell zone and the second pixel cell zone around.
12. the formation method of imageing sensor according to claim 9 is characterized in that, the width of described deep trench is 0.15 to 0.5 micron, and the degree of depth is 4 to 7 microns.
13. the formation method of imageing sensor according to claim 9 is characterized in that, described first insulating barrier be in silica, silicon nitride, the silicon oxynitride a kind of or its constitute.
14. the formation method of imageing sensor according to claim 9, it is characterized in that, also be included in device isolation layer lower area formation electric charge barrier layer in the Semiconductor substrate after forming the device isolation layer step, described deep trench runs through electric charge barrier layer, and described electric charge barrier layer has first conduction type.
15. the formation method of imageing sensor according to claim 14 is characterized in that, described electric charge barrier layer is between separator bottom and first dopant well bottom.
16. the formation method of imageing sensor according to claim 9, it is characterized in that, form the photodiode area that also is included in each pixel cell zone after second dopant well and form the 3rd dopant well, described the 3rd dopant well is positioned under the deep trench, and described the 3rd dopant well has first conduction type.
17. the formation method of imageing sensor according to claim 9 is characterized in that, described device isolation layer is the field oxide of local oxidation (LOCOS) formation or is that shallow trench isolation is from (STI).
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