The method of focusing evaluation
Technical field
The present invention relates to the semiconductor light carving technology, relate in particular in photoetching process method the focusing evaluation of exposure bench.
Background technology
In integrated the requiring under the increasingly high situation of semiconductor devices, the also compelled direction of not stopping to dwindle toward size of the design of entire semiconductor device size is advanced.And the little shadow technology in the semiconductor technology influences the precision of component size especially greatly.Because be that etching, doping process all need to reach through lithography process, and in the device integrated level of whole semi-conductor industry, whether that can continue advances toward live width littler below 0.15 micron, also is decided by the development that lithography process is technological.
In the manufacture process of SIC (semiconductor integrated circuit); Little shadow imaging process occupy epochmaking status far and away; People can accurately be defined in designed patterns on the photoresist layer by this manufacture craft, utilize etching program that the design transfer of photoresist layer is made required circuit configurations then above semiconductor crystal wafer.Generally speaking, little shadow imaging process mainly comprises a plurality of steps such as linging, photoresist coating, exposure and development.Wherein, in exposure technology, because the critical dimension of semiconductor devices is more and more littler, the distance between the device also shortens day by day, and also increasingly high to the requirement of exposure bench, and the quality of the focusing power of exposure bench directly influences quality of semiconductor devices.
Forming the photoresist method of patterning in the existing photoetching process, to please refer to the patent No. be disclosed technical scheme in 01140031 the Chinese patent.Shown in Figure 1A, wafer 200 at first is provided, on wafer 200, be formed with semiconductor device structure (not marking); On wafer 200, form and treat etch layer 202, this treats etch layer 202 for example metal level, polysilicon layer, silicon nitride layer or silicon oxide layer; Treating to form photoresist layer 204 on the etch layer 202.
Continuation is with reference to Figure 1A; With light shield 206 serves as that the cover curtain carries out exposure technology 208 to photoresist layer 204; So that photoresist layer 204 is divided into exposure region 204a and 204a ' and unexposed area 204b; Exposure region 204a wherein and 204a ' decompose via the illuminated light of photic zone 206a of light shield 206; Unexposed area 204b does not then receive the irradiation of light via light tight the covering of 206b of district of light shield 206, wherein the exposure light source that uses for example is i line, hydrogen fluoride laser, ammonium fluoride laser etc. in exposure technology 208.
Then; Please with reference to Figure 1B; Via developing process exposure region 204a and 204a ' in the photoresist layer 204 are removed; So that unexposed area 204b stays, form first component graphics 205 ' and second component graphics 205, wherein first component graphics 205 ' and second component graphics 205 belong to the device of different type; Then with the critical dimension of scanning electron microscopy measurement first component graphics 205 ' and second component graphics 205, the critical dimension of first component graphics 205 ' is deducted the critical dimension of second component graphics 205, obtain the critical dimension difference.
As shown in Figure 2; Because used energy all was different with focal length when the component graphics on the light shield was transferred to each chip on the wafer 200; Measure the critical dimension of first component graphics in each chip and the critical dimension of second component graphics; The critical dimension of first component graphics in the same chip is deducted the critical dimension of second component graphics, obtain the critical dimension difference; Then, through with the focal length value of each chip and the comparison of critical dimension difference, set up the curve data (as shown in Figure 3) of critical dimension difference and focal length correlativity; Quadratic fit equation ax according to curve
2Axis-b/2a that+bx+c draws in matched curve is a best focal point.
Prior art to the focusing power of exposure bench in the exposure technology be evaluated as through exposure bench with the figure transfer on the light shield to photoresist layer; Then photoresist layer is developed; Component graphics in each chip after developing measures critical dimension; Then the critical dimension of two kinds of dissimilar component graphics is subtracted each other, set up the curve data of critical dimension difference and focal length correlativity, thus the focusing power of assessment exposure bench.Owing to need measure the component graphics in each chip, so the time of focusing evaluation cost is long.
Summary of the invention
The problem that the present invention solves provides a kind of method of focusing evaluation, prevents the focusing evaluation time longly, measures inconvenience.
For addressing the above problem, the present invention provides a kind of method of focusing evaluation, comprises the following steps: to make the control sheet that comprises first component graphics and second component graphics; Measure first component graphics and the second component graphics critical dimension difference of same exposure area on the control sheet successively; With the wafer of same batch of sheet of control on form first component graphics and second component graphics; Measure first component graphics of any exposure area on the wafer and the critical dimension of second component graphics; First component graphics of any exposure area on the wafer and the critical dimension of second component graphics are subtracted each other; With the critical dimension difference of first component graphics of corresponding exposure area on the critical dimension difference of first component graphics of any exposure area on the wafer and second component graphics and the control sheet and second component graphics relatively.
First component graphics is the PMOS figure, and second component graphics is the NMOS figure.
The equipment of measuring first component graphics and the second component graphics critical dimension is the scanning electron flying-spot microscope.
Said with arbitrarily first component graphics of corresponding exposure area and the critical dimension difference comparison of second component graphics on the critical dimension difference of first component graphics of exposure area and second component graphics and the control sheet on the wafer; Two differences differ-0.003 μ m~0.003 μ m, and focusing power is good.
Said with arbitrarily first component graphics of corresponding exposure area and the critical dimension difference comparison of second component graphics on the critical dimension difference of first component graphics of exposure area and second component graphics and the control sheet on the wafer; It is 0 μ m that two differences differ, and focusing power is best.
Compared with prior art; The present invention has the following advantages: the present invention is through the critical dimension of an any exposure area first component graphics and second component graphics on the measurement wafer; With the critical dimension difference of first component graphics of corresponding exposure area on the critical dimension difference of first component graphics of any exposure area on the wafer and second component graphics and the control sheet and second component graphics relatively, the identical focusing power of two differences is best then.Because the critical dimension of an any exposure area first component graphics and second component graphics on the need measurement wafer; Obtain after the critical dimension with the control sheet on corresponding first component graphics and the critical dimension difference comparison of second component graphics; Therefore convenient measurement is few to the assessment spended time of the focusing power of exposure bench in the exposure technology.
Description of drawings
Figure 1A to Figure 1B is the existing synoptic diagram that forms the photoresist pattern;
Fig. 2 is focal length on the prior art wafer-energy matrix synoptic diagram;
Fig. 3 is prior art critical dimension difference and focal length correlativity curve;
Fig. 4 is the process flow diagram of focusing evaluation embodiment of the present invention;
Fig. 5 A, Fig. 5 A ', Fig. 5 B, Fig. 5 B ' and Fig. 5 C are the synoptic diagram of focusing evaluation embodiment of the present invention.
Embodiment
Prior art to the focusing power of exposure bench in the exposure technology be evaluated as through exposure bench with the figure transfer on the light shield to photoresist layer; Then photoresist layer is developed; Each component graphics to after developing measures critical dimension; Then the critical dimension of two kinds of dissimilar component graphics is subtracted each other, difference is set up the curve data of critical dimension difference and focal length correlativity through focal length-energy matrix, thereby assess the focusing power of exposure bench.Owing to need each figure to measure, so the time of focusing evaluation cost is long.The present invention is through the critical dimension of an any exposure area first component graphics and second component graphics on the measurement wafer; With the critical dimension difference of first component graphics of corresponding exposure area on the critical dimension difference of first component graphics of any exposure area on the wafer and second component graphics and the control sheet and second component graphics relatively, the identical focusing power of two differences is best then.Because the critical dimension of an any exposure area first component graphics and second component graphics on the need measurement wafer; Obtain after the critical dimension with the control sheet on corresponding first component graphics and the critical dimension difference comparison of second component graphics; Therefore convenient measurement is few to the assessment spended time of the focusing power of exposure bench in the exposure technology.For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, does detailed explanation below in conjunction with the accompanying drawing specific embodiments of the invention.
Fig. 4 is the process flow diagram of focusing evaluation embodiment of the present invention.As shown in Figure 4, execution in step S101 makes the control sheet that comprises first component graphics and second component graphics; Execution in step S102 measures first component graphics and the second component graphics critical dimension difference of same exposure area on the control sheet successively; Execution in step S103 with the wafer of same batch of sheet of control on form first component graphics and second component graphics; Execution in step S104 measures first component graphics of any exposure area on the wafer and the critical dimension of second component graphics; Execution in step S105 subtracts each other first component graphics of any exposure area on the wafer and the critical dimension of second component graphics; Execution in step S106 with the critical dimension difference of first component graphics of corresponding exposure area on the critical dimension difference of first component graphics of any exposure area on the wafer and second component graphics and the control sheet and second component graphics relatively.
Fig. 5 A, Fig. 5 A ', Fig. 5 B, Fig. 5 B ' and Fig. 5 C are the synoptic diagram of focusing evaluation embodiment of the present invention.Shown in Fig. 5 A and Fig. 5 A ', will control sheet 300 and be divided at least one exposure area 301; On control sheet 300, form photoresist layer then with spin-coating method; Component graphics on the light shield is transferred on the photoresist layer successively at each exposure area 301 formation first component graphics 304 and second component graphics 302; Measure first component graphics 304 and second component graphics, the 302 critical dimension differences of same exposure area 301 on the control sheet 300 successively with scanning electron microscope.
At first provide and control the wafer 100 of same batch of sheet like Fig. 5 B and Fig. 5 B ', on wafer 100, be formed with semiconductor device structure (not marking); Wafer 100 is divided into and the consistent exposure area 101 of control sheet 300 quantity; On wafer 100, form and treat etch layer 102, this treats etch layer 102 for example metal level, polysilicon layer, silicon nitride layer or silicon oxide layer; Treating to form photoresist layer 104 on the etch layer 102.
Continuation is with reference to Fig. 5 B '; With light shield 106 serves as that the cover curtain carries out exposure technology 108 to photoresist layer 104; So that photoresist layer 104 is divided into exposure region 104a and 104a ' and unexposed area 104b; Exposure region 104a wherein and 104a ' decompose via the illuminated light of photic zone 106a of light shield 106; Unexposed area 104b does not then receive the irradiation of light via light tight the covering of 106b of district of light shield 106, wherein the exposure light source that uses for example is i line, hydrogen fluoride laser, ammonium fluoride laser etc. in exposure technology 108.
Then; Please with reference to Fig. 5 C; Via developing process exposure region 104a and 104a ' in the photoresist layer 104 are removed; So that unexposed area 104b stays, form first component graphics 105 ' and second component graphics 105 in each exposure area 101 of wafer successively, wherein first component graphics 105 ' and second component graphics 105 belong to various types of devices; Then with first component graphics 105 ' of any exposure area 101 on the scanning electron microscopy measurement wafer and the critical dimension of second component graphics 105; The critical dimension of first component graphics 105 ' that measures and second component graphics 105 is subtracted each other, obtain first component graphics 105 ' and second component graphics, 105 critical dimension differences; First component graphics of corresponding exposure area on first component graphics 105 ' of wafer 100 any exposure areas 101 and second component graphics, 105 critical dimension differences and the control sheet and the critical dimension difference of second component graphics are compared; Two critical dimension differences are subtracted each other back value when being-0.003 μ m~0.003 μ m, can think that the focusing power of exposure bench is better.
In the present embodiment; After subtracting each other, two critical dimension differences are specially-0.003 μ m ,-0.002 μ m ,-0.001 μ m, 0 μ m, 0.001 μ m, 0.002 μ m and 0.003 μ m etc.; Wherein differ when being 0 μ m in two critical dimension differences, the exposure bench focusing power is best.And if two critical dimension differences are subtracted each other the back value less than-0.003 μ m or greater than 0.003 μ m, explain that then the exposure bench focusing power is bad, need regulate again.
Continue shown in Fig. 5 A, will control sheet 300 and be divided at least one exposure area 301 with reference to figure 5A, Fig. 5 A ', Fig. 5 B, Fig. 5 B ' and Fig. 5 C; On control sheet 300, form photoresist layer then with spin-coating method; Component graphics on the light shield is transferred on the photoresist layer successively at each exposure area 301 formation PMOS figure 304 and NMOS figure 302; Measure the PMOS figure 304 and NMOS figure 302 critical dimension differences of same exposure area 301 on the control sheet 300 successively with scanning electron microscope.
At first provide and control the wafer 100 of same batch of sheet like Fig. 5 B and Fig. 5 B ', on wafer 100, be formed with semiconductor device structure (not marking); Wafer 100 is divided into and the consistent exposure area 101 of control sheet 300 quantity; On wafer 100, form and treat etch layer 102, this treats etch layer 102 for example metal level, polysilicon layer, silicon nitride layer or silicon oxide layer; Treating to form photoresist layer 104 on the etch layer 102.
Continuation is with reference to Fig. 5 B '; With light shield 106 serves as that the cover curtain carries out exposure technology 108 to photoresist layer 104; So that photoresist layer 104 is divided into exposure region 104a and 104a ' and unexposed area 104b; Exposure region 104a wherein and 104a ' decompose via the illuminated light of photic zone 106a of light shield 106; Unexposed area 104b does not then receive the irradiation of light via light tight the covering of 106b of district of light shield 106, wherein the exposure light source that uses for example is i line, hydrogen fluoride laser, ammonium fluoride laser etc. in exposure technology 108.
Then; Please with reference to Fig. 5 C; Via developing process exposure region 104a and 104a ' in the photoresist layer 104 are removed; So that unexposed area 104b stays, form PMOS figure 105 ' and NMOS figure 105 in each exposure area 101 of wafer successively, wherein PMOS figure 105 ' belongs to various types of devices with NMOS figure 105; Then with the PMOS figure 105 ' of any exposure area 101 on the scanning electron microscopy measurement wafer and the critical dimension of NMOS figure 105; The critical dimension of PMOS figure that measures 105 ' and NMOS figure 105 is subtracted each other, obtain PMOS figure 105 ' and NMOS figure 105 critical dimension differences; With the PMOS figure of wafer 100 any exposure areas 101 105 ' and NMOS figure 105 critical dimension differences with control sheet on PMOS figure and the critical dimension difference of NMOS figure of corresponding exposure area compare; Two critical dimension differences are subtracted each other the back value between-0.003 μ m~0.003 μ m, can think that the focusing power of exposure bench is better.
In the present embodiment; The critical dimension difference of the PMOS figure of corresponding exposure area and NMOS figure subtracts each other afterwards that value is specially-0.003 μ m ,-0.002 μ m ,-0.001 μ m, 0 μ m, 0.001 μ m, 0.002 μ m and 0.003 μ m etc. on the PMOS figure 105 ' of wafer 100 any exposure areas 101 and NMOS figure 105 critical dimension differences and the control sheet; Wherein when two critical dimension differences were 0 μ m, the exposure bench focusing power was best.If two critical dimension differences are subtracted each other the back value less than-0.003 μ m or greater than 0.003 μ m, explain that then the exposure bench focusing power is bad, need regulate again.
Though oneself discloses the present invention as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art are not breaking away from the spirit and scope of the present invention, all can do various changes and modification, so protection scope of the present invention should be as the criterion with claim institute restricted portion.