CN101282406B

CN101282406B - Image processing apparatus

Info

Publication number: CN101282406B
Application number: CN 200810097396
Authority: CN
Inventors: 坂本阳一
Original assignee: Canon Inc
Current assignee: Canon Inc
Priority date: 2001-12-06
Filing date: 2002-12-05
Publication date: 2013-03-06
Anticipated expiration: 2022-12-05
Also published as: CN101282406A; JP2003174564A; JP4164257B2; CN101282407B; CN101282405B; CN101282407A; CN101282405A

Abstract

The invention provides an image processing device for decoding an encoded image, which comprises an input device for inputting an encoded image which undergoes a jittering processing with using a jittering matrix; and a decoding device for decoding the input image. The decoding device decodes a pixel of a decoding object using a first reference pixel away from the pixel of the decoding object and a second reference pixel away from the pixel of the decoding object. Thereby, periodic images, especially image data in which background patterns such as wallpaper are arranged, can be compressed and decoded at higher speed and higher compressibility.

Description

Image processing apparatus

The application is to be December 5, application number in 2002 the dividing an application for the application for a patent for invention of " image processing apparatus, image processing method, program and storage medium " that be 02155529.X, denomination of invention the applying date.

Technical field

The present invention relates to image processing apparatus, image processing method, program and storage medium that image is encoded or the image of having encoded is decoded.

Background technology

The print data that the application program of same background pattern that will arrange output and be referred to as wallpaper or texture etc. is exported be launched into view data and the situation that prints in, when in order to reduce size of data view data being compressed, in the situation that compressed background pattern self well compresses whole view data just easily well.But the situation that background patterns less can compress well himself is quite a few, and under these circumstances, compressing well whole view data just may not be easy.

Figure 10 is the such print data of an example, as shown in figure 11, consists of background by arranging identical pattern.

In existing compress technique, have, the for example such coding method of run-length encoding (run length encoding) or Delta-law coding, it utilizes pixel value to become with contiguous pixel with the strong characteristics of the tendency of value, with reference to contiguous pixel, identically just compresses if be worth.

Also just like LZ77 coding or the such coding method of LZ78 coding, it is identical pixel sequences by coming detected value with reference to large-scale pixel, and utilizes this to compress in addition.Utilize these methods, owing to can detect at locational, the pixel with identical value that quite separates and use in the compression, just can compress well above-mentioned wallpaper etc.

In addition also just like JPEG coding like that, well himself coding method of compressed background pattern.

In addition, the method that cycle of detecting texture is compressed has been described in Japanese Patent Application Publication 2000-76424.

But, utilize above-mentioned run-length encoding or Delta-law coding, because in the situation that compression above-mentioned wallpaper etc., this repetition period be the such large value of 1024 pixels for example, the pixel that just has only reference vicinity then can not compress such shortcoming well.

In addition, utilize above-mentioned LZ77 coding or LZ78 coding, owing to when coding, will just have amount of calculation large with reference to large-scale pixel, the long shortcoming of coding required time.In addition, utilize these methods, because will be with reference to large-scale pixel when decoding, just having needs the such shortcoming of jumbo buffer storage, for example, just becomes in the situation that make printer have the reason that the decoding function cost increases.

In addition, utilize above-mentioned JPEG, the amount of calculation during owing to coding is large, just has the long shortcoming of coding required time.In addition, utilize the method, the large such shortcoming of the amount of calculation when also having decoding for example, just becomes in the situation that make printer have the reason that the decoding function cost increases.

In addition, utilize above-mentioned Japanese Patent Application Publication 2000-76424, owing to by Fourier analysis or auto-correlation coefficient, using the data of background patterns to carry out the calculating of huge quantity with regard to needing, therefore can not encode at high speed.

The present invention finishes in view of above problem, and purpose is when the view data that is arranged with background patterns to having periodic image, particularly wallpaper etc. is encoded, and compresses whole image more at high speed and with high compression rate more.

Other purposes of the present invention are in addition, reduce the wallpaper of having encoded etc. is arranged with the circuit scale of the decoding circuit that the coding of the image of background patterns decodes, and need not a large amount of buffer storage, the decoding that can consist of with low cost.

In addition, also have in the situation consistent with the data sequence of front as the method for packed data, the length of consistent data is encoded, in inconsistent situation, the method that data self are encoded.

For example, in the LZ77 compression method, in the situation consistent with the data of optional position in the moving window of pre-sizing, encoded with consistent length in the position of consistent data sequence, in inconsistent situation, data self are encoded.

In addition, in the situation that compressing image data, also has the position in a predetermined place or many places, for example with want to carry out coded data above or in the consistent situation of the data sequence of the position in left side, consistent length is encoded the method for in inconsistent situation, data self being encoded.

On the other hand, shown in USP5450562, in addition the most emerging data are stored in the cache memory, in the situation that cache-hit, by the index that stores consistent data is encoded, be encoded into the method for comparing shorter code with the situation that data self are encoded.

But in above-mentioned method, the code that in the few situation of the consistent part of data sequence data self has been carried out encoding becomes many, just has compression ratio and significantly reduces such shortcoming.

On the other hand, in the disclosed method of USP5450562, even this redundancy can not be used in the compression in the situation consistent with the data sequence of front, it is difficult obtaining high compression ratio.

The present invention finishes in view of above problem, purpose is to utilize this redundancy to obtain high compression ratio in the situation consistent with the image data sequence of front, even in the few situation of the consistent part of image data sequence, also do one's utmost to restrain the reduction of compression ratio simultaneously.

In addition, the print data that the character that output is referred to as repeat in the background patterns of wallpaper or texture etc. or graphics application program are exported be launched into view data and the situation that prints in, when in order to reduce size of data view data to be compressed, in the situation that compressed background pattern self well compresses whole view data just easily well.

But the situation that background patterns less can compress well himself is also many, and under these circumstances, compressing well whole view data just may not be easy.One for example shown in Figure 10 as such print data.In the prior art, although the view data of squeezing characters part well is low with the correlation of contiguous view data because the view data of the part of background patterns has irregular pattern, so less can compress well.Because the general area of background patterns is all large, the ratio that accounts for whole page or leaf is high, in the situation that background patterns can not compress well, page or leaf integral body can not be compressed well.

The present invention finishes in view of above problem, its purpose is, a kind of image processing method of the coding/decoding method that comprises coding method and this coding is decoded is provided, when being compressed with the view data of background patterns, even in background patterns and the low situation of the correlation of contiguous view data, also can compress well.

In addition in the past, when compressing image data, generally be utilize in the horizontal direction with vertical direction on hold the high characteristics of the consecutive tendency of pixel of identical pixel value, with reference to high with the correlation of paying close attention to the position, positive left side or directly over the position encode.

In addition, to have applied in the situation of utilizing the view data that losing lustre of dither matrix (dithermatrix) process in the view data of wanting to compress, owing to losing lustre when processing to the applicable different computing of the pixel of adjacency applying, with the correlation of contiguous pixel not as good as with interval only the correlation of pixel in the cycle of processing employed dither matrix of losing lustre high.Therefore just have in this case, in the situation in the known cycle of processing employed dither matrix of losing lustre, with reference to from paying close attention to the only position cycle, left side or top of the space jitter matrix method of encoding of position.

But, utilize said method, because in different situation of the cycle of cycle of view data and dither matrix, the correlation of paying close attention to position and reference position is less high, just has the shortcoming that can not compress expeditiously.For example, be to apply in the situation of resolution conversion with the after-applied view data processed of losing lustre at the original image different to resolution in the view data of wish compression, such problem will occur.

The present invention finishes in view of above problem, and purpose is expeditiously, particularly with short code image is encoded.

Summary of the invention

In order to reach purpose of the present invention, provide following image processing apparatus.

That is, a kind of image processing apparatus that image is encoded comprises: the device of losing lustre applies the processing of losing lustre to image with the matrix of pre-sizing; The cycle detection device detects cycle of the pattern of above-mentioned image; And code device, use is encoded to having applied the above-mentioned image of processing of losing lustre according to the relative position relation of the pixel of the size of above-mentioned cycle and/or above-mentioned matrix.

That is, a kind of image processing apparatus that the image of having encoded is decoded comprises: save set, preserve the predetermined line number of decoded pixel sequences; Decoding device is decoded to the order group who is included in the coded data; And decoding device, read pixel sequences according to the order of being decoded by above-mentioned decoding device from above-mentioned save set, the pixel sequences that reads is saved in above-mentioned save set, simultaneously the pixel sequences that reads is outputed to predetermined buffer successively, and then, under the order of being decoded by above-mentioned decoding device is situation about the order of the line direction of image, according to the periodic change of the pattern of above-mentioned image from position that above-mentioned save set reads.

In order to reach purpose of the present invention, provide following image processing method.

That is, a kind of image processing method that image is encoded comprises: the step that loses lustre, and use the matrix of pre-sizing to apply the processing of losing lustre to image; The cycle detection step detects cycle of the pattern of above-mentioned image; And coding step, use is encoded to having applied the above-mentioned image of processing of losing lustre according to the relative position relation of the pixel of the size of above-mentioned cycle and/or above-mentioned matrix.

That is, a kind of image processing method that the image of having encoded is decoded comprises: decoding step, the predetermined line number of decoded pixel sequences is saved in predetermined save set, and the order group who is included in the coded data is decoded; Decoding step, read pixel sequences according to the order of being decoded by above-mentioned decoding step from above-mentioned save set, the pixel sequences that reads is saved in above-mentioned save set, simultaneously the pixel sequences that reads is outputed to predetermined buffer successively, and then, under the order of being decoded by above-mentioned decoding step is situation about the order of the line direction of image, according to the periodic change of the pattern of above-mentioned image from position that above-mentioned save set reads.

That is, a kind of image processing apparatus of compressed image comprises: the colour switching device, use dither matrix to carry out colour switching to image and process, generate versicolor view data; And order output device, view data to every kind of color, the pixel data sequence that compares compressed object, with with this pixel data sequence the pixel data sequence of preposition relation is arranged, output represents this relatively order of content in the order of the length of exporting the consistent pixel data sequence of expression, generates the coded data of versicolor view data.

That is, a kind of image processing apparatus of compressed image comprises: the colour switching device, use dither matrix to carry out colour switching to image and process, generate versicolor view data; Code device compresses above-mentioned versicolor view data and encodes; And output device, output is by the coded data of above-mentioned code device coding; And then above-mentioned code device has, the 1st order output device, the pixel data sequence that compares the row of compressed object, with show the pixel data sequence of the row of preposition relation with this, try to achieve the length of consistent pixel data sequence, as this consistent pixel data sequence, the order of the above-mentioned length of output expression in the order of the above-mentioned relatively content of output expression; The 2nd order output device, in the situation that above-mentioned length is 0, the pixel data sequence that compares the row of compressed object, with the pixel data sequence that the preposition relation is arranged in these row, try to achieve the length of consistent pixel data sequence, as this consistent pixel data sequence, the order of the above-mentioned length of output expression in the order of the above-mentioned relatively content of output expression; Save set is being in 0 the situation simultaneously by above-mentioned the 1st order length obtained of output device with by the length that above-mentioned the 2nd order output device is obtained, and preserves part or all of pixel data sequence of the row of compressed object; The 3rd order output device, be in 0 the situation simultaneously by above-mentioned the 1st order length obtained of output device with by the length that above-mentioned the 2nd order output device is obtained, the pixel data and the pixel data sequence that is kept in the above-mentioned save set that compare compressed object, as the pixel data of above-mentioned compressed object, the above-mentioned relatively order of content of output expression in the order of the consistent position of pixel data in above-mentioned save set of output expression; And the 4th the order output device, be in 0 the situation simultaneously by above-mentioned the 1st order length obtained of output device with by the length that above-mentioned the 2nd order output device is obtained, and be judged as the pixel data consistent with the pixel data of compressed object at the comparative result by above-mentioned the 3rd order output device output and be not present in the situation of above-mentioned save set, the order of the pixel data of output expression compressed object; And generate the coded data comprise by the order of part or all output of above-mentioned the 1st to the 4th order output device.

That is, a kind of image processing apparatus that coded data is decoded comprises: the 1st save set, preserve decoded pixel data sequence; The 2nd save set is preserved decoded pixel data sequence displacement predetermined number; The 3rd save set is preserved the original pixel data sequence that is included in the above-mentioned coded data; And reduction apparatus, determine carrying out when the generation of above-mentioned coded data, the content of the pixel data sequence of the row of compressed object and the various command that represents with this comparative result of pixel data sequence of showing the row of preposition relation is gone back original image according to determined content with the pixel data that is kept in above-mentioned the 1st save set or the 2nd save set or the 3rd save set.

That is, a kind of image processing method of compressed image comprises: the colour switching step, and use dither matrix to carry out colour switching to image and process, generate versicolor view data; And order output step, view data to every kind of color, the pixel data sequence that compares compressed object, with with this pixel data sequence the pixel data sequence of preposition relation is arranged, output represents this relatively order of content in the order of the length of exporting the consistent pixel data sequence of expression, generates the coded data of versicolor view data.

That is, a kind of image processing method of compressed image comprises: the colour switching step, and use dither matrix to carry out colour switching to image and process, generate versicolor view data; Coding step compresses above-mentioned versicolor view data and encodes; And the output step, output is by the coded data of above-mentioned code device coding; And then above-mentioned coding step comprises, the 1st order output step, the pixel data sequence of the row of compressed object and show the pixel data sequence of the row of preposition relation with this relatively, try to achieve the length of consistent pixel data sequence, as this consistent pixel data sequence, the order of the above-mentioned length of output expression in the order of the above-mentioned relatively content of output expression; The 2nd order output step, in the situation that above-mentioned length is 0, the pixel data sequence of the row of comparison compressed object and the pixel data sequence that in these row, has preposition to concern, try to achieve the length of consistent pixel data sequence, as this consistent pixel data sequence, the order of the above-mentioned length of output expression in the order of the above-mentioned relatively content of output expression; Preserve step, be in 0 the situation simultaneously in the length of being obtained by above-mentioned the 1st order output step with by the length that above-mentioned the 2nd order output step is obtained, part or all of the pixel data sequence of the row of compressed object is saved in predetermined save set; The 3rd order output step, be in 0 the situation simultaneously in the length of being obtained by above-mentioned the 1st order output step with by the length that above-mentioned the 2nd order output step is obtained, compare the pixel data of compressed object and the pixel data of being preserved by above-mentioned preservation step, as the pixel data of above-mentioned compressed object, the above-mentioned relatively order of content of output expression in the order of the position that the consistent pixel data sequence of output expression is preserved by above-mentioned preservation step; And the 4th order output step, be in 0 the situation simultaneously in the length of being obtained by above-mentioned the 1st order output step with by the length that above-mentioned the 2nd order output step is obtained, and being judged as the pixel data consistent with the pixel data of compressed object at the comparative result by above-mentioned the 3rd order output step output does not have in the situation of being preserved by above-mentioned preservation step, the order of the pixel data of output expression compressed object; And generate the coded data comprise by the order of part or all output of above-mentioned the 1st to the 4th order output step.

That is, the image processing method that a kind of image processing apparatus that coded data is decoded moves, described image processing apparatus have decoded the 1st save set of pixel data sequence of preservation; The 2nd save set that decoded pixel data sequence displacement predetermined number is preserved; And preservation is included in the 3rd save set of the original pixel data sequence in the above-mentioned coded data; This image processing method, determine carrying out when the generation of above-mentioned coded data, the content of the pixel data sequence of the row of compressed object and the various command that represents with this comparative result of pixel data sequence of showing the row of preposition relation is gone back original image according to determined content with the pixel data that is kept in above-mentioned the 1st save set or the 2nd save set or the 3rd save set.

That is, a kind of image processing apparatus that a plurality of pages view data is encoded comprises: the 1st memory, the view data of preserving the page or leaf of wanting to encode; Code device is encoded to the view data that is kept in above-mentioned the 1st memory; And the 2nd memory, the view data of preserving prevpage; Above-mentioned code device is encoded with reference to the view data that is kept at the prevpage in above-mentioned the 2nd memory.

That is, a kind of image processing apparatus that a plurality of pages the view data of having encoded is decoded comprises: decoding device, coding is decoded; The 1st memory is preserved the view data of being decoded by above-mentioned decoding device; Re-encoding apparatus is encoded to the view data that is kept in above-mentioned the 1st memory; The 2nd memory is preserved by the coded code of above-mentioned re-encoding apparatus; And decoding device again, the coding that is kept in above-mentioned the 2nd memory is decoded; Above-mentioned decoding device, carried out in the decoding situation at the coding to the view data of reference prevpage, decode with reference to the view data that above-mentioned again decoding device is decoded, above-mentioned re-encoding apparatus is only encoded with reference to the view data of the page or leaf of wanting to encode simultaneously.

That is, the image processing method that a kind of image processing apparatus that a plurality of pages view data is encoded moves, described image processing apparatus have the 1st memory of the view data of preserving the page or leaf of wanting to encode; And the 2nd memory of preserving the view data of prevpage; This image processing method comprises: coding step, the view data that is kept in above-mentioned the 1st memory is encoded; Above-mentioned coding step is encoded with reference to the view data that is kept at the prevpage in above-mentioned the 2nd memory.

That is, a kind of the 1st memory and the 2nd memory of having, the image processing method that the image processing apparatus that a plurality of pages the view data of having encoded is decoded moves comprises: decoding step, coding is decoded; The 1st preserves step, will be saved in by the view data that above-mentioned decoding step is decoded above-mentioned the 1st memory; Coding step is encoded to the view data that is kept in above-mentioned the 1st memory again; The 2nd preserves step, will be saved in the 2nd memory by the coded code of above-mentioned again coding step; And decoding step again, the coding that is kept in above-mentioned the 2nd memory is decoded; Above-mentioned decoding step, carried out at the coding to the image of reference prevpage in the situation of decoding, decode with reference to the view data of being decoded by above-mentioned again decoding step, above-mentioned again coding step is only encoded with reference to the view data of the page or leaf of wanting to encode simultaneously.

Namely, a kind of image processing apparatus that image is encoded, comprise: code device, compare the follow-up data sequence of focused data, the data sequence follow-up with comparable data, the data sequence that this focused data of consistent length is follow-up is encoded into the coded command according to the position relationship of this focused data and this comparable data; Displacement apparatus in the situation that above-mentioned focused data and above-mentioned reference data are specific position relationship, after by above-mentioned code device coding, will be replaced as corresponding to the coded command of this specific position relationship the shorter coded command of length of code.

That is, a kind of image processing apparatus that comes decoded picture based on the coded data that is comprised of coded command comprises: save set, preserve the data of decoded picture; A plurality of decoding devices are kept in the above-mentioned save set by reading, and the locational data according to coded command output to the outside with these data as the decoded data according to this coded command; Holding device keeps the value that changes according to the coded command that will decode; By in above-mentioned a plurality of decoding devices, the decoding device of the value that keeps according to above-mentioned holding device, the processing of decoding.

Namely, a kind of image processing method that image is encoded, comprise: coding step, compare the follow-up data sequence of focused data, the data sequence follow-up with comparable data, the data sequence that this focused data of consistent length is follow-up is encoded into the coded command according to the position relationship of this focused data and this comparable data; Displacement step in the situation that above-mentioned focused data and above-mentioned reference data are specific position relationship, after by above-mentioned coding step coding, will be replaced as corresponding to the coded command of this specific position relationship the shorter coded command of length of code.

That is, a kind of image processing method that comes decoded picture based on the coded data that is comprised of coded command comprises: preserve step, the data of decoded picture are saved in predetermined save set; A plurality of decoding step are kept in the above-mentioned save set by reading, and the locational data according to coded command output to the outside with these data as the decoded data according to this coded command; Keep step, will remain to according to the value that the coded command that will decode changes predetermined holding device; By in above-mentioned a plurality of decoding step, the decoding step of the value that keeps according to above-mentioned holding device, the processing of decoding.

Other features of the present invention and advantage are by coming to understand take the explanation of accompanying drawing below reference.Here, in the accompanying drawings, identical or same structure is additional identical with reference to label.

Description of drawings

Accompanying drawing is included in the specification, consists of its part, is used for illustrating form of implementation of the present invention, is used from explanation principle of the present invention with the record one of specification.

Fig. 1 is the concept map of employed software bundling and printer Relations Among when being illustrated in print image.

Fig. 2 is the block diagram of the basic comprising of expression printer 1711.

To be expression be included in the figure of the table that each coding in the coded data that printer driver shown in Figure 14 generates describes to an example to Fig. 3.

The figure of Fig. 4 table that to be expression describe an example counting coding.

Fig. 5 is key diagram 3 and the respectively figure of the example of coding shown in Figure 4.

Fig. 6 is the main flow chart of processing that printer driver 4 carries out.

Fig. 7 is the flow chart of the processing details among the expression step S4.

Fig. 8 is the flow chart of the processing details among the expression step S10.

Fig. 9 A and Fig. 9 B are the flow charts of the processing details among the expression step S11.

Figure 10 is the figure of expression one routine print data.

Figure 11 is the figure of each pattern of the expression print data that consists of Figure 10.

Figure 12 is the block diagram of the detailed formation of expression decoding circuit 13.

Figure 13 is before the presentation code or the figure of the formation of decoded view data.

Figure 14 is that explanation view data shown in Figure 13 is the figure that how to be kept on each address of line buffer 31.

Figure 15 is that explanation view data shown in Figure 13 is at the processed figure of which type of timing.

Figure 16 is the flow chart that treatment step is controlled in the 15 performed printings of expression control circuit.

Figure 17 is the figure of the basic comprising of image processing apparatus in the expression form of implementation of the present invention.

Figure 18 is the figure of the configuration example of expression bitmap management table.

Figure 19 is the block diagram of the basic comprising of the printer 1711 in expression the present invention the 3rd form of implementation.

Figure 20 is the figure of the table that describes of each coding of comprising in expression the coded data that the printer driver 4 in one routine the present invention's the 3rd form of implementation is generated.

Figure 21 is expression to the continue figure of the table that coding after COPY UP order, COPY LEFT order, expression length (＜byte number 〉) describes of an example.

Figure 22 is the explanation view data and utilizes RAW order and CACHE to order the figure that this view data is saved in the method for cache memory.

Figure 23 illustrates view data and orders the figure of the method that this view data is encoded by COPY UP order and COPY LEFT.

Figure 24 is the main flow chart of processing that the printer driver 4 in the present invention's the 3rd form of implementation carries out.

Figure 25 A and Figure 25 B are the flow charts that coding is processed details among the expression step S5011.

Figure 26 is the block diagram of the basic comprising of expression decoding circuit 5013.

Figure 27 is the block diagram of the detailed formation of expression cache memory 5036.

Figure 28 is the block diagram of the basic comprising of the printer 1711 in expression the present invention the 5th form of implementation.

Figure 29 is the flow chart of the treatment step of the printer driver 4 in expression the present invention the 5th form of implementation.

Figure 30 A and Figure 30 B are the flow charts of coding step details of the step S6011 of expression Figure 29.

Figure 31 is the block diagram of the details of expression decoding circuit 6013 shown in Figure 28.

Figure 32 is the figure of the coding schedule that generates of the printer driver 4 of expression in one routine the present invention's the 6th form of implementation.

Figure 33 A is the figure of the view data of presentation code object.

Figure 33 B is the figure of the view data of presentation code object.

Figure 34 A and Figure 34 B are the flow charts that the coding of this form of implementation in step S5011 is processed.

Figure 35 is the block diagram of the expression basic comprising of decoding circuit 513 in the present invention's the 6th form of implementation shown in Figure 19.

Embodiment

Referring now to accompanying drawing the preferred embodiment of the present invention is elaborated.

[the 1st form of implementation]

The basic comprising of the image processing apparatus of this form of implementation of explanation in Figure 17.In this form of implementation, use general personal computer and/or work station as image processing apparatus.

The 1701st, CPU with when being kept at program among RAM1702 and/or the ROM1703 and/or data and carrying out the control of this device integral body, also carries out the image Compression that illustrates later.The 1702nd, RAM when having the program and/or data storage district that temporary transient storage packs into from external memory 1704 and/or storage media drive 1709, also has employed service area when CPU1701 carries out various processing.The 1703rd, ROM preserves the whole control program (for example boot) of this device and/or control data (for example setting data of this device).The 1704th, the external memory of hard disk etc. keeps the program of installing from storage media drive 1709 and/or data etc.In addition, in RAM1702, can not arrange in the situation of size of above-mentioned service area, also can be used as file insufficient section is provided.1705,1706 is respectively keyboard and mouse, uses as pointing device respectively, can be to the various indications of this device input.The 1707th, display unit is made of CRT and/or liquid crystal panel etc., can show image and/or character etc.The 1708th, image-input device is made of digital camera and/or scanner etc., can image be input to RAM1702 and/or external memory 1704 as numerical data by the operation of photography and/or scanning etc.

The 1709th, storage media drive from the storage medium read-in programme of CD-ROM and/or DVD-ROM etc. and/or data etc., outputs to RAM1702 and/or external memory 1704 etc. with program and/or the data of reading in.The 1710th, I/F (interface), receive the image of compression processing object from the equipment of outside via internet and/or LAN etc., otherwise perhaps the equipment of outside is sent the image that compressed etc., as and the equipment of outside between I/F when carrying out the sending and receiving of data come work.The 1711st, printer is as expanding compressed image and coming work to the image decompressing device that the recording medium of paper etc. prints.The 1712nd, the bus of above-mentioned each parts of connection.

Fig. 1 is the concept map of employed software bundling and printer Relations Among when being illustrated in print image.Interior operating system 2 (below be designated as OS), application program 3, printer driver 4 and the port driver 5 of storing of storage device 1704 externally.

Each parts (except the printer 1711) that the OS2 management is shown in Figure 1, and the software of application program 3, printer driver 4 and port driver 5 etc.Application program 3 is, the such application software of word processor for example is according to used keyboard 1705 and/or mouse 1706 indicated contents to carry out generation printing of document etc. by the operator.The 4th, printer driver receives the print command that application program 3 is sent via OS2, and this print command is transformed into the printer command that printer 1711 can be explained.The 5th, port driver receives the printer command of 4 conversion of printer driver via OS2, and sends to printer 1711 via not shown parallel port.Then printer 1711, print according to the printer command that receives from port driver 5.

Fig. 2 is the block diagram of the basic comprising of expression printer 1711.Among the figure, the 11st, parallel port receives from the printer command of port driver 5 outputs.The 12nd, FIFO (first-in first-out) memory, storage are included in the coded data (seeing the back explanation for details) in the printer command that parallel port 11 receives, with the data of storing according to the Sequential output of first-in first-out to decoding circuit 13.Decoding circuit 13 the code sequence data of storing in the FIFO memory 12 is decoded, and the view data that will restore outputs to shift register 16.Printer Engine 14 is laser printer engines, and according to the indication of control circuit 15, the view data of exporting according to decoding circuit 13 prints.The 15th, control circuit for example is made of one-chip CPU, carries out the control of parallel port 11, FIFO memory 12, decoding circuit 13 and Printer Engine 14.The 16th, shift register, the byte data that decoding circuit 13 has been decoded is divided into a plurality of pixels, outputs to successively Printer Engine 14 by each pixel.

Below, when just printing, the action of each parts shown in Fig. 1,2 describes.

The operator comes operating application program 3 to generate print data with keyboard 1105 and/or mouse 1106, and after the indication that input prints the print data that generates, print command is passed to printer driver 4 via OS2 from application program 3.Printer driver 4 is based on the print command of sending from application program 3, and generation will become the view data of print object, then uses dither matrix to carry out dithering process to this view data, and carries out 2 values and process.In addition, at this moment printer driver 4 is based on the coding step that illustrates later, generate coded data from having applied the view data that 2 values process, export simultaneously the printing control command of the length of row of paper size, designate (data bitmap) and line number etc., the compression parameters order of specified compression parameter, the EOP order of expression EOP.Port driver 5 sends to printer 1711 with series of orders group and the above-mentioned coded data that printer driver 4 generates.

Control circuit 15 receives printer command via parallel port 11.In the printer command that receives, print control command, compression parameters specified command, be maintained at the inside of control circuit 15 in order to print control.In addition, in the printer command that receives, coded data is saved to FIFO memory 12.After this, when the reception of control circuit 15 by the EOP order etc., when the reception that detects the printer command that consists of 1 page has been finished, print beginning to Printer Engine 14 indications.After having indicated the printing beginning, Printer Engine 14 requires the output of view data to shift register 16.Shift register 16 is read decoded data from decoding circuit 13 in advance, and preserves the decoded data of reading.Then, after the output requirement of accepting from Printer Engine 14, the decoded data of keeping is outputed to Printer Engine 14, when shift register 16 interior free buffering area, require the output of follow-up decoded data to decoding circuit 13 simultaneously.Coded data is decoded successively and is output as view data (decoded data) like this, and after the output of 1 page view data all finished, printing was finished.Here, after the image output order of background patterns was issued from application program 3, printer driver 4 detected this instruction with the step that illustrates later, tries to achieve the cycle of background patterns.In the situation that printer driver 4 detects background patterns, when view data is encoded, utilize the cycle of background patterns to encode according to the step that illustrates later in addition.

Then, with reference to Fig. 3 and table shown in Figure 4, the coding that generates with regard to printer driver shown in Figure 14 describes.

Fig. 3 is included in table that each coding in the coded data that printer driver shown in Figure 14 generates describes to an example.The coding that describes in this form of implementation is appointed as in following 4 kinds of operations: the copying of data sequence of copying the row of predetermined row top, copying the nearly left side of the data sequence in the predetermined bite left side of going together mutually copies, copy the left side far away of the data sequence in the predetermined bite left side of going together mutually and copy, and the initial data of direct specific data.In addition, on copy and precalculated position that institute's reference is copied on a nearly left side is value according to the cycle of above-mentioned dither matrix, the precalculated position that institute's reference is copied on a left side far away is the value according to the cycle of background patterns.

As shown in Figure 3, code (command code) is RAW order with the situation of " 0 " beginning, and 8 follow-up bit data (＜data8 〉) are intactly specified as initial data.Code is COPY UP order with the situation of " 10 " beginning, only carry out the byte number shown in the follow-up counting coding (＜count 〉) on copy.Code is COPYNEAR LEFT order with the situation of " 110 " beginning, only carries out the nearly left side of the byte number shown in the follow-up counting coding (＜count 〉) and copies.Code is COPY FAR LEFT order with the situation of " 1110 " beginning, only carries out the left side far away of the byte number shown in the follow-up counting coding (＜count 〉) and copies.Code is COUNT HIGH order with the situation of " 11110 " beginning, expression will be follow-up counting coding (＜count 〉) shown in 64 times of number, be added to the situation in follow-up COPY UP or COPYNEAR LEFT or COPY FAR LEFT any one command code in ordering.Code is the EOB order with the situation of " 11111 " beginning, the end of expression code sequence.

The figure of Fig. 4 table that to be expression describe an example counting coding.As shown in the drawing, the position of command code is that the situation of " 111111 " represents the COUNT0 coding, and its expression counting is 0 situation.The position of command code represents the COUNT1 coding with the situation of " 0 " beginning, and its expression counting is 1 situation.The position of command code represents COUNT2-3 coding with the situation of " 10 " beginning, and follow-up 1 data (＜data1 〉) are 0 situation, just become " 010 " as command code, just mean 2 bytes as implication.On the other hand, follow-up 1 data (＜data1 〉) are 1 situation, just become " 011 " as command code, just mean 3 bytes as implication.Namely, the position order of command code means the length of 2 bytes or 3 bytes exactly with the situation of " 01 " beginning.

In addition, the position of command code is with the situation of " 110 " beginning, expression COUNT4-7 coding, owing to becoming the follow-up data that have 2, with regard to the length of meaning from 4 bytes to 7 bytes, the position of command code is with the situation of " 1110 " beginning, expression COUNT8-15 coding, owing to becoming the follow-up data that have 2, with regard to the length of meaning from 8 bytes to 15 bytes, the position of command code is with the situation of " 11110 " beginning, and expression COUNT16-31 encodes, owing to becoming the follow-up data that have 2, with regard to the length of meaning from 16 bytes to 31 bytes, the position of command code is with the situation of " 111110 " beginning, and expression COUNT32-63 encodes, owing to becoming the follow-up data that have 2, just the length of meaning from 32 bytes to 63 bytes.

Then with reference to Fig. 5, just the example of Fig. 3 and coding shown in Figure 4 describes.In addition, the code sequence shown in this figure be from begin by the record order make an explanation.

In the figure, code sequence " 0 00000000 " makes an explanation as getting off.Namely, because " 0 " of beginning is the RAW order, follow-up 8 bit data " 00000000 " are intactly specified as initial data.Then, code sequence " 110 0 " makes an explanation as getting off." 110 " of beginning are nearly left copy commands, because follow-up " 0 " is the COUNT1 coding, copy therefore represent the nearly left side of 1 byte.Then, code sequence " 10101 " makes an explanation as getting off.Namely, " 10 " of beginning are upper copy commands because follow-up " 10 " are COUNT2-3 codings, therefore expression with 2 values that are added on follow-up 1 " 1 ", namely 3 bytes on copy.Then, code sequence " 11,110 10 1 " makes an explanation as getting off.Namely, " 11110 " are COUNT HIGH orders, because follow-up " 10 " are the COUNT2-3 codings, therefore expression is added to 64 times of value on follow-up 1 " 0 " with 2, is about to 128 and is added on the counting of follow-up order.

Then, code sequence " 1,110 111111 " makes an explanation as getting off.Namely, " 1110 " are left copy commands far away, because follow-up " 111111 " are the COUNT0 codings, copy therefore represent the left side far away of 0 byte.But, in the case, because COUNT HIGH 2 orders are front, therefore addition 128 represents that the left side far away of 128 bytes is copied.Then, " 11111 " are the EOB orders, the end of expression code sequence.Follow-up " 0000000 " is the filling coding for the aligned bytes border, does not have special implication.In addition, when being encoded into above-mentioned coding (view data order), when upper duplicating position, nearly left duplicating position and left duplicating position far away selected, should be noted that following situation in order to improve compression ratio.

For example, 8 gray scale original image being lost lustre in 1 the situation of 2 value images or the grayscale images below 4, generally be with dither matrix each pixel in each matrix to be carried out calculation process with different threshold values to lose lustre.In this case, because the pixel of adjacency utilizes different threshold values to carry out computing, even again because the pixel value of original image is identical, the situation that the pixel value after losing lustre becomes different value is many, correlation is low, so also be difficult even improve compression ratio with reference to the pixel of adjacency.

Because dither matrix is periodically used, again because be not use with in abutting connection with the identical threshold values of pixel, but with the pixel at interval a little, the identical threshold values of the pixel in space jitter matrix cycle only normally, so and the correlation between such pixel just high.Therefore, by replacing in abutting connection with the pixel at a little interval in next cycle with reference to meeting dither matrix of pixel, just can improve compression ratio.

About upper position, equate line number although can intactly use with the cycle of dither matrix.But about nearly left position and left position far away, because the unit of coding is byte unit, in the situation that image is discontented with 8, be necessary more to note.For example, be 1 at pixel, the basic cycle of dither matrix is in the situation of 12 pixels, just become the cycle of 1.5 bytes, because the unit of coding is 1 byte, the cycle of using identical threshold values with byte unit just becomes 3 bytes, just need to be applied to nearly left position this cycle.About left position far away too, for example, it is 1 at pixel, the cycle of background patterns is i.e. 128 bytes of 1024 pixels, the basic cycle of dither matrix is in the situation of 12 pixels, because different threshold values is used in the position in 1 cycle that differed of background patterns, therefore correlation is low, improve just difficulty of compression ratio.In this case, just need and to be made as left position far away as the interval location of least common multiple 384 bytes of 128 bytes and 3 bytes.

Then, with reference to flow chart shown in Figure 6, the processing details of printer driver 4 is described.Fig. 6 is the main flow chart of processing that printer driver 4 carries out.After calling printer driver 4 from operating system 2, at first judge whether drawing for order of the kind call at step S1.Be in the situation of drawing for order in the kind of calling, make to process to enter the step S2 processing of drawing.Processing as drawing specifically is exactly will be transformed into 8 grayscale images from application program 3 indicated character, figure or bitmaps etc. via operating system 2, and be recorded to RAM1702 or external memory 1704.

Then, whether bitmap is drawn instruction to judge the kind of calling at step S3.Not that bitmap is drawn end process in the situation of instruction in the kind of calling.On the other hand, be that bitmap is drawn in the situation of instruction in the kind of calling, carry out the Check processing in background patterns cycle of illustrating later at step S4, end process.

On the other hand, the kind of calling in step S1 is not in the situation of drawing for order, processes to enter step S7, judges that the kind of calling is the EOP instruction.Be in the situation of EOP instruction in the kind of calling, make to process to enter step S8, carry out 2 values and process.Specifically be exactly to use dither matrix will become at the image conversion that step 2 is recorded to 8 gray scales of RAM1702 or external memory 1704 image of 1 of black and white.

Then, in step S9 output print control command, specifically be exactly the order that the byte number of specifying paper size, paper feeding cassette, resolution, grey exponent number, 1 row, 1 page line number etc. are printed needed condition.Then, employed when step S10 output encoder, specify the compression parameters specified command of following parameter: when copying in the appointment copy source be which top the position on copy the vertical shift value, when specifying a nearly left side to copy copy source be which byte left side of going together mutually the position near left levels of replication deviant and when specifying a left side far away to copy copy source be the far away left levels of replication deviant of the position in which byte left side of going together mutually.

Here, on copy vertical shift value and nearly left levels of replication deviant, according to employed dither matrix among the step S8, obtain optimal value by theoretical or test in advance, and use this value.In addition, left levels of replication deviant far away is used the periodic quantity that meets the background patterns of obtaining among the step S4.

Then, view data is encoded according to the coding step that illustrates later at step S11.At this moment, use specified copy vertical shift value, nearly left levels of replication deviant and the left levels of replication deviant far away of compression parameters specified command of exporting at step S10 to encode.The view data order head of then in step S12 output size and the line number of view data coded in step S11 being carried out appointment.Then export view data coded in step S11 at step S13.The order (EOP order) and the end process that then finish at step S15 output specific page.

On the other hand, the kind of calling in step S7 is not in the situation of EOP instruction, processes and enters step S16, meets other processing of the kind of calling, and then the processing such as corresponding with page or leaf sign on or print capacity inquiry instruction etc. finishes.

Then, carry out following explanation with reference to Fig. 7 with regard to the processing details among the above-mentioned steps S4.Fig. 7 is the flow chart of the details processed of the cycle detection of the background patterns among the expression above-mentioned steps S4.

After receiving the bitmap rendering order, at first judge that at step S21 the width of this bitmap (below be designated as the 1st bitmap) is whether more than 256 pixels.Not end process in the situation more than 256 pixels at the width of this bitmap.Here, background patterns generally all has, the for example such larger width of 1024 pixels and height, in addition, because when the bitmap of width that will be less or height is processed as object, the large young pathbreaker of the table of management bitmap (below be designated as the bitmap management table) becomes greatly, and the processing time of retrieving in addition the bitmap management table is also elongated, so in the situation of less width or bitmap highly, just do not carry out the Check processing in background patterns cycle.Here the bitmap management table is the table that has pre-determined fixed size that the bitmap that is included in 1 page is managed, and in this form of implementation, only to satisfying the bitmap of the condition that illustrates later, preserves the therewith relevant information of bitmap.Concrete is exactly as Figure 18 example, the X coordinate in the upper left corner of management bitmap, Y coordinate, width and height.In addition, the processing bitmap management table whenever each page of beginning just is initialized to sky.

Get back to Fig. 7, under the width of bitmap is situation more than 256 pixels, process entering step S22, judge that the height of bitmap is whether more than 256 pixels.In the situation that the bitmap height is not the above end process of 256 pixels.

In the situation that the bitmap height is more than 256 pixels, process and enter step S23, judge whether the retrieval of bitmap management table finishes.In the situation that not do not finish to process not enter step S24, with reference to the Y coordinate in the upper left corner of the bitmap of preserving in the bitmap management table, highly, Y coordinate, the highly consistent person in retrieval and the upper left corner of the 1st bitmap.Then, in inconsistent situation, return step S23, retrieve until the object of above-mentioned retrieval arrives the end of bitmap management table.On the other hand, in the situation that finds consistent person (the Y coordinate in the upper left corner of the 2nd bitmap, highly), process and enter step S25, judge whether the 1st bitmap abuts against the right side of the 2nd bitmap.Concrete is exactly with reference to the bitmap management table, if the X coordinate in the upper left corner of the width of the X coordinate in the upper left corner of the 2nd bitmap+the 2nd bitmap=the 1st bitmap, the 1st bitmap just abuts against the right side of the 2nd bitmap.In the situation that abut against the right side, process entering step S27.

On the other hand, in the situation that do not abut against the right side, process and enter step S26, judge whether the 1st bitmap abuts against the left side of the 2nd bitmap.Specifically be exactly that if the width of the X coordinate in the upper left corner of the X coordinate in the upper left corner of the 2nd bitmap=the 1st bitmap+the 1st bitmap, the 1st bitmap just abuts against the left side of the 2nd bitmap.In the situation that abut against the left side, process and enter step S27, return step S23 in the situation that do not abut against the left side processing.

In step S27, compare to the width of the 1st bitmap with by the background cycle that the processing that illustrates is later obtained.In addition, just be initialized to 0 whenever the processing background cycle of each page of beginning.In the large situation of the width of background period ratio the 1st bitmap, process entering step S29.On the other hand, be in the situation below the width of the 1st bitmap in the background cycle, process and enter step S28, in the width substitution background cycle of step S28 with the 1st bitmap, process entering step S29.

In step S29, width and background cycle of the 2nd bitmap compared.In the large situation of the width of background period ratio the 2nd bitmap, process entering step S31.On the other hand, be in the table in the situation below the width of current bitmap in the background cycle, process and enter step S30, in the width substitution background cycle of step S30 with the 2nd bitmap, process entering step S31.The background cycle like this, up to now and about the value of maximum in the width of two bitmaps of adjacency just by the again substitution background cycle.Owing to by left end or right-hand member in paper using the background bitmap background is pruned, the situation that becomes the width also less than the cycle is just arranged, use the reason of maximum value, exactly in order to eliminate this impact.

In step S31, judge whether the bitmap management table is full.In the situation that the bitmap admin table is full, owing to again not preserving the space of the information of (login) relevant bitmap, do not do any processing with regard to end process.On the other hand, in the situation that the bitmap admin table does not have is full, with Y coordinate, the width in the X coordinate in the upper left corner of the 1st bitmap, the upper left corner and highly be saved in bitmap management table and end process.

After the processing of 1 page of such end, the maximum in abutting connection with the width of bitmap in this page just is saved in background in the cycle.In addition, in the situation that the adjacency bitmap does not exist in this page, just be saved in background in the cycle with 0.

Then, with reference to Fig. 8, carry out following explanation with regard to the processing details among the step S10 of Fig. 6.Fig. 8 is the flow chart of the processing details among the expression step S10.At first judge at step S41 whether the background cycle of obtaining among the above-mentioned steps S4 is 0.In the situation that the background cycle is not 0, namely detect in the situation in cycle of background patterns, process and enter step S42, try to achieve the least common multiple of the number of picture elements of background cycle and 1 byte.For example, be 1024 pixels in the background cycle, 1 pixel is by (number of picture elements of 1 byte is 8) in 1 situation about consisting of, this least common multiple is exactly 1024.In addition, be 511 pixels in the background cycle, 1 pixel is by (number of picture elements of 1 byte is 2) in 4 situations about consisting of, this least common multiple is exactly 1022.Because the unit of coding is 1 byte, carry out for the periodic transformation with pixel unit becomes the cycle of byte unit so process.

Then at step S43, the least common multiple that will obtain in step S42 is transformed into byte unit.Concrete is exactly that number of picture elements with 1 byte is divided by least common multiple.Then try to achieve the least common multiple in background cycle and the shake cycle of the byte unit of in step S43, obtaining at step S44.For example, in the situation that the background cycle is that 128 byte shake cycles were 2 bytes, be exactly 128 bytes.In addition, be 511 bytes in the background cycle, in the situation of shake cycles 3 byte, be exactly 1533.Owing to not being in the situation of integral multiple in shake cycle in the background cycle, by in the point in interval background cycle only, applying different dithering process, just become different pixel values, carry out so process the point that carries out in order to reference identical dithering process.

Then at step S45, judge whether the least common multiple of obtaining is discontented with 90% of row length in step S44.In 90% long situation of discontented row, processing enters step S47, during 2 values that will meet above-mentioned steps S8 are processed employed dither matrix on copy and the position that copies on a nearly left side, and export end process at the least common multiple (left duplicating position far away) that step S44 obtains as the order (compression parameters specified command) of specified compression parameter.

On the other hand, in the situation that among the step S41 background cycle be 0, and the least common multiple of obtaining in the step 45, step 44 is that processing enters step S46, and the background cycle is set as default value in the long situation 90% or more of row.Because these situations are can not detect background cycle or background cycle excessive compression ratio the raising to give the situation of large contribution, are set as default value therefore replace.It is different that default value is determined in advance into the position of copying from a nearly left side.For example, be 16 pixels in the shake cycle, the number of picture elements of 1 byte is in 8 the situation, the position that copy on a nearly left side is exactly the left side of 2 bytes.Default value with the background cycle is defined as 1 byte in the case.As previously mentioned, in general and only the correlation between the point in space jitter cycle is high, but is as common text or table in print data, in the situation about showing with black and white 2 values, has just become the result identical with the situation of not carrying out dithering process.In addition because and and the point of it doesn't matter shake cycle ground carries out adjacency between correlation high, therefore under correlation circumstance, interval 1 byte location is also high than interval 2 byte location correlations, can make contributions to the raising of compression ratio.

Then at step S47, will with employed dither matrix during 2 values of above-mentioned steps S8 are processed be consistent on copy and the position that copies on a nearly left side, and export end process in the default background cycle (left duplicating position far away) that step S46 sets as the order (compression parameters specified command) of specified compression parameter.

Then with reference to Fig. 9 A and Fig. 9 B, just the details of the coding processing among the step S11 of Fig. 6 describes.Fig. 9 A and Fig. 9 B are the flow charts of the processing details among the expression step S11.

At first at step S51 line number Y is initialized as 0.Then will be initialized as 0 from the byte offset X of line start at step S52.

Then at step S53, whether the position is in effective image-region in judgements.Whether the line number of duplicating position in the expression that concrete judgement is exported in the step S47 of Fig. 8 (below represent with Z) is also greater than line number Y.Because the line number Z of the upper duplicating position of expression is the following situation of line number Y, go up exactly the position (is present in the zone in the bitmap of coded object) in effective image-region situation, therefore at step S54, try to achieve from the byte sequence continuous phase consistent length of the byte sequence of current location (X, Y) beginning with (X, Y-Z) beginning from upper position.In addition at this moment, in the situation that until all continuous phase is consistent row end, is made as the end of being expert at and ends.In addition, in the consistent length of continuous phase, surpass in the situation of peaked 4095 bytes of encoding as counting, be made as in 4095 bytes and end.

Then at step S55, whether the length of obtaining among the determining step S54 is 0.The length of obtaining in step S54 is not in 0 the situation, processes and enters step S56, and whether the length of obtaining among the determining step S54 (counting) is larger than 63.In the large situation of the Length Ratio 63 of in step S54, obtaining, processing enters step S57, COUNT HIGH order is outputed to RAM1702 or external memory 1704, then at step S58, to output to RAM1702 or external memory 1704 with 64 merchants' (high position of counting) that calculate divided by the length of obtaining at step S54, process entering step S59.On the other hand, in step S56, under the length of obtaining at step S54 is situation below 63, process entering step S59.

Then, at step S59 COUNT UP order is outputed to RAM1702 or external memory 1704, then at step S60, will output to RAM1702 or external memory 1704 with 64 remainders (low level of counting) of calculating divided by the length of obtaining at step S54.

On the other hand, the line number Z of duplicating position and when being in 0 the situation in the length that step S55 obtains, processes and enters step S62 than in the large situation of line number Y in the expression in step S53, judges that nearly left position is whether in effective image-region.Specifically be exactly whether the byte number of judging the nearly left duplicating position of expression of exporting among the above-mentioned steps S47 (following represent with W) is larger than the byte offset X from line start.Because the byte number W of the nearly left duplicating position of expression is from the situation below the byte offset X of line start, be exactly the situation of nearly left position in effective image-region, therefore process and enter step S63, try to achieve byte sequence and the consistent length (counting) of byte sequence continuous phase that begins from nearly left position (X-W, Y) from current location (X, Y) beginning.In addition at this moment, in the situation that until all continuous phase is consistent row end, is made as the end of being expert at and ends.In addition, in the consistent length of continuous phase, surpass in the situation of peaked 4095 bytes of encoding as counting, be made as in 4095 bytes and end.

Then at step S64, whether the length of obtaining among the determining step S63 is 0.The length of obtaining in step S63 is not in 0 the situation, processes and enters step S65, and whether the length of obtaining among the determining step S63 (counting) is larger than 63.In the large situation of the Length Ratio 63 of in step S63, obtaining, processing enters step S66, COUNT HIGH order is outputed to RAM1702 or external memory 1704, then at step S67, high position with counting, namely output to RAM1702 or external memory 1704 with 64 merchants that calculate divided by the length of obtaining at step S63, process entering step S68.On the other hand, in step S65, under the length of obtaining at step S63 is situation below 63, process entering step S68.

Then, at step S68 COUNT NEAR LEFT order is outputed to RAM1702 or external memory 1704, then at step S60, the low level with counting namely outputs to RAM1702 or external memory 1704 with 64 remainders of calculating divided by the length of obtaining at step S63.

On the other hand, the byte number W of the nearly left duplicating position of expression is than in the large situation of the byte offset X of line start in step S62, and under being 0 situation in the length that step S64 obtains, processing and enter step S69, judge that left position far away is whether in effective image-region.Specifically be exactly whether the byte number of judging the expression left duplicating position far away of exporting among the step S47 of Fig. 8 (following represent with R) is larger than the byte offset X from line start.Because the byte number R of expression left duplicating position far away is from the situation below the byte offset X of line start, be exactly the situation of left position far away in effective image-region, therefore process and enter step S70, try to achieve byte sequence and the consistent length (counting) of byte sequence continuous phase that begins from left position far away (X-R, Y) from current location (X, Y) beginning.In addition at this moment, in the situation that until all continuous phase is consistent row end, is made as the end of being expert at and ends.In addition, in the consistent length of continuous phase, surpass in the situation of peaked 4095 bytes of encoding as counting, be made as in 4095 bytes and end.Then at step S71, whether the length of obtaining among the determining step S70 is 0.The length of obtaining in step S70 is not in 0 the situation, processes and enters step S72, and whether the length of obtaining among the determining step S70 is larger than 63.In the large situation of the Length Ratio 63 of in step S70, obtaining, processing enters step S73, COUNT HIGH order is outputed to RAM1702 or external memory 1704, then at step S74, high position with counting, namely output to RAM1702 or external memory 1704 with 64 merchants that calculate divided by the length of obtaining at step S70, process entering step S75.On the other hand, in step S72, under the length of obtaining at step S70 is situation below 63, process entering step S75.

In step S75, COUNT FAR LEFT order is outputed to RAM1702 or external memory 1704, then at step S60, the low level with counting namely outputs to RAM1702 or external memory 1704 with 64 remainders of calculating divided by the length of obtaining at step S70.

On the other hand, the byte number R of expression left duplicating position far away is than in the large situation of the byte offset X of line start in step S69, and under being 0 situation in the length that step S71 obtains, processing enters step S76, the RAW order is outputed to RAM1702 or external memory 1704, and then the data (1 byte part) with current location (X, Y) output to RAM1702 or external memory 1704 as initial data.

After above-mentioned processing finishes, process and enter step S78, the byte of having processed is added to X.Then at step S79, judge that whether X arrives the row end, judges namely whether X equals the byte number of 1 row.X than the little situation of the byte number of 1 row under, process and to return step S53, proceed to process.On the other hand, equal at X in the situation of byte number of 1 row, process entering step S80, be added to line number Y with 1, judge at step S81 whether the processing of image finishes, judge namely whether Y is equal with the line number of image.Y than the little situation of the line number of image under, process and to return S52, proceed to process.On the other hand, equal at Y in the situation of line number of image, processing enters step S82, the EOB order is outputed to RAM1702 or external memory 1704, then at step S83, only will output to buffer, end process for the position " 0 " of the required number in aligned bytes border (for example process by above-mentioned coding and become 8 multiple so that output to the length of the position order of RAM1702 or external memory 1704).

Then, with reference to Figure 12, be described in detail with regard to the formation of decoding circuit shown in Figure 2 13.Figure 12 is the block diagram of the detailed formation of expression decoding circuit 13.

In the figure, input buffer 21 is preserved the coded data of reading from FIFO memory 12.Input buffer 21 can keep the data of 4 bytes at least, produces idlely in buffer, and has in the FIFO memory 12 in the situation of data, from FIFO memory 12 sense datas and preserve.In addition, under the figure place of handling in the counter 23 that is held in place becomes situation more than 8, the unwanted data of handling of input buffer 21 deletions.

Selector 22 is 8 input selectors of 11 groups for example, by according to the digit counter 23 represented figure places of handling the coded data that is kept in the input buffer 21 being selected, carry out the alignment that command decode circuit 24 is processed the starting position of needed, order.Because keep data with respect to input buffer 21 with byte unit, order is the variable length data of a unit, thus for the starting position this point that 8 places are arranged be necessary.

Digit counter 23, the figure place of handling in the coded data that preservation input buffer 21 is preserved.In addition, digit counter 23 comes the value of preserving in the updated space counter by adding from the figure place of order decoding circuit 24 order of exporting.In addition, digit counter 23 has been deleted in the situation of the data of handling at input buffer, deducts deleted figure place.In addition, when 24 pairs of EOB orders of command decode circuit were decoded, digit counter 23 received the EOB signal from order decoding circuit 24, carries out the processing of byte boundary alignment.Specifically be exactly, if 3 of the low levels of digit counter all are 0 just not do whatever, 3 of removing low levels when adding 8 just if not so.

Command decode circuit 24 is made of for example read-only memory or hard wired logic (wired logic).The coded data of having carried out aligned in position by selector 22 and be kept in the input buffer 21 is decoded, according to decoded order with the various signals that illustrate previously or illustrate later output to counter 26, on copy that output circuit 27, a left side far away copy output circuit 28, output circuit 29, initial data output circuit 30 and digit counter 23 are copied in a nearly left side.

The long register 25 retentive control circuit 15 of row are byte number that export, 1 row in advance.

Counter 26 keeps the processing byte number of COPY UP, COPY NEAR LEFT or COPY FARLEFT order, whenever carries out the data output of 1 byte and just carries out additive operation.Counter 26 can be set 6 of high-order 6 and low levels independently, and when command decode circuit 24 had been decoded COUNT HIGH order, the additive value of the processing byte number that command decode circuit 24 is exported was saved in the high position of counter 26.In addition, when command decode circuit 24 had been decoded COPY UP, COPY NEAR LEFT or COPY FAR LEFT order, the processing byte number that command decode circuit 24 is exported was saved in the low level of counter 26.

On copy output circuit 27, according to the processing byte number that counter 26 keeps, read and export the data of the upper duplicating position that line buffer 31 exports.Output circuit 28 is copied on a left side far away, according to the processing byte number that counter 26 keeps, reads and export the data of the left duplicating position far away that line buffer 31 exports.Output circuit 29 is copied on a nearly left side, according to the processing byte number that counter 26 keeps, reads and export the data of the nearly left duplicating position that variable stage shift register 38 exports.The initial data of 1 byte that initial data output circuit 30, output command decoding circuit 24 are exported.

Column counter 41 keeps the current column address of line buffer 31, and every size that writes the data that write with regard to addition to line buffer 31 is tried to achieve count value thus.Then reach in the situation of byte number of 1 row that keeps of the long register 25 of row in this count value, reset to 0.

Line buffer 31 keeps the decoded data of multirow, according to the address that subtraction circuit 40 is exported, carries out input or the output of decoded data.

Linage-counter 32 keeps the current row address of line buffers 31, just counts increase whenever above-mentioned count value resets to 0, reaches in the result of counting in the situation of the line number that line number register 36 keeps, and resets to 0.When line number was output to line number register 36, linage-counter 32 reset to 0 in addition.

Mlultiplying circuit 33, the byte number by calculating 1 row that current row address that linage-counter 32 keeps and the long register 25 of row keep long-pending exported the start address of the current row of line buffer 31.Add circuit 34, the start address by calculating the current row that mlultiplying circuit 33 exports and the current column address that column counter 41 keeps and, the current address of output line buffer 31.That background period register 39, retentive control circuit 15 are exported in advance, background cycle byte number.

Subtraction circuit 40, when copied by a left side far away output circuit receive the indication left side far away copy the signal that reads the time, the background cycle byte number that the current address subtracting background period register 39 of exporting from add circuit 34 the keeps line output of going forward side by side, simultaneously when copied by a left side far away output circuit do not receive the indication left side far away copy the signal that reads the time, intactly export the current address that add circuit 34 is exported.

Output buffer 35, whenever copy output circuit 28 from copying output circuit 27, a left side far away, output circuit 29 or initial data output circuit 30 output decoded datas are copied in a nearly left side, just preserve the decoded data of exporting.In addition, when requiring the output of view data from shift register 16, output buffer 35 is just exported the decoded data of preserving.

That line number register 36, retentive control circuit 15 are exported in advance, line number (on copy the vertical shift value).

Level number register 37, that retentive control circuit 15 is exported in advance, as to represent nearly left position byte offset value.Variable stage shift register 38, consisted of by shift register and selector, consist of the shift register of the progression that the byte offset value of the nearly left position of expression that keeps with level number register 37 equates, output has postponed the decoded data of exporting to represent than the usefulness with 37 maintenances of grade number register the data of the number of times of the value only little 1 that the byte offset value of nearly left position is specified.

After command decode circuit 24 decoding COPY UP order, just decoding and its consecutive counting and be saved in the low level of counter 26 will be indicated simultaneously the signal that reads that copies to output to and be copied output circuit 27.In the high position of counter 26, in the situation that COUNT HIGH order is not formerly sent, preserve 0, in its situation about formerly having sent, preserve the high position counting of expression COUNT HIGH order.On copy output circuit 27, read out in the data on the address (in other words being exactly current position) that is kept at add circuit 34, subtraction circuit 40 outputs in the line buffer 31, and output to line buffer 31 (because be the covering identical data, also can not carry out this processing), output to simultaneously output buffer 35.On the other hand, the decoded data of reading is input to variable stage shift register 38 (from the starting following).Then the data that remained in the variable stage shift register 38 are shifted one by one, from the final level of variable stage shift register 38, export 1 byte of the nearly left duplicating position corresponding with the next position of current location.Then, column counter 41 is counted increase, and counter 26 is counted minimizing.Carry out the output of decoded data until counter 26 reaches 0 like this.

After command decode circuit 24 decoding COPY FAR LEFT order, with regard to the counting of decode successive and be saved in the low level of counter 26, the signal that will indicate a left side far away to copy simultaneously outputs to a left side far away and copies output circuit 28.In the high position of counter 26, in the situation that COUNT HIGH order is not formerly sent, preserve 0, in its situation about formerly having sent, preserve the high position counting of expression COUNT HIGH order.Here, in order to export the signal that reads of data of indication left position far away, the value that output circuit reads in the background periodic quantity that output (current address) the subtracting background period register 39 that is kept in the line buffer 31 from add circuit 34 keeps is copied on a left side far away, it is the decoded data on the address of left position far away, and be written to the current location of line buffer 31, also output to output buffer 35 simultaneously.In addition, the decoded data of having read is input to variable stage shift register 38.Then the data that remain in the variable stage shift register 38 are shifted one by one, from the final level of variable stage shift register 38, export 1 byte of the nearly left duplicating position corresponding with the next position of current location.Then, column counter 41 is counted increase, and counter 26 is counted minimizing.Carry out the output of decoded data until counter 26 reaches 0 like this.

After command decode circuit 24 decoding COPY NEAR LEFT order, with regard to the counting of decode successive and be saved in the low level of counter 26, the signal that will indicate a nearly left side to copy simultaneously outputs to a nearly left side and copies output circuit 29.In the high position of counter 26, in the situation that COUNT HIGH order is not formerly sent, preserve 0, in its situation about formerly having sent, preserve the high position counting of expression COUNT HIGH order.Output circuit is copied on a nearly left side, and the decoded data of 1 byte of the nearly left duplicating position that variable stage shift register 38 is exported outputs to output buffer 35, is written to simultaneously the current location of line buffer 31.In addition, the decoded data with 1 byte of having read is input to variable stage shift register 38.The data that remain in the variable stage shift register 38 are shifted one by one, from the final level of variable stage shift register 38, export 1 byte of the nearly left duplicating position corresponding with the next position of current location.Then, column counter 41 is counted increase, and counter 26 is counted minimizing.Carry out the output of decoded data until counter 26 reaches 0 like this.

After the 24 decoding RAW orders of command decode circuit, just the initial data (decoded data) with 1 follow-up byte outputs to initial data output circuit 30.Initial data output circuit 30 outputs to output buffer 35 with this decoded data, is written to simultaneously the current location of line buffer 31.In addition, this decoded data is input to variable stage shift register 38.The data that remain in addition in the variable stage shift register 38 are shifted one by one, from the final level of variable stage shift register 38, export 1 byte of the nearly left duplicating position corresponding with the next position of current location.

After command decode circuit 24 decoding COUNT HIGH order, with regard to the counting of decode successive and be saved in the high position of counter 26.

Then, with reference to Figure 13 and Figure 14, describe with regard to the action of the data input and output of line buffer 31.Figure 13 is before the explanation coding or the formation of decoded view data, illustrates that as an example length of 1 row is the situation of 10 bytes.As shown in the figure, from the left side of initial row by 00,01 ... 09 consecutive bytes (view data) is arranged, from next line the left side by 10,11 ... 19 consecutive bytes is arranged.Following row is like this too.

Figure 14 explanation view data shown in Figure 13 on each address of line buffer 31 is the figure how to preserve.Length as an example explanation 1 row is 10 bytes, and the line number of duplicating position is the situation of 3 row in the expression.

After at first linage-counter 32 and column counter 41 all being made as 0, row address 0 and column address 0 are carried out initial data input and output.In addition, until before the image of 3 initial row was written into, the data of exporting from line buffer 31 all were uncertain.

When from line buffer 31, row address 0 and column address 0 reading out data, then after writing byte shown in Figure 11 00 to identical address, column counter 41 is counted increase, remains 1.Then from row address 0 and column address 1 reading out data, then after the byte 01 that writes to identical address, column counter 41 is counted increase, remains 2.After writing like this 10 bytes, because column counter 41 will remain 10, the byte number of 1 row that keeps with the long register 25 of row equates, column counter 41 just remains 0, and linage-counter 32 is counted increase and remained 1.Then from row address 1 and column address 0 reading out data, then after the byte 10 that writes to identical address, column counter 41 is counted increase, remains 1.Because after the data that write like this 20 bytes, column counter 41 remains 0, linage-counter 32 is counted to increase and is remained 3 simultaneously, just equates with the line number that line number register 36 keeps, and linage-counter 32 just remains 0.

Because linage-counter 32 and column counter 41 all are 0 here, just read the byte 00 that is written at first, then byte 30 is written into.Like this, after the data that read successively on 3 row, the data of current row are capped, and line buffer 31 moves as so-called toroidal memory.

Then with reference to Figure 15, the action of line buffer 31 and variable stage shift register 38 is described regularly.Figure 15 illustrates that view data shown in Figure 13 is regularly processed at which type of, illustrates that as an example length of 1 row is 10 bytes, and the line number of duplicating position is 3 row in the expression, and the byte offset value that represents nearly left duplicating position is the situation of 2 bytes.

Among the figure, A1 is the moment that the processing of 3 row of expression beginning just in time finishes.As top explanation, owing at this moment linage-counter 32 and column counter 41 all reset to 0.Read byte shown in Figure 11 00 from line buffer 31.At A1 constantly, in the situation that upper duplicate circuit 27 moves, after constantly aligning the data that read from line buffer 31 at A2 and determining, byte 00 just is imported into duplicate circuit 27.Then, copy output circuit 27 on until A3 exports decoded data constantly.In the moment, the decoded data of exporting is saved to line buffer 31 as byte 30 at A3.At this moment clock pulse is imported into variable stage shift register 38, and the data that keep in the variable stage shift register 38 are shifted one by one, keeps simultaneously the decoded data exported in initial level shift register, and namely data byte 30.In addition, because variable stage shift register 38 consists of the shift register that the level number registers are 37 that keep, be worth little 1 progression than the byte offset of the nearly left position of expression, the initial level of the final level output variable ratio level shift register 38 of variable stage shift register 38 postpones the data of 1 byte, and namely byte 29.Whenever the output decoded data, just be saved in output buffer 35 like this, the data that the variable stage shift register 38 that is shifted one by one simultaneously keeps.

In the situation that copying output circuit 29, the constantly nearly left side of C1 moves, the data byte of the nearly left position of the final level positive output of variable stage shift register 38, and namely data byte 30 is imported into a nearly left side and copies output circuit.Then, copy output circuit 27 on until A3 exports decoded data constantly.C3 constantly in the decoded data of exporting be saved to output buffer 35 as data byte 32, the below similarly moves with above-mentioned example.

Output circuit 28 or initial data output circuit 30 are copied in the situation that data output is moved similarly in a left side far away.

Then with reference to Figure 16, illustrate that control circuit 15 performed printings control step.Figure 16 is the flow chart of the performed printings control treatment step of expression control circuit 15, moves concurrently with other the processing (not shown) such as the reception of data.

After printing the starting of control step, at first judge whether printable page or leaf at step S101, specifically be exactly to judge whether to receive the order and have unprinted page or leaf of skipping.In the situation that does not have printable page or leaf, carry out standby until receive and skip order and produce printable page or leaf at step S101.

In the situation that has printable page or leaf, process entering step S102, to the beginning of Printer Engine 14 indication printings.Then, will be set to by the byte number of 1 specified row of the print conditions specified command of page or leaf the long register 25 of row at step S103.The then byte offset value of the line number of duplicating position, the nearly left duplicating position of expression and represent that the byte offset value of left position far away is individually set to line number register 36, level number register 37 and background period register 39 in will be by the compression parameters specified command of the page or leaf specified expression of step S104.Then, wait for until 1 page printing finishes at step S105.After printing beginning, decoded based on the value that is set to above-mentioned register by decoding circuit 13.After 1 page printing finishes, process and return step S101, wait for printable page or leaf.

Like this, owing to using the compression parameters that has used in coding time to decode, just always can access correct decoded data.

Explanation according to top utilizes this form of implementation, because cycle of detection background pattern, and encodes with reference to meeting the position in detected cycle, just compressed background pattern expeditiously.In addition, owing to only encoding with reference to the position of the minority that meets the position in detected cycle and limit, just can compress at high speed.In addition, because when the cycle of detection background pattern, do not use the data self of background patterns, only utilize the size of background patterns and position to detect, just sense cycle at high speed.In addition, since the cycle of proofreading and correct the background patterns that detects according to the number of picture elements of 1 byte and shake cycle also can compress expeditiously even carried out the image of dithering process.In addition, because in the situation in the cycle that does not detect background patterns, encode with default reference position, and do not carry out such processing and just compare and to compress expeditiously.

[the 2nd form of implementation]

Although in above-mentioned form of implementation be in addition, when not carrying out in the off-limits situation of the left end of image near the left end of nearly left duplicating position at image with reference to consisting of like this, but also can replace the method that this is other, for example spread to the right side of previous row, perhaps left duplicating position in the off-limits situation of the left end of image with reference to fixed value 0.

In addition, although in above-mentioned form of implementation, take 1 byte of view data as unit carries out Code And Decode, also can replace the unit that this is other, such as take 1 pixel or 2 bytes etc. as unit.

In addition, although in above-mentioned form of implementation, processing be black and white image, also can replace this and process coloured image.

In addition, although in above-mentioned form of implementation, 1 pixel consists of by 1, also can replace the value that this is other, for example 2,4 or 8.

In addition, although in above-mentioned form of implementation, utilize hardware to decode, also can replace this and decode with software.

In addition, although in above-mentioned form of implementation, carry out dithering process, also can replace this other matrix disposal, perhaps not carry out dithering process.

In addition, although in above-mentioned form of implementation, utilize the periodicity of the transverse direction of background patterns to compress processing, also can replace this utilize longitudinal direction or in length and breadth two sides' periodicity compress.

In addition, although in above-mentioned form of implementation, in the situation that detect different cycles maximum is made as the cycle, also can replace this, the highest value of different cycles medium frequency is made as the cycle.

In addition, although in above-mentioned form of implementation, the processing unit of coding is 1 page, also goes for a plurality of page or leaf being made as 1, and the image of Nin 1 (N=2,4 etc.) is that unit carries out same coding.In the case every N page or leaf is encoded.

[the 3rd form of implementation]

Because the basic comprising of the image processing apparatus in this form of implementation is identical with the 1st form of implementation, as shown in Figure 17, therefore omit this explanation.

Figure 19 is the block diagram of the basic comprising of the printer 1711 in expression the present invention the 3rd form of implementation.Among the figure, the 511st, parallel port receives the printer command of exporting from port driver 5.The 512nd, FIFO (first-in first-out) memory, storage are included in the coded data (seeing the back explanation for details) in the printer command that parallel port 511 receives, and with the data of storing according to the Sequential output of first-in first-out to decoding circuit 513.Decoding circuit 513 is decoded to the code sequence data of storing in the FIFO memory 512, and the view data of having restored is outputed to Printer Engine 514.Printer Engine 514 is laser printer engines, and according to the indication of control circuit 515, the view data of exporting according to decoding circuit 513 prints.View data is of all kindsly exported with the face order blue or green, pinkish red, yellow and black.The 515th, control circuit for example is made of one-chip CPU, carries out the control of parallel port 511, FIFO memory 512, decoding circuit 513 and Printer Engine 514.

Below, when just printing, the action of each parts shown in Fig. 1,19 describes.

Since about being used for sent to the processing of printer 1711 by printing control command and the formed a series of printer command of coded data, identical with the 1st form of implementation, omit this explanation.

Control circuit 515 receives printer command via parallel port 511.In the printer command that receives, print control command, compression parameters specified command, be maintained at the inside of control circuit 515 in order to print control.In addition, in the printer command that receives, coded data is saved to FIFO memory 512.After this, when the reception by the EOP order etc., when the reception that control circuit 515 detects the printer command that consists of 1 page has been finished, print beginning to Printer Engine 514 indications.After beginning was printed in indication, paper using supplied with in Printer Engine 514 never illustrated paper feeding cassette, when paper using arrives preposition, requires the output of decoded data to decoding circuit 513.Decoding circuit 513 is read coded data from FIFO memory 512 in advance, the view data that to be restored by decoding remains to inner buffer, when requiring the output of view data from Printer Engine 514, output remains on the view data in the inner buffer.When occurring in the buffer that keeps view data when idle, decoding circuit 513 is read follow-up coded data from FIFO512, decodes and remains to inner buffer.Coded data is decoded successively and is output as view data like this, and after the output of 1 page view data all finished, printing was finished.

Then, with reference to Figure 20 and table shown in Figure 21, the coding that generates with regard to the printer driver 4 in this form of implementation describes.

Figure 20 is the figure of the table that describes of each coding of comprising in expression the coded data that the printer driver 4 in one routine the present invention's the 3rd form of implementation is generated.In addition, each coding that describes in this form of implementation for example represents with the position order from 2 to 18 with position unit's variable-length.Identical with Huffman (Huffman) coding, each coding constitutes just can recognition coding by searching in order from beginning.

As shown in figure 20, the position order of coding is exactly COPY UP order with the situation of " 1 " beginning.This orders indication, from the position of predetermined predetermined row top, copies＜byte number〉byte sequence of represented length.

In addition, the position order of coding is exactly the CACHE order with the situation of " 01 " beginning.This order specifies in the cache memory (although be arranged in the CPU1701, be not limited to this in this form of implementation, also can be arranged on the outside of CPU1701)＜3 bit data〉data of 1 byte of represented position.

In addition, the position order of coding is exactly the RAW order with the situation of " 001 " beginning.This order is specified and to be held＜8 bit data〉the data of 1 byte of value.

In addition, the position order of coding is exactly COPY LEFT order with the situation of " 0001 " beginning.This orders indication, from the position in predetermined predetermined bite left side, copies＜byte number〉byte sequence of represented length.

In addition, the position order of coding is exactly the EOB order with the situation of " 0000 " beginning.The end of indication coded data.

Figure 21 is to an example continues after above-mentioned COPY UP order, the COPY LEFT order, the coding of expression length (＜byte number 〉) describes table.As shown in figure 21, the position order of coding is indicated the length of 1 byte with the situation of " 1 " beginning.

In addition, the position order of coding is with the situation of " 01 " beginning, and 1 data (value 0 or 1) continue exactly, is in 0 the situation, to be exactly " 010 " as command code 1 that continues data, just means 2 bytes as implication.On the other hand, be in 1 the situation, to be exactly " 011 " as command code 1 that continues data, just mean 3 bytes as implication.Namely, the position order of coding just means the length of 2 bytes or 3 bytes with the situation of " 01 " beginning.

In addition, because the position order of coding is with the situation of " 001 " beginning, the data that are 2 continue, just mean the length from 4 bytes to 7 bytes, because the position order of coding is with the situation of " 0001 " beginning, the data that are 3 continue, just mean the length from 8 bytes to 15 bytes, because the position order of coding is with the situation of " 00001 " beginning, the data that are 4 continue, just mean the length from 16 bytes to 31 bytes, because the position order of coding is that 5 data continue with the situation of " 000001 " beginning, just means the length from 32 bytes to 63 bytes, because the position order of coding is with the situation of " 0000001 " beginning, the data that are 6 continue, and just mean the length from 64 bytes to 127 bytes, because the position order of coding is with the situation of " 0000000 " beginning, the data that are 7 continue, and just mean the length from 128 bytes to 255 bytes.

In addition, obtain in advance the frequency of occurrences that these are coded in each order in most view data, identical with Huffman (Huffman) coding, the high order of frequency appears by short assignment of code is given, the low order of frequency is appearred in long assignment of code, just can be improved compression ratio.

Then,, in the action of explanation RAW order and CACHE order, describe with regard to the data that are kept in the cache memory with reference to Figure 22.Figure 22 is the explanation view data and utilizes RAW order and CACHE to order the figure that this view data is saved in the method for cache memory.

As shown in the drawing, the

view data

00,01,02,03,04,05,06,07 of 10 bytes, 08 and 06 is arranged from a left side.Cache memory is the capacity of 8 bytes, is initially empty.

At first, it is RA W00 order that initial view data 00 can be encoded into coding 001 00000000, and the result of this order of having encoded or decoded is kept at data 00 original position into the cache memory of sky exactly.

It is RA W01 order that next view data 01 can be encoded into coding 001 00000001, the result of coding or this order of having decoded, exactly data 01 are kept at the original position into the cache memory of sky, the data 00 that have been kept at original position move to next position.Like this until after the data of 8 bytes of view data 07 were encoded or decode, cache memory just was filled.It is RA W08 order that next view data 08 can be encoded into coding 001 00010000, the result of coding or this order of having decoded, exactly data 08 are kept at the original position into the cache memory of sky, the data of 01 7 bytes from data 07 to data of having preserved move to next position successively, and the last data 00 that are kept at cache memory are dropped.

Because identical data are kept at the position 2 of cache memory, it is the CACH2 order that next view data 06 can be encoded into coding 01 010, the result of coding or this order of having decoded, the data 06 that will be kept at exactly position 2 move to the original position of cache memory, be kept at position 2 data 08 and data 07 in the past and move to successively next position, be kept at position 2 later data and do not change.

In addition, in the situation that coding or decoded COPY UP order or COPY LEFT order, the data that are kept at cache memory do not change.

Then, describe with regard to the action of COPY UP order and COPY LEFT order with reference to Figure 23.Figure 23 is the explanation view data and utilizes COPY UP order and COPY LEFT to order the figure of the method that this view data is encoded.As shown in the drawing, in the pixel sequences of composing images data, the

view data

01,23,45,67,89 of 10 bytes, AB, 89 and AB arrange from the left side the most descending,

view data

01,23,45,67,89, AB, 00,00,00 and 00 the 4th row above this row are arranged from the left side.The view data of current wish coding or decoding is the most descending, is redefined in addition COPY UP command reference top the 4th row, COPY LEFT command reference 2 bytes left side.

In addition, to use dither matrix to apply in the situation of image of dithering process in above-mentioned view data, because contiguous data is carried out different processing, only just existing, the data of the position in the cycle of space jitter matrix compare the high such tendency of correlation of the data of adjacency.In the situation of the image that has applied dithering process, determine so that position and the correlation between the concern position of COPY UP order or the reference of COPY LEFT order institute are the highest thus.That is the cycle of employed dither matrix is determined during, according to the view data wanting to encode in generation.

Here because initial 6 bytes 01 in the most descending view data, 23,45,67,89 and initial 6 bytes of AB and top the 4th row be aligned identical, just can be encoded into coding 100110 is that COPY UP6 orders.Then because Next 4 bytes 89, AB, 89 are identical arrangements with AB with from 4 bytes of the 2 bytes left side beginning of going together mutually, just can be encoded into coding 0,001 001 00 is that COPY LEFT4 orders.

The processing details of the printer driver 4 in this form of implementation then, is described with reference to flow chart shown in Figure 24.Figure 24 is the main flow chart of processing that printer driver 4 carries out.

After printer driver 4 received instructions from operating system 2, the kind of decision instruction is drawing for order (step S505) whether.Kind at record is in the situation of drawing for order, processes and enters step S506, the processing (step S506) of drawing.Specifically be exactly to be transformed into the image of all kinds 8 that has used 3 kinds of colors of red, green, blue via character, figure or the bitmap etc. that operating system 2 sends from application program 3, and to be recorded to RAM1702.

On the other hand, not in the situation of drawing for order in the kind of above-mentioned instruction, process and enter step S507, and then the whether EOP instruction (step S507) of the kind of decision instruction.Kind in instruction is in the situation of EOP instruction, processes and enters step S508, carries out colour switching and processes (step S508).Specifically be exactly, use predetermined dither matrix, be recorded among the step S506 RAM1702 use the image of all kinds 8 of 3 kinds of colors of red, green, blue, be transformed into by blue or green, pinkish red, yellow and black 4 kinds of colors and form, for example image of all kinds 4.

Then, output print condition specified command specifically is exactly the order (step S509) that the byte number of specifying paper size, paper feeding cassette, resolution, grey exponent number, 1 row, 1 page line number etc. are printed needed condition.

Then, then to blue or green, pinkish red, the yellow and black repeatedly processing from step S5010 to step S5014 of all kinds, the view data order of exporting every kind of color.As processing concrete in each step, at first output meets the compression parameters of employed dither matrix among the step S508, will use when namely encoding, COPY UP order and COPY LEFT order will reference position (step S5010).Follow according to the coding step that illustrates later coded image data (step S5011).At this moment, use position compression parameters appointment that step S5010 exports, COPYUP order and COPY LEFT command reference to encode.Then, export the head (step S5012) that size and the line number of the coded view data of step S5011 are carried out appointment.Then export the coded view data of step S5011 (step S5013).Whether the processing of then judging each blue or green, pinkish red, yellow and black face all finishes (step S5014).Processing at each blue or green, pinkish red, yellow and black face does not have to process and return step S5010 in whole situations about finishing, and carries out the processing of next face.On the other hand, after the processing of each blue or green, pinkish red, yellow and black face all finishes, process entering step S5015, the order (step S5015) of the end of output specific page.

On the other hand, judgement in step S507 is not in the situation of EOP instruction in the kind of instruction, processes entering step S5016, meet other processing of the kind of calling, such as the processing (step S5016) corresponding with page or leaf sign on or print capacity inquiry instruction etc.

Then, process with regard to the coding among the above-mentioned steps S5011, Figure 25 A and Figure 25 B of the flow chart that the details of same treatment is described with reference to expression describe.

The set positions of the pixel of at first, current location namely being encoded is to the left end top (step S5020) of image.Whether the reference position of then judging COPY UP effectively (step S5021).Specifically being exactly, is the situation of top the 4th row to the reference position of COPY UP, in the situation that current location is the reference position of just judging COPYUP above beginning from initial row more than the 4th row for effectively.In the effective situation of the reference position of COPY UP, processing enters step S5022, the byte sequence of the pixel data that begins to the byte sequence (pixel data sequence) that begins from current location with from the reference position of COPY UP compares, and the value of trying to achieve is the length (step S5022) of consistent byte sequence.In addition at this moment, reach in the situation of 255 bytes, with regard to abort process in the situation and the length that arrive the row end.

Then whether the length obtained of determining step S5022 is 0 (step S5023).Owing in the situation that be not 0, just be judged as and can be encoded into COPY UP order, process entering step S5029, output COPY UP order namely encodes 1 and continue at the coding of thereafter expression byte number (length of obtaining), processes entering step S5032.

On the other hand, under the reference position of judging COPY UP at step S5021 is invalid situation, perhaps under the length that step S5023 determining step S5022 obtains is 0 situation, processes and enter step S5024, whether the reference position of judging COPY LEFT effective (step S5024).Specifically being exactly, is the situation in 2 bytes left side to the reference position of COPY LEFT, in the situation that current location is the reference position that begins just to judge more than 2 bytes of interval COPY LEFT from left end for effectively.In the effective situation of the reference position of COPY LEFT, processing enters step S5025, compare to the byte sequence (pixel data sequence) that begins from current location with from the byte sequence that the reference position of COPY LEFT begins, try to achieve the length (step S5025) of consistent byte sequence.In addition at this moment, reach in the situation of 255 bytes, with regard to abort process in the situation and the length that arrive the row end.

Then whether the length obtained of determining step S5025 is 0 (step S5026).Because in the situation that be not 0, just be judged as and be encoded into COPY LEFT order, process entering step S5030, output COPY LEFT order, namely encode 0001 and continue at the coding of thereafter expression byte number (length of obtaining), process entering step S5032.

On the other hand, under the reference position of judging COPY LEFT at step S5024 is invalid situation, perhaps under the length that step S5026 determining step S5025 obtains is 0 situation, processing enters step S5027, the retrieval cache memory judges whether the byte (pixel data) of current location logins in cache memory (step S5027).Because the byte in current location is logined in the situation that in the cache memory, just be judged as and be encoded into the CACHE order, processing enters step S5031, output CACHE order, namely encode 01 and 3 bit data (step S5031) of the position of the cache memory that continued in thereafter expression cache-hit, and new cache (step S5037) more.Specifically be exactly, when the byte with current location is kept at the original position of cache memory, carry out with from the original position of cache memory to cache-hit the position of cache memory before data move to successively the processing of the next position of cache memory.

On the other hand, when the byte that is judged as current location at step S5027 does not have login in the situation that in the cache memory, processing enters step S5028, output RAW order, namely encode 001 and continue in 8 s' of equating with byte current location thereafter initial data (step S5028), and new cache (step S5036) more.Specifically be exactly, when the byte with current location is kept at the original position of cache memory, carry out the data before final to cache memory from the original position of cache memory are moved to successively the processing of the next position of cache memory.

Then, only the current location reach is ordered handled byte number (step S5032) with COPY UP, COPY LEFT, CACHE or RAW.Then, judged whether to process whole view data (step S5033).In the situation of not handling whole view data, process and return step S5021, carry out above-mentioned coding and process.In addition, in the situation of handling whole view data, processing enters step S5034, output EOB order, 0000 (step S5034) namely encodes, and then carry-out bit 0 (until reaching 8 integral multiple) is so that the total bit of the coding of exporting becomes 8 integral multiple (step S5035).

Then, describe with regard to decoding circuit 5013.Figure 26 is the block diagram of the basic comprising of expression decoding circuit 5013.Input buffer 5021 is preserved the coded data of reading from FIFO memory 512 in the figure.5021 can preserve the data of 4 bytes at least, produce the free time in input buffer 5021, and have in the FIFO memory 512 in the situation of data, preserve from FIFO memory 512 sense datas.In addition, under the figure place of handling in the counter 5023 that is held in place becomes situation more than 8, the unwanted data of handling of input buffer 5021 deletions.

Selector

5022,11 groups 8 input selectors for example, by according to the digit counter 5023 represented figure places of handling the coded data that is kept in the input buffer 5021 being selected, carry out the alignment that command decode circuit 5024 is processed the starting position of needed, order.Because keep data with respect to input buffer 5021 with byte unit, order is the variable length data of a unit, thus for the starting position this point that 8 places are arranged be necessary.

Digit counter 5023, the figure place of handling in the coded data that preservation input buffer 5021 is preserved.In addition, the figure place of the order that digit counter 5023 counting is exported from order decoding circuit 24, and the value of preserving in the digit counter 5023 is updated to the value of having counted.In addition, digit counter 5023 has been deleted at input buffer 5021 in the situation of the data of handling, and deducts deleted figure place from the value of preserving.In addition, when 5024 pairs of EOB orders of command decode circuit were decoded, digit counter 5023 received the EOB signal from order decoding circuit 5024, carries out the processing of byte boundary alignment.Specifically be exactly if 3 of the low levels of digit counter all are 0 just not do whatever, just to carry out if not so when being added to the value of preserving with 8, removing the processing of 3 of low levels.

Command decode circuit 5024, consisted of by for example read-only memory or hard wired logic (wiredlogic), the coded data of having carried out aligned in position by selector 5022 and be kept in the input buffer 5021 is decoded, according to decoded order with the various signals that illustrate previously or illustrate later output to cache memory output circuit 5025, on copy output circuit 5026, output circuit 5027, initial data output circuit 5028 and digit counter 5023 are copied in a left side.

Cache

memory output circuit

5025,3 data of the position of reception expression cache memory read and export the data of this position from cache memory 5036 when command decode circuit 5024 has been decoded the CACHE order.On copy output circuit 5026, when command decode circuit 5024 has been decoded COPY UP order, receive the byte number that should copy, according to the byte number that receives repeatedly from line buffer 5035 reading out datas, and the data that read of output.Output circuit 5027 is copied on a left side, receives the byte number that should copy when command decode circuit 5024 has been decoded the COPYLEFT order, according to the byte number that receives repeatedly from variable stage shift register 5039 reading out datas, and the data that read of output.Initial data output circuit 5028 receives 8 data of expression initial data, and exports the data that receive when command decode circuit 5024 has been decoded the RAW order.

The long register 5029 of row, maintenance is included in the byte number of 1 row in the printing control command that has received.Column counter 5030 keeps the current column address of line buffer 5035, and every writing to line buffer 5035 just counted increase, reaches in the situation of byte number of 1 row that the long register 5029 of row keeps in this result in addition, resets to 0.Line number register 5031, keep being included in the compression parameters that received, expression COPY UP order carries out the line number of the position of reference.Linage-counter 5032 keeps the current row address of line buffer 5035, just counts increase whenever column counter 5030 reaches the byte number of 1 row that the long register 5029 of row keeps and resets to 0.In addition, in the situation that reaches the line number that line number register 5031 keeps, reset to 0.When line number was output to line number register 5031, linage-counter 5032 reset to 0 in addition.

Mlultiplying circuit 5033, the byte number by calculating 1 row that current row address that linage-counter 5032 keeps and the long register 5029 of row keep long-pending exported the start address of the current row of line buffer 5035.Add circuit 5034, the start address by calculating the current row that mlultiplying circuit 5033 exports and the current column address that column counter 5030 keeps and, the current address of output line buffer 5035.

Line buffer 5035 keeps the decoded data of a plurality of row, according to the address that add circuit 5034 is exported, carries out input or the output of decoded data.Line buffer 5035 consists of the toroidal memory by the specified size of the line number of line number register 5031 maintenances.

Cache memory 5036, storing image data when cache memory output circuit 5025 or initial data output circuit 5028 have been decoded view data, the data that output high speed buffer storage output circuit 5025 will reference in addition.Level number register 5038 keeps the byte offset value of the position that expression COPYLEFT order will reference.Variable stage shift register 5039, consisted of by shift register and selector, the shift register of the progression that formation equates with the expression byte offset value that level number register 5038 keeps, the decoded data that output will have been exported has postponed the data than the number of times of the value only little 1 of the byte offset value appointment that keeps with level number register 5038.

In the superincumbent formation, after command decode circuit 5024 decoding COPY UP order, just the decoding continued access that links to each other with it continues thereafter byte number, the byte number of having decoded is outputed to copy output circuit 5026.Then in line buffer 5035, be arranged in from current line and also want the top line number that be kept at line number register 5031, and the decoded data group of decoded byte number part is read out to from line buffer 5035 and copies output circuit 5026, on copy output circuit 5026 and write in order the decoded data group who reads from address (in other words the being exactly current location) beginning of add circuit 5034 outputs.On the other hand, the decoded data group who has read is input to variable stage shift register 5039 (from the starting following).Then the data that remained in the variable stage shift register 5039 are shifted one by one, from the final level of variable stage shift register 5039, export 1 byte of the position of the COPYLEFT order institute reference corresponding with the next position of current location.Then, column counter 5030 is counted increase.Carry out the output of decoded data until the processing end of specified byte number like this.

On the other hand, after command decode circuit 5024 decoding COPY LEFT order, continue thereafter follow-up byte number of decoding with that outputs to a left side with the byte number of having decoded and copies output circuit 5027.Then read the decoded data of this byte number part from variable stage shift register 5039, be input to a left side and copy output circuit 5027.After output circuit 5027 these decoded datas of output were copied on a left side, the decoded data of exporting was written to the current location (addresses of add circuit 5034 outputs) of line buffer 5035, is imported into simultaneously variable stage register 5039.The data that remain in addition in the variable stage shift register 5039 are shifted one by one, from the final level of variable stage shift register 5039, export 1 byte of the position of the COPY LEFT order institute reference corresponding with the next position of current location.Then, column counter 5030 is counted increase.Carry out the output of decoded data until the processing end of specified byte number like this.

After the 5024 decoding RAW orders of command decode circuit, 8 the follow-up initial data that just will continue thereafter outputs to initial data output circuit 5028.After initial data output circuit 5028 these data of output, the decoded data of exporting is written into the current location of line buffer 5035, is imported into simultaneously variable stage register 5039.The data that remain in addition in the variable stage shift register 5039 are shifted one by one, from the final level of variable stage shift register 5039, export 1 byte of the position of the COPY LEFT order institute reference corresponding with the next position of current location.Then, column counter 5030 is counted increase.In addition, the decoded data of having exported is stored into the original position of cache memory 5036.

After command decode circuit 5024 decoding CACHE order, the data of the position in thereafter 3 the follow-up cache memory of just expression being continued output to cache memory output circuit 5025.Cache memory output circuit 5025 reads the decoded data of specified position and exports this decoded data from cache memory 5036.The decoded data of exporting is written into the current location of line buffer 5035, is imported into simultaneously variable stage register 5039.The data that remain in addition in the variable stage shift register 5039 are shifted one by one, from the final level of variable stage shift register 5039, export 1 byte of the position of the COPY LEFT order institute reference corresponding with the next position of current location.Then, column counter 5030 is counted increase.In addition, the decoded data of having exported is stored into the original position of cache memory 5036.

Then with reference to Figure 27, describe with regard to the formation of cache memory 5036.Figure 27 is the block diagram of the detailed formation of expression cache memory 5036.

In the figure, 5051 is the 1st shift registers, is made of 88 grades shift registers.The 1st shift register 5051 can store until the view data of 81 bytes of being exported by initial data output circuit 5028 or cache memory output circuit 5025.Consist of the registers at different levels of the 1st shift register 5051 in the situation that from control circuit 5055 input shift pulses, the data that storage previous stage registers stores up.

5052 is the 1st shift registers, is made of 18 grades shift registers.The registers at different levels that consist of the 2nd shift register 5052 keep being illustrated in 1 the information of whether storing data in the 1st shift register 5051 corresponding registers.Consist of the registers at different levels of the 2nd shift register 5052 in the situation that from control circuit 5055 input shift pulses, the data that storage previous stage registers stores up.

The 5053rd, selector, according to the address of inputting, the position of cache memory that namely should reference is selected and output consists of data of storing in the registers at different levels of the 1st shift register 5051.

The 5054th, encoder, when read signal that input indication is read from cache memory, according to the address of inputting, the position of cache memory that namely should reference, output is to a signal of removing in the registers at different levels that consist of the 2nd shift register 5052.

The 5055th, control circuit, when write signal that input indication writes to cache memory, according to the information of whether storing data in the 1st shift register 5051 corresponding registers that is illustrated in that remains in the 2nd shift register 5052, to the output shift pulses at different levels of the 1st shift register 5051 and the 5052 needs displacements of the 2nd shift register.In the situation that the level of all not storing data in any level before this exists, do not export shift pulse, in the situation that be not such output.

Behind initial data output circuit 5028 output decoded datas, the decoded data of exporting is imported into the 1st shift register 5051, and write signal is imported into control circuit 5055 simultaneously.Because it is mutually continuous to store the level of data, therefore control circuit 5055 outputs to initial level with shift pulse and storing the level of data in previous stage, represent the decoded data inputted in the initial level of the 1st shift register 5051, with the data in the initial level of the 2nd shift register 5052 be that effectively value 1 is stored, simultaneously the data of previous stage be stored in previous stage, storing data grade.

After cache memory output circuit 5025 receives the information of the position that represents cache memory, the information of the position of the expression cache memory that receives is that the address is imported into selector 5053 and encoder 5054, and read signal is imported into encoder 5054 simultaneously.Selector 5053 is according to the address choice of inputting and export the data that are stored in the 1st shift register 5051.In addition, encoder 5054 is exported clear signal according to the address of inputting to the level of having exported data.This result is exactly, and the register of level of having exported the data of the 2nd shift register 5052 is eliminated.

When cache memory output circuit 5025 reads the data that selector 5053 is exported, and as after the decoded data output, the decoded data of exporting is imported into the 1st shift register 5051, and write signal is imported into control circuit 5055 simultaneously.Since the carrying out of the 2nd shift register 5052 level that reads of cache memory be eliminated, the level that stores data is just mutually not continuous, therefore control circuit 5055 outputs to from initial level shift pulse to the level of having carried out till the level that cache memory reads, therefore represent the decoded data inputted in the initial level of the 1st shift register 5051, with the data in the initial level of the 2nd shift register 5052 be that effectively value 1 is stored, simultaneously the data of previous stage be stored in from the 1st shift register 5051 and the 2nd shift register 5052 the 2nd grade till the level that reads of having carried out cache memory grade.

Keep like this cache memory 5036 so that the data of decoded RAW order or CACHE order by new sequential storage.

As top explanation, because the image processing apparatus of this form of implementation, the part consistent with the data sequence of front is that consistent length is encoded, just can be with the high compression rate many data of identical data sequence is arranged as view data situation of encoding.

In addition, since with the not consistent situation of the data sequence of front under cache memory is retrieved, in the situation that cache-hit, encoding in position to cache memory, just can be encoded into the situation that data self are encoded and compare shorter code.Even in the few situation of the situation consistent with the data sequence of front, also can prevent the reduction of compression ratio as far as possible.

In addition, carried out in the length consistent to the data sequence in the situation of coding, because new cache more not, therefore can prevent the reduction of the compression ratio that causes with long data sequence rewriting cache memory.

[the 4th form of implementation]

Although in the 3rd form of implementation, with the hardware processing of decoding, be not limited to this, also can carry out with software.In addition, although in the 3rd form of implementation, with software encode (compression) process, also be not limited to this, also can carry out with the hardware of special use.In addition, although in the 3rd form of implementation, the size of the unit data of coding is 1 byte, is not limited to this, also can be, for example 1 pixel or 2 bytes.

In addition, although in the 3rd form of implementation, in the data of when cache memory is full of, selecting to delete, use is deleted the data that were not referenced in the longest interval, so-called LRU method, but be not limited to this, also can example such as simulation LRU method or simulation randomized etc.

[the 5th form of implementation]

Because the concept map of employed software bundling and printer Relations Among is identical with the 1st form of implementation when being illustrated in print image, as shown in Figure 1, therefore omit this explanation.

Figure 28 is the block diagram of the basic comprising of the printer 1711 in this form of implementation of expression.In Figure 28, the 6011st, parallel port receives printer command from port driver 5.The 6012nd, FIFO (first-in first-out) memory, the coded data that memory parallel port one 1 receives (see for details back explanation), with the data of storing according to the Sequential output of first-in first-out to decoding circuit 6013.Decoding circuit 6013 is decoded to a code sequence data of storing in the FIFO memory 12, and is outputed to Printer Engine 6014 and coding circuit 6017 again.Printer Engine 6014 is laser printer engines, and according to the indication of control circuit 6015, the view data of exporting according to decoding circuit 6013 prints.

The 6015th, control circuit for example is made of one-chip CPU, carries out parallel port 6011, FIFO memory 6012, decoding circuit 6013, again coding circuit 6017, page memory 6018, the again control of decoding circuit 6019 and Printer Engine 6014.The 6017th, coding circuit is encoded and is also exported the view data of exporting from decoding circuit 6013 again.The 6018th, page memory is preserved at least 1 page the coding that coding circuit 6017 is exported again.The 6019th, decoding circuit again, decoding also output by the coding that is saved in page memory 6018 behind coding circuit 6017 codings again.

Below, just print action and describe.

When the operator generates print datas at computer-side operating application program 3, and after indication printed, print command was passed to printer driver 4 via operating system 2 from application program 3.Printer driver 4 is transformed into view data based on the print command of issuing from application program 3.Then, printer driver 4 is based on the coding step that illustrates later, generate coded data from the view data that has generated, and with the printing control command of the length of the row of specifying paper size, data bitmap and line number etc., the order of skipping of the compression parameters specified command of specified compression parameter and expression EOP is exported simultaneously.

Port driver 5 sends to printer 1711 with a series of printer command that printer driver 4 generates.Control circuit 6015 receives printer command via parallel port 6011.If the printer command that receives is to print control command or compression parameters specified command, just remain on the inside of control circuit 6015 in order to print control.In addition, the printer command that receives again is in the situation of coded data, just is saved in FIFO memory 6012.After this, when the reception by the EOP order etc., when the reception that detects the printer command that consists of 1 page has been finished, print beginning to Printer Engine 6014 indications.Indication when Printer Engine 6014 can be accepted view data, requires the output of view data after printing beginning to decoding circuit 6013.

Decoding circuit 6013 holds up 6014 and requires to read coded data from FIFO memory 6012 in the situation of output of view data being printed power traction, and the view data that will decode outputs to Printer Engine 6014.Coded data is decoded successively and is output as view data like this, and after the output of view data all finished, 1 page printing was finished.

Coding circuit 6017 again, whenever decoding circuit 6013 output image datas, and the view data of just encoding and exporting.If to process be only not process with reference to the coding that the data of this page are encoded with reference to the data of front page or leaf to the coding that carries out of coding circuit 6017 again, just can be any processing, for example only with reference to left neighbour, only with reference to upper neighbour, encode with reference to left neighbour and upper adjacent both sides or with reference to the data of the position of the position in predetermined byte number left side and predetermined line number top.Be saved to page memory 6018 by coding circuit 6017 coded codes again.When 1 page printing finished, the view data of the page or leaf of having printed just was encoded and is saved in page memory 6018. like this

Then after the reception that consists of the 2nd page printer command finishes, similarly begin to print, view data outputs to Printer Engine 6014 successively, and the while is encoded and is saved in page memory 6018 by coding circuit 6017 again.In addition, before the printing of the 2nd page of 6019 starting of decoding circuit again, begin action according to the indication of control circuit 6015, read and decode and be saved in the code that view data page memory 6018, prevpage has been encoded.The zone of preserving the coding that has read just becomes dummy section.

Decoding circuit 6019 is exported decoded data with the consistent step of decoding circuit 6013 output image datas again.These data have carried out at 6013 pairs of codings with reference to the view data of prevpage of decoding circuit using as comparable data in the situation of decoding, are not dropped in the situation that other do not use.

Because the coding that printer driver 4 generates in this form of implementation is identical with the 1st form of implementation, such shown in Fig. 3,4, therefore omit this explanation.

In addition, because the example of represented coding is illustrated in Fig. 5 among Fig. 3 and Fig. 4, this illustrates as described above, therefore omit this explanation.

Then, with reference to flow chart shown in Figure 29, describe with regard to the processing details of printer driver in this form of implementation 4.

After calling printer driver 4 from operating system 2, at first judge whether drawing for order of the kind call at step S601.In the situation of drawing for order in the kind of calling, in the step S602 processing of drawing.Specifically be exactly, will be transformed into 8 grayscale images from application program 3 indicated character, figure or bitmaps etc. via operating system 2, record and end process.

The kind of calling in step S601 is not in the situation of drawing for order, at step S7, judges that the kind of calling is the EOP instruction.Be in the situation of EOP instruction in the kind of calling, at step S8, carry out 2 values and process.Specifically be exactly to use the image conversion of 8 gray scales that dither matrix will record in step 602 to become the image of 1 of black and white.

Then, at step S609 output print condition specified command, specifically be exactly the order that the byte number of specifying paper size, paper feeding cassette, resolution, grey exponent number, 1 row, 1 page line number etc. are printed needed condition.

Then, employed when step S610 output encoder, specify the compression parameters specified command of following parameter: when copying in the appointment copy source be which top the position on when copying the vertical shift value and specifying a left side to copy copy source be the left levels of replication deviant of the position of which byte left of going together mutually.

Here, on copy vertical shift value and left levels of replication deviant, according to employed dither matrix among the step S608, obtain optimal value by theoretical or test in advance, and use this value.

Then, view data is encoded according to the coding step that illustrates later at step S6011.At this moment, use the compression parameters specified command exported at step S6010 specified copy the vertical shift value and left levels of replication deviant is encoded.The view data order head of then in step S6012 output size and the line number of view data coded in step S6011 being carried out appointment.Then export view data coded in step S6011 at step S6013.The order of skipping that then finishes at step S6014 output specific page.Then page memory and end process before step S6015 is sent to the view data of current page.

The kind of calling in step S607 is not in the situation of EOP instruction, at step S6016, meets other processing of the kind of calling, and then the processing such as corresponding with page or leaf sign on or print capacity inquiry instruction etc. finishes.

Then with reference to Figure 30 A and Figure 30 B, just the details of the coding processing among the step S6011 of Figure 29 describes.

At first at step S6051 line number Y is initialized as 0.Then will be initialized as 0 from the byte offset X of line start at step S6052.Then at step S6053, whether the position is in effective image-region in judgements.Whether the line number of duplicating position also is not less than line number Y in the expression that concrete judgement is exported in the step S6047 of Figure 29.Because the line number of the upper duplicating position of expression also is not less than the situation of line number Y, be exactly the situation of upper position in effective image-region, therefore at step S6054, try to achieve from the byte sequence continuous phase consistent length of current location (X, Y) with upper position (X, Y-represent the line number of upper duplicating position) beginning.In addition at this moment, in the situation that until all continuous phase is consistent row end, is made as the end of being expert at and ends.In addition, in the consistent length of continuous phase, surpass in the situation of peaked 4095 bytes of encoding as counting, be made as in 4095 bytes and end.

Then at step S6055, whether the length of obtaining among the determining step S6054 is 0.The length of obtaining in step S6054 is not that at step S6056, whether the length of obtaining among the determining step S6054 is larger than 63 in 0 the situation.In the large situation of the Length Ratio 63 of in step S6054, obtaining, at step S6057, COUNT HIGH order is outputed to buffer, then at step S6058, to with 64 divided by the counting high positions, the merchant that the length of namely obtaining at step S6054 is calculated encodes and outputs to buffer, enters step S6059.In step S6056, when the length of obtaining at step S6054 unlike 63 large situations under, directly enter step S6059.

Then, at step S6059 COUNT UP order is outputed to buffer, then at step S6060, to 64 divided by the low levels of counting, the remainder that the length of namely obtaining at step S6054 is calculated is encoded and is outputed to buffer.

The line number of duplicating position is than in the little situation of line number Y in the expression in step S6053, and the length in step S6055 is in 0 the situation, at step S6062, judges that left position is whether in effective image-region.Whether the byte number of specifically judging the left duplicating position of expression of exporting among the step S6047 of Figure 29 also is not less than the byte offset X from line start.Because the byte number of the left duplicating position of expression also is not less than from the situation of the byte offset X of line start, be exactly the situation of left position in effective image-region, therefore at step S6063, try to achieve from the byte sequence continuous phase consistent length of current location (X, Y) with left position (X-represents byte number, the Y of left duplicating position) beginning.In addition at this moment, in the situation that until all continuous phase is consistent row end, is made as the end of being expert at and ends.In addition, in the consistent length of continuous phase, surpass in the situation of peaked 4095 bytes of encoding as counting, be made as in 4095 bytes and end.

Then, at step S6064, whether the length of obtaining among the determining step S6063 is 0.The length of obtaining in step S63 is not that at step S6065, whether the length of obtaining among the determining step S6063 is larger than 63 in 0 the situation.In the large situation of the Length Ratio 63 of in step S6063, obtaining, at step S6066, COUNT HIGH order is outputed to buffer, then at step S6067, high position to counting, namely encode with 64 merchants that calculate divided by the length of obtaining at step S6063 and output to buffer, enter step S6068.In step S6065, in the little situation of the Length Ratio 63 of obtaining at step S6063, directly enter step S6068.

Then, at step S6068 COUNT LEFT order is outputed to buffer, then at step S6060, to the low level of counting, namely encode with 64 remainders of calculating divided by the length of obtaining at step S6063 and output to buffer.

The byte number of the left duplicating position of expression is than in the little situation of the byte offset X of line start in step S6062, and the length in step S6064 is in 0 the situation, at step S6069, to judge whether effective image is kept in the prevpage memory.Specifically be exactly to judge whether page number is not 1.Because page number is not 1 situation, the situation of page memory before step S6015 is not sent to view data exactly, therefore at step S6070, try to achieve from the view data of current page current location (X, Y) be kept at the prevpage memory the consistent length (counting) of byte sequence continuous phase of current location (X, Y) beginning of view data.In addition at this moment, in the situation that until all continuous phase is consistent row end, is made as the end of being expert at and ends.In addition, in the consistent length of continuous phase, surpass in the situation of peaked 4095 bytes of encoding as counting, be made as in 4095 bytes and end.

Then at step S6071, whether the length of obtaining among the determining step S6070 is 0.The length of obtaining in step S6070 is not that at step S6072, whether the length of obtaining among the determining step S6070 is larger than 63 in 0 the situation.In the large situation of the Length Ratio 63 of in step S6070, obtaining, at step S6073, COUNT HIGH order is outputed to buffer, then at step S6074, high position to counting, namely encode with 64 merchants that calculate divided by the length of obtaining at step S6070 and output to buffer, enter step S6075.In step S6072, in the little situation of the Length Ratio 63 of obtaining at step S6070, directly enter step S6075.

Then at step S6075, COUNT PREVIOUS PAGE order is outputed to buffer, then at step S6060, to the low level of counting, namely encode with 64 remainders of calculating divided by the length of obtaining at step S6070 and output to buffer.

When in the situation that among the step S6069 page number be 1, and in the situation that among the step S6071 length be 0, at step S6076, the RAW order is outputed to buffer, then data 1 byte with current location (X, Y) outputs to buffer as initial data.

Under any circumstance, enter step S6078, the byte number of having processed is added to X.Then at step S6079, judge that whether X arrives the row end, judges namely whether X equals the byte number of 1 row.X than the little situation of the byte number of 1 row under, return step S6053, proceed to process.Equal at X in the situation of byte number of 1 row, at step S6080, be added to line number Y with 1, then judge at step S6081 whether the processing of image finishes, judge that namely whether Y equates with the line number of image.

Y than the little situation of the line number of image under, return S6052, proceed to process.Equal at Y in the situation of line number of image, at step S6082, the EOB order is outputed to buffer, then at step S6083, only will output to buffer, end process for requisite number purpose position, aligned bytes border " 0 ".

Then, with reference to Figure 31, describe with regard to the details of decoding circuit shown in Figure 28 6013.In addition, Figure 31 is the block diagram of the details of expression decoding circuit 6013 shown in Figure 28.

In Figure 31, input buffer 6021 is preserved the coded data of reading from FIFO memory 6012.Input buffer 6021 can keep the data of 4 bytes at least, produces idlely in buffer, and has in the FIFO memory 6012 in the situation of data, preserves from FIFO memory 6012 sense datas.In addition, under the figure place of handling in the counter 6023 that is held in place becomes situation more than 8, the unwanted data of handling of input buffer 6021 deletions.

Selector 6022 is 8 input selectors of 11 groups for example, by according to the digit counter 6023 represented figure places of handling the coded data that is kept in the input buffer 6021 being selected, carry out the alignment that command decode circuit 6024 is processed the starting position of needed, order.Because keep data with respect to input buffer 6021 with byte unit, order is the variable length data of a unit, thus for the starting position this point that 8 places are arranged be necessary.

Digit counter 6023, the figure place of handling in the coded data that preservation input buffer 6021 is preserved.In addition, digit counter 6023 comes the value of preserving in the updated space counter by adding from the figure place of order decoding circuit 6024 order of exporting.In addition, digit counter 6023 has been deleted in the situation of the data of handling at input buffer, deducts deleted figure place.In addition, when 6024 pairs of EOB orders of command decode circuit were decoded, digit counter 6023 received the EOB signal from order decoding circuit 6024, carries out the processing of byte boundary alignment.Specifically be exactly, if 3 of the low levels of digit counter all are 0 just not do whatever, 3 of removing low levels when adding 8 just if not so.

Command decode circuit 6024 is made of for example read-only memory or hard wired logic (wiredlogic).The coded data of having carried out aligned in position by selector 6022 and be kept in the input buffer 6021 is decoded, according to decoded order with the various signals that illustrate previously or illustrate later output to counter 6026, on copy that output circuit 6027, front page or leaf copy output circuit 6028, output circuit 6029, initial data output circuit 6030 and digit counter 6023 are copied in a left side.

Counter 6026 keeps the processing byte number of COPY UP, COPY LEFT or COPYPREVIOUS PAGE order, whenever carries out the data output of 1 byte and just carries out additive operation.Counter 6026 can be set 6 of high-order 6 and low levels independently, and when command decode circuit 6024 had been decoded COUNT HIGH order, the additive value of the processing byte number that command decode circuit 6024 is exported was saved in the high position of counter 6026.In addition, when command decode circuit 6024 had been decoded COPY UP, COPY LEFT or COPYPREVIOUS PAGE order, the processing byte number that command decode circuit 6024 is exported was saved in the low level of counter 6026.

On copy output circuit 6027, the processing byte number that keeps according to counter 6026, the data that read upper duplicating position from line buffer 6031 line output of going forward side by side.

The address that is equivalent to the line buffer 6031 of duplicating position is maintained at and is built in the register that copies output circuit 6027.The initial value of this register, write in advance the value that is equivalent to upper duplicating position by control circuit 6015, whenever the view data of decoding circuit 6013 outputs 1 byte is just automatically carried out add operation, surpassed in the situation of final address of line buffer 6031 in this result simultaneously, automatically again be set as the initial address of line buffer 6031.

Front page or leaf copies output circuit 6028, according to the processing byte number that counter 6026 keeps, reads and export again the view data of same position of the prevpage of decoding circuit 6019 outputs.

Output circuit 6029 is copied on a left side, the processing byte number that keeps according to counter 6026, the data that read left duplicating position from line buffer 6031 line output of going forward side by side.

The address that is equivalent to the line buffer 6031 of left duplicating position is maintained at and is built in a left side and copies in the register of output circuit 6029.The initial value of this register, write in advance the value that is equivalent to left duplicating position by control circuit 6015, whenever the view data of decoding circuit 6013 outputs 1 byte is just automatically carried out add operation, surpassed in the situation of final address of line buffer 6031 in this result simultaneously, automatically again be set as the initial address of line buffer 6031.

The initial data of 1 byte that initial data output circuit 6030, output command decoding circuit 6024 are exported.

Line buffer 6031, the decoded data that keeps a plurality of row, address according to

upper duplicate circuit

6027 or 6029 outputs of left duplicate circuit, carry out reading of decoded data, the data of simultaneously upper duplicate circuit 6027, front page or leaf duplicate circuit 6028, left duplicate circuit 6029 or initial data output circuit 6030 being exported are written to current location.

The address that is equivalent to the line buffer 6031 of current location is maintained in the register that is built in line buffer 6031.The initial value of this register, by control circuit 6015 initial address of writing line buffer 6031 in advance, whenever the view data of decoding circuit 6013 outputs 1 byte is just automatically carried out add operation, surpassed in the situation of final address of line buffer 6031 in this result simultaneously, automatically again be set as the initial address of line buffer 6031.

After command decode circuit 6024 decoding COPY UP order, the counting of decode successive also is saved in the low level of counter 6026, signal is outputed to copy output circuit 6027 simultaneously.The high position of counter 6026 preserves 0 in the situation that formerly do not send COUNT HIGH order, preserves the high position counting of expression COUNT HIGH order in the situation about formerly having sent.The data of upper duplicating position are read and are input to from line buffer 6031 copies output circuit 6027.When on copy these data of output circuit 6027 output after, the decoded data of exporting just is written to the current location of line buffer 6031.Carry out the output of decoded data until counter 6026 reaches 0 like this.

After command decode circuit 6024 decoding COPY PREVIOUS PAGE order, the counting of decode successive also is saved in the low level of counter 6026, simultaneously signal is outputed to front page or leaf and copies output circuit 6028.The high position of counter 6026 formerly do not send in the situation of COUNT HIGH order and preserves 0, preserves the high position counting of expression COUNT HIGH order in the situation about formerly having sent.The data of the same position of prevpage are input to front page or leaf and are copied output circuit 6028 from decoding circuit 6019 again.After current page copied output circuit 6028 these data of output, the decoded data of exporting just was written to the current location of line buffer 6031.Carry out the output of decoded data until counter 6026 reaches 0 like this.

After command decode circuit 6024 decoding COPY LEFT order, the counting of decode successive also is saved in the low level of counter 6026, simultaneously signal is outputed to a left side and copies output circuit 6029.The high position of counter 6026 formerly do not have to preserve 0 in the situation of COUNT HIGH order, preserves the high position counting of expression COUNT HIGH order in the situation about formerly having sent.The data of left duplicating position are read and are input to a left side from line buffer 6031 and copied output circuit 6029.After output circuit 6029 these data of output were copied on a left side, the decoded data of exporting just was written to the current location of line buffer 6031.Carry out the output of decoded data until counter 6026 reaches 0 like this.

After command decode circuit 6024 decoding RAW order, the initial data of 1 follow-up byte is outputed to initial data output circuit 6030.After initial data went out circuit 6030 these data of output, the decoded data of exporting just was written to the current location of line buffer 6031.

After command decode circuit 6024 decoding COUNT HIGH order, the counting of decode successive also is saved in the high position of counter 6026.

[the 6th form of implementation]

Basic comprising owing to the image processing apparatus in this form of implementation is identical with the 1st form of implementation in addition, as shown in Figure 17, therefore omit this explanation.

Basic comprising owing to the printer 1711 in this form of implementation is identical with the 3rd form of implementation in addition, as shown in Figure 19, therefore omit this explanation.

Identical with the 3rd form of implementation because the printing in this form of implementation is moved in addition, therefore omit this explanation.

Then, with reference to Figure 32 and table shown in Figure 21, just the coding of 4 generations of the printer driver in this form of implementation describes.

Figure 32 is the figure of the coding schedule that generates of the expression printer driver 4 of one example in this form of implementation.Each coding that describes in this form of implementation for example represents with the position order from 2 to 18 with position unit's variable-length.Identical with Huffman (Huffman) coding, each coding constitutes just can recognition coding by searching in order from beginning.

In addition, be made as in this form of implementation when coding with reference to the left reference position at 2 places and the upper reference position at 2 places, the characteristic that meets employed dither matrix when losing lustre processing, for example, being defined as left reference position is to pay close attention to the 1 byte left side of position and the position in 4 bytes left side, and going up in addition reference position is to pay close attention to the 4 row top of position and the position in 2 row top and 2 bytes left side.

Shown in figure 32, the position order of coding is exactly COPY UP1 order with the situation of " 1 " beginning.The coding of the length that illustrates later of expression that continues after this order is indicated the upper reference position from predetermined high priority, copies the byte sequence of the represented length of the coding that continues thereafter.

In addition, the position order of coding is exactly COPY UP2 order with the situation of " 110 " beginning.The coding of the length that the expression that continues after this order illustrates later, indication is from the upper reference position of predetermined low priority, copy the byte sequence of the represented length of the coding that continues thereafter, and the upper reference position of transposing high priority and the upper reference position of low priority.

In addition, the position order of coding is exactly the RAW order with the situation of " 001 " beginning.Continuing after this order represents 8 bit data of initial data, specifies the data of 1 byte of the value of holding 8 bit data thereafter that continue.

In addition, the position order of coding is exactly COPY LEFT1 order with the situation of " 010 " beginning.The coding of the length that illustrates later of expression that continues after this order is indicated the left reference position from predetermined high priority, copies the byte sequence of the represented length of the coding that continues thereafter.

In addition, the position order of coding is exactly COPY LEFT2 order with the situation of " 0001 " beginning.The coding of the length that the expression that continues after this order illustrates later, indication is from the left reference position of predetermined low priority, copy the byte sequence of the represented length of the coding that continues thereafter, and the left reference position of transposing high priority and the left reference position of low priority.

In addition, the position order of coding is exactly the EOB order for the situation of " 0000 ", the end of indication code block.

In the consistent situation of data on the reference position at low priority, later on the consistent possibility of data is just high on this reference position.Thereby, when the longer code of the reference position of output identification low priority, if the priority that improves this reference position to be to identify with shorter code afterwards, after this when in the situation that data consistent on this reference position, the length of the code that will export will shorten.So, by carrying out COPY UP2 order, COPY LEFT2 order, change the reference position of high priority and the reference position of low priority, the length of the code of exporting from now on will shorten.

Continue after COPY UP1 shown in Figure 32 order, COPY UP2 order, COPYLEFT1 order or COPY LEFT2 order, represent length coding coding schedule one for example illustrated in the 3rd form of implementation shown in Figure 21.

Then with reference to Figure 33 A, Figure 33 B, the processing of just encoding is enumerated example and is described.The view data of Figure 33 A presentation code object, Figure 33 B is the figure of the data that are encoded of expression, shown in Figure 33 A, the view data of 10 bytes (focused data) 00,00,12,34,56,78,00, BC, DE and 00 arrange from the left side the most descending, and

view data

12,34,56,78,9A, BC, DE, 00,00 and 00 (comparable data) are being arranged from the left side than the row of high 2 row of this row.The current view data that to be ready encoding or decode is the most descending, carve at this moment in addition, the left reference position of establishing high priority is that the position (the left reference position that is low priority is the position in 4 bytes left side) in 1 byte left side, the upper reference position of low priority are that the position in 2 row top and 2 bytes left side (the upper reference position that is high priority is the position of 4 row top) forms.

Here the most descending start byte 00 can be encoded to an order 001 00000000, namely represent the RAW order of initial data 00.

In addition, next byte 00 can be encoded to an order 0101, namely from the left reference position of high priority, namely the COPY LEFTI order of the length of 1 byte is copied in the position in 1 byte left side.

In addition,

byte sequence

12,34,56 subsequently, 78 can be encoded to an order 011 00100, namely from the upper reference position of low priority, namely the COPY UP2 order of the length of 4 bytes is copied in the position in 2 row tops and 2 bytes left side.This result, going up exactly the priority of reference position changes, later COPY UP1 order and COPY UP2 order will be respectively with reference to the positions on the left of the 2 row top that becomes high priority from low priority and 2 bytes, and become the position on 4 row of low priority from high priority.

Next byte 00 can again be encoded to an order 001 00000000, namely represent the RAW order of the byte of initial data 00.

In addition, byte sequence BC, DE subsequently, 00 can be encoded to an order 1011, namely from the upper reference position of high priority, namely the position in 2 row tops and 2 bytes left side begins to copy the COPY UP1 order of the length of 3 bytes.

As top, just can coded image data.Because the processing of printer driver 4 is followed the shown in Figure 24 flow chart identical with the 3rd form of implementation, therefore the description thereof will be omitted in this form of implementation.

Then, process with regard to the coding of this form of implementation among the step S5011, Figure 34 A and Figure 34 B of the flow chart of reference expression same treatment describe.The program of following this this journey figure is installed to printer driver 4 as the subprogram of above-mentioned flow chart.

At first at step S7019, according to predetermined initial value, namely set respectively the upper reference position of high priority, the upper reference position of low priority, the left reference position of high priority and the left reference position of low priority according to the compression parameters of in above-mentioned steps S5010, obtaining.Then, at step S7020, with the set positions of current location, the image of namely the encoding initial row left end to image.

Then, at step S7021, judge that the upper reference position of high priority of corresponding current location is whether just with reference to effective view data.At the upper reference position of high priority just in the situation with reference to effective view data, at step S7022, the byte sequence that relatively begins from current location and try to achieve the length consistent with the upper reference position of high priority from the byte sequence that the upper reference position of high priority begins.In addition at this moment, in the situation that the arrival row is last and length reaches in the situation of 255 bytes, with regard to abort process.Then, at step S7023, judge whether the consistent length of upper reference position of the high priority of obtaining with step S7022 is 0.In the situation that be not 0, owing to can be encoded into COPY UP1 order, just in step S7024 output expression COPY UP1 order, namely encode 1 and expression continue at the coding of thereafter byte number (length of obtaining at step S7022), process entering step S7040.

On the other hand, under the upper reference position that is judged as high priority at step S7021 is invalid situation, or work as at step S7023, the consistent length of upper reference position that is judged as the high priority of obtaining with step S7022 is in 0 the situation, all at step S7025, judge that the left reference position of high priority of corresponding current location is whether just with reference to effective view data.At the left reference position of high priority just in the situation with reference to effective view data, at step S7026, the byte sequence that relatively begins from current location and try to achieve the length consistent with the left reference position of high priority from the byte sequence that the left reference position of high priority begins.In addition at this moment, in the situation that the arrival row is last and length reaches in the situation of 255 bytes, with regard to abort process.Then at step S7027, judge whether the consistent length of left reference position of the high priority of obtaining with step S7026 is 0.In the situation that be not 0, owing to can be encoded into COPY LEFT1 order, just in step S7028 output expression COPY LEFT1 order, namely encode 010 and expression continue at the coding of thereafter byte number (length of obtaining at step S7026), process entering step S7040.

No matter be under the left reference position that is judged as high priority at step S7025 is invalid situation, or be in 0 the situation when the consistent length of left reference position that is judged as the high priority of obtaining with step S7026 at step S7027, all at step S7029, judge that the upper reference position of low priority of corresponding current location is whether just with reference to effective view data.At the upper reference position of low priority just in the situation with reference to effective view data, at step S7030, the byte sequence that relatively begins from current location and try to achieve the length consistent with the upper reference position of low priority from the byte sequence that the upper reference position of low priority begins.In addition at this moment, in the situation that the arrival row is last and length reaches in the situation of 255 bytes, with regard to abort process.Then at step S7031, whether the length consistent with the upper reference position of low priority that determining step S7030 obtains is 0.In the situation that be not 0, because can be encoded to COPY UP2 order, just in step S7032 output COPY UP2 order, namely encode 011 and expression continue at the coding of thereafter byte number (length of obtaining at step S7030), then at the upper reference position of step S7033 transposing high priority and the upper reference position of low priority, process entering step S7040.

Under the upper reference position that is judged as low priority at step S7029 is invalid situation, or the consistent length of upper reference position that is judged as the low priority of obtaining with step S7030 at step S7031 is in 0 the situation, all at step S7034, judge that the left reference position of low priority of corresponding current location is whether just with reference to effective view data.At the left reference position of low priority just in the situation with reference to effective view data, at step S7035, the byte sequence that relatively begins from current location and try to achieve the length consistent with the left reference position of low priority from the byte sequence that the left reference position of low priority begins.In addition at this moment, in the situation that the arrival row is last and length reaches in the situation of 255 bytes, with regard to abort process.Then at step S7036, whether the length consistent with the upper reference position of low priority that determining step S7035 obtains is 0.In the situation that be not 0, because can be encoded to COPY LEFT2 order, just in step S7037 output COPY LEFT2 order, namely encode 0001 and expression continue at the coding of thereafter byte number (length of obtaining at step S7035), then at the left reference position of step S7038 transposing high priority and the left reference position of low priority, process entering step S7040.

No matter be under the left reference position that is judged as low priority at step S7034 is invalid situation, or be in 0 the situation when the consistent length of left reference position that is judged as the low priority of obtaining with step S7035 at step S7036, all at step S7039, output RAW order, namely encode 001 and continue in the data of 1 byte of thereafter current location, process entering step S7040.

In step S7040, only the current location reach is ordered handled byte number with COPY UP1, COPY UP2, COPY LEFT1, COPY LEFT2 or RAW.Then at step S7041, judged whether to process whole view data.In the situation of not handling whole view data, return step S7021, continue coding.In the situation of handling whole view data, EOB orders, namely encodes 0000 in step S7042 output, then at step S7043, will encode and align to byte boundary.Specifically be exactly not to be that carry-out bit 0 is until arrive 8 integral multiple in the situation of 8 integral multiple at the total bit of the coding of having exported.Like this, after finishing, the processing of coding just returns.

Then use Figure 35 of the expression formation of decoding circuit 513 in this form of implementation shown in Figure 19, describe with regard to the details of same circuits.Figure 35 is the block diagram that is illustrated in the basic comprising of decoding circuit shown in Figure 19 513 in this form of implementation.

In Figure 35, input buffer 7021 is preserved the coded data of reading from FIFO memory 512.Input buffer 7021 can be preserved the data of 4 bytes at least, produces idlely in input buffer 5021, and has in the FIFO memory 512 in the situation of data, from FIFO memory 512 sense datas and preserve.In addition, under the figure place of handling in the counter 7023 that is held in place becomes situation more than 8, the unwanted data of handling of input buffer 7021 deletions.

First selector 7022 is 8 input selectors of 11 groups for example, by according to the digit counter 7023 represented figure places of handling the coded data that is kept in the input buffer 7021 being selected, carry out the alignment that command decode circuit 7024 is processed the starting position of needed, order.Because keep data with respect to input buffer 7021 with byte unit, order is the variable length data of a unit, thus for the starting position this point that 8 places are arranged be necessary.

Digit counter 7023, the figure place of handling in the coded data that preservation input buffer 7021 is preserved.In addition, digit counter 7023 upgrades the value that is kept at the digit counter by adding from the figure place of order decoding circuit 7024 order of exporting.In addition, digit counter 7023 has been deleted in the situation of the data of handling at input buffer 7021, deducts deleted figure place.In addition, when 7024 pairs of EOB orders of command decode circuit were decoded, digit counter 7023 received the EOB signal from order decoding circuit 7024, carries out the processing of byte boundary alignment.Specifically be exactly, if 3 of the low levels of digit counter all are 0 just not do whatever, 3 of removing low levels when adding 8 just if not so.

Command decode circuit 7024, consisted of by for example read-only memory or hard wired logic (wiredlogic), to carried out aligned in position by first selector 7022, the coded data that is kept at input buffer 7021 is decoded, in the situation that decoded order is the EOB order, to digit counter 7023, upper preferential FF7029 and left preferential FF7030 output signal, in the situation that being COPY UP1 order or COPY UP2, decoded order orders to second selector 7025 and third selector 7026 output signals, in the situation that decoded order is COPY LEFT1 order or COPY LEFT2 order, to the 4th selector 7027 and the 5th selector 7028 output signals, in the situation that decoded order is that the RAW order is to initial data output circuit 7036 output signals.In addition, command decode circuit 7024 is in the situation that the COPY UP1 that decoded, COPY UP2, COPY LEFT1 or COPYLEFT2 order, also decoding and the represented byte number of output encoder in the situation that the RAW that decoded orders, are also decoded and 8 represented bit data of output encoder simultaneously.

The 7025th, second selector, in the situation that upper preferential FF7029 keeps 0, the signal of output command decoding circuit 7024 output when decoding COPY UP1 order, in addition in the situation that upper preferential FF7029 keeps 1, the signal of output command decoding circuit 7024 output when decoding COPY UP2 order.

The 7026th, third selector, in the situation that upper preferential FF7029 keeps 0, the signal of output command decoding circuit 7024 output when decoding COPY UP2 order, in addition in the situation that upper preferential FF7029 keeps 1, the signal of output command decoding circuit 7024 output when decoding COPY UP1 order.

7027 is the 4th selectors, in the situation that the preferential FF7030 in a left side keeps 0, the signal of output command decoding circuit 7024 output when decoding COPY LEFT1 order, in addition in the situation that the preferential FF7030 in a left side keeps 1, the signal of output command decoding circuit 7024 output when decoding COPYLEFT2 order.

7028 is the 5th selectors, in the situation that the preferential FF7030 in a left side keeps 0, the signal of output command decoding circuit 7024 output when decoding COPY LEFT2 order, in addition in the situation that the preferential FF7030 in a left side keeps 1, the signal of output command decoding circuit 7024 output when decoding COPYLEFT1 order.

The 7029th, upper preferential FF is to representing on first that any one value of preferentially being used of duplicate circuit 7032 keeps on the duplicate circuit 7031 or second.Go up in addition the preferential FF7029 value that counter-rotating keeps when command decode circuit 7024 has been decoded COPY UP2 order.

The 7030th, left preferential FF keeps any one value preferentially used that represents the first left duplicate circuit 7033 or the second left duplicate circuit 7034.The other left preferential FF7030 value that counter-rotating keeps when command decode circuit 7024 has been decoded COPY LEFT2 order.

7031 is duplicate circuits on first, when having received signal from second selector 7025, receives in the lump the byte number that should copy, and according to the byte number that receives, repeatedly also exports the data that read from line buffer 7035 reading out datas.

7032 is duplicate circuits on second, when having received signal from third selector 7026, receives in the lump the byte number that should copy, and according to the byte number that receives, repeatedly also exports the data that read from line buffer 7035 reading out datas.

7033 is first left duplicate circuits, when having received signal from the 4th selector 7027, receives in the lump the byte number that should copy, and according to received byte number, repeatedly also exports the data that read from line buffer 7035 reading out datas.

7034 is second left duplicate circuits, when having received signal from the 5th selector 7028, receives in the lump the byte number that should copy, and according to the byte number that receives, repeatedly also exports the data that read from line buffer 7035 reading out datas.

The 7035th, line buffer, toroidal memory as the decoded data that keeps a plurality of row moves, output is kept at data on the address that duplicate circuit 7032, the first left duplicate circuit 7033 or the second left duplicate circuit 7034 are exported on the duplicate circuit 7031, second on first, simultaneously decoded data is kept on the address that Current Address Register 7037 exports.

The 7036th, the initial data output circuit is received in command decode circuit 7024 and has decoded RAW when order, 8 data of the expression initial data that is output simultaneously, and the data that received of output.

The 7037th, Current Address Register, increase is just counted simultaneously in the address of the current Data Position that will decode of output expression when the data of having decoded are saved to line buffer 7035.

In addition, in the address that duplicate circuit 7032 on the duplicate circuit on first 7031, second, the first left duplicate circuit 7033 and the second left duplicate circuit 7034 keep representing respectively duplicating position on the duplicating position on first, second, the first left duplicating position and the second left duplicating position, whenever Current Address Register 7037 is counted to increase and just similarly counted increase.

After command decode circuit 7024 decoding COPY UP1 order, with regard to the counting of decode successive, and signal exported second selector 7025 and third selector 7026.Then, according to the value that upper preferential FF7029 keeps, from any one party output signal of second selector 7025 or third selector 7026, move according to any one party of duplicate circuit 7032 on the duplicate circuit 7031 or second on this signal first.

For example, be that second selector 7025 outputs to the first duplicate circuit 7031 with signal when decoding COPYUP1 order in 0 the situation in the value that upper preferential FF7029 keeps, third selector 7026 is output signal not.The address that duplicate circuit 7031 will remain on duplicating position in inner, the expression first on first outputs to line buffer 7035, reading and saving in line buffer 7035 first on the data of duplicating position, the data that read are outputed to print engine 514 as decoded data.The address of Current Address Register 7037 output expression current locations, line buffer 7035 is preserved decoded data in this address.Then, remain on respectively on first the inside of duplicate circuit 7032, the first left duplicate circuit 7033 and the second left duplicate circuit 7034 on the duplicate circuit 7031, second, the address of the address of duplicating position, the first left duplicating position and represent that the address of the second left duplicating position and the address of the current location that expression Current Address Register 7037 keeps count increase in the address of duplicating position, the expression second in the expression first.This action is carried out repeatedly according to specified byte number.

After command decode circuit 7024 decoding COPY UP2 order, the counting of decode successive, and signal outputed to second selector 7025 and third selector 7026.Then, according to the value that upper preferential FF7029 keeps, from any one party output signal of second selector 7025 or third selector 7026, move according to any one party of duplicate circuit 7032 on the duplicate circuit 7031 or second on this signal first.

For example, the value that keeps at upper preferential FF7029 is in 0 situation, and third selector 7026 outputs to the second duplicate circuit 7032 with signal when decoding COPY UP2 order, and second selector 7025 is output signal not.On second on the duplicate circuit 7032 and above-mentioned first action of duplicate circuit 7031 similarly move, because the value counter-rotating that upper preferential FF7029 keeps becomes 1, therefore follow-up COPY UP1 order is corresponding to reference position on second, COPY UP2 order is corresponding to reference position on first in addition.

Command decode circuit 7024 also similarly moves with above-mentioned COPY UP1 order and COPY UP2 order in the situation that the COPY LEFT1 that decoded orders and COPY LEFT2 order.

When command decode circuit 7024 decoding RAW order, 8 bit data of decode successive, and signal outputed to initial data output circuit 7036.8 bit data that initial data output circuit 7036 will receive intactly output to print engine 514 as decoded data.The address of Current Address Register 7037 output expression current locations, line buffer 7035 is saved in this address with decoded data.Then, remain on respectively on first the inside of duplicate circuit 7032, the first left duplicate circuit 7033 and the second left duplicate circuit 7034 on the duplicate circuit 7031, second, the address of the address of duplicating position, expression the first left duplicating position and represent the address of the second left duplicating position in the address of duplicating position, the expression second in the expression first, and increase is counted in the address of the expression current location that keeps of Current Address Register 7037.

After command decode circuit 7024 decoding EOB order, digit counter 7023 carries out the processing of byte boundary alignment as previously mentioned, simultaneously upper preferential FF7029 and left preferential FF7030 is initialized as initial value, and for example 0.

In addition, remain on respectively on first the inside of duplicate circuit 7032, the first left duplicate circuit 7033 and the second left duplicate circuit 7034 on the duplicate circuit 7031, second, the address of the address of duplicating position, expression the first left duplicating position and represent the address of the second left duplicating position in the address of duplicating position, the expression second in the expression first, and the address of the expression current location of Current Address Register 7037 maintenances, be set as the initial value that uses based on passed through in advance the specified position of compression parameters specified command by control circuit 515.

In addition, because line buffer 7035 moves as toroidal memory, remaining on respectively duplicate circuit 7031 on first, duplicate circuit 7032 on second, the first left duplicate circuit 7033 and the second left duplicate circuit 7034 inside, the address of duplicating position in the expression first, the address of duplicating position in the expression second, represent the address of the first left duplicating position and the address of expression the second left duplicating position, and the address of the expression current location that keeps of Current Address Register 7037 is in the situation of end address of line buffer 7035, carries out the initial address that line buffer 7035 is preserved in wraparound when increasing because of counting.

According to above explanation, with the image processing apparatus of bringing into play function as the picture coding device in this form of implementation, picture decoding apparatus, with reference to being encoded in the situation than the reference position of long codes, because the corresponding relation by transposing reference position and coding, just can be afterwards with reference to being encoded to shorter code during this reference position, so no matter the cycle of data how can both compress expeditiously.

In addition, in the cycle of the view data situation different from the cycle of dither matrix, have and to pay close attention to the position contiguous, and and the high tendency of correlation of the approximate position that calculation was suitable for of the calculation that is applicable to pay close attention to the position when processing of losing lustre.Because such position is limited to the position of minority, in addition by checking in advance dither matrix or obtaining statistics with various view data in advance and just can determine, therefore show the position in cycle of battle array by space jitter from such position and only and to select in advance a plurality of positions as reference position, no matter how the cycle of view data can both encode effectively.

In addition, the cycle that view data is arranged is constant tendency on a large scale.Therefore, in the consistent situation of data on the reference position of low priority, later on also high in the consistent possibility of the data of this reference position.Therefore, by when having exported the code of growing of the reference position of identifying low priority, improving the priority of this reference position identifies with shorter code from now on, after this in the situation that on this reference position data consistent the coding exported just shorten, so compare with the situation of not carrying out the transposing of priority, just can effectively encode.

In addition, although in implementing form of implementation, the priority level of changing 2 reference position also can replace this and the priority level of changing at least 3 reference position.

As described above, utilize the present invention, when the view data that is arranged with background patterns to having periodic image, particularly wallpaper etc. is encoded, just can be more at high speed, and compress whole image with high compression rate more.

Utilize in addition the present invention, can reduce the wallpaper of having encoded etc. is arranged with the circuit scale of the decoding circuit that the coding of the image of background patterns decodes, and need not a large amount of buffer storage, the decoding that just can consist of with low cost.

In addition as above at length be illustrated, utilize the present invention, in the situation consistent with the image data sequence of front, utilize this redundancy to obtain high compression ratio, even the while in the few situation of the consistent part of image data sequence, also can do one's utmost to restrain the reduction of compression ratio.

In addition as above at length be illustrated, in the present invention, because except paying close attention to left side and the top of position, also encode with reference to the same position of prevpage, even the image low with the correlation of the reference position of left side and top, use the situation of same background patterns etc. at follow-up page or leaf, when the high image of the correlation of coding and prevpage, can compress expeditiously.

In addition, in the present invention, because the view data of prevpage that should reference is encoded and kept, compare with the situation that intactly keeps view data, memory that just can enough more low capacities keeps the view data of prevpage.

In addition, the explanation according to above utilizes the present invention, just can particularly come coded image with short code expeditiously.

Claims

1. the image processing apparatus that the image of having encoded is decoded is characterized in that, comprising:

Save set is preserved the predetermined line number of decoded pixel sequences;

The first decoding device is decoded to the order that is included in the coded data; And

The second decoding device, read pixel sequences according to the order of being decoded by above-mentioned the first decoding device from above-mentioned save set, the pixel sequences that reads is saved in above-mentioned save set, simultaneously the pixel sequences that reads is outputed to predetermined buffer successively, and then, under the order of being decoded by above-mentioned the first decoding device is situation about the order of the line direction of image, according to the periodic change of the pattern of above-mentioned image from position that above-mentioned save set reads

Wherein above-mentioned the second decoding device also comprises,

The 1st command decode device, that the row also in the situation of the order of the pixel sequences in up the row that is included in the ratio decoder object is read in expression in the order that above-mentioned the first decoding device has been decoded, read the data of the position that is arranged in the pixel that above-mentioned save set decodes, these data are outputed to above-mentioned predetermined buffer successively;

The 2nd command decode device, in the situation of the expression order of reading the pixel sequences in the row that is included in decoder object in the order that above-mentioned the first decoding device has been decoded, read the data that are arranged in the position that above-mentioned save set moves according to the above-mentioned cycle from the position of the pixel of decoding, the data of perhaps being exported by deferred mount, output to the position of the pixel of decoding in the above-mentioned save set, simultaneously these data are outputed to successively above-mentioned predetermined buffer;

The 3rd command decode device, in the situation of order of pixel of expression decoder object in the order that above-mentioned the first decoding device has been decoded, the data of this order of expression are outputed to the position of the pixel of decoding in the above-mentioned save set, simultaneously these data are outputed to successively above-mentioned predetermined buffer; And

The 4th command decode device is that the length that this order is represented is saved in above-mentioned predetermined buffer in the situation of order of length of the expression pixel sequences that will read in the order that above-mentioned the first decoding device has been decoded.