CN101277573B - 静电放电防护电路及其制造方法 - Google Patents
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Abstract
本发明提供一种静电放电防护电路及其制造方法。该静电放电防护电路包括一硅基板、一铁薄膜、一碳纳米管层及一透明遮罩,该铁薄膜及该碳纳米管层依次层叠设置于该硅基板表面,该透明遮罩收容该铁薄膜及该碳纳米管层并与该硅基板密封,该透明遮罩的内表面涂覆有荧光粉。
Description
技术领域
本发明涉及一种静电放电防护电路及其制造方法。
背景技术
静电放电(Electro Static Discharge,ESD)是造成大多数电子元件或者电子系统受到过度电性应力(Electrical Overstress,EOS)破坏的主要因素。静电放电可能会对半导体元件等形成永久性的毁坏,因此影响集成电路的电路功能,使得电子产品工作不正常。而静电放电的产生,一般在于电子元件或系统在制造、生产、组装、测试、存放或搬运过程中,静电会累积在人体、仪器或储放设备内,甚至电子元件本身也会有静电的积累。当人体、仪器或储放设备与电子元件之间接触时,将会形成一静电放电路径,使得电子元件或系统遭到不可预期的损害。为了防护静电放电电流对电子元件所造成的损害,采用静电放电防护电路(Electro Static Discharge Protection Circuit)得以实现。
请参阅图1,其是一种现有技术具有传统静电放电防护电路的液晶显示器的示意图。该液晶显示器1包括具有一定间距平行分布的多条扫描线12、与该扫描线12垂直且相互平行分布的多条数据线13。图中虚线区域11为显示区域,该显示区域11周边分布有公共电极14。每一扫描线12与公共电极14之间及每一数据线13与公共电极14之间均设置有一静电放电防护电路10。
请参阅图2,其是图1所示液晶显示器的静电放电防护电路示意图。该静电放电防护电路10设置于一第一电源线101及一第二电源线102之间。该第一电源线101及该第二电源线102可为图1中的扫描线12与公共电极14,或者数据线13与公共电极14。该静电放电防护电路10包括一静电放电电路110、一第一控制电路120及一第二控制电路130。该第二控制电路130与第一控制电路120串联,该第一控制电路120包括一场效晶体管121,该场效晶体管121的栅极及漏极相连,该第二控制电路130包括一场效晶体管131,该场效晶体管131的栅极及漏极相连。该静电放电电路110包括一场效晶体管111,该场效晶体管111的源极与该场效晶体管121的栅极及漏极相连,并且一并连接至该第一电源线101,该场效晶体管111的漏极与该场效晶体管131的栅极及漏极相连,并且一并连接至该第二电源线102,该场效晶体管111的栅极与该场效晶体管121及该场效晶体管131的源极相连。
当该第一电源线101与第二电源线102之间电位差超过第一控制电路120或第二控制电路130所设定的电位差时,该场效晶体管111开启,电荷通过该场效晶体管111释放。因此,无论是来自外界的静电电压或者电子元件本身的瞬间静电高压都可由静电放电防护电路10进行电荷释放。
但是,该静电放电防护电路10存在如下缺点:其进行电荷释放时无显示信息,因此无法确定发生静电放电的时间点。
发明内容
为了解决现有技术中静电放电防护电路10在进行电荷释放时无显示信息的问题,有必要提供一种具有显示功能的静电放电防护电路。
同时有必要提供一种上述静电放电防护电路的制造方法。
一种静电放电防护电路,其包括一硅基板、一铁薄膜、一碳纳米管层及一透明遮罩,该铁薄膜及该碳纳米管层依次层叠设置于该硅基板表面,该透明遮罩收容该铁薄膜及该碳纳米管层并与该硅基板密封,该透明遮罩的内表面涂覆有荧光粉。
一种静电放电防护电路的制造方法,其包括以下步骤:提供一硅基板;应用物理气相沉积法于该硅基板的表面沉积一铁薄膜;依所需静电放电防护电路的形状,对该铁薄膜进行蚀刻图案化;应用化学气相沉积法于该铁薄膜上形成碳纳米管层;切割该硅基板,使切割后的每一块硅基板均包括一铁薄膜及一碳纳米管层;提供一透明遮罩;在透明遮罩内表面沉积涂布荧光粉,然后将该透明遮罩与硅基板密封。
一种静电放电防护电路的制造方法,其包括以下步骤:提供一硅基板;于该硅基板的一表面上重掺杂施主元素磷或砷,形成施主掺杂层;于该施主掺杂层表面应用物理气相沉积法沉积铝金属层以形成该铝薄膜;应用物理气相沉积法于该硅基板的另一表面上沉积一铁薄膜;依所需静电放电防护电路的形状,对该铁薄膜进行蚀刻图案化;应用化学气相沉积法于该铁薄膜上形成碳纳米管层;切割该硅基板,使切割后的每一块硅基板均包括一铁薄膜及一碳纳米管层;提供一透明遮罩;在透明遮罩内表面沉积涂布荧光粉,然后将该透明遮罩与硅基板密封。
与现有技术相比,本发明静电放电防护电路将瞬间打进来的高压静电利用场发射效应释放掉,利用场发射效应激发出可见光,静电放电能量转换为光能量,同时能得知何时发生高压静电放电,即可以利用软件监控静电放电发生的时间点,进而追查静电放电发生的原因,以改善静电放电所带来的伤害。
附图说明
图1是一种现有技术具有传统静电放电防护电路的液晶显示器的示意图。
图2是图1所示液晶显示器的静电放电防护电路示意图。
图3是本发明静电放电防护电路的第一实施方式的剖面示意图。
图4是本发明静电放电防护电路的第二实施方式的剖面示意图。
具体实施方式
请参阅图3,其是本发明静电放电防护电路的第一实施方式的剖面示意图。该静电放电防护电路20包括一硅基板201、一铁薄膜202、一碳纳米管层203及一透明遮罩204。该铁薄膜202及该碳纳米管层203依次层叠设置于该硅基板201表面,该铁薄膜202及该碳纳米管层203的面积略小于该硅基板201的面积,该碳纳米管层203是由若干沉积于该铁薄膜202表面的奈米碳管构成。该透明遮罩204收容该铁薄膜202及该碳纳米管层203并与该硅基板201密封,该透明遮罩204的表面呈弧形,该透明遮罩204的内表面均匀涂覆有荧光粉205。
该静电放电防护电路20可在液晶显示器中使用,尤其适合在液晶显示器的制造过程中使用,例如阵列制程(Array)及模组制程(Module)等等。在使用时,只需将有静电产生的部位与该静电放电防护电路20电连接即可。
当液晶显示器在使用或制造过程中有静电产生且静电放电发生时,这些静电放电发生的部位将瞬间产生的高压打到静电放电防护电路20,激发电子束(Electron Beam)从奈米碳管尖端场发射(Field Emission),轰击荧光粉205使其发出可见光,电子束紫外线能量转换成可见光能量,静电放电能量因而释放。并且可利用软件监控记录静电放电发生的时间点,追查静电放电发生的原因,进而改善静电放电所带来的伤害。由于场发射需达到一定的阈值电压(Threshold Voltage)才会发生,因此平时状态并不会发生场发射,也不会发出可见光。
请参阅图4,其是本发明静电放电防护电路的第二实施方式的剖面示意图。该静电放电防护电路30与第一实施方式的静电放电防护电路20大致相同,其区别在于:该硅基板201与该铁薄膜202相背的另一表面上依次层叠设置一施主掺杂层307及一铝薄膜308,该铝薄膜308及该施主掺杂层307与该硅基板201的面积相同。该施主掺杂层307及该铝薄膜308起到了降低该硅基板201的电阻值的作用,因此该第二实施方式的静电放电防护电路30的阈值电压低于第一实施方式。
该第一实施方式的静电放电防护电路20的制造方法包括以下步骤:
步骤a:提供一硅基板201。
步骤b:应用物理气相沉积法于该硅基板201的表面沉积一铁薄膜202。
步骤c:依所需静电放电防护电路20的形状,对该铁薄膜202进行蚀刻图案化。
步骤d:应用化学气相沉积法于该铁薄膜202上通入甲烷(CH4)、氢气(H2)及氮气(N2)。有以下化学反应发生:CH4+H2=C+3H2,反应生成的碳元素于该铁薄膜202表面上生长成为若干奈米碳管,最后形成碳纳米管层203。氮气的作用是增大化学反应速度及保证奈米碳管生长过程中具有良好的取向性。
步骤e:切割该硅基板201,使切割后的每一硅基板201均包括一铁薄膜202及一碳纳米管层203。
步骤f:提供一透明遮罩204,该透明遮罩204为塑料射出透明遮罩或玻璃加热冲压透明遮罩。该透明遮罩204的表面呈弧形。
步骤g:在该透明遮罩204的内表面沉积涂布荧光粉205,然后将该透明遮罩204与该硅基板201密封。
该第二实施方式的静电放电防护电路30的制造方法与上述步骤大致相同,其区别在于:在步骤a与步骤b之间还包括以下步骤:
步骤h:于该硅基板201的一表面上重掺杂磷或砷等施主元素,形成施主掺杂层307。
步骤i:于该施主掺杂层307表面应用物理气相沉积法沉积铝金属以形成铝薄膜308,使得该铝薄膜308与该硅基板201实现欧姆接触。
其中,步骤b中该铁薄膜202沉积在该硅基板201的另一表面上。
与现有技术相比,本发明静电放电防护电路20、30将瞬间打进来的高压静电利用场发射效应释放掉。利用场发射效应激发出可见光,静电放电能量转换为光能量,从而能得知何时发生高压静电放电,即可以利用软件监控静电放电发生的时间点,进而追查静电放电发生的原因,以改善静电放电所带来的伤害。
该铁薄膜202也可用其它催化层代替,如钴薄膜或镍薄膜等。
Claims (10)
1.一种静电放电防护电路,其特征在于:该静电放电防护电路包括一硅基板、一催化层、一碳纳米管层及一透明遮罩,该催化层及该碳纳米管层依次层叠设置于该硅基板表面,该透明遮罩收容该催化层及该碳纳米管层,并与该硅基板密封,该透明遮罩的内表面涂覆有荧光粉。
2.如权利要求1所述的静电放电防护电路,其特征在于:该催化层为铁薄膜、钴薄膜或镍薄膜之一。
3.如权利要求1所述的静电放电防护电路,其特征在于:该透明遮罩的表面呈弧形。
4.如权利要求1所述的静电放电防护电路,其特征在于:该透明遮罩为塑料射出透明遮罩或玻璃加热冲压透明遮罩。
5.如权利要求1所述的静电放电防护电路,其特征在于:该催化层及该碳纳米管层的面积小于该硅基板的面积。
6.如权利要求1所述的静电放电防护电路,其特征在于:该硅基板与该催化层相背的另一表面依次层叠设置一施主掺杂层及一铝薄膜。
7.如权利要求6所述的静电放电防护电路,其特征在于:该铝薄膜及该施主掺杂层与该硅基板的面积相同。
8.一种静电放电防护电路的制造方法,其包括以下步骤:
步骤a:提供一硅基板;
步骤b:应用物理气相沉积法于该硅基板的表面沉积一催化层;
步骤c:依所需静电放电防护电路的形状,对该催化层进行蚀刻图案化;
步骤d:应用化学气相沉积法于该催化层上形成碳纳米管层;
步骤e:切割该硅基板,使切割后的每一块硅基板均包括一催化层及一碳纳米管层;
步骤f:提供一透明遮罩;
步骤g:在透明遮罩内表面沉积涂布荧光粉,然后将该透明遮罩与硅基板密封。
9.一种静电放电防护电路的制造方法,其包括以下步骤:
步骤a:提供一硅基板;
步骤b:于该硅基板的一表面上重掺杂施主元素磷或砷,形成施主掺杂层;
步骤c:于该施主掺杂层表面应用物理气相沉积法沉积铝金属层以形成该铝薄膜;
步骤d:应用物理气相沉积法于该硅基板的另一表面上沉积一催化层;
步骤e:依所需静电放电防护电路的形状,对该催化层进行蚀刻图案化;
步骤f:应用化学气相沉积法于该催化层上形成碳纳米管层;
步骤g:切割该硅基板,使切割后的每一块硅基板均包括一催化层及一碳纳米管层;
步骤h:提供一透明遮罩;
步骤i:在透明遮罩内表面沉积涂布荧光粉,然后将该透明遮罩与硅基板密封。
10.如权利要求9所述的静电放电防护电路的制造方法,其特征在于:该铝薄膜及该施主掺杂层与该硅基板的面积相同。
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