CN101271845B - Method for improving stability of MOS device threshold voltage - Google Patents
Method for improving stability of MOS device threshold voltage Download PDFInfo
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- CN101271845B CN101271845B CN2007100382218A CN200710038221A CN101271845B CN 101271845 B CN101271845 B CN 101271845B CN 2007100382218 A CN2007100382218 A CN 2007100382218A CN 200710038221 A CN200710038221 A CN 200710038221A CN 101271845 B CN101271845 B CN 101271845B
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Abstract
The invention provides a method for improving the stability of valve value voltage of an MOS device, relating to a manufacturing process of a semiconductor device. The valve value stability of the MOS device which adopts the existing disposal method is reduced after a high temperature disposal (simulation of practical applied environment); the reliability of the product is severely affected by the unstability. The method of the invention for improving the stability of valve value voltage of the MOS device comprises an alloying step of the MOS device after the fabrication of the MOS device is completed; wherein, the method carries out twice alloying steps to the MOS device. Preferably, a step that the MOS device is cooled under the normal temperature is also included between the twice alloying steps. When the method of the invention is adopted, the shifting quantity of the valve value voltage of the MOS device under the practical working environment is reduced, thus improving the stability of the performance of the device.
Description
Technical field
The present invention relates to process for fabrication of semiconductor device, relate in particular to a kind of method of the MOS of raising device threshold voltage stability.
Background technology
Metal-oxide semiconductor (MOS) (Metal Oxide Semiconductor, MOS) device is very extensive in the application in each field, the threshold voltage of a MOS device (threshold voltage, Vt) stability is to estimate the important indicator of its performance quality, threshold voltage vt is more little with the drift that the variation of physical condition produces, and then the performance of MOS device is reliable more.
Owing to make the MOS device that finishes, there is the dangling bonds of some free states in its surface, and under actual application environment, along with the variation of physical condition, these dangling bonds will cause the decline of threshold voltage vt stability.Therefore, in wafer manufactory, need carry out high-temperature process, simulate actual application environment, with the stability of test threshold voltage Vt under actual working environment to the MOS device that making finishes.Its testing procedure is as follows: test initial Vt value earlier, be designated as Vt (0); Then, MOS device to be measured is put into high temperature furnace, under 150 ℃ high temperature, cured 168 hours; And then test Vt value, be designated as Vt (168), then Vt drift value Vtshift can calculate with following formula:
Vtshift＝[Vt(168)-Vt(0)]/Vt(0)
Vtshift is more little for the Vt drift value, illustrates that the job stability of MOS device is good more, and reliability is high more; As Vtshift during greater than a certain predetermined value, this MOS component failure then, its performance is undesirable.
Usually, after finishing the MOS element manufacturing, need to carry out the stability that an alloying (alloy) step is improved device.This alloying step mainly is that the MOS device is placed under the hot environment, and feed the mist of hydrogen, nitrogen, hydrogen ion is combined with the dangling bonds of free state in the device, form stable morphology, simultaneously, discharge the stress between device and each layers such as metal level, metal level and conductor layer, thereby improve the degree of stability of device.
Yet, the MOS device that adopts existing method to handle, the stability of its threshold voltage is not high, and especially for 0.13 micron system, its Vt drift value has had a strong impact on the yield of product up to 12～14%.Therefore, need a kind of method to improve the stability of MOS device threshold voltage.
Summary of the invention
The object of the present invention is to provide a kind of method of the MOS of raising device threshold voltage stability, reducing the drift value of MOS device threshold voltage under actual working environment, thereby improve the stability of device performance.
To achieve the above object, the invention provides a kind of method of the MOS of raising device threshold voltage stability, be included in finish the MOS element manufacturing after, the MOS device is carried out the alloying step, described alloying step is that the MOS device is placed high temperature furnace pipe about 400 ℃, and feed the mist of hydrogen, nitrogen, hydrogen ion is combined with the dangling bonds of free state in the MOS device, form stable morphology, simultaneously, discharge the stress between MOS device and metal level, metal level and the conductor layer, wherein, described method is carried out the alloying step twice to the MOS device.
In the method for above-mentioned raising MOS device threshold voltage stability, also comprise the step that allows the MOS device cool off between described twice alloying step, and described cooling step carries out at normal temperatures.
In the method for above-mentioned raising MOS device threshold voltage stability, in the alloying step, add the mist of hydrogen and nitrogen, make MOS device and described mixed gas reaction.
The present invention improves the combination degree of hydrogen ion and device surface dangling bonds, and effectively discharges inter-laminar stress by the MOS device that completes is carried out the alloying step twice, and the degree of stability of MOS device threshold voltage is improved greatly.
Embodiment
Below will the method for raising MOS device threshold voltage stability of the present invention be described in further detail.
Method of the present invention mainly is after finishing the MOS element manufacturing, and the MOS device is carried out the alloying step twice.This alloying step can be carried out in the high temperature furnace pipe about 400 ℃, in alloying process, in boiler tube, feed the mist of hydrogen and nitrogen, fully react with device, hydrogen ion is combined with the dangling bonds of device surface free state, thereby form stable morphology, simultaneously, discharge inter-laminar stress, improve the stability of device.
Between twice alloying step, also comprise a normal temperature cooling step, make the MOS device in the past get back to the normal temperature state in the hot environment of an alloying step, carry out a back alloying step again.Compare with the time that merely prolongs the alloying step first time, adopt the method can shorten the reaction time of alloying step each time, and can reach more obvious effect.Experimental result shows, adopts method of the present invention, compared with prior art, can make the threshold voltage shift amount of MOS device reduce 1～1.5%, has improved the reliability of device and the yield of product greatly.
Claims (3)
1. method that improves MOS device threshold voltage stability, be included in finish the MOS element manufacturing after, the MOS device is carried out the alloying step, described alloying step is that the MOS device is placed high temperature furnace pipe about 400 ℃, and feed the mist of hydrogen, nitrogen, hydrogen ion is combined with the dangling bonds of free state in the MOS device, form stable morphology, simultaneously, discharge the stress between MOS device and metal level, metal level and the conductor layer, it is characterized in that: described method is carried out the alloying step twice to the MOS device.
2. the method for raising MOS device threshold voltage stability as claimed in claim 1 is characterized in that: also comprise the step that allows the MOS device cool off between described twice alloying step.
3. the method for raising MOS device threshold voltage stability as claimed in claim 2, it is characterized in that: described cooling step carries out at normal temperatures.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007100382218A CN101271845B (en) | 2007-03-20 | 2007-03-20 | Method for improving stability of MOS device threshold voltage |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2007100382218A CN101271845B (en) | 2007-03-20 | 2007-03-20 | Method for improving stability of MOS device threshold voltage |
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| Publication Number | Publication Date |
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| CN101271845A CN101271845A (en) | 2008-09-24 |
| CN101271845B true CN101271845B (en) | 2010-04-21 |
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| CN2007100382218A Active CN101271845B (en) | 2007-03-20 | 2007-03-20 | Method for improving stability of MOS device threshold voltage |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109270423B (en) * | 2018-10-03 | 2020-11-20 | 大连理工大学 | Evaluation test method for low-temperature stability of SiC MOSFET device |
| CN111128873B (en) * | 2019-12-30 | 2022-04-22 | 广州粤芯半导体技术有限公司 | Wafer surface metal alloying treatment method |
| CN111760270A (en) * | 2020-06-30 | 2020-10-13 | 歌尔科技有限公司 | Rocker drift processing method and device and related components |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4364779A (en) * | 1980-08-04 | 1982-12-21 | Bell Telephone Laboratories, Incorporated | Fabrication of semiconductor devices including double annealing steps for radiation hardening |
| US6316335B1 (en) * | 1998-10-19 | 2001-11-13 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating semiconductor device |
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2007
- 2007-03-20 CN CN2007100382218A patent/CN101271845B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4364779A (en) * | 1980-08-04 | 1982-12-21 | Bell Telephone Laboratories, Incorporated | Fabrication of semiconductor devices including double annealing steps for radiation hardening |
| US6316335B1 (en) * | 1998-10-19 | 2001-11-13 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating semiconductor device |
Non-Patent Citations (1)
| Title |
|---|
| JP特开2004-273699A 2004.09.30 |
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| CN101271845A (en) | 2008-09-24 |
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Inventor after: Zhang Ping Inventor after: Zeng Honglin Inventor after: Lu Feng Inventor after: Zhang Buxin Inventor before: Zhang Ping Inventor before: Zeng Honglin Inventor before: Lu Feng Inventor before: Zhang Buxin |