CN101271435B - Method for access to external memory - Google Patents
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Abstract
The present invention discloses a method for visiting an external storage device. The present invention displays the bandwidth priority attribute of the physical features of the external storage device by setting up and determines whether the visit authority of the current visit request is entitled or not according to the judgment of the bandwidth priority attribute of the physical features of the external storage device, thus increasing the efficiency of the device to visit the external storage device. The continuous data visit tries to be operated on the same line of the same block to the largest extent, thus greatly increasing the efficiency of continuous visit of the external storage device. When implementing the data transmission by the former request, the command and the address of the current visit request are parallelly sent out, thus reducing the time consumption of the transmission command delay; the time consumption of the bus switch is reduced by ensuring that the continuous data visit is writing or reading.
Description
Technical field
The present invention relates to the memory processes technology, refer to a kind of method of access external memory especially.
Background technology
In on-chip integration system (SoC), comprise that as a plurality of parallel processing functional modules such as processor, DMA, hardware accelerator, peripheral hardwares these functional modules can be visited chip external memory such as SDRAM, DDR storer etc. as required.
Because functional modules such as processor, DMA, hardware accelerator are independent operating separately, therefore in actual applications, the SDRAM storer might be visited simultaneously by a plurality of functional modules, but, physical characteristics according to the SDRAM storer, at synchronization, the SDRAM storer only allows to exist a read and write access.In order to address this problem, visit to external memory storage need be by bus arbiter unit according to certain selection strategy, the external memory access authority is authorized the request of access of some functional modules, the interim simultaneously request of access of hanging up other functional modules is up to handling the all-access request.Obviously, the working method of this mini system bandwidth of SDRAM has influenced the storage efficiency of storer.
In the SoC of complexity chip, the parallel processing functional module is more and more, and the calculation process ability of functional module is more and more stronger, and SDRAM memory stores efficient and system bandwidth become the bottleneck of SoC chip performance gradually.
The SDRAM memory bus is divided into data bus and address bus, and wherein, data bus is used to transmit the data of visit; Address bus is used to transmit the address of visit and the order of sending to the SDRAM storer.Accessing characteristic to the SDRAM storer is: the SDRAM storer is divided into piece (Bank) address with the address of visit, row (row) address and row (column) address.During each access sdram storer, need earlier the piece precharge (pre charge) at reference address place is activated the row at (active) reference address place again, could visit out this reference address place storage unit according to column address then.That is to say, during each access sdram storer, if do not have precharge bank and activate row, must be by processings that say the word on the address bus, and then send column address by address bus, wait for certain hour after, transmit data by data bus again.
If the Bank at reference address place is recharged and does not close, can save piece pre charge step, thereby save the time of piece pre charge.If the Bank at reference address place has been recharged and the row at this place, address is activated, can save the time of capable active.
And, the general multiplexing same data bus of the input and output of SDRAM storer, promptly data bus is two-way.When the execution interval read-write operation, SDRAM needs extra time overhead to switch bus.
In sum, because the device physics characteristic of SDRAM storer, the delay of access sdram storer also comprises piece pre charge except the SDRAM internal data transfer postpones, row active and the two-way switching delay of bus.
At present, bus arbiter unit among the general SoC is the module priority according to priority request order or main equipment, from the request of a plurality of main equipments, arbitrate out a certain request and directly give the SDRAM storer, do not consider the distinctive lag characteristic of SDRAM storer self.And externally in the SoC chip of equipment such as complexity the parallel function module more and more, under the more and more stronger situation of the calculation process ability of functional module, the low storage efficiency of SDRAM storer self has directly seriously reduced the access efficiency of external unit.
Summary of the invention
In view of this, fundamental purpose of the present invention is to provide a kind of method of access external memory, can improve the efficient of device access external memory storage by improving the storage efficiency of external memory storage self.
For achieving the above object, technical scheme of the present invention specifically is achieved in that
A kind of method of access external memory comprises:
A., the bandwidth priority attribute and the module priority attribute that embody external memory storage self physical characteristics are set; Judge whether there is the request of access that satisfies the bandwidth priority attribute in the current accessed request,, then enter step B if exist; Otherwise enter step C;
B. according to the bandwidth priority attribute access privileges is set, and the highest request of access access rights of granted access priority, process ends;
C. according to the module priority attribute access privileges is set, and the highest request access rights of granted access priority, process ends.
Described bandwidth priority attribute comprises:
Activate address properties, be used to represent that external memory storage finished precharge block address, with and the row address that has been activated;
And/or the block address attribute, be used to the block address of representing that last request of access is visited;
And/or the read-write state attribute, be used to the read-write state of representing that last request of access is visited.
When described bandwidth priority attribute included the activation address properties, the method for judging described in the steps A was:
Judge whether exist in the current accessed request and precharge block address of current external memory storage and the identical request of row address that activated,, judge that then this request of access is to satisfy the request of access of bandwidth priority attribute if having.
When described bandwidth priority attribute included the block address attribute, the method for judging described in the steps A was:
Judge whether exist in the current accessed request and the preceding once different request of block address of visit,, judge that then this request of access is to satisfy the request of access of bandwidth priority attribute if having.
When described bandwidth priority attribute included the read-write state attribute, the method for judging described in the steps A was:
Judge whether there be the request identical in the current accessed request,, judge that then this request of access is to satisfy the request of access of bandwidth priority attribute if having with the read-write state of last visit.
Described bandwidth priority attribute comprises location attribute, block address attribute and read-write state attribute actively, and the method for judging described in the steps A is:
A1. judge whether exist in the current accessed request and precharge block address of current external memory storage and the identical request of row address that activated,, then enter step B if having; Otherwise, enter steps A 2;
A2. judge whether exist in the current accessed request and the preceding once different request of block address of visit,, then enter step B if having; Otherwise enter steps A 3;
A3. judge whether there be the request identical in the current accessed request,, then enter step B if having with the read-write state of last visit; Otherwise enter step C.
Described step B specifically comprises: the request of access that satisfies the bandwidth priority attribute is set to the highest access privileges, gain access.
Described step C specifically comprises: the request of access that module priority is the highest is set to the highest access privileges, gain access.
This method also comprises: preserve current request of access of failing gain access.
The method of described preservation is: for described each request of access of failing gain access is adjusted memory priority level and storage;
When external memory storage is idle,, select the highest request of access gain access of memory priority level according to memory priority level through adjusted each request of access.
Described memory priority level is arranged in the memory priority level register;
Described memory priority level register comprises with piece colleague territory, different fast territory, with read-write state territory and module priority territory; Wherein,
With piece colleague territory, be used to represent whether precharge block address of request of access and current external memory storage and the row address that has activated be all identical;
The different masses territory is used to represent whether the block address of request of access is different with the block address of preceding once visit;
With the read-write state territory, be used to represent request of access read-write state whether identical with the read-write state of last visit.
When existing a plurality of described memory priority levels to equate and all being in current limit priority, select one of them request of access gain access by the hardware link position.
As seen from the above technical solution, the present invention is by being provided with the bandwidth priority attribute that embodies external memory storage self physical characteristics, and whether give the access rights of current accessed request according to the bandwidth priority determined property decision that has embodied external memory storage self physical characteristics, improved the efficient of device access external memory storage: make continuous data access drop on the same same row most possibly as far as possible, greatly improved the efficient of connected reference external memory storage; When data transmission was carried out in a last request, the order expense of transmitting time delay had been reduced in parallel order and address of sending the current accessed request; By guaranteeing that continuous data access all is to read or write, reduced the time overhead that bus is switched.
Description of drawings
Fig. 1 is the process flow diagram of access external memory of the present invention;
Fig. 2 is the process flow diagram of the embodiment of access external memory of the present invention.
Embodiment
For making purpose of the present invention, technical scheme and advantage clearer, below with reference to the accompanying drawing preferred embodiment that develops simultaneously, the present invention is described in more detail.
Bus arbiter unit is preserved precharge of current external memory storage, the row that has activated, the preceding once block address of visit at any time, and the preceding once read-write state equiband priority attribute of visit.These bandwidth priority attributes have embodied external memory storage self physical characteristics.For convenience of description, be that SDRAM is that example is described with the external memory storage below.
Wherein, precharge of current SDRAM represents that current SDRAM piece has been in the state that precharge finishes.If the current accessed request is this piece of visit, can save expense precharge time;
The row that current SDRAM has activated is represented the capable state that has been in activation of current SDRAM, and the piece at this row place also is in the state that precharge finishes.If the current accessed request is this row of visit, can save precharge time and line activating time overhead;
Before the block address of visit once, represent the block address that a last request of access is visited.If the block address of current accessed request visit is different with a last request visit, can be when data transmission be carried out in a last request, precharge time like this, can be saved, line activating and send out the time overhead of address in parallel order and address of sending the current accessed request;
Before once the visit read-write state, represent that a last request of access is read operation or write operation.If it is identical with last request of access that the read-write of current accessed request requires, and is read operation such as last request of access promptly, requiring current request of access so also is read operation.Can save the time overhead that bidirectional bus switches so.
In addition, bus arbiter unit also is provided with the module priority attribute, and this module priority attribute is used for the priority of representation module itself, and such as when carrying out processor active task, module priority attribute that can processor is set to limit priority; When carrying out data storage, module priority attribute that can peripheral hardware is set to limit priority etc., and the module priority attribute can pass through software arrangements.
Need to prove that above-mentioned bandwidth priority attribute can only write down one, it is individual perhaps to write down combination in any, perhaps whole records.
Fig. 1 is the process flow diagram of access external memory of the present invention, as shown in Figure 1, may further comprise the steps:
Step 100: bandwidth priority attribute and module priority attribute are set.
In bus arbiter unit, the functional module of corresponding each access external memory all has configuration register separately, can be by the module priority attribute of each functional module of software arrangements;
In addition, in the bus arbiter unit, set in advance one group and activated address (Active Address) register, block address (Last Bank) register and a read-write state (Last Write) register, be respectively applied for the bandwidth priority attribute that storage embodies external memory storage self physical characteristics.
Wherein, the number of registers is identical with the number of the piece of external memory storage in one group of activation address register, what each activated that address register is used to preserve some external memory storages such as SDRAM finishes precharge block address, with and the row address that has been activated, will activate the bandwidth priority attribute of storing in the address register herein and be called the activation address properties;
The block address register is used to preserve the block address that last request of access is visited; The bandwidth priority attribute of storing in the block address register is called the block address attribute herein;
The read-write state register is used to preserve the read-write state that last request of access is visited, and the bandwidth priority attribute of storing in the read-write state register is called the read-write state attribute herein;
Step 101: judge whether there is the request of access that satisfies the bandwidth priority attribute in the current request of access,, then enter step 102 if exist; Otherwise enter step 103.
Judge whether that the method that satisfies the bandwidth priority attribute comprises:
(1) at first judges whether exist in the current accessed request and current external memory storage such as the precharge block address of SDRAM and the identical request of row address that activated,, judge that then this request is for satisfying the request of access of bandwidth priority attribute if having;
(2) if condition (1) does not satisfy, judge whether exist in the current accessed request and the preceding once different request of block address of visit, if having, judge that then this request is for satisfying the request of access of bandwidth priority attribute;
(3) if condition (1) and condition (2) all do not satisfy, judge whether there be the request identical in the current accessed request,, judge that then this request is for satisfying the request of access of bandwidth priority attribute if having with the read-write state of last visit.
The realization of (1) point is found out easily from step 101, and the inventive method makes continuous data access drop on the same same row most possibly as far as possible, has greatly improved the efficient of connected reference external memory storage such as SDRAM.
Realization by (2) point is found out easily, the block address of current accessed request visit with on a request visit not simultaneously, by when data transmission is carried out in a last request, activate the piece and the promptly parallel order and the address of sending the current accessed request of row of request of access next time in advance, save precharge time, line activating and send out the time overhead of address, just reduced order expense time delay of transmission.
Realization by (3) point is found out easily, makes that continuous data access all is to read or write, and has reduced the time overhead that bus is switched.
Step 102: according to the bandwidth priority attribute access privileges is set, and the highest request access rights of granted access priority, process ends.
The request of access that satisfies the bandwidth priority attribute in the step 101 is set to the highest access privileges, gain access, that is to say this request will immediately apply for the visit SDRAM.
Step 103: according to the module priority attribute access privileges is set, and the highest request access rights of granted access priority, be specially the highest request of access of module priority and be set to the highest access privileges, gain access.
If the condition of (1)～(3) does not satisfy in the step 101, then according to the module priority attribute, select the highest request of access gain access of module priority, can apply for visit SDRAM.
Other request of access that does not satisfy bandwidth priority attribute and module priority attribute will be stored in the bus arbiter unit, and specific implementation sees also hereinafter.
It is emphasized that, in the step 101, as long as there is arbitrary condition judgment, can both reach the present invention by improving the storage efficiency of external memory storage self, improve the purpose of the efficient of device access external memory storage, and the combination in any of a Rule of judgment also can realize the object of the invention in the step 101, when three Rule of judgment in the step 101 all exist, can reach best effect.
Fig. 2 is the process flow diagram of the embodiment of access external memory of the present invention, the case of external storer is SDRAM, the bandwidth priority attribute comprises precharge of current SDRAM, the row that has activated, the preceding once block address of visit, and the preceding once read-write state of visit, as shown in Figure 2, may further comprise the steps:
Step 200: judge whether exist with the precharge piece in the current request of access and activated the request of capable identical address, if, then satisfy condition, enter step 203; Otherwise, enter step 204.
Step 201: judge whether exist in the current request of access and the preceding once block address request inequality of visit, if, then satisfy condition, enter step 203; Otherwise, enter step 204.
Step 202: judge whether exist in the current request of access and the preceding once identical request of read-write state of visit, if, then satisfy condition, enter step 203; Otherwise, enter step 204.
Step 203: the request of access that satisfies condition is set to the highest access privileges, and authorizes this request of access access rights, process ends.
Step 204: according to the module priority grant access rights of the module of request of access.
The present invention is by being provided with the bandwidth priority attribute that embodies external memory storage self physical characteristics, and whether give the access rights of current accessed request according to bandwidth priority determined property decision, improved the efficient of device access external memory storage: make continuous data access drop on the same same row most possibly as far as possible, greatly improved the efficient of connected reference external memory storage; When data transmission was carried out in a last request, the order expense of transmitting time delay had been reduced in parallel order and address of sending the current accessed request; By guaranteeing that continuous data access all is to read or write, reduced the time overhead that bus is switched.
If the request of access of functional module can't be at the current time gain access, these requests that this time can not obtain access right will be stored in the bus arbiter unit, so that send application when arbitrating next time.Its memory priority level is adjusted according to following method and is lined up:
The priority of each module adopts a multidigit memory priority level register to represent that its numerical value is big more, represents its priority big more.Priority is made up of 4 territories, promptly with piece colleague territory, different fast territory, with read-write state territory and module priority territory, as shown in table 1.
| Go together with piece | Different masses | Same read-write state | Module priority |
Table 1
Wherein, with piece colleague territory, be used to represent whether precharge block address of request of access and current external memory storage and the row address that has activated be all identical, when preserving in certain activation address register when the block address of request of access and row address, this territory is 1, otherwise is 0.This territory is in the most significant digit of adjusting back memory priority level, and when it was 1, the adjusted memory priority level of this request of access was the highest.
The different masses territory is used to represent whether the block address of request of access different with the block address of preceding once visit, the value of in the block address of request of access and block address register, preserving not simultaneously, this territory is 1, otherwise is 0.The different masses territory is in adjusts the time high-order of back priority, and all identical when same colleague territory of all-access request, and the different masses territory of a certain request of access is 1, and then the adjusted memory priority level of this request of access is the highest.
With the read-write state territory, be used to represent request of access read-write state whether identical with the read-write state of last visit, when the value of preserving in the read-write state of request of access and the read-write state register was identical, this territory was 1, otherwise is 0.Be in the 3rd high position of adjusting back priority with the read-write state territory, when the value in same colleague territory of all-access request and different masses territory is all identical, and the same read-write state territory of a certain request of access is 1, and then the adjusted memory priority level of this request of access is the highest.
Module priority territory is used for the priority of representation module itself, and the module priority of big more this module of expression of value in module priority territory is high more.With piece colleague territory, different masses territory with all identical condition in read-write state territory under, the module priority thresholding of request of access place module is big more, then the priority of the request of access of this module is the highest, and the adjusted memory priority level of the request of access of this module correspondence is the highest.
Bus arbiter unit is not externally handled new request of access during the memory access, when external memory storage is idle, arbitrate according to memory priority level through adjusted each request of access, the request of access gain access of the module that the numerical value of memory priority level register is the highest, if have the memory priority level of a plurality of modules to equate and all be in current limit priority, then select one of them by the hardware link position, promptly can be in advance according to bandwidth usage, the visit of external memory storage frequently spent etc. module is set identical priority is higher down in the memory priority level.Such as, for the CPU among the SoC, demoder and peripheral hardware such as USB, at video processing applications, the bandwidth maximum that demoder needs, the frequent access external memory of meeting, CPU takes second place, and USB compares minimum, therefore, can set in advance under CPU, the demoder situation identical with USB memory priority level, the priority that demoder obtains access rights is the highest, and CPU takes second place, and is USB at last.
The above is preferred embodiment of the present invention only, is not to be used to limit protection scope of the present invention, all any modifications of being made within the spirit and principles in the present invention, is equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (12)
1. the method for an access external memory is characterized in that, comprising:
A., the bandwidth priority attribute and the module priority attribute that embody external memory storage self physical characteristics are set; Judge whether there is the request of access that satisfies the bandwidth priority attribute in the current accessed request,, then enter step B if exist; Otherwise enter step C;
B. according to the bandwidth priority attribute access privileges is set, and the highest request of access access rights of granted access priority, process ends;
C. according to the module priority attribute access privileges is set, and the highest request access rights of granted access priority, process ends.
2. according to 1 described method, it is characterized in that described bandwidth priority attribute comprises:
Activate address properties, be used to represent that external memory storage finished precharge block address, with and the row address that has been activated;
And/or the block address attribute, be used to the block address of representing that last request of access is visited;
And/or the read-write state attribute, be used to the read-write state of representing that last request of access is visited.
3. method according to claim 1 is characterized in that, when described bandwidth priority attribute included the activation address properties, the method for judging described in the steps A was:
Judge whether exist in the current accessed request and precharge block address of current external memory storage and the identical request of row address that activated,, judge that then this request of access is to satisfy the request of access of bandwidth priority attribute if having.
4. method according to claim 1 is characterized in that, when described bandwidth priority attribute included the block address attribute, the method for judging described in the steps A was:
Judge whether exist in the current accessed request and the preceding once different request of block address of visit,, judge that then this request of access is to satisfy the request of access of bandwidth priority attribute if having.
5. method according to claim 1 is characterized in that, when described bandwidth priority attribute included the read-write state attribute, the method for judging described in the steps A was:
Judge whether there be the request identical in the current accessed request,, judge that then this request of access is to satisfy the request of access of bandwidth priority attribute if having with the read-write state of last visit.
6. method according to claim 1 is characterized in that, described bandwidth priority attribute comprises location attribute, block address attribute and read-write state attribute actively, and the method for judging described in the steps A is:
A1. judge whether exist in the current accessed request and precharge block address of current external memory storage and the identical request of row address that activated,, then enter step B if having; Otherwise, enter steps A 2;
A2. judge whether exist in the current accessed request and the preceding once different request of block address of visit,, then enter step B if having; Otherwise enter steps A 3;
A3. judge whether there be the request identical in the current accessed request,, then enter step B if having with the read-write state of last visit; Otherwise enter step C.
7. according to claim 1,3,4,5 or 6 described methods, it is characterized in that described step B specifically comprises: the request of access that satisfies the bandwidth priority attribute is set to the highest access privileges, gain access.
8. according to claim 1,3,4,5 or 6 described methods, it is characterized in that described step C specifically comprises: the request of access that module priority is the highest is set to the highest access privileges, gain access.
9. method according to claim 1 is characterized in that, this method also comprises: preserve current request of access of failing gain access.
10. method according to claim 9 is characterized in that, the method for described preservation is: for described each request of access of failing gain access is adjusted memory priority level and storage;
When external memory storage is idle,, select the highest request of access gain access of memory priority level according to memory priority level through adjusted each request of access.
11., it is characterized in that described memory priority level is arranged in the memory priority level register according to 10 described methods;
Described memory priority level register comprises with piece colleague territory, different masses territory, with read-write state territory and module priority territory; Wherein,
With piece colleague territory, be used to represent whether precharge block address of request of access and current external memory storage and the row address that has activated be all identical;
The different masses territory is used to represent whether the block address of request of access is different with the block address of preceding once visit;
With the read-write state territory, be used to represent request of access read-write state whether identical with the read-write state of last visit.
12. method according to claim 10 is characterized in that, when existing a plurality of described memory priority levels to equate and all being in current limit priority, selects one of them request of access gain access by the hardware link position.
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| CN101686151B (en) * | 2008-09-27 | 2011-11-02 | 华为技术有限公司 | Path protection method and system of service transport network |
| CN102104614A (en) * | 2009-12-22 | 2011-06-22 | 成都市华为赛门铁克科技有限公司 | Data access method and device |
| CN102135946A (en) * | 2010-01-27 | 2011-07-27 | 中兴通讯股份有限公司 | Data processing method and device |
| CN104375895B (en) * | 2013-08-13 | 2018-02-06 | 华为技术有限公司 | For the data storage dispatching method and device between multiple memorizers |
| CN106648440B (en) * | 2015-10-28 | 2020-07-24 | 华为技术有限公司 | Control method for operating storage device and storage device |
| CN113064550A (en) * | 2021-03-19 | 2021-07-02 | 珠海市一微半导体有限公司 | Control device and control method for shortening access time of external memory |
| CN115328822B (en) * | 2022-08-19 | 2023-05-05 | 扬州宇安电子科技有限公司 | DDR 3-based read-write control dynamic scheduling method and storage medium thereof |
| CN116662228B (en) * | 2023-06-16 | 2024-01-30 | 深圳市东方聚成科技有限公司 | Access method for time-division multiplexing local memory |
| CN117009088A (en) * | 2023-09-25 | 2023-11-07 | 上海芯高峰微电子有限公司 | Memory management method, memory management device, chip, electronic equipment and readable storage medium |
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