CN101266986A - Component separation structure for CMOS image sensor - Google Patents
Component separation structure for CMOS image sensor Download PDFInfo
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- CN101266986A CN101266986A CNA2007100380439A CN200710038043A CN101266986A CN 101266986 A CN101266986 A CN 101266986A CN A2007100380439 A CNA2007100380439 A CN A2007100380439A CN 200710038043 A CN200710038043 A CN 200710038043A CN 101266986 A CN101266986 A CN 101266986A
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- isolation structure
- image sensor
- cmos image
- well region
- transoid
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Abstract
The invention discloses an element isolation structure of a CMOS image sensor, the element comprises a transistor and a photoelectric diode. The novel isolation structure is the isolation structure using an inversed doping well region as the isolation structure among the elements. The invention can improve signal-to-noise ratio of the image sensor and requirement of the dark current characteristic, also enhance the integrity of the image sensor.
Description
Technical field
The present invention relates to a kind of CMOS (complementary metal oxide semiconductors (CMOS)) imageing sensor, relate in particular to the isolation structure of device in a kind of cmos image sensor.
Background technology
In recent years, cmos image sensor (active pixel) technology develops rapidly.The cmos circuit manufacturing process of the manufacturing process of cmos image sensor and signal processing chip is compatible fully, therefore can easily imageing sensor and signal processing be integrated on the same chip, make cmos image sensor compare with CCD (charge coupled device), not only reduced system cost, and the power consumption of system is reduced, system integration scheme is simpler, and microminiaturized more.
Normally, the cmos image sensor active pixel comprises photodiode and transistor.Between photoelectric diode and transistor, according to the needs of circuit design, the electric isolation that must be necessary.Existing C MOS ic manufacturing process all adopts selective oxidation (LOCOS) or shallow grooved-isolation technique as the isolation between the adjacent components and parts (particularly active device), and the isolation between the drain region, same transistorized source region, is referred to as an oxygen and isolates.
In cmos circuit design rule based on field oxygen partition method, in order to guarantee reliable electric isolation, and prevent transistorized source region and drain region short circuit, must stride across whole active area as the polysilicon line of transistor gate, two ends oxygen isolated area on the scene finishes, as shown in Figure 1." d " among Fig. 1 represents the polysilicon of design rule permission and the minimum value that the carrying out local oxide isolation district overlaps.When having only actual crossover range to be not less than " d ", could guarantee effective source-drain area isolation.
But on the cmos image sensor chip, when adopting an oxygen isolation technology as the isolation of photodiode and adjacent transistors, the boundary defect of silicon-silicon dioxide can bring dark current and interface charge carrier compound in the isolation structure of photodiode periphery, thereby influences the noiseproof feature of imageing sensor.On the other hand, an oxygen isolation technology also is unfavorable for the further raising of integrated level.
Summary of the invention
The technical problem to be solved in the present invention provides the isolation structure of device in a kind of cmos image sensor, and it can improve the requirement of dark current characteristic when of imageing sensor noise, and can further improve the integrated level of imageing sensor.
For solving the problems of the technologies described above, the invention provides the isolation structure of device in a kind of cmos image sensor, described device comprises transistor and photodiode, the well region that adopts the transoid doping between the described device is as isolated area.
The well region and an isolation structure of oxygen isolated area combination that can adopt transoid to mix between the described device.
When the well region that adopts described transoid to mix between the device during as isolation structure, the polysilicon gate lines can begin at active area, also can finish this polysilicon gate lines and must satisfy the overlapping value of a minimum as the well region that the transoid of isolation structure is mixed at active area.
The present invention has following beneficial effect: under condition of the present invention, can reduce or eliminate field oxygen isolated side wall area around the photodiode fully, thereby significantly reduce noise and the dark current problem that boundary defect is introduced.Simultaneously, this isolation method also can improve the integrated level of pixel region, thereby improves the charging efficiency (Fill factor) of photodiode in pixel cell.
Description of drawings
The present invention is further detailed explanation below in conjunction with the drawings and the specific embodiments:
Fig. 1 is the isolation structure schematic diagram of device in the existing C mos image sensor;
Fig. 2 is the isolation structure schematic diagram of device in one of embodiment of the invention cmos image sensor;
Fig. 3 is the isolation structure schematic diagram of device in another embodiment of the present invention cmos image sensor.
Embodiment
The present invention proposes the isolation structure of device in a kind of new cmos image sensor, is exactly that the well region that mixes with transoid is as the isolated area between the device.
Look the needs of layout design, the well region that mixes with transoid in some zone is as isolated area.In this programme, the isolation between the adjacent devices, and the isolation of same transistorized source-drain area, the well region that can only mix with transoid is realized isolating, as shown in Figure 2, field-free oxygen isolated area between PMOS pipe, NMOS pipe and the photodiode, all are isolated the well region that is mixed by transoid and realize; Perhaps also can adopt the isolation structure of the well region combination of an oxygen isolated area and transoid doping, as shown in Figure 3, adopt an oxygen isolated area to isolate between the PMOS pipe, adopt the well region of transoid doping to isolate between NMOS pipe and the photodiode.
The manufacture method of above-mentioned isolation structure can adopt following scheme:
Scheme one: N trap in the employing existing C MOS technology and/or P trap are as described isolation structure.So only need when layout design isolation structure of the present invention be designed to N trap and/or P trap, existing manufacturing process does not need to change.
Scheme two: make isolation structure of the present invention with a special lay photoetching mask plate.The making of isolation structure can be before traditional two trap operations, also can be after traditional two trap operations.
Adopt technical solution of the present invention to make layout design method, to have following feature: owing to adopt well region as isolation structure, the line of polysilicon gate does not need to stride across whole active area (oxygen isolated area on the scene begins and finishes), but only need stride across transistorized source-drain area.Be that the polysilicon gate lines can begin in isolation well region (active area), and can finish in isolation well region (active area).Based on layout design rules of the present invention, the polysilicon line can not overlap with an oxygen isolated area in any one or both ends.Accordingly, polysilicon gate lines and must satisfy the overlapping value of a minimum as the transoid well region of isolation structure.
Claims (3)
1. the isolation structure of device in the cmos image sensor, described device comprises transistor and photodiode, it is characterized in that, adopts well region that transoid mixes as isolated area between the described device.
2. the isolation structure of device is characterized in that in the cmos image sensor as claimed in claim 1, the well region and an isolation structure of oxygen isolated area combination that adopt transoid to mix between the described device.
3. the isolation structure of device in the cmos image sensor as claimed in claim 1, it is characterized in that, when the well region that adopts described transoid to mix between the device during as isolation structure, the polysilicon gate lines are allowed to begin at active area, and are allowed to finish at active area; Correspondingly, this polysilicon gate lines and must satisfy the overlapping value of a minimum as the well region that the transoid of isolation structure is mixed.
Priority Applications (1)
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CNA2007100380439A CN101266986A (en) | 2007-03-14 | 2007-03-14 | Component separation structure for CMOS image sensor |
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CNA2007100380439A CN101266986A (en) | 2007-03-14 | 2007-03-14 | Component separation structure for CMOS image sensor |
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CN101266986A true CN101266986A (en) | 2008-09-17 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105679864A (en) * | 2016-03-21 | 2016-06-15 | 中国科学院半导体研究所 | Solar cell module integrated from silicon cell and chip-type backward diode and production method of solar cell module |
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2007
- 2007-03-14 CN CNA2007100380439A patent/CN101266986A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105679864A (en) * | 2016-03-21 | 2016-06-15 | 中国科学院半导体研究所 | Solar cell module integrated from silicon cell and chip-type backward diode and production method of solar cell module |
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