CN101256517A - Self-diagnosis, self-recovery method for computer CPU anti-interference - Google Patents
Self-diagnosis, self-recovery method for computer CPU anti-interference Download PDFInfo
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Abstract
A self-diagnosis self-recover method of computer CPU anti-jamming is provided. The invention relates to a computer CPU self-diagnosis noise-tolerant scheme which belongs to electronic technology electro-magnetism compatibility technology field. The invention receives a stable pulse provided by inner clock by using a timer/counter unit in microcomputer slice, and puts forward a IRQ when the timer overflows (addition type) or is zero (subtraction type); corresponding interrupt service program compels a program indicating pin return to the designated location and recover important port and data in order to forcedly realize 'soft reset'. When functional application programs operate normally, the soft makes the timer zero clearing or number setting every definite time (within the overflow periodic of the timer) so that the mis-reset caused by the overflow interrupt can be prevented. The invention does not need slice-out hard ware, is low failure rate, finds PC indicating pin's abnormity in time, and forces 'soft reset' and recover important data in real time so that the normal operation of the computer system is ensured.
Description
Technical field
The present invention relates to a kind of computer CPU self diagnosis and hold the scheme of making an uproar, belong to electronic technology-electromagnetic compatibility technology field.
Background technology
The continuous improvement of computing power makes its rapid permeability arrive the various controls field of traditional industry.The running environment complexity of observing and controlling computing machine: the screen cabinet that is installed on power plant's Central Control Room that has, what have is positioned at by the various controlled plants; And for the product of electromechanical integration, computing machine is exactly the part of product.Industrial computer is the combination of hardware and software, and is in mostly among the abominable electromagnetic environment that forceful electric power loop, heavy current installation even ultrahigh frequency, UHV (ultra-high voltage) electrical equipment constituted.
For the scientific and technical personnel of development microcomputer industrial control system, the various electromagnetic noises that system self and applied environment produce are general puzzlement factor.During the online trial run of many application systems in carrying out artificial debugging and laboratory all is successful, yet in case enter on-the-spot practical, misoperation or mistake that system then can produce beyond expecting show, when serious even cause the early stage development to lose efficacy substantially, a large amount of valuable time and manpower and materials have been wasted.Therefore, in the development process of industrial control system, fault-tolerant, the error correcting capability of computing machine is one of total system key of success.Recent decades, people have worked out many jamproof hardware measures, comprise adopting power conditioner, ground connection, shielding, photoelectricity coupling, data filtering and time-delay defibrillation, CPU hardware " house dog " or the like.Generally speaking, these hardware can play a role, but then can draw following four problems in some occasion:
(1) for the Control System of Microcomputer (as one-chip computer) of cheapness, the introducing of above-mentioned anti-interference hardware will obviously increase the conventional cost of product, the ratio of being increased expenditure or even flagrant in some cases.Just because of this, the facility of most of family expenses self-con-tained units and portable digital instrument inhibition noise is perfect inadequately, is disturbing strong zone misoperation often to occur.
(2) it is complicated that the hardware of Zeng Jiaing will make circuit board, from and drawn new noise and inappropriate which couple.This problem is more outstanding on the intelligent miniature instrument.
(3) because the reversal rate of digital circuit is very fast, very easily produce the Radio frequency interference (RFI) pulse, and the high-speed response characteristic of other integrated circuit makes this class pulse be easy to be received, this has just caused new interference and composite interference.
(4) increase of hardware usually causes the time between failures of system to shorten, and " hardware is out of order than software is easier " has been the common recognition of industrial control field.In a single day some hardware damage, not only then can not be anti-interference, also might cause total system to lose efficacy.
Take a broad survey and failtests shows that all undesired signal is scurried into computing machine by hardware, it is the main reason that causes that control system lost efficacy to the misleading of program process with to result's modification.Therefore increase jamproof hardware simply and not only increased standing cost, also can increase extra noise source or noise receiver sometimes, increase the incidence of system hardware fault.
Summary of the invention
Technical matters to be solved by this invention is: the jamproof self diagnosis of a kind of computer CPU, self-recovery method are provided, and its cost is low, need not the outer hardware of sheet; Failure rate is low, can find in time that the PC pointer forces " warm reset " unusually, in real time and recover significant data, thus the normal operation of the system of assurance.
Solving the scheme that technical matters of the present invention adopts is: utilize a Timer unit in the chip to receive the stable pulse that internal clocking provides; Establishment timer zero clearing in chip/put several programs, program pointer PC positioning function interrupt service routine and data recovery procedures; With the cycle of setting scrutiny program operation conditions repeatedly, in time will disturbed PC is mandatory is withdrawn into assigned address and recovers critical port and data, computer system is recovered normally.
Concrete implementation step of the present invention is: (1) in chip, select one idle or use less timer; (2) according to the operation characteristic of other hardware of computer system, give the timer initialize, open its interrupt function, start timer in the initialize routine section; (3) interrupt cycle of the working time of rough calculation application program and timer, in timer proposes the cycle length of interrupt request, insert specialized instructions in application program the timer recovery is first state of value, the mistake that causes with the interruption of prevention timer resets; (4) write stand-by program at ports such as I/O, SFR and significant data, reflect its normal change in real time; (5) write the interrupt service routine of timer, be withdrawn into system design and need specified position program pointer PC is mandatory, and recover critical port and data.
The software and hardware function of each important composition of the present invention is:
1. Timer: utilize timer idle or that utilization rate is lower in the chip, receive the stable pulse that internal clocking provides, when PC is interfered, propose interrupt request;
2. timer zero clearing/put several programs: at first, the working method of timer is set in initialize routine, and as required initialize, open its interruption and timing function.Secondly, calculate the maximum quantity that allows execution command in the cycle of overflowing, in order to be set in the application program to the position of regularly thinking highly of initialize.
3. program pointer positioning function interrupt service routine: timer proposes the pairing service routine of interrupt request.This subroutine need only an instruction, promptly the interrupt vector address in the timer correspondence writes " unconditional transfer " order, the mandatory appointed positions (being generally first row of initialize routine) that is entrained back into of PC, system is carried out initialization again, and obtain correct execution order.Because this interrupt instruction does not also have the end interrupt subroutine just to turn out, in order to continue to respond other interrupt request, should be the suitably fixed high some bytes of SP in the initialization function of program, in these storage elements, write the address that " interruption is returned " should execute instruction afterwards, PC so that the stack of moving is certainly packed into after end interrupt; And before finishing, initialize routine writes interrupt return instruction.
4. data recovery procedures: " reset " afterwards in microsystem, the setting value that the content among I/O port and the specified register SFR will become chip usually when dispatching from the factory, this causes the operation confusion of total system possibly.Therefore in system's normal course of operation, in the best storer of interference free performance, in time back up the significant datas such as I/O, SFR that change; After the system reset, should at first carry out recovery routine, recovery reduction such as the operation results of the protected contents of important register such as control port, function program, the system that makes can continue original operation according to the situation before resetting.
Principle of work of the present invention:
Utilize a Timer unit in the microcomputer sheet to receive the stable pulse that internal clocking provides, when this timer overflows (addition type) or be zero (subtraction type), propose interrupt request; Corresponding interrupt service routine will force PC to get back to appointed positions (being generally first row of initialize routine), thus mandatory realization " warm reset ".When other function program was normally moved, software was given the timer zero clearing or is put number every the regular hour (overflowing in the cycle of timer), can pre-anti-spilled interruption and the mistake that causes resets.
Match with the software compensation measure, the design can prevent the microsystem paralysis that the program area of normal operation causes that " flies out " owing to the PC among the CPU effectively.The design utilizes Timer idle in the microcomputer sheet, cooperation constitutes unique WDT with suitable program, have and need not the outer hardware of sheet, characteristic that failure rate is low, can find in time that the PC pointer forces warm reset unusually, in real time, thus the normal operation of recovery system.
The invention has the beneficial effects as follows:
(1) cancelled the outer corresponding hardware of sheet, standing cost is made, saved to the board design of having simplified TT﹠C system.Therefore, the design can be widely used in fields such as household electrical appliance, intelligent toy, digital instrument, computer measurement and control system, obviously improves these reliability of products.
(2) no matter the simplification of circuit board still is the minimizing of hardware, all helps to reduce noise source and inappropriate which couple.Therefore the design can make intelligence instrument in the abominable electromagnetic environment (as the other screen of machine cabinet) interference free performance be improved significantly.
(3) hardware is the common recognition of industrial control field than easier being out of order of software, and the minimizing of hardware has prolonged the time between failures of system.Observing and controlling functional software in the automatic recovery software that adopts the interrupt techniques establishment and the original system etc. there is no and conflicts, so is easy to be attached among the main body of application program.
Embodiment
Embodiment:
Timer is 1.: this example adopts the MCS-51 series monolithic to constitute TT﹠C system, with timer T idle in its sheet
0As assembly 1..
Timer zero clearing program is 2.: at first in the initialize routine piece T is set
0Working method, zero clearing is also opened its interruption and timing function.The employing dominant frequency is 12MHz, T
0Be 8 bit timing devices, then
Maximum count value is 2
8-1=255
Count rate is 1/12 (1 time/μ s) of dominant frequency, so:
The cycle of overflowing is (255+1) ÷ 1=256 μ s
Secondly, the execution of calculating each bar instruction is consuming time, with proper spacing replacement T
0=0." taking advantage of ", " removing " two instructions consume 4 machine cycles, other all only consumes 1～2 machine cycle owing to have only in the instruction set of MCS-51 series monolithic, so conservatively be reduced to " every instruction all consumes 2 machine cycles ", be that one of every execution is instructed the 2 μ s times of consumption.Can extrapolate " zero clearing timer T in view of the above
0" the instruction execution interval should be less than
256 ÷ 2=128 (bar)
Be no more than 128 programmed instruction of every execution (counting the instruction that repeatedly circulation is carried out), just should carry out a zero clearing T
0Instruction, to prevent that warm reset from being carried out by mistake.
PC positioning function interrupt service routine is 3.: design T
0Overflow pairing interrupt service routine.This subroutine need only an instruction, promptly at T
0Corresponding interrupt vector address (000BH) writes " unconditional transfer " order, and the 1st row PC tows back to whole procedure carries out initialization again and obtains correct execution order single-chip microcomputer.Because this interrupt instruction does not also have the end interrupt subroutine just to turn out, in order to continue to respond other interrupt request, can be fixed high 2 bytes of SP in the initialization function of program, in this 2 byte, write the address that " interruption is returned " (RETI) should execute instruction afterwards, PC so that the stack of moving certainly after the RETI execution is packed into; And before initialize routine finishes, write RETI and instruct.
Data recovery procedures is 4.: " resets " afterwards in microsystem, and the setting value that the content among I/O port and the specified register SFR all will become chip when dispatching from the factory, this causes the operation confusion of total system possibly.Therefore computer PC normal after, should at first carry out data recovery procedures, the operation result of the protected contents of important register such as control port, function program etc. is recovered reduction.Based on the anti-interference test findings, the above-mentioned data in advance protection of this example normal change in real time is among the ram in slice of 51 series monolithics.
The assembler source program inventory relevant with this example is as follows:
Begin:setb ea; Opens interrupters
Setb et0; Allow T
0Overflow interruption
Setb pt0 T
0Overflow and interrupt being made as high priority
Ajmp abcd; Walk around T
0The vector address that interrupts
Org 0bh; Following bar instruction is positioned interrupt vector
Ajmp begin; Warm reset
Abcd:mov sp, #09h; If SP=7 now increases by 2 in the original plan
Mov 9h, #00h; Answer the address of perform statement after the RETI
Mov 8h, #17h; Be 0017H
Reti; T
0Interruption return
Mov tmod, #0ah; T is set
0Be 8 bit timing devices
Setb tr0; Open T
0
The initialize routine that other needs
............ ；
... ...; From ram in slice, recover after resetting
... ...; I/O port and register data
；
Yocx:mov tl0, #00h; Function program begins, zero clearing TL
0
... ...; Other function program statement
... ...; Other function program statement
Ljmp yocx; The operation of function program normal circulation.
Claims (2)
1, the jamproof self diagnosis of a kind of computer CPU, self-recovery method is characterized in that: utilize a Timer unit in the chip to receive the stable pulse that internal clocking provides; Establishment timer zero clearing in chip/put several programs, program pointer PC positioning function interrupt service routine and data recovery procedures; With the cycle of setting scrutiny program operation conditions repeatedly, in time will disturbed PC is mandatory is withdrawn into assigned address and recovers critical port and data, computer system is recovered normally.
2, the jamproof self diagnosis of computer CPU according to claim 1, self-recovery method is characterized in that implementation step is: (1) in chip, select one idle or use less timer; (2) according to the operation characteristic of other hardware of computer system, give the timer initialize, open its interrupt function, start timer in the initialize routine section; (3) interrupt cycle of the working time of rough calculation application program and timer, in timer proposes the cycle length of interrupt request, insert specialized instructions in application program the timer recovery is first state of value, the mistake that causes with the interruption of prevention timer resets; (4) write stand-by program at ports such as I/O, SFR and significant data, reflect its normal change in real time; (5) write the interrupt service routine of timer, be withdrawn into system design and need specified position program pointer PC is mandatory, and recover critical port and data.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008100581682A CN101256517A (en) | 2008-03-07 | 2008-03-07 | Self-diagnosis, self-recovery method for computer CPU anti-interference |
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| CNA2008100581682A CN101256517A (en) | 2008-03-07 | 2008-03-07 | Self-diagnosis, self-recovery method for computer CPU anti-interference |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103116301A (en) * | 2013-02-25 | 2013-05-22 | 南京火天食品机械制造有限公司 | Method for eliminating sparking of electromechanical system |
| CN104572510A (en) * | 2013-10-09 | 2015-04-29 | 杰发科技（合肥）有限公司 | Method and device for judging working state of external equipment |
-
2008
- 2008-03-07 CN CNA2008100581682A patent/CN101256517A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103116301A (en) * | 2013-02-25 | 2013-05-22 | 南京火天食品机械制造有限公司 | Method for eliminating sparking of electromechanical system |
| CN103116301B (en) * | 2013-02-25 | 2016-05-11 | 南京火天食品机械制造有限公司 | A kind of method of eliminating the interference of Mechatronic Systems spark |
| CN104572510A (en) * | 2013-10-09 | 2015-04-29 | 杰发科技（合肥）有限公司 | Method and device for judging working state of external equipment |
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