CN101246670A - Serial data transmission method and correlated device used for display device - Google Patents
Serial data transmission method and correlated device used for display device Download PDFInfo
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- CN101246670A CN101246670A CN 200710084959 CN200710084959A CN101246670A CN 101246670 A CN101246670 A CN 101246670A CN 200710084959 CN200710084959 CN 200710084959 CN 200710084959 A CN200710084959 A CN 200710084959A CN 101246670 A CN101246670 A CN 101246670A
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Abstract
The present invention resolves the signal reflecting problem of the transmission interface in the display, to reduce the cost, the invention provides a serial data transmitting method of data transmission line for embedded data and nondata signal (such as clock, sync signal etc) of the display. The data transmission method includes: acquiring multiple data transmission mode of the display; defining multiple current combinations according to multiple data transmission modes, multiple current sizes and multiple current directions, each current combination is corresponding to one data transmission mode; output the electronic device corresponding from the current combination to the display device via multiple transmission lines according to the present data transmission mode.
Description
Technical field
The invention relates to a kind of data transmission method and relevant apparatus thereof, refer to that especially a kind of display device that is used for can embed data and non-data-signal in the data transmission method and the relevant apparatus thereof of the string type of data line.
Background technology
LCD (liquid crystal display) is the frivolous flat display apparatus of a kind of external form (flat panel display), it has low radiation, volume is little and advantage such as low power consuming, replace traditional cathode-ray tube display (cathode ray tube display) gradually, thereby be widely used in notebook computer (notebook computer), personal digital assistant (personal digitalassistant, PDA), on the information products such as flat-surface television or mobile phone.Common flat-panel screens comprises thin film transistor (TFT) (thin film transistor, TFT) LCD, low temperature polycrystalline silicon (lowtemperature poly silicon, LTPS) LCD and Organic Light Emitting Diode (organiclight emitting diode, OLED) display etc.The drive system of display is made of time schedule controller (timing controller), multiple source driver (source driver) and a plurality of gate drivers (gate driver).Interface between time schedule controller and the source electrode driver is to transmit clock signal with bus pattern (bus type), data-signal, control signal and setting signal etc., its common connecting interface comprises transistor-transistor logic (transistor-transistor logic, TTL) interface, Low Voltage Differential Signal (low voltage differential signal, LVDS) interface, low-swing differential signal (reduced swing differential signal, RSDS) and little Low Voltage Differential Signal (mini low voltage differential signal, mini-LVDS) interface etc.
Please refer to Fig. 1 and Fig. 2, Fig. 1 and Fig. 2 are the signal schematic representation of the low-swing differential signaling interface of known display.At first, in Fig. 1, the clock controller of display produces one group of differential voltage signal DxN and DxP.Differential voltage signal DxN and DxP have 180 ° phase differential and identical conversion ratio (slewrate), and are benchmark and the amplitude of oscillation up and down with common mode voltage VCOM.Then, in Fig. 2, differential voltage signal DxP deducts differential voltage signal DxN can obtain differential voltage signal DIF (DxP-DxN), and it has positive voltage amplitude of oscillation VIH and negative voltage amplitude of oscillation VIL, both amplitude of oscillation sizes are identical, are the difference of crest and the trough of differential voltage signal DxN and DxP.
Please refer to Fig. 3 and Fig. 4, Fig. 3 and Fig. 4 are respectively the signal wire of low-swing differential signaling interface of known display to the signal high state of D00P/N, D01P/N, D02P/N, D03P/N, D10P/N, D11P/N, D12P/N, D13P/N, D20P/N, D21P/N, D22P/N and D23P/N and the current diagram of low state.In Fig. 3 and Fig. 4, output terminal Tx represents the output terminal of clock controller, and receiving end Rx represents the receiving end of source electrode driver.Clock controller by output terminal Tx produce difference current in aforesaid 12 groups of signal wires to last, the receiving end Rx of source electrode driver comes received signal by each signal wire of sensing to last direction of current.For example, in Fig. 3, electric current flow to D01N representation signal high state by signal wire D01P, or ' 1 '; In Fig. 4, electric current flow to the low state of D01P representation signal by signal wire D01N, or ' 0 '.Therefore, each signal wire of low-swing differential signaling interface is to only representing one signal.
Please refer to Fig. 5, Fig. 5 is the signaling interface sequential synoptic diagram of the low-swing differential signaling interface of known display.The sequential of signal from top to bottom is: clock signal S
CLK, signal S moves to left
SHL, polar signal S
POL, differential signal line is to low-swing differential signal, the data bolt-lock start signal S of D00P/N, D01P/N, D02P/N, D03P/N, D10P/N, D11P/N, D12P/N, D13P/N, D20P/N, D21P/N, D22P/N and D23P/N
DIO, data output synchronizing signal S
LDAnd voltage output signal S
OUTPUTAbout move control signal S
SHL, polar signal S
POL, data bolt-lock start signal S
DIOAnd data output synchronizing signal S
LDTo behind the source electrode driver, after source electrode driver can carry out related setting, receive data by the low-swing differential signal again etc. control signal, the principle of work of its interface sequence is roughly as follows.As clock signal S
CLKNegative edge tie down (Latch) data bolt-lock start signal S
DIOHigh state the time (A point), after two clock signal S
CLKNegative edge the time (B point), the low-swing differential signal begins data signal, and by clock signal S
CLKPositive and negative edge (rising and falling edges) (the dual edge sampling that takes a sample simultaneously; B and C point).Source electrode driver is again by data output synchronizing signal S
LD, the output time of synchrodata and transmission information are to panel (D point).As from the foregoing, known display by transistor-transistor logic (TTL) interface transmit control and setting signal (about move control signal S
SHL, polar signal S
POL, data bolt-lock start signal S
DIOAnd data output synchronizing signal S
LD) give source electrode driver, and give source electrode driver by low-swing differential signaling interface data signal.
Therefore, in known display, data-signal, control signal, setting signal and clock signal are to transmit by two different signaling interfaces (low-swing differential signaling interface and transistor-transistor logic interface), cause the situation of signal asynchronous (signal skewing) easily, make to be set or (hold time) the equal time parameter of holding time is difficult for adjustment the time (setuptime).Therefore, in two-forty and high-resolution application, known display can't promote its data rate or clock rate.In addition, because known low-swing differential signaling interface is only to utilize direction of current to distinguish data, and its signal wire only is used for data signal and clock signal.Color depth rising along with each pixel on the picture, needed signal wire is also just many more, add that unlike signal is to transmit by individual other signal wire in the known display, causing the cabling of circuit board and changing hierachy number increases, and occupies the great space of printed circuit board (PCB).On the other hand, because known display is transmitted clock signal and data-signal respectively by the unlike signal line, in order to make the normal operation of source electrode driver energy, clock controller need use setting signal to set different pins in the source electrode driver, moves pin, data reversal pin, low power supply control pin about for example and shares/reclaim initial pin etc. with electric charge.Therefore, the pin number of source electrode driver can too much cause pin spacing (pin pitch) to reduce, and so can reduce the yield of connection process (bonding process), increases the production cost of LCD.
Summary of the invention
Therefore, the present invention provides a kind of data transmission method and relevant apparatus thereof that is used for the display device string type.
The present invention discloses a kind of data transmission method that is used for the display device string type, includes: a plurality of data-transmission modes of obtaining this display device; According to these a plurality of data-transmission modes, define a plurality of currents combination with a plurality of size of current and a plurality of direction of current, each currents combination is corresponding to a data-transmission mode; And, export the electronic installation of corresponding currents combination to this display device by plurality of transmission lines according to the current data transmission mode.
The present invention also discloses a kind of interface arrangement that is used for display device, includes plurality of transmission lines, storage element, judging unit, and current output unit.This storage element is used for storing a plurality of currents combination, and these a plurality of currents combination are with a plurality of size of current and a plurality of direction of current and define, and each currents combination is corresponding to a data-transmission mode in a plurality of data-transmission modes of this display device.This judging unit is coupled to this storage element, is used for according to the current data transmission mode, by selecting a currents combination in stored these a plurality of currents combination of this storage element.This current output unit is coupled to this judging unit, is used for exporting the electronic installation of this currents combination to this display device by this plurality of transmission lines.
Description of drawings
Fig. 1 and Fig. 2 are the signal schematic representation of the low-swing differential signaling interface of known display.
Fig. 3 and Fig. 4 are the right signal high state of the signal wire of low-swing differential signaling interface of known display and the current diagram of low state.
Fig. 5 is the signaling interface sequential synoptic diagram of the low-swing differential signaling interface of known display.
Fig. 6 is used for the process flow diagram of the data transmission flow process of display device string type for the present invention.
Fig. 7 to Fig. 9 has the characteristics of signals synoptic diagram of the differential signal interface of variable current for the embodiment of the invention.
Figure 10 to Figure 17 is that the embodiment of the invention is according to the currents combination of Fig. 4 and the pairing synoptic diagram of data-transmission mode.
Figure 18 is the interface sequence synoptic diagram of embodiment of the invention display device.
Figure 19 is the synoptic diagram of the interface sequence of embodiment of the invention string type.
Figure 20 is used for the synoptic diagram of interface arrangement of the time schedule controller of display device for the embodiment of the invention.
[main element label declaration]
DxN, DxP, DATAxN, DATAxP, DIF, DIF
NEW, DIF0
NEW, the differential voltage signal
DIF1
NEW
VIH, VIL, VIH
NEW, VIL
NEWVoltage swing
D00P/N, D01P/N, D02P/N, D03P/N, D10P/N, differential voltage signal wire are right
D11P/N、D12P/N、D13P/N、D20P/N、D21P/N、
D22P/N、D23P/N、DATA0P/N、DATA1P/N
92 time schedule controllers, 94 source electrode drivers
90 display device, 910 storage elements
920 judging units, 930 current output unit
Tx output terminal Rx receiving end
900 interface arrangements
SYNC, LD, CONTROL, DIO, DATA, OUTPUT, DATA1, data-transmission mode
DATA2、DATA3、DATA4、DATA5、DATA6、DATA7、
DATA8
S
CLK, S
SYNC, S
POL, S
SHL, S
DIO, S
LD, S
OUTPUT, S
DATA0, S
DATA1Signal
60 flow processs
602,604,606,608,610 steps
Embodiment
Please refer to Fig. 6, Fig. 6 is used for the process flow diagram of the data transmission flow process 60 of display device string type for the present invention.Flow process 60 comprises the following step:
Step 602: beginning.
Step 604: a plurality of data-transmission modes of obtaining this display device.
Step 606: according to these a plurality of data-transmission modes, define a plurality of currents combination with a plurality of size of current and a plurality of direction of current, each currents combination is corresponding to a data-transmission mode.
Step 608:, export the electronic installation of corresponding currents combination to this display device by plurality of transmission lines according to the current data transmission mode.
Step 610: finish.
According to flow process 60, for data and control signal are sent to electronic installation, the present invention is according to the number of the data-transmission mode of display device and kind, corresponding to a kind of currents combination, and each currents combination is defined by different size of current and direction of current with each data-transmission mode.
The present invention is applicable to the transmission mode between wantonly two end devices in the display device, but for asking convenient, the present invention embodiment backward all explains with time schedule controller in the display and the data transfer mode between the source electrode driver, wherein between time schedule controller and source electrode driver, the embodiment of the invention is that the utilization differential signal line transmits signal.Therefore, by transmitting different currents combination, time schedule controller can transmit signal corresponding to the different pieces of information transmission mode to source electrode driver, is used for transmission as synchronous mode and resets and synchronizing signal, and data pattern is used for transmission of data signals or the like.In this case, when needs sent a signal to source electrode driver, flow process 60 can be according to the selected data-transmission mode of time schedule controller, produced corresponding currents combination, and by plurality of transmission lines (as differential lines to) export source electrode driver to.
What pay special attention to is, the present invention is size of current and the direction that provides different on transmission line, its direction can define voluntarily, and form multiple currents combination with size of current and direction, the mode of its currents combination is not limited to particular specification, for example, can two different size of current and the direction electric current that is all forward define a kind of data-transmission mode, or be that two forwards and a reverse electric current define etc. with three different size of current and direction, like that.For instance, if use two kinds of size of current I
1And I
2Electric current and represent that with I+ and I-the forward and reverse of direction of current and pair of differential line come output current to DATAxP and DATAxN, then definable goes out four kinds of currents combination, is respectively (1) DATAxP:I
1+, DATAxN:I
1-; (2) DATAxP:I
1-, DATAxN:I
1+; (3) DATAxP:I
2+, DATAxN:I
2-; (4) DATAxP:I
2-, DATAxN:I
2+; Four kinds of currents combination can correspond to two data-transmission modes respectively, and to transmit required signal, wherein the high low state of representation signal can be distinguished in (1), (2) and (3), (4).Other lifts an example explanation, if aforesaid size of current I
1, I
2And direction of current I+, I-use two groups of differential lines to DATA0P, DATA0N and DATA1P, when DATA1N is last, then can form 16 kinds of currents combination, is respectively:
(1)DATA0P:I
1+,DATA0N:I
1-,DATA1P:I
2+,DATA1N:I
2-;
(2)DATA0P:I
1+,DATA0N:I
1-,DATA1P:I
2-,DATA1N:I
2+;
(3)DATA0P:I
1-,DATA0N:I
1+,DATA1P:I
2+,DATA1N:I
2-;
(4)DATA0P:I
1-,DATA0N:I
1+,DATA1P:I
2-,DATA1N:I
2+;
(5)DATA0P:I
2+,DATA0N:I
2-,DATA1P:I
1+,DATA1N:I
1-;
(6)DATA0P:I
2+,DATA0N:I
2-,DATA1P:I
1-,DATA1N:I
1+;
(7)DATA0P:I
2-,DATA0N:I
2+,DATA1P:I
1+,DATA1N:I
1-;
(8)DATA0P:I
2-,DATA0N:I
2+,DATA1P:I
1-,DATA1N:I
1+;
(9)DATA0P:I
1+,DATA1N:I
1-,DATA1P:I
2+,DATA0N:I
2-;
(10)DATA0P:I
1+,DATA1N:I
1-,DATA1P:I
2-,DATA0N:I
2+;
(11)DATA0P:I
1-,DATA1N:I
1+,DATA1P:I
2+,DATA0N:I
2-;
(12)DATA0P:I
1-,DATA1N:I
1+,DATA1P:I
2-,DATA0N:I
2+;
(13)DATA0P:I
2+,DATA1N:I
2-,DATA1P:I
1+,DATA0N:I
1-;
(14)DATA0P:I
2+,DATA1N:I
2-,DATA1P:I
1-,DATA0N:I
1+;
(15)DATA0P:I
2-,DATA1N:I
2+,DATA1P:I
1+,DATA0N:I
1-;
(16)DATA0P:I
2-,DATA1N:I
2+,DATA1P:I
1-,DATA0N:I
1+;
Therefore, in the present invention, the kind of transmission line and number, the selection of size of current and direction is not limited in the particular range, those skilled in the art's change optionally it.
As previously mentioned, known low-swing differential signaling interface only uses direction of current to come definition signal, and only can be used for the transmitted image data, when data volume is big, needs to use and transmit signal than multiple-transmission-line.In comparison, flow process 60 of the present invention uses size of current and direction to define a plurality of currents combination simultaneously, with according to corresponding data-transmission mode, transmit corresponding signal to source electrode driver, thus, the present invention can use same group transmission line to transmit multiple different signal, and the number of it is believed that in full, control signal or the like significantly reduce the area and the complexity of printed circuit board (PCB) upward wiring.
According to flow process 60, the embodiment of the invention is to utilize the differential signal interface with variable current to come the currents combination and the data-transmission mode of performing step 606.Please refer to Fig. 7 to Fig. 9, Fig. 7 to Fig. 9 has the signal schematic representation of the differential signal interface of variable current for the embodiment of the invention.Fig. 7 is similar to Fig. 1, can adjust the voltage of differential voltage signal DATAxN and DATAxP, to change positive voltage amplitude of oscillation VIH
NEWAnd negative voltage amplitude of oscillation VIL
NEWSize.For instance, the time schedule controller in the display can be adjusted size of current and the direction of one group of differential lines to DATAxN and DATAxP, makes electric current cause different voltages on inside terminals resistance, to change positive voltage amplitude of oscillation VIH
NEWAnd negative voltage amplitude of oscillation VIL
NEWTherefore, if positive voltage amplitude of oscillation VIH
NEWAnd negative voltage amplitude of oscillation VIL
NEWThe variation that different multiples the occurs real-time sequence controller of anticipating provides differential lines that the electric current to equimultiple is changed.In Fig. 8 and Fig. 9, differential voltage signal DIF
NEW(DATAxP-DATAxN) can show the dc voltage value (1*M, 3*M, 2*M) of a times, three times and twice.Therefore, the present invention can utilize the different dc voltage values and the direction of current of differential voltage signal, defines a plurality of currents combination with a plurality of data-transmission modes of correspondence.
Please refer to Figure 10 to Figure 17, Figure 10 to Figure 17 is respectively the synoptic diagram of embodiment of the invention data-transmission mode and currents combination.Data-transmission mode DATA1~DATA8 of Figure 10 to Figure 17 corresponds respectively to a kind of currents combination.In embodiments of the present invention, time schedule controller is to use two groups of differential signal line DATA0P/N and DATA1P/N to output current to source electrode driver.Source electrode driver obtains two differential voltage signal DIF0 by the voltage that sensing differential signal line DATA0P/N and DATA1P/N form on terminal resistance
NEWAnd DIF1
NEWData-transmission mode DATA1 with Figure 10, time schedule controller produces the differential voltage signal of three times of dc voltage value+3*M of a forward on differential signal line DATA0P/N, and produce the differential voltage signal of times dc voltage value ± 1*M one by one on differential signal line DATA1P/N, so data-transmission mode DATA1 is promptly corresponding to (DIF0
NEW:+3*M, DIF1
NEWThe currents combination of: ± 1*M), wherein differential voltage signal DIF1
NEWOn direction of current can be used to differentiate the positive and negative edge of clock signal.Similarly, data-transmission mode DATA2~DATA4 corresponds respectively to currents combination: (DIF0
NEW:-3*M, DIF1
NEW: ± 1*M), (DIF0
NEW:+1*M, DIF1
NEW: ± 3*M) and (DIF0
NEW:-1*M, DIF1
NEW: ± 3*M).In addition, data-transmission mode DATA5 with Figure 13, time schedule controller produces the differential voltage signal of one or three times of dc voltage value 3*M on differential signal line DATA0P and DATA1N, and produce the differential voltage signal of times dc voltage value 1*M one by one on differential signal line DATA0N and DATA1P, so data-transmission mode DATA5 is corresponding to (DIF0
NEW:+2*M, DIF1
NEW:+2*M) or (DIF0
NEW:-2*M, DIF1
NEWThe currents combination of :-2*M), wherein differential voltage signal DIF1
NEWOn direction of current can be used to differentiate the positive and negative edge of clock signal.In like manner, data-transmission mode DATA6 is corresponding to (DIF0
NEW:+2*M, DIF1
NEW:-2*M) or (DIF0
NEW:-2*M, DIF1
NEWThe currents combination of :+2*M).Wherein, sign is represented the electric current forward and the negative sense that define.
Figure 10 is corresponding to eight kinds of data-transmission modes to currents combination shown in Figure 17, and those skilled in the art can be according to required data-transmission mode, respectively the signal kinds transmitted of definition of data transmission mode DATA1~DATA8.For instance, definable data-transmission mode DATA1~DATA6 is respectively control model (CONTROL), fastens latching mode (DIO), data pattern (DATA), voltage output mode (OUTPUT), synchronous mode (SYNC) and data output synchronous mode (LD).Synchronous mode is used for synchronous signal transmission, with replacement source electrode driver and the circuit that opens the stock driver synchronously; Data output synchronous mode is used for transmitting data output synchronizing signal, with the output timing of synchronous images data; Control model is used for transmission of control signals, to provide a plurality of setting signals to source electrode driver; Fasten latching mode be used for the transmission fasten lock signal fasten lock so that source electrode driver carries out data; Data pattern is used for transmission of data signals, to transmit this view data to source electrode driver; And the voltage output mode is used for the transmission voltage output signal, exports this view data with the drive source driver.In this case, the control signal in the display device, setting signal and data-signal embed only two groups of differential signal lines simultaneously, not only save the wiring on the printed panel, more help the running of data sync on the frequency high speed.
What pay special attention to is that those skilled in the art can do suitable variation, look increase in demand, minimizing or change currents combination, to cooperate defined data-transmission mode.For example, corresponding to being first group of data-transmission mode, and DATA5~DATA8 is corresponding to being second group of data-transmission mode with data-transmission mode DATA1~DATA4.In addition, the running content of each data-transmission mode and running time can optionally define voluntarily.Not necessarily only be used for transmitting synchronizing signal as synchronous mode, also can transmit synchronizing signal and data output synchronizing signal simultaneously, and its mode operating time as long as be the cycle multiple of system's internal clock signal, be not limited to special time length.
Please refer to Figure 18, Figure 18 is used for the interface sequence synoptic diagram of display device for the embodiment of the invention.As shown in Figure 18, DIF0
NEWAnd DIF1
NEWSequential can be divided into synchronous mode, control model, fasten latching mode, data pattern, data output synchronous mode and voltage output mode, the running time of all data-transmission modes is all clock signal S
CLKThe multiple of cycle length.According to the sequential of time schedule controller and source electrode driver, about move control signal S
SHLAnd polar signal S
POLBe transmitted under the control model; Data-signal S
DATA0And S
DATA0Be transmitted under the data pattern; Synchronizing signal S
SYNC, fasten lock signal S
DIO, data output synchronizing signal S
LDAnd voltage output signal S
OUTPUTBe transmitted in synchronous mode respectively, fasten latching mode, under data pattern, data output synchronous mode and the voltage output mode.The principle of work of the interface sequence of Figure 18 is as follows, and when time schedule controller operates on synchronous mode (A point), time schedule controller forms voltage combination (DIF0 by differential signal line DATA0P/N and DATA1P/N output current on terminal resistance
NEW:+2*M, DIF1
NEW:+2*M) or (DIF0
NEW:-2*M, DIF1
NEW:-2*M) be to source electrode driver, source electrode driver via decoding program after, begin to receive synchronizing signal S
SYNC, to reset and to open inner circuit of beginning synchronously.Similarly, when time schedule controller operates on data output synchronous mode (B point), time schedule controller forms voltage combination (DIF0 by differential signal line DATA0P/N and DATA1P/N output current on terminal resistance
NEW:+2*M, DIF1
NEW:-2*M) or (DIF0
NEW:-2*M, DIF1
NEW:+2*M) be to source electrode driver, source electrode driver via decoding program after, begin to receive data output synchronizing signal S
LD, with the output timing of the view data in the synchronisation source driver.In addition, the voltage of fastening latching mode (C point) is combined as (DIF0
NEW:-3*M, DIF1
NEW: ± 1*M), source electrode driver via decoding program after, begin to receive and fasten lock signal S
DIO, fasten lock so that source electrode driver carries out data; The voltage combination of data pattern (D and E point) is respectively (DIF0
NEW:+1*M, DIF1
NEW:+3*M) and (DIF0
NEW:+1*M, DIF1
NEW:-3*M), promptly source electrode driver via decoding program after, begin to receive data-signal S
DATA, so that source electrode driver is in clock signal S
CLKThe enterprising line data of positive and negative clock edge receive.
What pay special attention to is, those skilled in the art can do suitable variation, looks increase in demand, minimizing or changes the number and the purposes of data-transmission mode in this display device, and cooperate defined currents combination.For example, those skilled in the art can only obtain synchronously, control, fasten lock and four kinds of patterns of data, and define its corresponding currents combination, make synchronous mode be used for transmitting synchronizing signal S
SYNCAnd data output synchronizing signal S
LD, control, fasten lock and data pattern and then be used for respectively transmitting control signal, fastening lock signal S
DIOAnd data-signal S
DATA
Please refer to Figure 19, Figure 19 is the synoptic diagram of the interface sequence of embodiment of the invention string type.In order to make the normal operation of display device energy, each complete sequential all need comprise aforementioned six kinds of data-transmission modes, and according to the pre-defined rule running, view data can correctly be shown on the panel.The pre-defined rule of the embodiment of the invention is that data pattern is after synchronous mode and before data output synchronous mode; Control model can freedom separately be put, and as (c) of Figure 19, only needs to reach after synchronous mode before the voltage output synchronous mode.Therefore, in embodiments of the present invention, control signal, setting signal (as synchronous signal, data output synchronizing signal or the like) and data-signal are to be embedded on the same interface, and the definition by data-transmission mode, set up the host-host protocol between time schedule controller and the source electrode driver.
Please refer to Figure 20, Figure 20 is used for the synoptic diagram of interface arrangement 900 of the time schedule controller 92 of display device 90 for the embodiment of the invention.Interface arrangement 900 includes two groups of differential signal line DDS0P/N and DDS1P/N, storage element 910, judging unit 920 and current output unit 930.Display device 90 has defined different currents combination and has been stored in the storage element 920 according to required a plurality of data-transmission modes.When time schedule controller 92 operated in a certain data-transmission mode, judging unit 920 was according to this data-transmission mode, selected a currents combination from the stored a plurality of currents combination of storage element 910.Then, current output unit 930 is exported selecteed currents combination to source electrode driver 94 by differential signal line DATA0P/N and DATA1P/N.The present currents combination of source electrode driver 94 sensings to be carrying out decoding program, and solves corresponding transmission signals pattern, begins to receive control signal, data-signal or the running of being correlated with.Therefore, the present invention is a mode of utilizing dedicated channel (Dedicated channel), and sequence controller uses two groups of differential signal lines to carry out data transmission respectively to each source electrode driver in real time.Certainly, those skilled in the art can do suitable variation to transmission line, look the number of the data-transmission mode of display device 90 inside, can increase, reduce or change the combination of transmission line, are not to be defined in two groups of differential signal lines.
In sum, on interface features, known technology is to utilize direction of current to transmit data, makes every group of differential signal line only can represent one data-signal, and the transmission of signals such as control and setting needs to realize by other interface; In comparison, the present invention utilizes different size of current and direction to transmit data simultaneously, make one group of transmission line can transmit multiple currents combination, and then define a plurality of data-transmission modes, thus, the control signal in the time schedule controller, setting signal and data-signal or the like can be embedded in the transmission line simultaneously.On the other hand, on hardware was realized, in order to transmit different signals, known technology utilized multiple transmission interface and source electrode driver to link up, and adopts bus pattern (bus type), causes the pin number too much, and the signal transmission shortcoming of reflection easily produces; Otherwise the present invention can use less transmission line, and adopts exclusive channel and serial pattern to transmit various signals, to reduce the wiring number and to reduce the difficulty of the impedance matching of source electrode driver inside.Therefore, the present invention can solve the various problems of known technology significantly.
The above only is preferred embodiment of the present invention, and all equalizations of being done according to claim scope of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (14)
1. data transmission method that is used for the display device string type includes:
Obtain a plurality of data-transmission modes of this display device;
According to these a plurality of data-transmission modes, define a plurality of currents combination with a plurality of size of current and a plurality of direction of current, each currents combination is corresponding to a data-transmission mode; And
According to the current data transmission mode, export the electronic installation of corresponding currents combination to this display device by plurality of transmission lines.
2. method according to claim 1, wherein these a plurality of data-transmission modes include:
Synchronous mode is used for synchronous signal transmission, with this electronic installation and the circuit that opens this electronic installation of beginning synchronously of resetting;
Data output synchronous mode is used for transmitting data output synchronizing signal, with the output timing of synchronous images data;
Control model is used for transmission of control signals, to provide a plurality of setting signals to this electronic installation;
Fasten latching mode, be used for transmitting and fasten lock signal, fasten lock so that this electronic installation carries out data;
Data pattern is used for transmission of data signals, to transmit this view data to this electronic installation; And
The voltage output mode is used for the transmission voltage output signal, exports this view data to drive this electronic installation.
3. method according to claim 2, wherein this synchronous mode and this data output synchronous mode is corresponding to first group of data-transmission mode, and this control model, to fasten latching mode, this data pattern and this voltage output mode be corresponding to second group of data-transmission mode for this.
4. method according to claim 2, it also comprises according to pre-defined rule, determines the order of these a plurality of data-transmission modes.
5. method according to claim 1, wherein this plurality of transmission lines comprises two groups of transmission lines, and every group of transmission line comprises two transmission lines.
6. method according to claim 5, wherein these a plurality of size of current are corresponding to two size of current, and these a plurality of direction of current are corresponding to forward current direction and inverse current direction.
7. method according to claim 1, wherein this plurality of transmission lines is that many group differential signal lines are right.
8. interface arrangement that is used for display device includes:
Plurality of transmission lines;
Storage element is used for storing a plurality of currents combination, and these a plurality of currents combination are with a plurality of size of current and a plurality of direction of current and define, and each currents combination is corresponding to a data-transmission mode in a plurality of data-transmission modes of this display device;
Judging unit is coupled to this storage element, is used for according to the current data transmission mode, by selecting a currents combination in stored these a plurality of currents combination of this storage element; And
Current output unit is coupled to this judging unit, is used for exporting the electronic installation of this currents combination to this display device by this plurality of transmission lines.
9. interface arrangement according to claim 8, wherein these a plurality of data-transmission modes include:
Synchronous mode is used for synchronous signal transmission, with this electronic installation and the circuit that opens this electronic installation of beginning synchronously of resetting;
Data output synchronous mode is used for transmitting data output synchronizing signal, with the output timing of synchronous images data;
Control model is used for transmission of control signals, to provide a plurality of setting signals to this electronic installation;
Fasten latching mode, be used for transmitting and fasten lock signal, fasten lock so that this electronic installation carries out data;
Data pattern is used for transmission of data signals, to transmit this view data to this electronic installation; And
The voltage output mode is used for the transmission voltage output signal, exports this view data to drive this electronic installation.
10. interface arrangement according to claim 9, wherein this synchronous mode and this data output synchronous mode is corresponding to first group of data-transmission mode, and this control model, to fasten latching mode, this data pattern and this voltage output mode be corresponding to second group of data-transmission mode for this.
11. interface arrangement according to claim 9, it also comprises according to pre-defined rule, determines the order of these a plurality of data-transmission modes.
12. interface arrangement according to claim 8, wherein this plurality of transmission lines comprises two groups of transmission lines, and every group of transmission line comprises two transmission lines.
13. interface arrangement according to claim 12, wherein these a plurality of size of current are corresponding to two size of current, and these a plurality of direction of current are corresponding to forward current direction and inverse current direction.
14. interface arrangement according to claim 8, wherein this plurality of transmission lines is that many group differential signal lines are right.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102890919A (en) * | 2011-07-20 | 2013-01-23 | 联咏科技股份有限公司 | Source driver array and drive method of source driver array as well as liquid crystal drive device |
CN108334467A (en) * | 2017-01-17 | 2018-07-27 | 罗伯特·博世有限公司 | Transmitter and receiver for Low Voltage Differential Signal |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
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CN100386789C (en) * | 2005-05-24 | 2008-05-07 | 友达光电股份有限公司 | Display panel |
CN100446075C (en) * | 2005-05-26 | 2008-12-24 | 凌阳科技股份有限公司 | Time sequence controller and source driver of liquid crystal panel and control method and circuit |
CN100411003C (en) * | 2005-12-31 | 2008-08-13 | 义隆电子股份有限公司 | Source pole driving mode of liquid crystal display |
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2007
- 2007-02-17 CN CN2007100849598A patent/CN101246670B/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102890919A (en) * | 2011-07-20 | 2013-01-23 | 联咏科技股份有限公司 | Source driver array and drive method of source driver array as well as liquid crystal drive device |
CN108334467A (en) * | 2017-01-17 | 2018-07-27 | 罗伯特·博世有限公司 | Transmitter and receiver for Low Voltage Differential Signal |
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