CN101241285A

CN101241285A - Electro-optical device substrate, electro-optical device, and electronic apparatus

Info

Publication number: CN101241285A
Application number: CN 200810005603
Authority: CN
Inventors: 石井达也
Original assignee: Seiko Epson Corp
Current assignee: Seiko Epson Corp
Priority date: 2007-02-07
Filing date: 2008-02-05
Publication date: 2008-08-13
Also published as: JP4259598B2; JP2008216974A

Abstract

The invention improves the display performance of an electro-optical device such as liquid crystal device or the like. A substrate for the electro-optical device of the invention is provided with element parts 130a and 130b alternately arranged along the Y-direction and with a distance of one pixel amount; parts Py1 and Py3 which cover data line side LDD regions 1b-1 and 1b-2 respectively; parts Py2 and Py4 which cover data line side LDD regions 1c-1 and 1c-2 respectively; parts Py5 and Py7 which cover data line side LDD regions 1b-3 and 1b-4 respectively; and parts Py6 and Py8 which cover data line side LDD regions 1c-3 and 1c-4 respectively. Further, pixel electrodes 9a1 and 9a2 are respectively mounted in pixels which has parts Py1 and Py3 and are adjacent to each other along the X-direction, pixel electrodes 9a3 and 9a4 are respectively mounted in pixels which has parts Py5 and Py7 and are adjacent to each other along the X-direction.

Description

Substrate for electrooptic device, electro-optical device and electronic equipment

Technical field

The substrate for electrooptic device that the present invention relates in electro-optical devices such as for example liquid-crystal apparatus, to use, possesses this substrate for electrooptic device and the electro-optical device that constitutes and possess technical field this electro-optical device, electronic equipment such as for example liquid crystal projector.

Background technology

As the liquid-crystal apparatus of an example of this electro-optical device, not only as the direct viewing type display, but also many as for example light-modulating cell of projection display device (light valve).Particularly under the situation of projection display device, because the high light from light source can incide liquid crystal light valve, so will be built in the liquid crystal light valve as the photomask of the lightproof unit of blocking incident light, and make the thin film transistor (TFT) (TFT:Thin Film Transistor) in the liquid crystal light valve that the increase, misoperation etc. of leakage current can not take place because of this light.Relevant such lightproof unit or photomask, for example patent documentation 1 discloses the technology that utilization plays a role as gate electrode in the channel region of TFT sweep trace carries out shading.If adopt patent documentation 2, then be formed on a plurality of photomasks on the channel region and absorb the light that the catoptrical layer of inner face reduces the channel region that arrives TFT by setting.Patent documentation 3 discloses narrowization of guaranteeing of the suitable action that can realize TFT and sweep trace and has done one's utmost to reduce the technology of the incident light of the channel region that incides TFT.

On the other hand, in this electro-optical device, the zone that is formed with photomask on substrate, i.e. the zone that does not make light transmission on the substrate is provided with by temporary transient maintenance and is provided for the picture signal of pixel electrode and the current potential of pixel electrode is kept the maintenance electric capacity of certain hour.Such maintenance electric capacity will keep the electrode of the inscape of electric capacity to be also used as photomask as this, thereby can also carry out shading to TFT.

[patent documentation 1] spy opens the 2004-4722 communique

No. 3731447 communiques of [patent documentation 2] patent

[patent documentation 3] spy opens the 2003-262888 communique

But, illumination be mapped to be formed between channel region and the source and drain areas, for example LDD (Lightly Doped Drain, lightly doped drain) under the situation of engaging zones such as zone, exists and to produce the technical like this problem of light leakage current at engaging zones.For such problem, though consider on the engaging zones separately of the both sides of channel region, lightproof unit to be set, can make the open area of the light transmission in fact of pixel such result that narrows down, unsatisfactory from the viewpoint of display performance.On the other hand, the present inventor guesses, be mapped under the situation that is formed at the source and drain areas that is connected with pixel electrode and the engaging zones between the channel region in illumination, be mapped to illumination and be formed at the source and drain areas that is connected with data line and the situation of the engaging zones between the channel region is compared, be easy to generate the light leakage current of TFT.

In addition, if change the pattern that pixel switch is carried out the photomask of shading with semiconductor elements such as TFT in order to reduce the light leakage current, then also can there be the decline that will cause each aperture ratio of pixels or the decrease of contrast of display image, and the technical problem that the display performance of electro-optical device is descended.

On the other hand, in this electro-optical device,, also exist requirement for the thin spaceization of pixel with the miniaturization of implement device and the high-precision purpose that is refined as of display image.

And then, show in order to realize high quality images, wish not have display characteristic uneven of each pixel.

Summary of the invention

The present invention waits in view of the above problems and proposes, and its purpose is to provide a kind of and is for example becoming more meticulous as the electro-optical devices such as liquid-crystal apparatus, the generation that can reduce the light leakage current among the TFT effectively that drive in the active matrix mode, the height that can realize high aperture and display image and can reduce the substrate for electrooptic device that uses in the uneven electro-optical device of the display characteristic in each pixel, possess electro-optical device and electronic equipment that such substrate for electrooptic device is arranged.

In order to address the above problem, the 1st substrate for electrooptic device of the present invention possesses: substrate; Be arranged on many data lines on the aforesaid substrate; A plurality of pixel electrodes that form in a plurality of pixels of the pixel region on constituting aforesaid substrate respectively; In the zone that the 1st direction of extending along above-mentioned data line in each non-open area spaced apart from each other, open area of above-mentioned a plurality of pixels is extended, form and adjacent with an above-mentioned zone and along the formation and have the element portion of semiconductor layer of above-mentioned the 1st direction along above-mentioned the 1st direction along the 2nd direction of intersecting with above-mentioned the 1st direction with staggering 1 amount of pixels, this semiconductor layer comprises: (i) with above-mentioned many data lines in, the 1st data line side source and drain areas that a data line that extends along above-mentioned the 1st direction in an above-mentioned zone is electrically connected, (ii) be positioned at the 1st channel region and the 2nd channel region of the both sides of above-mentioned the 1st data line side source and drain areas along above-mentioned the 1st direction, (iii) from above-mentioned the 1st data line side source and drain areas, be arranged in each the outside and 1st pixel electrode mutually different and each the 1st pixel electrode side source and drain areas that is electrically connected and the 2nd pixel electrode side source and drain areas of the 2nd pixel electrode of above-mentioned the 1st channel region and the 2nd channel region with above-mentioned a plurality of pixel electrodes along above-mentioned the 1st direction, (iv) be formed on the 1st engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st data line side source and drain areas, (v) be formed on the 2nd engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st pixel electrode side source and drain areas, (vi) be formed on the 3rd engaging zones between above-mentioned the 2nd channel region and above-mentioned the 1st data line side source and drain areas, (vii) be formed on the 4th engaging zones between above-mentioned the 2nd channel region and above-mentioned the 2nd pixel electrode side source and drain areas; Form and cover the 1st light shielding part of above-mentioned the 1st engaging zones in the upper layer side of above-mentioned semiconductor layer, along above-mentioned the 1st direction; Upper layer side at above-mentioned semiconductor layer forms, covers width 2nd light shielding part wideer than above-mentioned the 1st light shielding part of above-mentioned the 2nd engaging zones and its above-mentioned the 2nd direction; Form and cover the 3rd light shielding part of above-mentioned the 3rd engaging zones in the upper layer side of above-mentioned semiconductor layer, along above-mentioned the 1st direction; And width 4th light shielding part wideer that forms, covers above-mentioned the 4th engaging zones and its above-mentioned the 2nd direction in the upper layer side of above-mentioned semiconductor layer than above-mentioned the 3rd light shielding part; Wherein, above-mentioned the 1st pixel electrode and the 2nd pixel electrode are configured in above-mentioned a plurality of pixel respectively, are formed with above-mentioned the 1st light shielding part and the 3rd light shielding part and in the mutual adjacent pixels of above-mentioned the 2nd direction.

If adopt the 1st substrate for electrooptic device of the present invention, then for example carry out the control of picture signal to a plurality of pixel electrodes from many data lines, can realize adopting the image of so-called active matrix mode to show.And, turn-off by making the element portion conducting that is electrically connected between data line and pixel electrode, picture signal is offered pixel electrode from data line via each element portion with predetermined timing.Pixel electrode for example is by ITO (Indium Tin Oxide, tin indium oxide) transparency electrode that constitutes of transparent conductive material such as, for example, by being defined as accordingly in each of rectangular a plurality of pixels 1 pixel electrode is set respectively, and it is arranged rectangularly with intersecting of data line and sweep trace.

In the present invention, especially, zone of in non-open area, along the 1st direction, extending and along the 2nd direction of intersecting with the 1st direction and this zone is adjacent and in upwardly extending another zone of the 1st side, in this zone and another interregionally be formed with a plurality of element portion along the 1st direction with staggering 1 amount of pixels.Thus, can make whole aperture opening ratio unanimity of a plurality of pixels that constitute the viewing area, and can not make each aperture ratio of pixels that reduces because of the formation light shielding part do one's utmost to reduce.Wherein, so-called " open area " of the present invention is the interior zone of pixel of in fact light transmission, for example, being the zone that is formed with pixel electrode, is the zone that the gray shade scale through the emergent light of electro-optical substances such as liquid crystal is changed.In other words, so-called " open area ", the light that expression is focused on the pixel can be by zones that occulter blocked such as wiring, photomask and various elements, wherein should wiring, that photomask and various element do not make light transmission or its light transmission rate compare with transparency electrode is relative less.So-called " non-open area " of the present invention, the zone that the light that expression is used to show can not see through for example is illustrated in the zone that is equipped with nontransparent wiring or occulters such as electrode or various elements in the pixel.So-called " the 1st direction " of the present invention is the direction that each extended of many data lines, for example is illustrated in the orientation (being the Y direction) that is defined as rectangular a plurality of pixels on the substrate, in other words, and the orientation that expression multi-strip scanning line is arranged.

And then in the present invention, especially, the 1st pixel electrode and the 2nd pixel electrode are configured in respectively and are formed with the 1st light shielding part and the 3rd light shielding part in a plurality of pixels and in the 2nd direction adjacent pixels.Therefore, the size of part that can each and each light shielding part of the 1st and the 2nd pixel electrode is overlapped is arranged to mutually almost or is identical.Thus, the display characteristic that is provided with the pixel of the 1st pixel electrode can be arranged to cardinal principle or identical mutually with the display characteristic that is provided with the pixel of the 2nd pixel electrode.Its result can improve the quality of display image.

In a kind of mode of the 1st substrate for electrooptic device of the present invention, each of above-mentioned the 1st to the 4th engaging zones is the LDD zone.

If adopt this mode, then when the element portion inoperative, can reduce and flow through between the 1st data line side source and drain areas and the 2nd pixel electrode side source and drain areas and the cut-off current between the 1st data line side source and drain areas and the 4th pixel electrode side source and drain areas, and can be suppressed at the reduction of the conducting electric current that flows through when element portion is worked.

In the another way of the 1st substrate for electrooptic device of the present invention, each of above-mentioned the 1st to the 4th light shielding part be configured in said elements portion directly over.

If adopt this mode, then can further reduce incident light for each light shielding part in the stepped construction on the substrate and the semiconductor layer oblique incidence between the element portion.

In the another way of the 1st substrate for electrooptic device of the present invention, the above-mentioned the 1st and the 2nd light shielding part constitutes the 1st capacity cell, and the 1st capacity cell has a pair of the 1st capacitance electrode and is clamped in the 1st dielectric film between this a pair of the 1st capacitance electrode; The the above-mentioned the 3rd and the 4th light shielding part constitutes the 2nd capacity cell, and the 2nd capacity cell has a pair of the 2nd capacitance electrode and is clamped in the 2nd dielectric film between this a pair of the 2nd capacitance electrode; Above-mentioned the 1st capacity cell when picture signal is provided for above-mentioned the 1st pixel electrode via an above-mentioned data line, keeps the current potential of above-mentioned the 1st pixel electrode; Above-mentioned the 2nd capacity cell when picture signal is provided for above-mentioned the 2nd pixel electrode via an above-mentioned data line, keeps the current potential of above-mentioned the 2nd pixel electrode.

If adopt this mode, then each of the 1st and the 2nd capacity cell is temporary transient each the maintenance electric capacity of current potential that keeps the 1st and the 2nd pixel electrode.By utilizing the 1st and the 2nd light shielding part to constitute the 1st capacity cell, utilize the 3rd and the 4th light shielding part to constitute the 2nd capacity cell, compare the layout that to simplify the circuit structure of this substrate for electrooptic device and constitute the wiring etc. of this circuit with the situation that other photomask is set.

Constitute in the mode of the 1st and the 2nd capacity cell at above-mentioned the 1st to the 4th light shielding part, in above-mentioned a pair of the 1st to the 2nd capacitance electrode, at least wherein any one a pair of capacitance electrode comprises conductive light shielding film and constitutes.

In the case, utilize in the upper layer side of element portion and for example can block reliably from the light of the upper layer side incident of semiconductor layer near each of the 1st and the 2nd capacity cell of configuration across interlayer dielectric.

In order to address the above problem, the 2nd substrate for electrooptic device of the present invention possesses: substrate; Be arranged on many data lines on the aforesaid substrate; A plurality of pixel electrodes that form in a plurality of pixels of the pixel region on constituting aforesaid substrate respectively; In the zone that the 1st direction of extending along above-mentioned data line in each non-open area spaced apart from each other, open area of above-mentioned a plurality of pixels is extended, form and adjacent with an above-mentioned zone and along the formation and have the element portion of semiconductor layer of above-mentioned the 1st direction along above-mentioned the 1st direction along the 2nd direction of intersecting with above-mentioned the 1st direction with staggering 1 amount of pixels, this semiconductor layer comprises: (i) with above-mentioned many data lines in, the 1st data line side source and drain areas that a data line that extends along above-mentioned the 1st direction in an above-mentioned zone is electrically connected, (ii) be positioned at the 1st channel region and the 2nd channel region of the both sides of above-mentioned the 1st data line side source and drain areas along above-mentioned the 1st direction, (iii) from above-mentioned the 1st data line side source and drain areas, be arranged in each the outside and 1st pixel electrode mutually different and each the 1st pixel electrode side source and drain areas that is electrically connected and the 2nd pixel electrode side source and drain areas of the 2nd pixel electrode of above-mentioned the 1st channel region and the 2nd channel region with above-mentioned a plurality of pixel electrodes along above-mentioned the 1st direction, (iv) be formed on the 1st engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st data line side source and drain areas, (v) be formed on the 2nd engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st pixel electrode side source and drain areas, (vi) be formed on the 3rd engaging zones between above-mentioned the 2nd channel region and above-mentioned the 1st data line side source and drain areas, (vii) be formed on the 4th engaging zones between above-mentioned the 2nd channel region and above-mentioned the 2nd pixel electrode side source and drain areas; Form and cover the 1st light shielding part of above-mentioned the 1st engaging zones in the upper layer side of above-mentioned semiconductor layer, along above-mentioned the 1st direction; Upper layer side at above-mentioned semiconductor layer forms, covers width 2nd light shielding part wideer than above-mentioned the 1st light shielding part of above-mentioned the 2nd engaging zones and its above-mentioned the 2nd direction; Form and cover the 3rd light shielding part of above-mentioned the 3rd engaging zones in the upper layer side of above-mentioned semiconductor layer, along above-mentioned the 1st direction; And width 4th light shielding part wideer that forms, covers above-mentioned the 4th engaging zones and its above-mentioned the 2nd direction in the upper layer side of above-mentioned semiconductor layer than above-mentioned the 3rd light shielding part; Wherein, above-mentioned the 1st pixel electrode is configured in above-mentioned a plurality of pixel, is formed with above-mentioned the 2nd light shielding part and in any one of the mutual adjacent pixels of above-mentioned the 2nd direction; Above-mentioned the 2nd pixel electrode is configured in above-mentioned a plurality of pixel, be formed with above-mentioned the 4th light shielding part and in any one of the mutual adjacent pixels of above-mentioned the 2nd direction.

If adopt the 2nd substrate for electrooptic device of the present invention, then with the 1st substrate for electrooptic device of the invention described above roughly similarly, can realize adopting the image of so-called active matrix mode to show.

In the present invention, same with the 1st substrate for electrooptic device of the invention described above, zone of in non-open area, along the 1st direction, extending and along the 2nd direction of intersecting with the 1st direction and this zone is adjacent and in upwardly extending another zone of the 1st side, in this zone and another interregionally be formed with a plurality of element portion along the 1st direction with staggering 1 amount of pixels.Thus, can make whole aperture opening ratio unanimity of a plurality of pixels that constitute the viewing area, and can not make each aperture ratio of pixels that reduces because of the formation light shielding part do one's utmost to reduce.

In the present invention, especially, the 1st pixel electrode is configured in and is formed with the 2nd light shielding part in a plurality of pixels and in any one of the mutual adjacent pixels of the 2nd direction, and the 2nd pixel electrode is configured in and is formed with the 4th light shielding part in a plurality of pixels and in any one of the mutual adjacent pixels of the 2nd direction.Promptly, the pixel that each was configured to of the 1st and the 2nd pixel electrode, be unified in a plurality of pixels, with the overlapping pixel of the 2nd and the 4th light shielding part on, wherein the 2nd and the 4th light shielding part covers the 2nd and the 4th junction surface of the element portion that is electrically connected with the 1st and the 2nd pixel electrode respectively.Thereby the size of part that can each and each light shielding part of the 1st and the 2nd pixel electrode is overlapped is arranged to mutually substantially or is identical.Thus, the display characteristic that is provided with the pixel of the 1st pixel electrode can be arranged to cardinal principle or identical mutually with the display characteristic that is provided with the pixel of the 2nd pixel electrode.Its result can improve the quality of display image.

In order to address the above problem, the 1st electro-optical device of the present invention possesses the of the present invention the 1st or the 2nd above-mentioned substrate for electrooptic device (comprising its variety of way).

If adopt the 1st electro-optical device of the present invention,, show so can carry out high quality images then because possess the of the present invention the 1st or the 2nd above-mentioned substrate for electrooptic device.

In order to address the above problem, the 1st electronic equipment of the present invention possesses above-mentioned the 1st electro-optical device of the present invention (also comprising its variety of way).

If adopt the 1st electronic equipment of the present invention, then constitute, so can realize to carry out projection display device, televisor, mobile phone, electronic notebook, word processor that high quality images shows, various electronic equipments such as find a view type or monitor direct viewing type video recorder, workstation, videophone, POS terminal, touch panel because possessing above-mentioned the 1st electro-optical device of the present invention.In addition, as the 1st electronic equipment of the present invention, for example also can realize electrophoretic apparatus, electron emitting device (the Field Emission Display of electronic paper etc., field-emitter display, and Conduction Electron-Emitter Display, the conduction type electron emission display device), used the display device of these electrophoretic apparatuss, electron emitting device.

In order to address the above problem, the 3rd substrate for electrooptic device of the present invention possesses: substrate; Cross one another many data lines and multi-strip scanning line on aforesaid substrate; Be prescribed accordingly with intersecting of above-mentioned many data lines and above-mentioned multi-strip scanning line and a plurality of pixels of the viewing area on constituting aforesaid substrate in a plurality of pixel electrodes of forming; In the zone that the 1st direction of extending along above-mentioned data line in each non-open area spaced apart from each other, open area of above-mentioned a plurality of pixels is extended, form and have the 1st element portion of the 1st semiconductor layer along above-mentioned the 1st direction, the 1st semiconductor layer comprises: (i) with above-mentioned many data lines in, the 1st data line side source and drain areas that a data line that extends along above-mentioned the 1st direction in an above-mentioned zone is electrically connected, (ii) be positioned at the 1st channel region and the 2nd channel region of the both sides of above-mentioned the 1st data line side source and drain areas along above-mentioned the 1st direction, (iii) from above-mentioned the 1st data line side source and drain areas, be arranged in each the outside and 1st pixel electrode mutually different and each the 1st pixel electrode side source and drain areas that is electrically connected and the 2nd pixel electrode side source and drain areas of the 2nd pixel electrode of the above-mentioned the 1st and the 2nd channel region with above-mentioned a plurality of pixel electrodes along above-mentioned the 1st direction, (iv) be formed on the 1st engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st data line side source and drain areas, (v) be formed on the 2nd engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st pixel electrode side source and drain areas, (vi) be formed on the 3rd engaging zones between above-mentioned the 2nd channel region and above-mentioned the 1st data line side source and drain areas, (vii) be formed on the 4th engaging zones between above-mentioned the 2nd channel region and above-mentioned the 2nd pixel electrode side source and drain areas; Adjacent with an above-mentioned zone and in upwardly extending another zone of above-mentioned the 1st side along the 2nd direction of intersecting with above-mentioned the 1st direction in above-mentioned non-open area, see along above-mentioned the 1st direction 1 amount of pixels ground that staggers from above-mentioned the 1st element portion and to form and have the 2nd element portion of the 2nd semiconductor layer, the 2nd semiconductor layer comprises: (viii) with above-mentioned many data lines in, the 2nd data line side source and drain areas that another data line that extends along above-mentioned the 1st direction in above-mentioned another zone is electrically connected, (ix) on above-mentioned the 1st direction, from above-mentioned the 2nd data line side source and drain areas, be formed on and the 3rd channel region of a side same side that is formed with above-mentioned the 1st channel region and the 4th channel region that is formed on and is formed with a side same side of above-mentioned the 2nd channel region, (x) from above-mentioned the 2nd data line side source and drain areas, be arranged in each the outside and 3rd pixel electrode mutually different and the 4th pixel electrode the 3rd pixel electrode side source and drain areas and the 4th pixel electrode side source and drain areas that are electrically connected of the above-mentioned the 3rd and the 4th channel region with above-mentioned a plurality of pixel electrodes along above-mentioned the 1st direction, (xi) be formed on the 5th engaging zones between above-mentioned the 3rd channel region and above-mentioned the 2nd data line side source and drain areas, (xii) be formed on the 6th engaging zones between above-mentioned the 3rd channel region and above-mentioned the 3rd pixel electrode side source and drain areas; (xiii) be formed on the 7th engaging zones between above-mentioned the 4th channel region and above-mentioned the 2nd data line side source and drain areas, (xiv) be formed on the 8th engaging zones between above-mentioned the 4th channel region and above-mentioned the 4th pixel electrode side source and drain areas; Form and cover the 1st light shielding part of above-mentioned the 1st engaging zones in the upper layer side of above-mentioned the 1st semiconductor layer, along above-mentioned the 1st direction; Upper layer side at above-mentioned the 1st semiconductor layer forms, covers width 2nd light shielding part wideer than above-mentioned the 1st light shielding part of above-mentioned the 2nd engaging zones and its above-mentioned the 2nd direction; Form and cover the 3rd light shielding part of above-mentioned the 3rd engaging zones in the upper layer side of above-mentioned the 1st semiconductor layer, along above-mentioned the 1st direction; Upper layer side at above-mentioned the 1st semiconductor layer forms, covers width 4th light shielding part wideer than above-mentioned the 3rd light shielding part of above-mentioned the 4th engaging zones and its above-mentioned the 2nd direction; Form and cover the 5th light shielding part of above-mentioned the 5th engaging zones in the upper layer side of above-mentioned the 2nd semiconductor layer, along above-mentioned the 1st direction; Upper layer side at above-mentioned the 2nd semiconductor layer forms, covers width 6th light shielding part wideer than above-mentioned the 5th light shielding part of above-mentioned the 6th engaging zones and its above-mentioned the 2nd direction; Form and cover the 7th light shielding part of above-mentioned the 7th engaging zones in the upper layer side of above-mentioned the 2nd semiconductor layer, along above-mentioned the 1st direction; Upper layer side at above-mentioned the 2nd semiconductor layer forms, covers width 8th light shielding part wideer than above-mentioned the 7th light shielding part of above-mentioned the 8th engaging zones and its above-mentioned the 2nd direction; Wherein, the above-mentioned the 1st and the 2nd pixel electrode is configured in above-mentioned a plurality of pixel respectively, is formed with the above-mentioned the 1st and the 3rd light shielding part and in the mutual adjacent pixels of above-mentioned the 2nd direction; The the above-mentioned the 3rd and the 4th pixel electrode is configured in above-mentioned a plurality of pixel respectively, be formed with the above-mentioned the 5th and the 7th light shielding part and in the mutual adjacent pixels of above-mentioned the 2nd direction.

If adopt the 3rd substrate for electrooptic device of the present invention, then for example carry out the control of picture signal to a plurality of pixel electrodes from many data lines, can realize adopting the image of so-called active matrix mode to show.And, turn-off by each conducting that makes the 1st element portion that is electrically connected between data line and pixel electrode and the 2nd element portion, picture signal is offered pixel electrode from data line via each element portion with predetermined timing.Pixel electrode for example is by ITO (Indium Tin Oxide, tin indium oxide) transparency electrode that constitutes of transparent conductive material such as, for example, by being defined as accordingly in each of rectangular a plurality of pixels 1 pixel electrode is set respectively, and it is arranged rectangularly with intersecting of data line and sweep trace.

The 1st element portion on the zone that the 1st direction of extending along data line in each non-open area spaced apart from each other, open area of above-mentioned a plurality of pixels is extended, forms along the 1st direction.At this, so-called " open area " of the present invention is the interior zone of pixel of in fact light transmission, for example, being the zone that is formed with pixel electrode, is the zone that the gray shade scale through the emergent light of electro-optical substances such as liquid crystal is changed.In other words, so-called " open area ", the light that expression is focused on the pixel can be by zones that occulter blocked such as wiring, photomask and various elements, wherein should wiring, that photomask and various element do not make light transmission or its light transmission rate compare with transparency electrode is relative less.So-called " non-open area " of the present invention, the zone that the light that expression is used to show can not see through for example is illustrated in the zone that is equipped with nontransparent wiring or occulters such as electrode or various elements in the pixel.So-called " the 1st direction " of the present invention is the direction that each extended of many data lines, for example is illustrated in the orientation (being the Y direction) that is defined as rectangular a plurality of pixels on the substrate, in other words, and the orientation that expression multi-strip scanning line is arranged.

The part of 2 transistor units of the 1st semiconductor layer configuration example such as shared the 1st data line side source and drain areas.In the 1st element portion, the 1st data line side source and drain areas is for example by shared along 2 adjacent mutually transistor unit institutes of the 1st direction.Each of each of the 1st pixel electrode side source and drain areas and the 2nd pixel electrode side source and drain areas and the 1st pixel electrode and the 2nd pixel electrode is electrically connected mutually.2 transistor units like this, possessing electro-optical device when work that this substrate for electrooptic device is arranged, picture signal is being offered each of the 1st different mutually pixel electrodes and the 2nd pixel electrode via each of the 1st pixel electrode side source and drain areas and the 2nd pixel electrode side source and drain areas.

In the 1st semiconductor layer, between the 1st channel region and the 1st data line side source and drain areas, be formed with the 1st engaging zones, between the 1st channel region and the 1st pixel electrode side source and drain areas, be formed with the 2nd engaging zones, between the 2nd channel region and the 1st data line side source and drain areas, be formed with the 3rd engaging zones, between the 2nd channel region and the 2nd pixel electrode side source and drain areas, be formed with the 4th engaging zones.The 1st engaging zones is the zone that is formed the junction surface of the 1st channel region and the 1st data line side source and drain areas, the 2nd engaging zones is the zone that is formed the junction surface of the 1st channel region and the 1st pixel electrode side source and drain areas, the 3rd engaging zones is the zone that is formed the junction surface of the 2nd channel region and the 1st data line side source and drain areas, and the 4th engaging zones is the zone that is formed the junction surface of the 2nd channel region and the 2nd pixel electrode side source and drain areas.Promptly, each of the 1st to the 4th engaging zones, for example for example (promptly as positive-negative-positive or NPN transistor with transistor unit, P channel-type or N channel transistor) expression PN engaging zones under the situation about forming, has expression LDD zone under the situation of LDD structure (that is, for example utilize impurity such as ion implantation to be infused in and inject the impurity that lacks than each source and drain areas amount in the semiconductor layer and the extrinsic region that constitutes) at transistor unit.

Being included in 2 transistor units in the 1st element portion, is that reference mirror is faced the formation of title ground along the 1st direction with the 1st data line side source and drain areas.Therefore, compare, can reduce these 2 transistor units along the occupied zone of the 1st direction with the situation that forms data line side source and drain areas by each of transistor unit, can be along the 1st direction constriction pel spacing.

The 2nd element portion on mutual adjacent another zone in the 2nd direction of intersecting along the 1st direction of extending with data line in each non-open area spaced apart from each other, open area of above-mentioned a plurality of pixels and zone, forms along the 1st direction.At this, so-called " the 2nd direction " of the present invention is the direction of intersecting with the 1st direction, for example is illustrated in the line direction (that is, the x direction) that is defined as rectangular a plurality of pixels on the substrate, in other words, represents the orientation that many data lines are arranged.

The part of 2 transistor units of the 2nd semiconductor layer configuration example such as shared the 2nd data line side source and drain areas.In the 2nd element portion, the 2nd data line side source and drain areas is for example by shared along 2 adjacent mutually transistor unit institutes of the 1st direction.Each of each of the 3rd pixel electrode side source and drain areas and the 4th pixel electrode side source and drain areas and the 3rd pixel electrode and the 4th pixel electrode is electrically connected mutually.2 transistor units like this, possessing electro-optical device when work that this substrate for electrooptic device is arranged, picture signal is being offered along each of adjacent mutually the 3rd pixel electrode of the 1st direction and the 4th pixel electrode via each of the 3rd pixel electrode side source and drain areas and the 4th pixel electrode side source and drain areas.

In the 2nd semiconductor layer, between the 3rd channel region and the 2nd data line side source and drain areas, be formed with the 5th engaging zones, between the 3rd channel region and the 3rd pixel electrode side source and drain areas, be formed with the 6th engaging zones, between the 4th channel region and the 2nd data line side source and drain areas, be formed with the 7th engaging zones, between the 4th channel region and the 4th pixel electrode side source and drain areas, be formed with the 8th engaging zones.The the 5th to the 8th engaging zones has and the same structure of above-mentioned the 1st to the 4th engaging zones.

Being included in 2 transistor units in the 2nd element portion, is that reference mirror is faced the formation of title ground along the 1st direction with the 2nd data line side source and drain areas.Therefore, compare, can reduce these 2 transistor units along the occupied zone of the 1st direction with the situation that forms data line side source and drain areas by each of transistor unit, can be along the 1st direction constriction pel spacing.

The 1st light shielding part in the stepped construction on substrate, in the upper layer side of the 1st semiconductor layer, along the formation of the 1st direction, and covers the 1st engaging zones.The 2nd light shielding part in the upper layer side formation of the 1st semiconductor layer, and covers the 2nd engaging zones.The 3rd light shielding part in the upper layer side of the 1st semiconductor layer, along the formation of the 1st direction, and covers the 3rd engaging zones.The 4th light shielding part in the upper layer side formation of the 1st semiconductor layer, and covers above-mentioned the 4th engaging zones.Thus, each that can utilize the 1st to the 4th light shielding part blocks the light that incides the 1st to the 4th engaging zones from upper layer side, can reduce the generation of the light leakage current in the 1st to the 4th engaging zones.

In the present invention, especially, cover the 2nd light shielding part of the 2nd engaging zones, the width of the 2nd direction of intersecting with itself and the 1st direction constitutes than the wide mode of the 1st light shielding part that covers the 1st engaging zones.That is, the 2nd light shielding part, with respect to the 1st semiconductor layer that for example extends along the Y direction, its for example the width mode wideer of directions X than the 1st light shielding part constitute.In other words, the 2nd light shielding part has the extension that extends more longways than the 1st light shielding part along the 2nd direction.Thereby, can block the light that incides the 2nd engaging zones more reliably than the light that incides the 1st engaging zones.That is, compare, can further improve the light-proofness that (that is, strengthening) blocks the light that arrives the 2nd engaging zones with the light-proofness that the light that arrives the 1st engaging zones is blocked.

And then, covering the 4th light shielding part of the 4th engaging zones, the width of the 2nd direction of intersecting with itself and the 1st direction constitutes than the wide mode of the 3rd light shielding part that covers the 3rd engaging zones.Thereby, can block the light that incides the 4th engaging zones more reliably than the light that incides the 3rd engaging zones.

At this, the present application people guesses, and when transistor is worked, and is formed at channel region and compares with the engaging zones between the data line side source and drain areas, on the engaging zones that is formed between channel region and the pixel electrode side source and drain areas, the light leakage current relatively easily produces.That is, the present application people guesses, and when the 1st element portion is worked, compares with the 1st engaging zones, relatively easily produces at the 2nd engaging zones light leakage current, and guesses, and compares with the 3rd engaging zones, relatively easily produces at the 4th engaging zones light leakage current.Thereby, form in mode to have width and 4th light shielding part wideer by the 2nd light shielding part than the 1st light shielding part with width wideer than the 3rd light shielding part, light-proofness can be improved, the light leakage current that flows through the 1st element portion can be reduced effectively at relatively easy the 2nd and the 4th engaging zones that produces of light leakage current.On the contrary, cover the 1st and the 3rd light shielding part of comparing relative the 1st and the 3rd engaging zones that is difficult to produce of light leakage current with the 2nd and the 4th engaging zones respectively by making, form respectively in mode, can prevent the reduction in rain of aperture opening ratio with width narrower than the 2nd and the 4th light shielding part.

Thereby, by widely forming the width of the 2nd and the 4th light shielding part, light-proofness can be improved, and, the reduction in rain of aperture opening ratio can be prevented by the narrowly formed the 1st and the width of the 3rd light shielding part at relatively easy the 2nd and the 4th engaging zones that produces of light leakage current.That is, concentrate target ground to improve the light-proofness of the 2nd and the 4th engaging zones that is easy to generate at the light leakage current, can reduce the light leakage current in the 1st element portion effectively, and can not cause the reduction in rain of aperture opening ratio by what is called.At this, so-called " aperture opening ratio ", expression comprises the ratio in size split shed zone of the pixel of open area and non-open area, and aperture opening ratio is big more, and the display performance that possesses the electro-optical device that substrate for electrooptic device of the present invention is arranged will improve more.

And each of the 1st to the 4th light shielding part and the 5th to the 8th light shielding part that illustrates later can be the membranaceous occulter that is made of individual layer with light-proofness or multilayer as photomask, also can be the various elements that comprise the electrode with light-proofness.

The 5th light shielding part in the upper layer side of the 2nd semiconductor layer, along the formation of the 1st direction, and covers the 5th engaging zones.The 6th light shielding part in the upper layer side formation of the 2nd semiconductor layer, cover the 6th engaging zones, and the width of its 2nd direction is wideer than the 5th light shielding part.The 7th light shielding part in the upper layer side of the 2nd semiconductor layer, along the formation of the 1st direction, and covers the 7th engaging zones.The 8th light shielding part in the upper layer side formation of the 2nd semiconductor layer, cover the 8th engaging zones, and the width of its 2nd direction is wideer than the 7th light shielding part.Thereby, then same if adopt the 5th to the 8th light shielding part with the 1st to the 4th light shielding part, can block the 5th to the 8th engaging zones, can reduce the generation of the light leakage current in the 5th to the 8th engaging zones.Especially, if adopt the 6th and the 8th light shielding part, then same with the 2nd and the 4th light shielding part, owing to can concentrate target ground to carry out shading to compare relatively easy the 6th and the 8th engaging zones that produces of light leakage current with the 5th and the 7th engaging zones, so can not cause the reduction in rain of aperture opening ratio, and can reduce the light leakage current in the 2nd element portion effectively.

At this, the 3rd substrate for electrooptic device of the present invention, because possess the 1st to the 8th light shielding part, so do not take any measure and only along the 2nd direction side by side under the situation of configuration the 1st element portion and the 2nd element portion in hypothesis, on aperture opening ratio, will produce difference along each of the mutual adjacent pixels of the 1st direction.More particularly, because each of the 1st element portion and the 2nd element portion is in each of a zone and another zone, provide picture signal separately along 2 mutually adjacent pixel electrodes of the 1st direction, so in hypothesis with the 1st element portion and the 2nd element portion along the 2nd direction, for example the direction of extending along sweep trace (promptly, directions X) under situation about disposing accordingly with delegation, will be along the 1st direction, for example dispose the 1st light shielding part in a side in 2 pixels that the Y direction of data line extension is adjacent mutually, the 3rd light shielding part, the 5th light shielding part and the 7th light shielding part, the width that disposes its 2nd direction at opposite side is than the 1st light shielding part, the 3rd light shielding part, the 2nd light shielding part that the 5th light shielding part and the 7th light shielding part are wide, the 4th light shielding part, the 6th light shielding part and the 8th light shielding part.If adopt such light shielding part, then the aperture opening ratio in one of them pixel is littler than the aperture opening ratio in the one other pixel, thus in 2 mutually adjacent pixels of Y direction, with the width of light shielding part different accordingly, on aperture opening ratio, will produce difference.The difference of this aperture opening ratio, under the situation in a plurality of pixels that have been formed on the formation viewing area are all, compare with the situation that light shielding part is not set, will produce show inhomogeneous, thereby the display performance that possesses the electro-optical device that substrate for electrooptic device is arranged is reduced.

Thereby, in the present invention, especially, in non-open area, along the 2nd direction of intersecting with the 1st direction and zone is adjacent and in upwardly extending another zone of the 1st side, see along the 1st direction 1 the amount of pixels ground that staggers from the 1st element portion to be formed with the 2nd element portion.That is, the 1st element portion and the 2nd element portion, along the Y direction that the 1st direction, for example data line extend, 1 the amount of pixels ground configuration of staggering mutually.Thereby, each of the 1st to the 8th light shielding part, with cover mode that each light shielding part should carry out the engaging zones of shading, along the configuration mutually of the 1st direction with staggering.More particularly, in 2 adjacent mutually pixels of the 1st direction, the 2nd light shielding part (and the 4th light shielding part) is overlapping with a pixel, and the 6th light shielding part (and the 8th light shielding part) is overlapping with one other pixel.Thereby, can make whole aperture opening ratio unanimity of a plurality of pixels that constitute the viewing area, and can not make each aperture ratio of pixels that reduces because of the formation light shielding part do one's utmost to reduce.

And then in the present invention, especially, the 1st and the 2nd pixel electrode is configured in respectively and is formed with the 1st and the 3rd light shielding part in a plurality of pixels and in the mutual adjacent pixels of the 2nd direction.Promptly, the 1st pixel electrode and the 2nd pixel electrode that are electrically connected with the 1st element portion, see respectively overlapping and (promptly along the 2nd direction with the 1st and the 3rd light shielding part as plane earth in a plurality of pixel electrodes, on substrate, directions X) mutual adjacent pixel electrodes and being provided with, wherein the 1st and the 3rd light shielding part covers the 1st and the 3rd engaging zones of the 1st element portion respectively.In other words, the 1st pixel electrode side source and drain areas of the 1st element portion and the 2nd pixel electrode side source and drain areas, respectively with a plurality of pixel electrodes of arranging rectangularly in, on substrate plane earth see with the 1st and the 3rd light shielding part overlapping, in 2 mutually adjacent pixel electrodes of the 2nd direction any one be electrically connected, wherein the 1st and the 3rd light shielding part covers the 1st junction surface and the 3rd junction surface of the 1st element portion respectively.That is, each of the 1st and the 2nd pixel electrode seen with plane earth on substrate, and be all partly overlapping and be not provided with the overlapping mode of the 2nd light shielding part or the 4th light shielding part with the 1st and the 3rd light shielding part.Promptly, the pixel that each was configured to of the 1st and the 2nd pixel electrode, be unified in a plurality of pixels, with the overlapping pixel of the 1st and the 3rd light shielding part on, wherein the 1st and the 3rd light shielding part covers the 1st and the 3rd junction surface of the 1st element portion that is electrically connected with the 1st and the 2nd pixel electrode respectively.

At this, in the conduct of hypothesis the 1st and the 2nd pixel electrode (promptly along the 1st direction, the Y direction) mutual adjacent pixel electrodes and under the situation about being provided with, promptly, for example, be provided with at the partly overlapping pixel electrode of the conduct of the 1st pixel electrode and the width of its 2nd direction the 2nd light shielding part wideer than the 1st light shielding part, the 2nd pixel electrode is as under the situation about being provided with the partly overlapping pixel electrode of the 1st light shielding part, because each of the 1st and the 2nd pixel electrode is different mutually with the size of the overlapped part of each light shielding part, so, for example and data line being electrically connected of the 1st element portion and the stray capacitance between the 1st pixel electrode, this data line will be different mutually with stray capacitance between the 2nd pixel electrode.And then, in the case, for example, stray capacitance between stray capacitance, this another data line and the 2nd pixel electrode between another data line adjacent with a data line that is connected electrically to the 1st element portion (in other words, another data line that is electrically connected with the 2nd element portion) and the 1st pixel electrode will be different mutually.Thereby the current potential retention performance of possible the 1st pixel electrode will be different mutually with the current potential retention performance of the 2nd pixel electrode.Thereby the display characteristic that is provided with the pixel of the 1st pixel electrode might be different mutually with the display characteristic of the pixel that is provided with the 2nd pixel electrode.

But in the present invention, especially, as mentioned above, the 1st and the 2nd pixel electrode is configured in a plurality of pixels respectively, be formed with the 1st and the 3rd light shielding part and in the mutual adjacent pixels of the 2nd direction.Thereby, because each of the 1st and the 2nd pixel electrode, plane earth is seen on substrate, all partly overlapping and not overlapping (in more detail with the 2nd light shielding part or the 4th light shielding part with the 1st and the 3rd light shielding part, in the case, further, partly overlapping with the 6th light shielding part and the 8th light shielding part, and not overlapping with the 5th light shielding part or the 7th light shielding part), so the size of part that can each and light shielding part of the 1st and the 2nd pixel electrode is overlapped is arranged to mutually substantially or is identical.Thereby, for example, can be substantially or eliminate poor with the stray capacitance between the stray capacitance between the 1st pixel electrode, same the 2nd pixel electrode of this data line of a data line being electrically connected with the 1st element portion fully.And then, can be substantially or eliminate fully and be electrically connected at another adjacent data line of a data line on the 1st element portion (in other words, and another data line of being electrically connected of the 2nd element portion) poor with the stray capacitance between the 1st pixel electrode, this another data line with the stray capacitance between the 2nd pixel electrode.Thus, the current potential retention performance of the 1st pixel electrode and the current potential retention performance of the 2nd pixel electrode can be arranged to cardinal principle or identical mutually.Its result can be arranged to cardinal principle or identical mutually with the display characteristic that is provided with the pixel of the 2nd pixel electrode with the display characteristic that is provided with the pixel of the 1st pixel electrode.

In addition, in the present invention, especially, the 3rd and the 4th pixel electrode is configured in a plurality of pixels respectively, be formed with the 5th and the 7th light shielding part and in the mutual adjacent pixels of the 2nd direction.Promptly, the 3rd pixel electrode that is electrically connected with the 2nd element portion and the 4th pixel electrode are seen respectively overlapping and along the 2nd direction (promptly with the 5th and the 7th light shielding part as plane earth in a plurality of pixel electrodes, on substrate, directions X) mutual adjacent pixel electrodes and being provided with, wherein the 5th and the 7th light shielding part covers the 5th and the 7th engaging zones of the 2nd element portion.Promptly, and the 1st and the 2nd above-mentioned pixel electrode and the relation of the position between the 1st to the 4th light shielding part are same, each of the 3rd and the 4th pixel electrode seen all partly overlapping and be not provided with the overlapping mode of the 6th light shielding part or the 8th light shielding part with the 5th and the 7th light shielding part with plane earth on substrate.Thereby, the display characteristic that is provided with the pixel of the 3rd pixel electrode can be arranged to cardinal principle or identical mutually with the display characteristic that is provided with the pixel of the 4th pixel electrode.

And then, by each the width of the 2nd direction of the 1st light shielding part, the 3rd light shielding part, the 5th light shielding part, the 7th light shielding part being arranged to mutually substantially or identical and each the width of the 2nd direction of the 2nd light shielding part, the 4th light shielding part, the 6th light shielding part, the 8th light shielding part is arranged to mutually substantially or identical, the display characteristic that is respectively arranged with each pixel of the 1st to the 4th pixel electrode further can be arranged to reliably mutually substantially or identical.That is, the display characteristic that constitutes each pixel of viewing area can be arranged to cardinal principle or even fully.Its result can improve the quality of display image.

As mentioned above, if adopt the 3rd substrate for electrooptic device of the present invention, then can not cause the reduction in rain of aperture opening ratio, show badly and can reduce flicker that the generation because of the light leakage current takes place etc., and it is bad to reduce the demonstration that the difference because of each aperture ratio of pixels causes.And then, the display characteristic of each pixel can be arranged to cardinal principle or identical mutually.Its result if adopt substrate for electrooptic device of the present invention, can realize that then high quality images shows.

In a kind of mode of the 3rd substrate for electrooptic device of the present invention, each of above-mentioned the 1st to the 8th engaging zones is the LDD zone.

If adopt this mode, then when the 1st element portion and the 2nd element portion inoperative, can be reduced between the 1st data line side source and drain areas and the 2nd pixel electrode side source and drain areas and the cut-off current that flows through between the 2nd data line side source and drain areas and the 4th pixel electrode side source and drain areas, and the reduction of the conducting electric current that flows through can be suppressed at each work of the 1st element portion and the 2nd element portion the time.

In the another way of the 3rd substrate for electrooptic device of the present invention, each of above-mentioned the 1st to the 8th light shielding part be configured in the above-mentioned the 1st and the 2nd element portion each directly over.

If adopt this mode, then can further reduce for the 1st semiconductor layer between each light shielding part in the stepped construction on the substrate and the 1st element portion and the 2nd element portion and the incident light of the 2nd semiconductor layer oblique incidence.More particularly, compare with the situation that between each light shielding part and the 1st element portion and the 2nd element portion, gets involved other photomasks different with these light shielding parts, can make the distance of stacked direction of each light shielding part and the 1st element portion and the 2nd element portion approaching, thus can utilize each light shielding part block normal direction separately with respect to corresponding the 1st semiconductor layer and the 2nd semiconductor layer with more large-angle inclined to the light that incides these semiconductor layers.

In the another way of the 3rd substrate for electrooptic device of the present invention, the above-mentioned the 1st and the 2nd light shielding part constitutes the 1st capacity cell, and the 1st capacity cell has a pair of the 1st capacitance electrode and is clamped in the 1st dielectric film between this a pair of the 1st capacitance electrode; The the above-mentioned the 3rd and the 4th light shielding part constitutes the 2nd capacity cell, and the 2nd capacity cell has a pair of the 2nd capacitance electrode and is clamped in the 2nd dielectric film between this a pair of the 2nd capacitance electrode; The the above-mentioned the 5th and the 6th light shielding part constitutes the 3rd capacity cell, and the 3rd capacity cell has a pair of the 3rd capacitance electrode and is clamped in the 3rd dielectric film between this a pair of the 3rd capacitance electrode; The the above-mentioned the 7th and the 8th light shielding part constitutes the 4th capacity cell, and the 4th capacity cell has a pair of the 4th capacitance electrode and is clamped in the 4th dielectric film between this a pair of the 4th capacitance electrode; Above-mentioned the 1st capacity cell when picture signal is provided for above-mentioned the 1st pixel electrode via an above-mentioned data line, keeps the current potential of above-mentioned the 1st pixel electrode; Above-mentioned the 2nd capacity cell when picture signal is provided for above-mentioned the 2nd pixel electrode via an above-mentioned data line, keeps the current potential of above-mentioned the 2nd pixel electrode; Above-mentioned the 3rd capacity cell when picture signal is provided for above-mentioned the 3rd pixel electrode via above-mentioned another data line, keeps the current potential of above-mentioned the 3rd pixel electrode; Above-mentioned the 4th capacity cell when picture signal is provided for above-mentioned the 4th pixel electrode via above-mentioned another data line, keeps the current potential of above-mentioned the 4th pixel electrode.

If adopt this mode, then each of the 1st to the 4th capacity cell is temporary transient each the maintenance electric capacity of current potential that keeps the 1st to the 4th pixel electrode.By utilizing the 1st and the 2nd light shielding part to constitute the 1st capacity cell, utilize the 3rd and the 4th light shielding part to constitute the 2nd capacity cell, utilize the 5th and the 6th light shielding part to constitute the 3rd capacity cell, utilize the 7th and the 8th light shielding part to constitute the 4th capacity cell, compare the layout that to simplify the circuit structure of this substrate for electrooptic device and constitute the wiring etc. of this circuit with the situation that other photomask is set.

Constitute in the mode of the 1st to the 4th capacity cell at above-mentioned the 1st to the 8th light shielding part, in above-mentioned a pair of the 1st to the 4th capacitance electrode, at least wherein any one a pair of capacitance electrode comprises conductive light shielding film and constitutes.

If adopt this mode, then utilizing for example can be near each of the 1st to the 4th capacity cell of configuration across interlayer dielectric in each upper layer side of the 1st element portion and the 2nd element portion, can block each the light of upper layer side incident from the 1st semiconductor layer and the 2nd semiconductor layer reliably.And, as conductive light shielding film, for example can list the electric conductivity polysilicon or comprise the material that at least a metal monomer, alloy, metal silicide, multi-crystal silicification thing, these materials in titanium (Ti), chromium (Cr), tungsten (W), tantalum (Ta), the manganese refractory metals such as (Mo) are laminated, perhaps tungsten silicide.

In order to address the above problem, the 4th substrate for electrooptic device of the present invention possesses: substrate; Cross one another many data lines and multi-strip scanning line on aforesaid substrate; Be prescribed accordingly with intersecting of above-mentioned many data lines and above-mentioned multi-strip scanning line and a plurality of pixels of the viewing area on constituting aforesaid substrate in a plurality of pixel electrodes of forming; In the zone that the 1st direction of extending along above-mentioned data line in each non-open area spaced apart from each other, open area of above-mentioned a plurality of pixels is extended, form and have the 1st element portion of the 1st semiconductor layer along above-mentioned the 1st direction, the 1st semiconductor layer comprises: (i) with above-mentioned many data lines in, the 1st data line side source and drain areas that a data line that extends along above-mentioned the 1st direction in an above-mentioned zone is electrically connected, (ii) be positioned at the 1st channel region and the 2nd channel region of the both sides of above-mentioned the 1st data line side source and drain areas along above-mentioned the 1st direction, (iii) from above-mentioned the 1st data line side source and drain areas, be arranged in each the outside and 1st pixel electrode mutually different and each the 1st pixel electrode side source and drain areas that is electrically connected and the 2nd pixel electrode side source and drain areas of the 2nd pixel electrode of above-mentioned the 1st channel region and above-mentioned the 2nd channel region with above-mentioned a plurality of pixel electrodes along above-mentioned the 1st direction, (iv) be formed on the 1st engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st data line side source and drain areas, (v) be formed on the 2nd engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st pixel electrode side source and drain areas, (vi) be formed on the 3rd engaging zones between above-mentioned the 2nd channel region and above-mentioned the 1st data line side source and drain areas, (vii) be formed on the 4th engaging zones between above-mentioned the 2nd channel region and above-mentioned the 2nd pixel electrode side source and drain areas; Adjacent with an above-mentioned zone and in upwardly extending another zone of above-mentioned the 1st side along the 2nd direction of intersecting with above-mentioned the 1st direction in above-mentioned non-open area, see along above-mentioned the 1st direction 1 amount of pixels ground that staggers from above-mentioned the 1st element portion and to form and have the 2nd element portion of the 2nd semiconductor layer, the 2nd semiconductor layer comprises: (viii) with above-mentioned many data lines in, the 2nd data line side source and drain areas that another data line that extends along above-mentioned the 1st direction in above-mentioned another zone is electrically connected, (ix) on above-mentioned the 1st direction, from above-mentioned the 2nd data line side source and drain areas, be formed on and the 3rd channel region of a side same side that is formed with above-mentioned the 1st channel region and the 4th channel region that is formed on and is formed with a side same side of above-mentioned the 2nd channel region, (x) from above-mentioned the 2nd data line side source and drain areas, be arranged in each the outside and 3rd pixel electrode mutually different and the 4th pixel electrode the 3rd pixel electrode side source and drain areas and the 4th pixel electrode side source and drain areas that are electrically connected of above-mentioned the 3rd channel region and the 4th channel region with above-mentioned a plurality of pixel electrodes along above-mentioned the 1st direction, (xi) be formed on the 5th engaging zones between above-mentioned the 3rd channel region and above-mentioned the 2nd data line side source and drain areas, (xii) be formed on the 6th engaging zones between above-mentioned the 3rd channel region and above-mentioned the 3rd pixel electrode side source and drain areas; (xiii) be formed on the 7th engaging zones between above-mentioned the 4th channel region and above-mentioned the 2nd data line side source and drain areas, (xiv) be formed on the 8th engaging zones between above-mentioned the 4th channel region and above-mentioned the 4th pixel electrode side source and drain areas; Form and cover the 1st light shielding part of above-mentioned the 1st engaging zones in the upper layer side of above-mentioned the 1st semiconductor layer, along above-mentioned the 1st direction; Upper layer side at above-mentioned the 1st semiconductor layer forms, covers width 2nd light shielding part wideer than above-mentioned the 1st light shielding part of above-mentioned the 2nd engaging zones and its above-mentioned the 2nd direction; Form and cover the 3rd light shielding part of above-mentioned the 3rd engaging zones in the upper layer side of above-mentioned the 1st semiconductor layer, along above-mentioned the 1st direction; Upper layer side at above-mentioned the 1st semiconductor layer forms, covers width 4th light shielding part wideer than above-mentioned the 3rd light shielding part of above-mentioned the 4th engaging zones and its above-mentioned the 2nd direction; Form and cover the 5th light shielding part of above-mentioned the 5th engaging zones in the upper layer side of above-mentioned the 2nd semiconductor layer, along above-mentioned the 1st direction; Upper layer side at above-mentioned the 2nd semiconductor layer forms, covers width 6th light shielding part wideer than above-mentioned the 5th light shielding part of above-mentioned the 6th engaging zones and its above-mentioned the 2nd direction; Form and cover the 7th light shielding part of above-mentioned the 7th engaging zones in the upper layer side of above-mentioned the 2nd semiconductor layer, along above-mentioned the 1st direction; Upper layer side at above-mentioned the 2nd semiconductor layer forms, covers width 8th light shielding part wideer than above-mentioned the 7th light shielding part of above-mentioned the 8th engaging zones and its above-mentioned the 2nd direction; Wherein, above-mentioned the 1st pixel electrode is configured in above-mentioned a plurality of pixel, is formed with above-mentioned the 2nd light shielding part and in any one of the mutual adjacent pixels of above-mentioned the 2nd direction; Above-mentioned the 2nd pixel electrode is configured in above-mentioned a plurality of pixel, be formed with above-mentioned the 4th light shielding part and in any one of the mutual adjacent pixels of above-mentioned the 2nd direction; Above-mentioned the 3rd pixel electrode is configured in above-mentioned a plurality of pixel, be formed with above-mentioned the 6th light shielding part and in any one of the mutual adjacent pixels of above-mentioned the 2nd direction; Above-mentioned the 4th pixel electrode is configured in above-mentioned a plurality of pixel, be formed with above-mentioned the 8th light shielding part and in any one of the mutual adjacent pixels of above-mentioned the 2nd direction.

If adopt the 4th substrate for electrooptic device of the present invention, then with the 3rd substrate for electrooptic device of the invention described above similarly, can realize adopting the image of so-called active matrix mode to show.

In the present invention, especially, same with the 3rd substrate for electrooptic device of the invention described above, in non-open area, along the 2nd direction of intersecting with the 1st direction and zone is adjacent and in upwardly extending another zone of the 1st side, see along the 1st direction 1 the amount of pixels ground that staggers from the 1st element portion to form the 2nd element portion.Thus, can make whole aperture opening ratio unanimity of a plurality of pixels that constitute the viewing area, and can not make each aperture ratio of pixels that reduces because of the formation light shielding part do one's utmost to reduce.

And then, in the present invention, especially, the 1st pixel electrode is configured in a plurality of pixels, be formed with the 2nd light shielding part and in any one of the mutual adjacent pixels of the 2nd direction, and the 2nd pixel electrode is configured in a plurality of pixels, be formed with the 4th light shielding part and in any one of the mutual adjacent pixels of the 2nd direction.Promptly, the 1st pixel electrode and the 2nd pixel electrode that are electrically connected with the 1st element portion, see respectively with the overlapping pixel electrode of the 2nd and the 4th light shielding part as plane earth in a plurality of pixel electrodes, on substrate and be provided with that wherein the 2nd and the 4th light shielding part covers the 2nd and the 4th engaging zones of the 1st element portion respectively.At this, the 2nd light shielding part is provided with in the mode that covering is formed on the 2nd engaging zones between the 1st channel region and the 1st pixel electrode side source and drain areas, the 4th light shielding part is provided with in the mode that covering is formed on the 4th engaging zones between the 2nd channel region and the 2nd pixel electrode side source and drain areas, and the width of the 2nd direction separately of the 2nd and the 4th light shielding part is wideer than the 1st and the 3rd light shielding part.In other words, the 1st pixel electrode side source and drain areas of the 1st element portion and the 2nd pixel electrode side source and drain areas respectively with a plurality of pixel electrodes of arranging rectangularly in, plane earth sees with the overlapping pixel electrode of the 2nd and the 4th light shielding part and is electrically connected that wherein the width of the 2nd direction of the 2nd and the 4th light shielding part is wideer than the 1st and the 3rd light shielding part of the 1st and the 3rd engaging zones that covers the 1st element portion respectively on substrate.That is, each of the 1st and the 2nd pixel electrode seen all with the 2nd light shielding part and the 4th light shielding part is partly overlapping and be not provided with the overlapping mode of the 1st and the 3rd light shielding part with plane earth on substrate.Promptly, the pixel that each was configured to of the 1st and the 2nd pixel electrode, be unified in a plurality of pixels, with the overlapping pixel of the 2nd and the 4th light shielding part on, wherein the 2nd and the 4th light shielding part covers the 2nd and the 4th junction surface of the 1st element portion that is electrically connected with the 1st and the 2nd pixel electrode respectively.

Thereby, because each of the 1st and the 2nd pixel electrode, on substrate plane earth see all with the width of its 2nd direction than wide the 2nd light shielding part of the 1st and the 3rd light shielding part or the 4th light shielding part is partly overlapping and not overlapping with the 1st and the 3rd light shielding part, so the size of part that can each and each light shielding part of the 1st and the 2nd pixel electrode is overlapped is arranged to mutually substantially or is identical.Thereby, for example can be substantially or eliminate a data line being electrically connected with the 1st element portion fully with poor with the stray capacitance between the 2nd pixel electrode of the stray capacitance between the 1st pixel electrode and this data line, the current potential retention performance of the 1st pixel electrode can be arranged to mutual cardinal principle or identical with the current potential retention performance of the 2nd pixel electrode.Thus, the display characteristic that is provided with the pixel of the 1st pixel electrode can be arranged to cardinal principle or identical mutually with the display characteristic that is provided with the pixel of the 2nd pixel electrode.

In addition, in the present invention, especially, the 3rd pixel electrode is configured in a plurality of pixels, be formed with the 6th light shielding part and in any one of the mutual adjacent pixels of the 2nd direction, and the 4th pixel electrode is configured in a plurality of pixels, be formed with the 8th light shielding part and in any one of the mutual adjacent pixels of the 2nd direction.Promptly, the 3rd pixel electrode and the 4th pixel electrode that are electrically connected with the 2nd element portion, see respectively with the overlapping pixel electrode of the 6th and the 8th light shielding part as plane earth in a plurality of pixel electrodes, on substrate and be provided with that wherein the 6th and the 8th light shielding part covers the 6th and the 8th engaging zones of the 2nd element portion respectively.Promptly, and the above-mentioned the 1st and the 2nd pixel electrode is same with the configuration relation between the 1st to the 4th light shielding part, each of the 3rd and the 4th pixel electrode seen all with the 6th light shielding part or the 8th light shielding part is partly overlapping and be not provided with the overlapping mode of the 5th and the 7th light shielding part with plane earth on substrate.Thereby, the display characteristic that is provided with the pixel of the 3rd pixel electrode can be arranged to cardinal principle or identical mutually with the display characteristic that is provided with the pixel of the 4th pixel electrode.

And then, by each the width of the 2nd direction of the 2nd, the 4th, the 6th and the 8th light shielding part being arranged to mutually substantially or identical and each the width of the 2nd direction of the 1st, the 3rd, the 5th and the 7th light shielding part is arranged to mutually substantially or identical, the display characteristic that can further will be respectively arranged with each pixel of the 1st to the 4th pixel electrode reliably is arranged to mutually substantially or is identical.That is, the display characteristic that constitutes each pixel of viewing area can be arranged to cardinal principle or even fully.Its result can improve the quality of display image.

In order to address the above problem, the 2nd electro-optical device of the present invention possesses the of the present invention the 3rd or the 4th above-mentioned substrate for electrooptic device (comprising its variety of way).

If adopt the 2nd electro-optical device of the present invention,, show so can carry out high quality images then because possess the of the present invention the 1st or the 2nd above-mentioned substrate for electrooptic device.

In order to address the above problem, the 2nd electronic equipment of the present invention possesses above-mentioned the 2nd electro-optical device of the present invention (also comprising its variety of way).

If adopt the 2nd electronic equipment of the present invention, then constitute, so can realize to carry out projection display device, televisor, mobile phone, electronic notebook, word processor that high quality images shows, various electronic equipments such as find a view type or monitor direct viewing type video recorder, workstation, videophone, POS terminal, touch panel because possessing above-mentioned the 2nd electro-optical device of the present invention.In addition, as the 1st electronic equipment of the present invention, for example also can realize electronic paper etc. electrophoretic apparatus, electron emitting device, used the display device of these electrophoretic apparatuss, electron emitting device.

Effect of the present invention and other advantage will be known from the best mode that is used for implementing of following explanation.

Description of drawings

Fig. 1 is the integrally-built planimetric map that the liquid-crystal apparatus of the 1st embodiment is shown;

Fig. 2 is II-II ' the line sectional view of Fig. 1;

Fig. 3 is the equivalent circuit diagram of a plurality of pixel portions of the liquid-crystal apparatus of the 1st embodiment;

Fig. 4 is the planimetric map of a plurality of pixel portions of the liquid-crystal apparatus of the 1st embodiment;

Fig. 5 is V-V ' the line sectional view of Fig. 4;

Fig. 6 is the planimetric map of element portion of the liquid-crystal apparatus of the 1st embodiment;

Fig. 7 be the 1st comparative example, with the planimetric map of the same implication of Fig. 4;

Fig. 8 is the graphic planimetric map of a part of image display area of the liquid-crystal apparatus of the 1st embodiment;

Fig. 9 be the 1st comparative example, with the graphic planimetric map of the same implication of Fig. 8;

Figure 10 is the synoptic diagram that the position relation of the pixel electrode that is electrically connected with element portion in the 1st embodiment is shown;

Figure 11 is the electrical schematics that the distribution of the stray capacitance that produces between data line and pixel electrode in the 1st embodiment is shown;

Figure 12 be the 2nd comparative example, with the synoptic diagram of the same implication of Figure 10;

Figure 13 be the 2nd comparative example, with the synoptic diagram of the same implication of Figure 11;

Figure 14 be the 2nd comparative example, with the synoptic diagram of the same implication of Figure 10;

Figure 15 be the 2nd comparative example, with the synoptic diagram of the same implication of Figure 11;

Figure 16 be the 2nd embodiment variation, with the synoptic diagram of the same implication of Figure 10;

Figure 17 be the 2nd embodiment variation, with the synoptic diagram of the same implication of Figure 11; And

Figure 18 is the planimetric map of formation of projector that an example of the electronic equipment of having used electro-optical device is shown.

Symbol description

3a: sweep trace; 6a, 6a1,6a2: data line; 9a, 9a1,9a2,9a3,9a4: pixel electrode; The 10:TFT array base palte; 10a: image display area; 20: counter substrate; 21: opposite electrode; 50: liquid crystal layer; 70a: memory capacitance; 101: data line drive circuit; 102: external circuit-connecting terminal; 104: scan line drive circuit; 130a, 130b: element portion; Py1: part 1; Py2: part 2; Py3: the 3rd part; Py4: the 4th part; Py5: the 5th part; Py6: the 6th part; Py7: the 7th part; Py8: the 8th part.

Embodiment

Below, with reference to the description of drawings embodiments of the present invention.In the following embodiments, be example with liquid-crystal apparatus as the tft active matrix type of drive of the driving circuit internally-arranged type of an example of electro-optical device of the present invention.

＜the 1 embodiment 〉

The liquid-crystal apparatus of the 1st embodiment is described referring to figs. 1 through Figure 13.

The one-piece construction of the liquid-crystal apparatus of present embodiment at first, is described with reference to Fig. 1 and Fig. 2.

Fig. 1 is a planimetric map of watching the liquid-crystal apparatus of tft array substrate and formation each inscape thereon from the counter substrate side, and Fig. 2 is II-II ' the line sectional view of Fig. 1.

In Fig. 1 and Fig. 2, in the liquid-crystal apparatus of present embodiment, tft array substrate 10 and counter substrate 20 relative configurations.Between tft array substrate 10 and counter substrate 20, enclose liquid crystal layer 50 is arranged.Tft array substrate 10 and counter substrate 20 are bonding mutually by the encapsulant 52 that is arranged on sealing area, the sealing zone be positioned at be provided with a plurality of pixel portions, as around the image display area 10a of the example of " viewing area " of the present invention.

Encapsulant 52 by be used for bonding two substrates, for example ultraviolet hardening resin, thermosetting resin etc. constitute, and after being coated to encapsulant 52 on the tft array substrate 10 in manufacturing process, utilize ultraviolet ray irradiation, heating etc. to make it to harden.In encapsulant 52, be scattered with the interval (that is gap between substrate) that is used for tft array substrate 10 and counter substrate 20 and form clearance materials such as the glass fibre of setting or beaded glass.The liquid-crystal apparatus of present embodiment, be applicable to as the light valve of projector with and with small-sized situation of amplifying demonstration.

With the inboard of the sealing area that disposes encapsulant 52 concurrently, the edge photomask 53 of the light-proofness of the fringe region of specified image viewing area 10a is arranged on counter substrate 20 sides.But part or all of such edge photomask 53 also can be used as built-in photomask and is arranged on tft array substrate 10 sides.

In the neighboring area, be positioned at the zone in the outside of the sealing area that disposes encapsulant 52, one side be provided with data line drive circuit 101 and external circuit-connecting terminal 102 along tft array substrate 10.Scan line drive circuit 104 with along 2 limits adjacent with this one side and the mode that covers edge photomask 53 be provided with.And then, between two scan line drive circuits 104 that link the both sides that are arranged on image display area 10a like this, to be provided with many wirings 105 along the remaining one side of tft array substrate 10 and the mode of covering edge photomask 53.

In 4 bights of counter substrate 20, dispose the conductive material up and down 106 that plays a role as the Lead-through terminal up and down between two substrates.On the other hand, on tft array substrate 10,, be provided with Lead-through terminal up and down in the zone relative with these bights.Utilize these Lead-through terminals up and down, can between tft array substrate 10 and counter substrate 20, obtain electrically conducting.

In Fig. 2, on tft array substrate 10, on the pixel electrode 9a after having formed wirings such as the TFT that pixel switch is used, sweep trace, data line, be formed with alignment films.On the other hand, on counter substrate 20, except opposite electrode 21, also be formed with clathrate or banded photomask 23, and then also be formed with alignment films in the superiors' part.Liquid crystal layer 50 for example is made of the liquid crystal that one or more nematic liquid crystals mix, and it obtains the state of orientation of regulation between this a pair of alignment films.

Tft array substrate 10 for example is transparency carriers such as quartz base plate, glass substrate, silicon substrate.Counter substrate 20 is also same with tft array substrate 10, is transparency carrier.

On tft array substrate 10, be provided with pixel electrode 9a, side is provided with the alignment films of the orientation process of having implemented regulations such as milled processed thereon again.For example, pixel electrode 9a is made of nesa coatings such as ITO films, and alignment films is made of organic membrane such as polyimide films.

On counter substrate 20, spread all over its roughly whole ground and be provided with opposite electrode 21, be provided with the alignment films 22 of the orientation process of having implemented regulations such as milled processed at opposite electrode 21 downsides.Opposite electrode 21 for example is made of nesa coatings such as ITO films.Alignment films 22 is made of organic membrane such as polyimide films.

Clathrate or banded photomask also can be set on counter substrate 20.By adopting such structure, can with illustrate later, as top capacitor electrode 300 and the upper light shielding that is provided with stops together more reliably from the intrusion to channel region and periphery thereof of the incident light of tft array substrate 10 sides.

Constitute in this wise, between tft array substrate 10 that disposes with pixel electrode 9a and opposite electrode 21 relative modes and counter substrate 20, form liquid crystal layer 50.Liquid crystal layer 50 utilizes alignment films to obtain the state of orientation of regulation under the state that does not apply from the electric field of pixel electrode 9a.

And, on Fig. 1 and tft array substrate 10 shown in Figure 2, except driving circuits such as these data line drive circuits 101, scan line drive circuit 104, can also form to the picture signal on the image signal line sample and offer the sample circuit of data line, before picture signal to many data lines provide respectively the precharging signal of assigned voltage level pre-charge circuit, be used for checking manufacture process, the check circuit etc. of quality, defective etc. of this electro-optical device when dispatching from the factory.

Below, the connecting structure for electrical equipment of pixel portions of the liquid-crystal apparatus of present embodiment is described with reference to Fig. 3.

Fig. 3 is the equivalent circuit diagram of various elements image display area, in rectangular a plurality of pixels that form that constitute the liquid-crystal apparatus of present embodiment, wiring etc.

In Fig. 3, in each of a plurality of pixels that form, be formed with pixel electrode 9a and TFT30 composing images viewing area 10aly, rectangular.TFT30 and pixel electrode 9a are electrically connected, and when liquid-crystal apparatus is worked pixel electrode 9a are carried out switch control.Being provided the data line 6a of picture signal and the source of TFT30 is electrically connected.Be written to data line 6a picture signal S1, S2 ... Sn can according to this order line successively provide, also can be, provide according to every group to many adjacent data line 6a.

The grid of sweep trace 3a and TFT30 are electrically connected, the liquid-crystal apparatus of present embodiment is constituted as, timing according to the rules, to sweep trace 3a with pulse mode according to sweep signal G1, G2 ..., the order of Gm, successively apply line sweep signal G1, G2 ..., Gm.Pixel electrode 9a is connected with the electric leakage gas of TFT30, and by make TFT30 as on-off element only connect its switch certain during, and timing according to the rules be written into the picture signal S1, the S2 that provide from data line 6a ..., Sn.Via pixel electrode 9a be written to picture signal S1, S2 as the specified level in the liquid crystal of an example of electro-optical substance ..., Sn, and be formed between the opposite electrode on the counter substrate and be held certain hour.

Constitute the liquid crystal of liquid crystal layer 50, the orientation by its elements collection, order etc. are modulated light, thereby are realized that gray scale shows because of the voltage level that is applied changes.If normal white mode, then correspondingly reduce for the transmitance of incident light and the voltage that unit by each pixel applies, if often black pattern, then correspondingly increase, and penetrate light from liquid-crystal apparatus as a whole with contrast corresponding with picture signal for the transmitance of incident light and the voltage that unit by each pixel applies.At this, the picture signal that keeps in order to prevent is leaked, and be formed between pixel electrode 9a and the opposite electrode liquid crystal capacitance side by side, be electrically connected memory capacitance 70a.Memory capacitance 70a is as correspondingly temporarily keeping the maintenance electric capacity of current potential of each pixel electrode 9a and the capacity cell that plays a role with the supply of picture signal.If adopt memory capacitance 70a, then the current potential retention performance of pixel electrode 9a will improve, thereby can realize the raising that contrast improves, flicker reduces such display characteristic.

Below, the concrete structure of the pixel portions that realizes above-mentioned action is described with reference to Fig. 4 to Fig. 6.

Fig. 4 is the planimetric map of mutually adjacent a plurality of pixel portions.Fig. 5 is V-V ' the line sectional view of Fig. 4.Fig. 6 comprises 2 transistor units and the planimetric map of the element portion that constitutes.And, in Fig. 4 to Fig. 6 because each parts of each layer will be arranged in the size of the degree that can discern on the drawing, so for this each of each parts of each layer, make its engineer's scale difference.In Fig. 4 and Fig. 5, for convenience of explanation, omitted the diagram of the part of the upside that is positioned at pixel electrode 9a.In Fig. 5, the part from tft array substrate 10a to pixel electrode 9a constitutes an example of " substrate for electrooptic device " of the present invention.

In Fig. 4 and Fig. 5, the liquid-crystal apparatus of present embodiment possesses: tft array substrate 10; Be formed on many data line 6a and multi-strip scanning line 3a on the tft array substrate 10; A plurality of pixel electrode 9a; Element portion 130a as the example of " the 1st element portion " of the present invention; Element portion 130b as the example of " the 2nd element portion " of the present invention; Memory capacitance 70a.

Image display area 10a on the tft array substrate 10 is made of a plurality of pixels that are respectively arranged with pixel electrode 9a.On tft array substrate 10, the border in length and breadth along a plurality of pixel electrode 9a that are provided with rectangularly is provided with data line 6a and sweep trace 3a respectively.Sweep trace 3a extends along directions X, and data line 6a extends along the Y direction in the mode of intersecting with sweep trace 3a.In sweep trace 3a and cross one another each position of data line 6a, be provided with the TFT30 that pixel switch is used.Such pixel switch TFT30 is that the part of one group of element portion 130a that constitutes and 130b forms as 2 TFT30 with the Y direction of being extended along data line 6a.

Sweep trace 3a, data line 6a, memory capacitance 70a, downside photomask 11a and relay layer 93, on tft array substrate 10, from the plane, see be configured in surround each pixel corresponding with pixel electrode 9a the open area (promptly, in each pixel, the zone of actual that work, light transmission or reflection in demonstration) in the non-open area.That is, these sweep traces 3a, memory capacitance 70a, data line 6a and downside photomask 11a not hinder the mode of demonstration, are configured in the non-open area, rather than the open area of each pixel.

Element portion 130a possesses a pair of TFT30a1 and TFT30a2.The zone that the Y direction that element portion 130a is formed on the tft array substrate 10 in each the non-open area spaced apart from each other, open area with a plurality of pixels, extended along data line 6a is extended.More particularly, element portion 130a among many data line 6a on being formed at directions X, be formed with the zone of a column data line 6a, forms in the raceway groove length that is included in TFT30a1 among this element portion 130a and the 30a2 mode along the Y direction.In addition, element portion 130a in the zone that is formed with a column data line 6a, disposes a plurality of along the Y direction.

Element portion 130b is also same with element portion 130a, possesses a pair of TFT30b1 and 30b2, and in the zone that is formed with b column data line 6a, disposes a plurality of along the Y

direction.Element portion

130a and 130b stagger 1 amount of pixels mutually and dispose along the Y direction.

At this, a row and b row are across the interval of 1 amount of pixels and mutual adjacent row, if for example hypothesis a classifies i row (i is a natural number) as, then the b row become (i+1) row.In the present embodiment, for convenience of explanation, mutual adjacent row are called a row and b row.Below, be described in detail in a plurality of element portion as the element portion 130a and the 130b of corresponding elements portion mutually.

The detailed structure of element portion 130a then, is described with reference to Fig. 4 to Fig. 6.

In Fig. 4 to Fig. 6, element portion 130a has the 1st semiconductor layer 1A-1, and the 1st semiconductor layer 1A-1 comprises: the 1st data line side source and drain areas 1d-1 that is electrically connected with the data line 6a of a row; Be positioned at the 1st channel region 1a-1 and the 2nd channel region 1a-2 of the both sides of the 1st data line side source and drain areas 1d-1 along the Y direction; See each the outside and 1st pixel electrode 9a1 mutually different and each the 1st pixel electrode side source and drain areas 1e-1 that is electrically connected and the 2nd pixel electrode side source and drain areas 1e-2 of the 2nd pixel electrode 9a2 that is arranged in the 1st channel region 1a-1 and the 2nd channel region 1a-2 along the Y direction from the 1st data line side source and drain areas 1d-1 with a plurality of pixel electrode 9a; Be formed between the 1st channel region 1a-1 and the 1st data line side source and drain areas 1d-1, as the data line side LDD zone 1b-1 of the example of " the 1st engaging zones " of the present invention; Be formed between the 1st channel region 1a-1 and the 1st pixel electrode side source and drain areas 1e-1, as the pixel electrode side LDD zone 1c-1 of the example of " the 2nd engaging zones " of the present invention; Be formed between the 2nd channel region 1a-2 and the 1st data line side source and drain areas 1d-1, as the data line side LDD zone 1b-2 of the example of " the 3rd engaging zones " of the present invention; Be formed between the 2nd channel region 1a-2 and the 2nd pixel electrode side source and drain areas 1e-2, as the pixel electrode side LDD zone 1c-2 of the example of " the 4th engaging zones " of the present invention.

TFT30a1 comprises with the lower part and constitutes: the 1st channel region 1a-1; Data line side LDD zone 1b-1; Pixel electrode side LDD zone 1c-1; The 1st data line side source and drain areas 1d-1; The 1st pixel electrode side source and drain areas 1e-1; Among the sweep trace 3a-1 as grid line and the 1st channel region 1a-1 superposed part.The 1st semiconductor layer 1A-1 for example is made of polysilicon, and it comprises: have along the raceway groove of Y direction long channel region 1a-1, data line side LDD zone 1b-1, pixel electrode side LDD zone 1c-1, the 1st data line side source and drain areas 1d-1 and the 1st pixel electrode line side source and drain areas 1e-1.That is, TFT30a1 has the LDD structure.

The 1st data line side source and drain areas 1d-1 and the 1st pixel electrode line side source and drain areas 1e-1 are benchmark with the 1st channel region 1a-1, along the Y direction roughly minute surface form symmetrically.Data line side LDD zone 1b-1, pixel electrode side LDD zone 1c-1, the 1st data line side source and drain areas 1d-1 and the 1st pixel electrode line side source and drain areas 1e-1 are for example to utilize impurity such as ion implantation to be infused in implanted dopant among the 1st semiconductor layer 1A-1 and the extrinsic region that forms.Each of data line side LDD zone 1b-1 and pixel electrode side LDD zone 1c-1 forms as the extrinsic region of the low concentration that also lacks than the 1st data line side source and drain areas 1d-1 and the 1st pixel electrode line side source and drain areas 1e-1 impurity.If adopt such extrinsic region, then when the TFT30a1 inoperative, can reduce the cut-off current that flows through source region and drain region, and can be suppressed at the attenuating of the conducting electric current that flows through when TFT30a1 works.And, TFT30a1 preferably has the LDD structure, but also can be in the 1c-1 of data line side LDD zone 1b-1, pixel electrode side LDD zone, not carry out the offset configuration that impurity injects, also can be with gate electrode form as mask high concentration ground implanted dopant data line side source and drain areas and pixel electrode line side source and drain areas from integrated.

TFT30a2 is a benchmark with the 1st data line side source and drain areas 1d-1, is formed on the opposite side of TFT30a1 along the Y direction, together has the 1st semiconductor layer 1A-1 with TFT30a1.TFT30a2 comprises with the lower part and constitutes: the 1st data line side source and drain areas 1d-1, the 2nd channel region 1a-2, data line side LDD zone 1b-2, among pixel electrode side source and drain areas 1c-2, the 2nd pixel electrode side source and drain areas 1e-2 and the sweep trace 3a-2 as grid line and the 2nd channel region 1a-2 superposed part.TFT30a2 is that benchmark has the component construction of minute surface symmetry roughly with TFT30a1 with the 1st data line side source and drain areas 1d-1.

As shown in Figure 4, TFT30a1 and 30a2 with its 1st pixel electrode side source and drain areas 1e-1 and the 2nd pixel electrode side source and drain areas 1e-2 towards disposing with respect to the mutually opposite mode of the 1st data line side source and drain areas 1d-1 along the Y direction, and it is connected electrically to the 1st data line side source and drain areas 1d-1 the contact hole 81b sharing of data line 6a.

That is, in Fig. 4, the Y direction of above-below direction in as figure, a pair of TFT30a1 and 30a2 become up and down counter-rotating or the TFT of mirror-inverted up and down.And the element portion 130a with a pair of TFT that such minute surface disposes symmetrically only utilizes a contact hole 81b and data line 6a to be electrically connected.That is, and as usually, each of TFT30a1 and 30a2 individually be arranged in each pixel and compare, can reduce the quantity of contact hole significantly from the situation that individual data line side source and drain areas is connected electrically to data line 6a.Thus, can realize the thin spaceization of pixel portions, can realize that the miniaturization of liquid-crystal apparatus, height become more meticulous.

As shown in Figure 5, in TFT30a1, the contact hole 81b and the data line 6a of perforate are electrically connected the 1st data line side source and drain areas 1d-1 mutually via connecting interlayer dielectric 42, dielectric film 61, interlayer dielectric 41 and gate insulating film 2 (specifically,

dielectric film

2a and 2b).The contact hole 83b of perforate and the bottom capacitance electrode 71 that illustrates later are electrically connected the 1st pixel electrode side source and drain areas 1e-1 mutually via connecting interlayer dielectric 41 and gate insulating film 2.

And also same with TFT30a1 in TFT30a2, the contact hole 83b of perforate and the bottom capacitance electrode 71 corresponding with TFT30a2 are electrically connected the 2nd pixel electrode side source and drain areas 1e-2 mutually via connecting interlayer dielectric 41 and gate insulating film 2.

To shown in Figure 6, the gate electrode of TFT30a1 and 30a2 forms as the part of sweep trace 3a, and is for example formed by the electric conductivity polysilicon as Fig. 4.More particularly, in each of sweep trace 3a1 and 3a2, constituted the gate electrode of each TFT with each superposed part of the 1st channel region 1a-1 and the 2nd channel region 1a-2.

Sweep trace 3a1's and the main line part of extending along directions X together, by along the outstanding protuberance 150 of Y direction and along the part of recess 160 regulations of Y direction depression, overlap with the 1st channel region 1a-1 of TFT30a1, play a role as gate electrode.Utilize gate insulating film 2 (more particularly, 2 layers

dielectric film

2a and 2b) insulation between gate electrode and the 1st semiconductor layer 1A-1.Sweep trace 3a2 is also same with sweep trace 3a1, and in the main line part that extends on directions X, the part of being stipulated by recess and protuberance overlaps with the 2nd channel region 1a-2, plays a role as gate electrode.

Across underlying insulation film 12 clathrates be arranged on the downside photomask 11a of the downside of TFT30a1 and 30a2, each channel region and periphery thereof to TFT30a1 and 30a2 carries out shading, incides back light in the device to block from tft array substrate 10 sides.The material that downside photomask 11a is formed by at least a metal monomer, alloy, metal silicide, multi-crystal silicification thing, these material laminations of for example comprising in the refractory metals such as Ti, Cr, W, Ta, Mo, Pd etc. constitutes.

Underlying insulation film 12 is except carrying out TFT30a1 and 30a2 and downside photomask 11a the function of layer insulation, also by being formed on whole of tft array substrate 10, be chapped from the cold, clean pixel switch that the residual dirt in back etc. causes function when preventing with the deterioration of the characteristic of TFT30 because of tft array substrate 10 surface grindings and have.And a pair of TFT that element portion 130b had also carries out shading by photomask 11a, and carries out layer insulation by underlying insulation film 12.

In Fig. 4 and Fig. 5, the upper layer side across interlayer dielectric 41 of the TFT30a1 on tft array substrate 10 is provided with memory capacitance 70a.Memory capacitance 70a disposes relatively across dielectric film 75a by its underpart capacitance electrode 71 and top capacitor electrode 300 and forms.The memory capacitance 70a that forms accordingly with TFT30a1 is an example of " the 1st capacity cell " of the present invention, and the memory capacitance 70a that is provided with accordingly with TFT30a2 is an example of " the 2nd capacity cell " of the present invention.In addition, the memory capacitance 70a that forms accordingly with the TFT30b1 that illustrates later is an example of " the 3rd capacity cell " of the present invention, and the memory capacitance 70a that is provided with accordingly with the TFT30b2 that illustrates later is an example of " the 4th capacity cell " of the present invention.

Top capacitor electrode 300 is set potential lateral capacitance electrodes, and bottom capacitance electrode 71 is pixel current potential lateral capacitance electrodes that the 1st pixel electrode side source and drain areas 1e-1 via contact hole 83b and TFT30a1 is electrically connected.Bottom capacitance electrode 71 is formed by semiconductors such as polysilicons.Thereby memory capacitance 70 has metal-dielectric-metal laminated MIS structure that form, so-called.The contact hole 84b and the relay layer 93 of opening are electrically connected bottom capacitance electrode 71 via connecting interlayer dielectric 42 and dielectric film 61.And, bottom capacitance electrode 71 except function as pixel current potential lateral capacitance electrode, also have as upper light shielding be configured between top capacitor electrode 300 and the TFT30a1, as the function of light absorbing zone or photomask.Data line 6a is electrically connected via the contact hole 81b and the 1st data line side source and drain areas 1d-1 that connect interlayer dielectric 41, dielectric film 61 and interlayer dielectric 42.

Bottom capacitance electrode 71 is electrically connected via contact hole 84b and relay layer 93, and and relay layer 93 together being electrically connected between the 1st pixel electrode line side source and drain areas 1e-1 and pixel electrode 9a carried out relaying.In addition, relay layer 93 is via being electrically connected as the protuberance 93a of the part of relay layer 93 and with contact hole 85a and pixel electrode 9a that this protuberance 93a is electrically connected.Thus, pixel electrode 9a and bottom capacitance electrode 71 are electrically connected.

Top capacitor electrode 300 is for example to comprise metal or alloy and nontransparent metal film of being arranged on the upside of TFT30a1.Top capacitor electrode 300 is also as TFT30a1 being carried out the upper light shielding (perhaps, built-in photomask) of shading and playing a role.Top capacitor electrode 300 comprises Al (aluminium), Ag metals such as (silver) and forms.

And, top capacitor electrode 300 also can be made of the object that at least a metal monomer, alloy, metal silicide, multi-crystal silicification thing, these material laminations of for example comprising in the refractory metals such as Ti, Cr, W, Ta, Mo, Pd form as " conductive light shielding film " of the present invention.In the case, can further improve the function of top capacitor electrode 300 as upper light shielding.

Top capacitor electrode 300 is extended setting from the image display area 10a that disposes pixel electrode 9a around it.Bottom capacitance electrode 71 is electrically connected with the set potential source, is the set potential lateral capacitance electrode that is maintained set potential.

Dielectric film 75a for example has monolayer constructions will or the multi-ply construction that is made of silicon oxide film such as HTO (High Temperature Oxide, high-temperature oxide) film, LTO (Low Temperature Oxide, low temperature oxide) film or silicon nitride film etc.

Between

interlayer dielectric

41 and 42, get involved partly dielectric film 61 is arranged.And bottom capacitance electrode 71 also can be a metal film.If adopt such bottom capacitance electrode 71, then memory capacitance 70a also can have as MIM structure metal-dielectric-metal laminated structure that forms, so-called.

In Fig. 4, bottom capacitance electrode 71 is spaced from each other by each pixel.Thereby the picture signal that provides via data line 6a is provided for the 1st pixel electrode 9a1 corresponding with TFT30a1 according to the switch motion of TFT30a1.Top capacitor electrode 300 is because crossing over a plurality of pixels along directions X extends, so by shared in a plurality of pixels, electrode area increases than bottom capacitance electrode 71.But,,, can suppress the increase of the resistance that the increase because of electrode area causes so compare with the situation that forms top capacitor electrode 300 with semiconductor because top capacitor electrode 300 is made of metal films such as Al.Thereby, have following advantage: can reduce the consumed power in liquid-crystal apparatus when work and the various elements in each pixel of high-speed driving, and the reduction of the responsiveness can suppress by the liquid-crystal apparatus display image time.

And, such advantage is not limited to the situation that as present embodiment top capacitor electrode 300 forms in the mode of crossing over mutual adjacent pixels along directions X and extending, but more remarkable under the situation that top capacitor electrode 300 forms to occupy more large-area mode cross over a plurality of pixels in image display area 10a.

In Fig. 4, memory capacitance 70a has from upwardly extending the 1st region D 1 and the part 1 Py1 and the part 2 Py2 that extend along the Y direction in the 2nd region D 2 cross one another intersection regions that directions X extends in Y side.Part 1 Py1 is an example of " the 1st light shielding part " of the present invention, its cover data line side LDD zone 1b-1.Part 2 Py2 is an example of " the 2nd light shielding part " of the present invention, and it covers pixel electrode side LDD zone 1c-1.The width W 2 along directions X of part 2 Py2 is compared wide with the width W 1 of part 1 Py1.

Thereby, if adopt part 2 Py2, then can block the light that incides pixel electrode side LDD zone 1c-1 more reliably than the light that incides data line side LDD zone 1b-1.That is, compare, can further improve or strengthen the light-proofness that the light that arrives pixel electrode side LDD zone 1c-1 is blocked with the light-proofness that the light that arrives data line side LDD zone 1b-1 is blocked.The present application people guesses, and when TFT30a1 worked, in the 1c-1 of pixel electrode side LDD zone, 1b-1 compared with data line side LDD zone, and the light leakage current will be easy to generate relatively.That is, guess, when TFT30a1 worked, under the situation that pixel electrode side LDD zone 1c-1 is mapped to by illumination, 1b-1 was compared by the situation that illumination is mapped to data line side LDD zone, will be easy to generate the light leakage current in TFT30a1.Thereby, form in mode by part 2 Py2 with width W 2 wideer than the width W 1 of part 1 Py1, light-proofness can be improved, thereby the light leakage current that flows through TFT30a1 can be reduced effectively at the relatively easy pixel electrode side LDD zone 1c-1 that produces of light leakage current.On the contrary, compare the part 1 Py1 of the relative data line side LDD zone 1b-1 that is difficult to produce of light leakage current with pixel electrode side LDD zone 1c-1 by making covering, form in mode, can prevent the reduction in rain of aperture opening ratio with width W 1 narrower than part 2 Py2.

Promptly, by the width W 2 that widely forms part 2 Py2, can improve light-proofness at the relatively easy pixel electrode side LDD zone 1c-1 that produces of light leakage current, and the width W 1 by narrowly formed part 1 Py1, the reduction in rain of aperture opening ratio can be prevented.Promptly, only improve the light-proofness of the pixel electrode side LDD zone 1c-1 that is easy to generate at the light leakage current by the concentrated target of what is called (ピ Application Port イ Application ト), it is bad to reduce the demonstrations such as flicker that produce because of the light leakage current among the TFT effectively, and can not cause the reduction in rain of aperture opening ratio.

The memory capacitance 70a overlapping with TFT30a2, have with part 1 Py1 and part 2 Py2 equally along the mutual width of directions X different the 3rd part Py3 and the 4th part Py4.The 3rd part Py3 is an example of " the 3rd light shielding part " of the present invention, its cover data line side LDD zone 1b-2.The 4th part Py4 is an example of " the 4th light shielding part " of the present invention, and it covers pixel electrode side LDD zone 1c-2.The 3rd part Py3 forms in the mode with width identical with the width W 1 of part 1 Py1, and the 4th part Py4 forms in the mode with width identical with the width W 2 of part 2 Py2.Promptly the width along directions X of the 4th part Py4 becomes wideer than the width along directions X of the 3rd part Py3.Thereby the 3rd part Py3 and the 4th part Py4 carry out shading effectively to data line side LDD zone 1b-2 and pixel electrode side 1c-2.But, in TFT30a2, comparing with TFT30a1, it is the opposite position of benchmark that its data line side LDD zone 1b-2 and pixel electrode side LDD zone 1c-2 are formed on the 2nd channel region 1a-2.Thereby, with the overlapping memory capacitance 70a of TFT30a2 in, become opposite with corresponding respectively the 3rd part Py3 of part 1 Py1 and part 2 Py2 and the relative position relation of the 4th part Py4 with part 1 Py1 and part 2 Py2.

In Fig. 4, element portion 130b has the 2nd semiconductor layer 1A-2, and the 2nd semiconductor layer 1A-2 comprises: the 2nd data line side source and drain areas 1d-2 that is electrically connected with the data line 6a of b row; Be positioned at the 3rd channel region 1a-3 and the 4th channel region 1a-4 of the both sides of the 2nd data line side source and drain areas 1d-2 along the Y direction; See each the outside and 3rd pixel electrode 9a3 mutually different and each the 3rd pixel electrode side source and drain areas 1e-3 that is electrically connected and the 4th pixel electrode side source and drain areas 1e-4 of the 4th pixel electrode 9a4 that is arranged in the 3rd channel region 1a-3 and the 4th channel region 1a-4 along the Y direction from the 2nd data line side source and drain areas 1d-2 with a plurality of pixel electrode 9a; Be formed between the 3rd channel region 1a-3 and the 2nd data line side source and drain areas 1d-2, as the data line side LDD zone 1b-3 of the example of " the 5th engaging zones " of the present invention; Be formed between the 3rd channel region 1a-3 and the 3rd pixel electrode side source and drain areas 1e-3, as the pixel electrode side LDD zone 1c-3 of the example of " the 6th engaging zones " of the present invention; Be formed between the 4th channel region 1a-4 and the 2nd data line side source and drain areas 1d-2, as the data line side LDD zone 1b-4 of the example of " the 7th engaging zones " of the present invention; Be formed between the 4th channel region 1a-4 and the 4th pixel electrode side source and drain areas 1e-4, as the pixel electrode side LDD zone 1c-4 of the example of " the 8th engaging zones " of the present invention.

Element portion 130b has the structure roughly the same with element portion 130a, comprises a pair of TFT30b1 and 30b2 that picture signal is provided accordingly with each the pixel that is formed with the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4.This a pair of TFT30b1 and 30b2 are corresponding with TFT30a1 and 30a2 among the element portion 130a, via providing picture signal with each the 3rd pixel electrode side source and drain areas 1e-3 that is electrically connected of the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 and the 4th pixel electrode side source and drain areas 1e-4 to each of the 3rd pixel electrode 9a3 and 9a4.And, picture signal via a pair of TFT30b1 that is comprised by element portion 130b and 30b2 the 2nd shared data line side source and drain areas 1d-2 offer each TFT.If adopt element portion 130b, then because the 2nd data line side source and drain areas 1d-2 is shared by a pair of TFT institute, so spacing that can the constriction pixel.But, as shown in Figure 4, element portion 130b be formed on be formed with many data line 6a in the zone of b row corresponding data line 6a, and stagger 1 amount of pixels with respect to element portion 130a upside in figure and dispose along the Y direction.

The overlapping memory capacitance 70a of the TFT30b1 that is had with element portion 130b also has the 5th part Py5 and the 6th part Py6 with the same function of part 1 Py1 and part 2 Py2.The 5th part Py5 is an example of " the 5th light shielding part " of the present invention, its cover data line side LDD zone 1b-3.The 6th part Py6 is an example of " the 6th light shielding part " of the present invention, and it covers pixel electrode side LDD zone 1c-3.More particularly, the width W 6 along directions X of the 6th part Py6 is compared wide with the width W 5 of the 5th part Py5, concentrated target ground shading reliably thereby compare the pixel electrode side LDD zone 1c-3 that is easy to generate the light leakage current with data line side LDD zone 1b-3.

In addition, with the overlapping memory capacitance 70a of TFT30b2 have with the 3rd part Py3 and the 4th part Py4 equally along the mutual width of directions X different the 7th part Py7 and the 8th part Py8.The 7th part Py7 constitutes an example of " the 7th light shielding part " of the present invention, its cover data line side LDD zone 1b-4.The 8th part Py8 is an example of " the 8th light shielding part " of the present invention, and it covers pixel electrode side LDD zone 1c-4.The 7th part Py7 forms in the mode with width identical with the width W 5 of the 5th part Py5, and the 8th part Py8 forms in the mode with width identical with the width W 6 of the 6th part Py6.That is, the width along directions X of the 8th part Py8 is compared wide with the width along directions X of the 7th part Py7.Thereby the 7th part Py7 and the 8th part Py8 carry out shading effectively to data line side LDD zone 1b-4 and pixel electrode side 1c-4.But, in TFT30b2, comparing with TFT30b1, it is the opposite position of benchmark that its data line side LDD zone 1b-4 and pixel electrode side LDD zone 1c-4 are formed on the 4th channel region 1a-4.Thereby, with the overlapping memory capacitance 70a of TFT30b2 in, become opposite with corresponding respectively the 7th part Py7 of the 5th part Py5 and the 6th part Py6 and the relative position relation of the 8th part Py8 with the 5th part Py5 and the 6th part Py6.

At this, in the liquid-crystal apparatus of present embodiment, as mentioned above, because possess part 1 Py1, part 2 Py2, the 3rd part Py3, the 4th part Py4, the 5th part Py5, the 6th part Py6, the 7th part Py7 and the 8th part Py8, so only

element portion

130a and 130b are configured in in the delegation side by side along directions X, have along each of the mutual adjacent pixels of directions X and on aperture opening ratio, produce the problem of difference.

About this problem, describe in more detail with reference to the 1st comparative example shown in Figure 7.

Fig. 7 be present embodiment the 1st comparative example, with the planimetric map of the same implication of Fig. 4.And, in Fig. 7, for the part mark identical with the liquid-crystal apparatus of present embodiment shown in Figure 4 identical with reference to label.

In the 1st comparative example shown in Figure 7, element portion 130a and element portion 130b are in each of a row and b row, and the directions X plane earth disposes side by side in the figure.Each of part 2 Py2 and the 6th part Py6 (perhaps the 4th part Py4 and the 8th part Py8) is outstanding towards the open area of the pixel (that is, being formed with the pixel of the pixel electrode 901 in the mutual adjacent pixel electrodes 901 and 902 along the Y direction) in 2 adjacent mutually pixels of Y direction.Each of part 1 Py1 and the 5th part Py5 (the 3rd part Py3 and the 7th part Py7) is outstanding towards the open area of above-mentioned one other pixel (that is, being formed with the pixel of the pixel electrode 902 in the mutual adjacent pixel electrodes 901 and 902 along the Y direction) in 2 adjacent mutually pixels of Y direction.Thereby the aperture ratio of pixels that is formed with pixel electrode 901 is compared with the aperture ratio of pixels that is formed with pixel electrode 902 and is diminished.Because it is a plurality of that element portion 130a and 130b arrange along the Y direction, so it is alternately different along the Y direction to be positioned at each aperture opening ratio of a plurality of pixels between a row and b row along the Y direction.In addition, also same between other row with a row and b row, in each of the mutual adjacent pixels of Y direction, on aperture opening ratio, can produce difference.

Like this, owing in order to be reduced in the part 1 Py1 that the light leakage current that produces among the TFT is provided with, the 3rd part Py3, the 5th part Py5 and the 7th part Py7 and part 2 Py2, the 4th part Py4, the width difference of each of the 6th part Py6 and the 8th part Py8, so one aperture opening ratio in the adjacent pixels is littler than another aperture ratio of pixels mutually, thereby with part 1 Py1, the 3rd part Py3, the 5th part Py5 and the 7th part Py7 and part 2 py2, the 4th part Py4, the width of each of the 6th part Py6 and the 8th part Py8 does not have different situations to compare, might be inhomogeneous along the generation demonstration on image display area 10a is all of Y direction, instead the display performance of liquid-crystal apparatus is reduced.

Thereby as shown in Figure 4, in the liquid-crystal apparatus of present embodiment,

element portion

130a and 130b are configured along the Y direction with staggering 1 amount of pixels mutually.If adopt this configuration, each of part 1 Py1, part 2 Py2, the 3rd part Py3, the 4th part Py4, the 5th part Py5, the 6th part Py6, the 7th part Py7 and the 8th part Py8 then disposes along the Y direction mutually to cover the mode of each several part on should the LDD zone of shading with staggering.

More particularly, in a pixel in 2 adjacent mutually pixels of Y direction, part 2 Py2 and the 7th part Py7 (perhaps the 4th part Py4 and the 5th part Py5) are overlapping, in one other pixel, part 1 Py1 and the 8th part Py8 (perhaps the 3rd part Py3 and the 6th part Py6) are overlapping.Thereby, can make a plurality of aperture ratio of pixels of composing images viewing area 10a identical.

In addition, the liquid-crystal apparatus of present embodiment, because have part 2 Py2, the 4th part Py4, the 6th part Py6 and the 8th part Py8 that concentrated target ground carries out shading to the LDD zone that is easy to generate the light leakage current, so, compare and to reduce with the situation that part 2 Py2, the 4th part Py4, the 6th part Py6 and the 8th part Py8 are not set at the light leakage current that pixel switch produces in TFT.And then, in the liquid-crystal apparatus of present embodiment, because compare with the width of part 2 Py2, the 4th part Py4, the 6th part Py6, the 8th part Py8, the width of constriction part 1 Py1, the 3rd part Py3, the 5th part Py5 and the 7th part Py7 is so become the structure that aperture ratio of pixels can greatly not reduce.

Below, the open area of pixel of the liquid-crystal apparatus of present embodiment is described with reference to Fig. 8 and Fig. 9.

Fig. 8 is the planimetric map of a part of image display area that the liquid-crystal apparatus of present embodiment is shown graphicly.Fig. 9 is the planimetric map of a part of image display area that the liquid-crystal apparatus of the 1st comparative example shown in Figure 7 is shown graphicly.

In Fig. 8, in the liquid-crystal apparatus of present embodiment, image display area 10a by with the driving of liquid crystal correspondingly, the light open area 210 (that is,

open area

210a, 210b, 210c and 210d) and the impervious non-open area 211 of light that in fact can see through constitute.Open area 210 and non-open area 211 are by regulations such as a plurality of

element portion

130a, 130b and various wirings.In the liquid-crystal apparatus of present embodiment, as with reference to Fig. 4 to Fig. 6 illustrated, the size of the open area 210 in each pixel is consistent in image display area 10a.More particularly, each the size of

open area

210a, 210b, 210c and 210d of pixel that is formed with the 1st pixel 9a1, the 2nd pixel electrode 9a2, the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 equates mutually.

And, the 1st pixel electrode 9a1, the 2nd pixel electrode 9a2, the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4, as reference Fig. 4 is illustrated in front, be the pixel electrode 9a that is electrically connected with the 1st pixel electrode side source and drain areas 1c-1, the 2nd pixel electrode side source and drain areas 1c-2, the 3rd pixel electrode side source and drain areas 1c-3 and the 4th pixel electrode side source and drain areas 1c-4 respectively.In addition, the position relation for the 1st pixel electrode 9a1, the 2nd pixel electrode 9a2, the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 explains in the back.

On the other hand, as shown in Figure 9, in the 1st comparative example of present embodiment, because

element portion

130a and 130b along the directions X alignment arrangements on delegation, so the part 2 Py2 of shading and the 6th part Py6 (perhaps the 4th part Py4 and the 8th part Py8) and

pixel electrode

901 and 903 overlapping areas are carried out in pixel electrode side LDD zone, compare with the part 1 Py1 that data line side source and drain areas is carried out shading and the 5th part Py5 (the 3rd part Py3 and the 7th part Py7) and

pixel electrode

902 and 904 overlapping areas and want big (with reference to Fig. 7).Thereby the open area 210 of each pixel is different mutually in adjacent mutually row.More particularly, be formed with each the open area 210a of pixel of

pixel electrode

901 and 903 " and the area of 210c ' and each the open area 210b ' and the 210d of pixel that is formed with

pixel electrode

902 and 904; area different mutually, thereby in image display area 10a, will produce show inhomogeneous wait show bad.

Thereby, if adopt the liquid-crystal apparatus of present embodiment, then as shown in Figure 8, because the area of each open area 210 is equated mutually, so the aperture opening ratio in each pixel is equated.Thereby, if adopt the liquid-crystal apparatus of present embodiment, then can carry out can not producing inhomogeneous grade of demonstration and show that bad high quality images shows.

Below, the position relation of the pixel electrode that is electrically connected with element portion of the liquid-crystal apparatus of present embodiment also is described with reference to Figure 10 and Figure 11 except Fig. 4.

Figure 10 is the synoptic diagram of position relation that pixel electrode liquid-crystal apparatus, that be electrically connected with element portion of present embodiment is shown, and Figure 11 is the electrical schematics that the distribution of the stray capacitance that produces between data line and pixel electrode in the liquid-crystal apparatus of present embodiment is shown.And in Figure 11, what illustrate is the electric formation of part shown in Figure 10.

In Fig. 4 and Figure 10, in the present embodiment, especially, the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 are configured in the part 1 Py1 that is formed with memory capacitance 70a in a plurality of pixels and the 3rd part Py3 respectively and in the mutual adjacent pixels of directions X.And, in Figure 10, each arrow represent each pixel electrode side source and drain areas 1e-1,1e-2,1e-3 and 1e-4 respectively with each situation about being electrically connected of pixel electrode 9a1,9a2,9a3 and 9a4.Relevant this point is identical among each figure of Shuo Ming Figure 12, Figure 14 and Figure 16 in the back.

Promptly, the 1st pixel electrode 9a1 that is electrically connected with element portion 130a and the 2nd pixel electrode 9a2 see respectively with part 1 Py1 as plane earth among a plurality of pixel electrode 9a that arrange, on tft array substrate 10 rectangularly and the 3rd part Py3 is overlapping and be provided with along the mutual adjacent pixel electrodes 9a of directions X, and wherein this part 1 Py1 and the 3rd part Py3 cover data line side LDD zone 1b-1 and the 1b-2 of this element portion 130a respectively.In other words, the 1st pixel electrode side source and drain areas 1e-1 of element portion 130a and the 2nd pixel electrode side source and drain areas 1e-2 respectively with a plurality of pixel electrode 9a that arrange rectangularly among, on tft array substrate 10 plane earth see with part 1 Py1 and the 3rd part Py3 overlapping, in 2 adjacent mutually pixel electrode 9a of directions X any one be electrically connected, wherein this part 1 Py1 and the 3rd part Py3 cover data line side LDD zone 1b-1 and the 1b-2 of this element portion 130a respectively.Promptly, each of the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2, see with plane earth on tft array substrate 10, all with part 1 Py1 and the 3rd part Py3 is partly overlapping and be not provided with (in more detail with the overlapping mode of part 2 Py2 and the 4th part Py4, in the case, further, each of the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2, plane earth is seen on tft array substrate 10, all partly overlapping with the 6th part Py6 and the 8th part Py8, and not overlapping with the 5th part Py5 and the 7th part Py7).Promptly, the pixel that each was configured to of the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2, be unified in a plurality of pixels, with the overlapping pixel of part 1 Py1 and the 3rd part Py3 on, wherein this part 1 Py1 and the 3rd part Py3 cover data line side LDD zone 1b-1 and the 1b-2 of the element portion 130a that is electrically connected with the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 respectively.

Thus, the display characteristic that can be provided with the display characteristic of pixel of the 1st pixel electrode 9a1 and the pixel that is provided with the 2nd pixel electrode 9a2 is set to identical substantially mutually.

More particularly, in Figure 10, because each of the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2, plane earth is seen on tft array substrate 10, all partly overlapping with part 1 Py1 and the 3rd part Py3, and it is not overlapping (in more detail with part 2 Py2 or the 4th part Py4, in the case, further, partly overlapping with the 6th part Py6 and the 8th part Py8, and not overlapping with the 5th part Py5 and the 7th part Py7), so can be with each and the each several part Py1 of the memory capacitance 70a that plays a role as light shielding part of the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2, ..., the size of the part that Py8 is overlapped is set to identical substantially mutually.

Thereby, in Figure 11, can eliminate substantially and data line 6a1 that element portion 130a is electrically connected with poor with the stray capacitance Ca21 between the 2nd pixel electrode 9a2 of stray capacitance Ca11, this data line 6a1 between the 1st pixel electrode 9a1.And then, can eliminate substantially and be electrically connected at the adjacent data line 6a2 of the data line 6a1 on the element portion 130a (in other words, and the data line 6a2 that is electrically connected of element portion 130b) with poor with the stray capacitance Ca22 between the 2nd pixel electrode 9a2 of stray capacitance Ca12, this data line 6a2 between the 1st pixel electrode 9a1.Thus, current potential retention performance that can the 1st pixel electrode 9a1 and the current potential retention performance of the 2nd pixel electrode 9a2 are set to identical substantially mutually.Its result, the display characteristic that can be provided with the display characteristic of pixel of the 1st pixel electrode 9a1 and the pixel that is provided with the 2nd pixel electrode 9a2 is set to identical substantially mutually.

And then, in Fig. 4 and Figure 10, in the present embodiment, especially, the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 are configured in the 5th part Py5 that is formed with memory capacitance 70a in a plurality of pixels and the 7th part Py7 respectively and in the mutual adjacent pixels of directions X.

Promptly, the 3rd pixel electrode 9a3 that is electrically connected with element portion 130a and the 4th pixel electrode 9a4 see respectively with the 5th part Py5 as plane earth among a plurality of pixel electrode 9a that arrange, on tft array substrate 10 rectangularly and the 7th part Py7 is overlapping and be provided with along the mutual adjacent pixel electrodes 9a of directions X, and wherein the 5th part Py5 and the 7th part Py7 cover data line side LDD zone 1b-3 and the 1b-4 of this element portion 130b respectively.Promptly, with above-mentioned the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 and part 1 Py1, part 2 Py2, configuration relation between the 3rd part Py3 and the 4th part Py4 is the same, each of the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4, see with plane earth on tft array substrate 10, all with the 5th part Py5 and the 7th part Py7 is partly overlapping and be not provided with (in more detail with the overlapping mode of the 6th part Py6 and the 8th part Py8, in the case, further, each of the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4, plane earth is seen on tft array substrate 10, all partly overlapping with part 2 Py2 and the 4th part Py4, and not overlapping with part 1 Py1 and the 3rd part Py3).Promptly, the pixel that each was configured to of the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4, be unified in a plurality of pixels, with the overlapping pixel of the 5th part Py5 and the 7th part Py7 on, wherein the 5th part Py5 and the 7th part Py7 cover data line side LDD zone 1b-3 and the 1b-4 of the element portion 130a that is electrically connected with the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 respectively.

Thus, the display characteristic that can be provided with the display characteristic of pixel of the 3rd pixel electrode 9a3 and the pixel that is provided with the 4th pixel electrode 9a4 is set to identical substantially mutually.

More particularly, in Figure 10, because each of the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4, plane earth is seen on tft array substrate 10, all partly overlapping with the 5th part Py5 and the 7th part Py7, and it is not overlapping (in more detail with the 6th part Py6 or the 8th part Py8, in the case, further, partly overlapping with part 2 Py2 and the 4th part Py4, and not overlapping with part 1 Py1 and the 3rd part Py3), so can be with each and the each several part Py1 of the memory capacitance 70a that plays a role as light shielding part of the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4, ..., the size of the part that Py8 is overlapped is set to identical substantially mutually.

Thereby, in Figure 11, can eliminate substantially and data line 6a2 that element portion 130b is electrically connected and stray capacitance Ca31, this data line 6a2 between the 3rd pixel electrode 9a3 and the stray capacitance Ca41 between the 4th pixel electrode 9a4 poor.And then, can eliminate and be electrically connected the poor of stray capacitance Ca32, this data line 6a1 between adjacent data line 6a1 of the data line 6a2 on the element portion 130b (in other words, and the data line 6a1 that is electrically connected of element portion 130a) and the 3rd pixel electrode 9a3 and the stray capacitance Ca42 between the 4th pixel electrode 9a4 substantially.Thus, current potential retention performance that can the 3rd pixel electrode 9a3 and the current potential retention performance of the 4th pixel electrode 9a4 are set to identical substantially mutually.Its result, the display characteristic that can be provided with the display characteristic of pixel of the 3rd pixel electrode 9a3 and the pixel that is provided with the 4th pixel electrode 9a4 is set to identical substantially mutually.

In addition, in the present embodiment, identical mode forms the shape separately of part 1 Py1, the 3rd part Py3, the 5th part Py5 and the 7th part Py7 to become mutually, and identical mode forms the shape separately of part 2 Py2, the 4th part Py4, the 6th part Py6 and the 8th part Py8 to become mutually.Thus, the display characteristic that is respectively arranged with each pixel of the 1st pixel electrode 9a1, the 2nd pixel electrode 9a2, the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 further can be set to reliably mutually substantially identical.That is the display characteristic of each pixel that, can composing images viewing area 10a is set to substantially evenly.Its result can improve the quality of the display image that is presented at image display area 10a.

Figure 12 be present embodiment the 2nd comparative example, with the synoptic diagram of the same implication of Figure 10, Figure 13 be present embodiment the 2nd comparative example, with the synoptic diagram of the same implication of Figure 11.

As among Figure 12 as shown in the 2nd comparative example like that, suppose, under the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 conduct situation that mutual adjacent pixel electrodes 9a is provided with along the Y direction, promptly, at the 1st pixel electrode 9a1 for example as partly overlapping (in more detail with part 1 Py1 and the 3rd part Py3, further, partly overlapping with the 6th part Py6 and the 8th part Py8, and not with part 2 Py2, the 4th part Py4, the 5th part Py5 and the 7th part Py7 are overlapping) pixel electrode 9a be provided with, the 2nd pixel electrode 9a2 is as partly overlapping (in more detail with part 2 Py2 and the 4th part Py4, further, partly overlapping with the 5th part Py5 and the 7th part Py7, and not with part 1 Py1, the 3rd part Py3, the 6th part Py6 and the 8th part Py8 are overlapping) pixel electrode 9a situation about being provided with under, each of the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 and each several part Py1, ..., the big young pathbreaker of the part that Py8 is overlapped is different mutually.

Thereby in Figure 13, stray capacitance Ca11, this data line 6a1 between the data line 6a1 that is electrically connected with element portion 130a (that is, TFT30a1 and 30a2) and the 1st pixel electrode 9a1 and the stray capacitance Ca21 between the 2nd pixel electrode 9a2 will be different mutually.More particularly, because the part that the size of the part that the 2nd pixel electrode 9a2 and part 2 Py2 and the 4th part Py4 are overlapped is more overlapped than the 1st pixel electrode 9a1 and part 1 Py1 and the 3rd part Py3 is big or small little, the stray capacitance Ca11 between data line 6a1 and the 1st pixel electrode 9a1 has than the little capacitance of stray capacitance Ca21 between data line 6a1 and the 2nd pixel electrode 9a2.And then, in the case, with being electrically connected stray capacitance Ca12, this data line 6a2 between adjacent data line 6a2 of the data line 6a1 on the element portion 130a (in other words, the data line 6a2 that is electrically connected with element portion 130b) and the 1st pixel electrode 9a1 and the stray capacitance Ca22 between the 2nd pixel electrode 9a2 will be different mutually.More particularly, because the part that the size of the part that the 2nd pixel electrode 9a2 and the 5th part Py5 and the 7th part Py7 are overlapped is more overlapped than the 1st pixel electrode 9a1 and the 6th part Py6 and the 8th part Py8 is greatly big or small, the stray capacitance Ca12 between data line 6a2 and the 1st pixel electrode 9a1 has than the big capacitance of stray capacitance Ca22 between data line 6a2 and the 2nd pixel electrode 9a2.Therefore, the current potential retention performance of the current potential retention performance of the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 might be different mutually.Thereby the display characteristic that is provided with the display characteristic of pixel of the 1st pixel electrode 9a1 and the pixel that is provided with the 2nd pixel electrode 9a2 might be different mutually.

In addition, in the 2nd comparative example shown in Figure 12, as mentioned above, with the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 each with each several part Py1 ..., the big young pathbreaker of the overlapped part of Py8 is different mutually same, each of the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 with each several part Py1 ..., the size of the overlapped part of Py8 also will be different mutually.Therefore, being provided with the display characteristic of the display characteristic of pixel of the 3rd pixel electrode 9a3 and the pixel that is provided with the 4th pixel electrode 9a4 might be different mutually.

Yet, in the present embodiment, especially, as mentioned above, the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 are configured in the part 1 Py1 that is formed with memory capacitance 70a in a plurality of pixels and the 3rd part Py3 respectively and on the mutual adjacent pixels of directions X, and then the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 are configured in the 5th part Py5 that is formed with memory capacitance 70a in a plurality of pixels and the 7th part Py7 respectively and on the mutual adjacent pixels of directions X.Promptly, dispose the 1st pixel electrode 9a1, the 2nd pixel electrode 9a2, the pixel of each of the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4, in a plurality of pixels, be unified in the part Py that plays a role as light shielding part (promptly, part 1 Py1, ..., the 7th part or the 8th part Py8) on the overlapping pixel, wherein this light shielding part covering and this pixel electrode 9a are (promptly, the 1st pixel electrode 9a1, the 2nd pixel electrode 9a2, the 3rd pixel electrode 9a3 or the 4th pixel electrode 9a4) TFT30 that is electrically connected is (promptly, TFT30a1,30a2,30b1 or 30b2) data line side LDD zone 1b (that is data line side LDD zone 1b-1,, 1b-2,1b-3 or 1b-4).Thus, the display characteristic that can further be respectively arranged with each pixel of the 1st pixel electrode 9a1, the 2nd pixel electrode 9a2, the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 reliably is set to identical substantially mutually.

As mentioned above, if adopt the liquid-crystal apparatus of present embodiment, then can not cause the reduction in rain of aperture opening ratio, show badly and can reduce flicker that the generation because of the light leakage current takes place etc., and it is bad to reduce the demonstration that the difference because of each aperture ratio of pixels causes.And then, the display characteristic of each pixel can be arranged to identical mutually.Its result if adopt the liquid-crystal apparatus of present embodiment, can realize that then high quality images shows.

＜the 2 embodiment 〉

The liquid-crystal apparatus of the 2nd embodiment is described with reference to Figure 14 and Figure 15.

Figure 14 be the 2nd embodiment, with the synoptic diagram of the same implication of Figure 10, Figure 15 be the 2nd embodiment, with the synoptic diagram of the same implication of Figure 11.And then in Figure 15, what illustrate is the electric formation of part shown in Figure 14.In Figure 14 and Figure 15, to the inscape identical inscape of Fig. 1 to the 1st embodiment shown in Figure 11, mark identical with reference to label, and suitable their explanation of omission.

In Figure 14, the liquid-crystal apparatus of the 2nd embodiment, with the liquid-crystal apparatus of above-mentioned the 1st embodiment relatively, the configuration difference of its 1st pixel electrode 9a1, the 2nd pixel electrode 9a2, the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4, and relevant other aspect, then the liquid-crystal apparatus with above-mentioned the 1st embodiment roughly similarly constitutes.

In Figure 14, in the present embodiment, especially, the 1st pixel electrode 9a1 is configured in a plurality of pixels, the part 2 Py2 that is formed with memory capacitance 70a (in more detail, cover the part 2 Py2 of the pixel electrode side LDD zone 1c-1 of the element portion 130a that is electrically connected with the 1st pixel electrode 9a1) and in any one of the mutual adjacent pixels of directions X, the 2nd pixel electrode 9a2 is configured in a plurality of pixels, be formed with the 4th part Py4 (covering in more detail, the 4th part Py4 of the pixel electrode side LDD zone 1c-2 of the element portion 130a that is electrically connected with the 2nd pixel electrode 9a2) of memory capacitance 70a and in any one of the mutual adjacent pixels of directions X.And then the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 are configured in the same side (that is, among the figure, with respect to right side or the left side of element portion 130a) with respect to the element portion 130a that is electrically connected with the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2.

Promptly, the 1st pixel electrode 9a1 that is electrically connected with element portion 130a and the 2nd pixel electrode 9a2 see respectively with the overlapping pixel electrode 9a of part 2 Py2 and the 4th part Py4 as plane earth among a plurality of pixel electrode 9a that arrange, on tft array substrate 10 rectangularly and are provided with that wherein this part 2 Py2 and the 4th part Py4 cover data line side LDD zone 1c-1 and the 1c-2 of this element portion 130a respectively.In other words, the 1st pixel electrode side source and drain areas 1e-1 of element portion 130a and the 2nd pixel electrode side source and drain areas 1e-2 respectively with a plurality of pixel electrode 9a that arrange rectangularly among, plane earth sees with the overlapping pixel electrode 9a of part 2 Py2 and the 4th part Py4 and is electrically connected that wherein the width of the directions X of this part 2 Py2 and the 4th part Py4 is wideer than part 1 Py1 and the 3rd part Py3 of data line side LDD zone 1b-1 that covers this element portion 130a respectively and 1b-2 on tft array substrate 10.That is, each of the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 seen with plane earth on tft array substrate 10, all with part 2 Py2 and the 4th part Py4 is partly overlapping and be not provided with the overlapping mode of part 1 Py1 and the 3rd part Py3.Promptly, the pixel that each was configured to of the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2, be unified in a plurality of pixels, with the overlapping pixel of part 2 Py2 and the 4th part Py4 on, wherein this part 2 Py2 and the 4th part Py4 cover pixel electrode side LDD zone 1c-1 and the 1c-2 of the element portion 130a that is electrically connected with the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 respectively.

Thereby, in Figure 15, can eliminate substantially and data line 6a1 that element portion 130a is electrically connected and stray capacitance Ca11, this data line 6a1 between the 1st pixel electrode 9a1 and the stray capacitance Ca21 between the 2nd pixel electrode 9a2 poor.And then, can eliminate and be electrically connected the poor of stray capacitance Ca12, this data line 6a2 between adjacent data line 6a2 of the data line 6a1 on the element portion 130a (in other words, and the data line 6a2 that is electrically connected of element portion 130b) and the 1st pixel electrode 9a1 and the stray capacitance Ca22 between the 2nd pixel electrode 9a2 substantially.Thus, current potential retention performance that can the 1st pixel electrode 9a1 and the current potential retention performance of the 2nd pixel electrode 9a2 are set to identical substantially mutually.

And then, in Figure 14, in the present embodiment, especially, the 3rd pixel electrode 9a3 is configured in a plurality of pixels, the 6th part Py6 that is formed with memory capacitance 70a (in more detail, cover the 6th part Py6 of the pixel electrode side LDD zone 1c-3 of the element portion 130b that is electrically connected with the 3rd pixel electrode 9a3) and in any one of the mutual adjacent pixels of directions X, the 4th pixel electrode 9a4 is configured in a plurality of pixels, be formed with the 8th part Py8 (covering in more detail, the 8th part Py8 of the pixel electrode side LDD zone 1c-4 of the element portion 130b that is electrically connected with the 4th pixel electrode 9a4) of memory capacitance 70a and in any one of the mutual adjacent pixels of directions X.And then the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 are configured in the same side (that is, among the figure, with respect to right side or the left side of element portion 130b) with respect to the element portion 130b that is electrically connected with the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4.

Promptly, the 3rd pixel electrode 9a3 that is electrically connected with element portion 130a and the 4th pixel electrode 9a4 see respectively with the overlapping pixel electrode 9a of the 6th part Py6 and the 8th part Py8 as plane earth among a plurality of pixel electrode 9a that arrange, on tft array substrate 10 rectangularly and are provided with that wherein the 6th part Py6 and the 8th part Py8 cover pixel electrode side LDD zone 1c-3 and the 1c-4 of this element portion 130b respectively.In other words, the 3rd pixel electrode side source and drain areas 1e-3 of element portion 130b and the 4th pixel electrode side source and drain areas 1e-4 respectively with a plurality of pixel electrode 9a that arrange rectangularly among, plane earth sees with the overlapping pixel electrode 9a of the 6th part Py6 and the 8th part Py8 and is electrically connected that wherein the width of the directions X of the 6th part Py6 and the 8th part Py8 is wideer than the 5th part Py5 and the 7th part Py7 of data line side LDD zone 1b-3 that covers this element portion 130b respectively and 1b-4 on tft array substrate 10.That is, each of the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 seen with plane earth on tft array substrate 10, all with the 6th part Py6 and the 8th part Py8 is partly overlapping and be not provided with the overlapping mode of the 5th part Py5 and the 7th part Py7.Promptly, the pixel that each was configured to of the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4, be unified in a plurality of pixels, with the overlapping pixel of the 6th part Py6 and the 8th part Py8 on, wherein the 6th part Py6 and the 8th part Py8 cover pixel electrode side LDD zone 1c-3 and the 1c-4 of the element portion 130a that is electrically connected with the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 respectively.

Thus, can be arranged to mutually substantially identical with the display characteristic of the pixel that is provided with the 4th pixel electrode 9a4 the display characteristic that is provided with the pixel of the 3rd pixel electrode 9a3.

Thereby, in Figure 15, can eliminate substantially and data line 6a2 that element portion 130b is electrically connected and stray capacitance Ca31, this data line 6a2 between the 3rd pixel electrode 9a3 and the stray capacitance Ca41 between the 4th pixel electrode 9a4 poor.And then, can eliminate and be electrically connected the poor of stray capacitance Ca32, this data line 6a1 between adjacent data line 6a1 of the data line 6a2 on the element portion 130b (in other words, and the data line 6a1 that is electrically connected of element portion 130a) and the 3rd pixel electrode 9a3 and the stray capacitance Ca42 between the 4th pixel electrode 9a4 substantially.Thus, current potential retention performance that can the 3rd pixel electrode 9a3 and the current potential retention performance of the 4th pixel electrode 9a4 are set to identical substantially mutually.

In addition, in the liquid-crystal apparatus of present embodiment, same with the liquid-crystal apparatus of above-mentioned the 1st embodiment, identical mode forms the shape separately of part 1 Py1, the 3rd part Py3, the 5th part Py5 and the 7th part Py7 to become mutually, and identical mode forms the shape separately of part 2 Py2, the 4th part Py4, the 6th part Py6 and the 8th part Py8 to become mutually.Thus, the display characteristic that is respectively arranged with each pixel of the 1st pixel electrode 9a1, the 2nd pixel electrode 9a2, the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 further can be set to reliably mutually substantially identical.

And, in the present embodiment, though constitute as mentioned above: the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 are configured in the same side (promptly with respect to the element portion 130a that is electrically connected with the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2, among the figure, right side or left side with respect to element portion 130a) and the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 be configured in the same side (promptly with respect to the element portion 130b that is electrically connected with the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4, among the figure, right side or left side with respect to element portion 130b), but also can as Figure 16 and variation shown in Figure 17, constitute.Wherein, Figure 16 be modified embodiment of the present embodiment, with the synoptic diagram of the same implication of Figure 10, Figure 17 be modified embodiment of the present embodiment, with the synoptic diagram of the same implication of Figure 11.Shown in Figure 17 is the electric formation of part shown in Figure 16.

Promptly, as shown among Figure 16 as variation, the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 are configured in mutually not homonymy (promptly with respect to the element portion 130a that is electrically connected with the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2, among the figure, the 1st pixel electrode 9a1 is configured in the right side with respect to the element portion 130a that is electrically connected with the 1st pixel electrode 9a1, the 2nd pixel electrode 9a2 is configured in the left side with respect to the element portion 130a that is electrically connected with the 2nd pixel electrode 9a2), the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 are configured in mutually not homonymy (among the figure with respect to the element portion 130b that is electrically connected with the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4, the 3rd pixel electrode 9a3 is configured in the right side with respect to the element portion 130b that is electrically connected with the 3rd pixel electrode 9a3, and the 4th pixel electrode 9a4 is configured in the left side with respect to the element portion 130b that is electrically connected with the 4th pixel electrode 9a4).

In the case, also be, the pixel that each was configured to of the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2, be unified in a plurality of pixels, on the overlapping pixel of part 2 Py2 and the 4th part Py4, wherein this part 2 Py2 and the 4th part Py4 cover pixel electrode side LDD zone 1c-1 and the 1c-2 of the element portion 130a that is electrically connected with the 1st pixel electrode 9a1 and the 2nd pixel electrode 9a2 respectively, and the pixel that each was configured to of the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4, be unified in a plurality of pixels, on the overlapping pixel of the 6th part Py6 and the 8th part Py8, wherein the 6th part Py6 and the 8th part Py8 cover pixel electrode side LDD zone 1c-3 and the 1c-4 of the element portion 130b that is electrically connected with the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 respectively.

Thereby, in Figure 17, can eliminate substantially and data line 6a1 that element portion 130a is electrically connected and stray capacitance Ca11, this data line 6a1 between the 1st pixel electrode 9a1 and the stray capacitance Ca21 between the 2nd pixel electrode 9a2 poor.And then, can eliminate and be electrically connected the poor of stray capacitance Ca12, this data line 6a2 between adjacent data line 6a2 of the data line 6a1 on the element portion 130a (in other words, and the data line 6a2 that is electrically connected of element portion 130b) and the 1st pixel electrode 9a1 and the stray capacitance Ca22 between the 2nd pixel electrode 9a2 substantially.Thus, current potential retention performance that can the 1st pixel electrode 9a1 and the current potential retention performance of the 2nd pixel electrode 9a2 are set to identical substantially mutually.And then, can eliminate substantially and data line 6a2 that element portion 130b is electrically connected and stray capacitance Ca31, this data line 6a2 between the 3rd pixel electrode 9a3 and the stray capacitance Ca41 between the 4th pixel electrode 9a4 poor.And then, can eliminate and be electrically connected the poor of stray capacitance Ca32, this data line 6a1 between adjacent data line 6a1 of the data line 6a2 on the element portion 130b (in other words, and the data line 6a1 that is electrically connected of element portion 130a) and the 3rd pixel electrode 9a3 and the stray capacitance Ca42 between the 4th pixel electrode 9a4 substantially.Thus, current potential retention performance that can the 3rd pixel electrode 9a3 and the current potential retention performance of the 4th pixel electrode 9a4 are set to identical substantially mutually.

Thus, same with the liquid-crystal apparatus of above-mentioned the 2nd embodiment, the display characteristic that is respectively arranged with each pixel of the 1st pixel electrode 9a1, the 2nd pixel electrode 9a2, the 3rd pixel electrode 9a3 and the 4th pixel electrode 9a4 can be arranged to identical substantially mutually.

＜electronic equipment 〉

Below, explanation will be applied to the situation in the various electronic equipments as the liquid-crystal apparatus of above-mentioned electro-optical device with reference to Figure 18.At this, Figure 18 is the planimetric map that the structure example of projector is shown.Below, explanation is used this liquid-crystal apparatus as light valve projector.

As shown in figure 18, in projector 1100 inside, be provided with the lamp unit 1102 that constitutes by white light sources such as Halogen lamp LEDs.The projected light that penetrates from this lamp unit 1102 is separated into the RGB three primary colors by 4 catoptrons 1106 and 2 dichronic mirrors 1108 of being arranged in the light guide way 1104, and incides

liquid crystal panel

1110R, 1110B and 1110G as the light valve corresponding with each primary colors.

The formation of

liquid crystal panel

1110R, 1110B and 1110G is identical with above-mentioned liquid-crystal apparatus, and it is driven respectively by the R that provides from imaging signal processing circuit, G, B primary signal.And the light by these liquid crystal panels were modulated incides colour splitting prism 1112 from 3 directions.In this colour splitting prism 1112, R and the 90 degree refractions of B light, on the other hand, G light is straight ahead then.Thereby the result after the image of each color is synthetic is via projecting lens 1114 projection of color images on screen etc.

At this, if be conceived to each

liquid crystal panel

1110R, 1110B and the formed demonstration picture of 1110G, counter-rotating about then the demonstration picture that is formed by liquid crystal panel 1110G need look like to carry out with respect to the demonstration that is formed by

liquid crystal panel

1110R, 1110B.

And, because utilize the effect of dichronic mirror 1108, make with R, G, light that each primary colors of B is corresponding and incide

liquid crystal panel

1110R, 1110B and 1110G, so, do not need to be provided with color filter.

And, except the electronic equipment of reference Figure 18 explanation, can also list mobile model personal computer, mobile phone, LCD TV, find a view type or monitor direct viewing type video recorder, automobile navigation apparatus, pager, electronic notebook, electronic calculator, word processor, workstation, videophone, POS terminal, possess the device of touch panel etc.And apparently, it is possible being applied to these various electronic equipments.

In addition, the present invention, remove with beyond the illustrated liquid-crystal apparatus of above-mentioned embodiment, also can be applied on silicon substrate to form the reflective liquid crystal device (LCOS), plasma display (PDP), field emission display (FED, SED), OLED display, Digital Micromirror Device (DMD), electrophoretic apparatus of element etc.

The present invention is not limited to above-mentioned embodiment, do not deviate from can the accessory rights requirement scope and the scope of all purports of the present invention that obtains of instructions or thought in can suit to change, be accompanied by the substrate for electrooptic device of such change, the electronic equipment that possesses the electro-optical device of this substrate for electrooptic device and possess this electro-optical device also all is included in the technical scope of the present invention.

Claims

1. substrate for electrooptic device is characterized in that possessing:

Substrate;

Be arranged on many data lines on the aforesaid substrate;

A plurality of pixel electrodes that form in a plurality of pixels of the pixel region on constituting aforesaid substrate respectively;

In the zone that the 1st direction of extending along above-mentioned data line in each non-open area spaced apart from each other, open area of above-mentioned a plurality of pixels is extended, form and adjacent with an above-mentioned zone and along the formation and have the element portion of semiconductor layer of above-mentioned the 1st direction along above-mentioned the 1st direction along the 2nd direction of intersecting with above-mentioned the 1st direction with staggering 1 amount of pixels, this semiconductor layer comprises: (i) with above-mentioned many data lines in, the 1st data line side source and drain areas that a data line that extends along above-mentioned the 1st direction in an above-mentioned zone is electrically connected, (ii) be positioned at the 1st channel region and the 2nd channel region of the both sides of above-mentioned the 1st data line side source and drain areas along above-mentioned the 1st direction, (iii) from above-mentioned the 1st data line side source and drain areas, be arranged in each the outside and 1st pixel electrode mutually different and each the 1st pixel electrode side source and drain areas that is electrically connected and the 2nd pixel electrode side source and drain areas of the 2nd pixel electrode of above-mentioned the 1st channel region and the 2nd channel region with above-mentioned a plurality of pixel electrodes along above-mentioned the 1st direction, (iv) be formed on the 1st engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st data line side source and drain areas, (v) be formed on the 2nd engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st pixel electrode side source and drain areas, (vi) be formed on the 3rd engaging zones between above-mentioned the 2nd channel region and above-mentioned the 1st data line side source and drain areas, (vii) be formed on the 4th engaging zones between above-mentioned the 2nd channel region and above-mentioned the 2nd pixel electrode side source and drain areas;

Form and cover the 1st light shielding part of above-mentioned the 1st engaging zones in the upper layer side of above-mentioned semiconductor layer, along above-mentioned the 1st direction;

Upper layer side at above-mentioned semiconductor layer forms, covers width 2nd light shielding part wideer than above-mentioned the 1st light shielding part of above-mentioned the 2nd engaging zones and its above-mentioned the 2nd direction;

Form and cover the 3rd light shielding part of above-mentioned the 3rd engaging zones in the upper layer side of above-mentioned semiconductor layer, along above-mentioned the 1st direction; And

Upper layer side at above-mentioned semiconductor layer forms, covers width 4th light shielding part wideer than above-mentioned the 3rd light shielding part of above-mentioned the 4th engaging zones and its above-mentioned the 2nd direction;

Wherein, above-mentioned the 1st pixel electrode and above-mentioned the 2nd pixel electrode are configured in above-mentioned a plurality of pixel respectively, are formed with above-mentioned the 1st light shielding part and the 3rd light shielding part and in the mutual adjacent pixels of above-mentioned the 2nd direction.

2. substrate for electrooptic device according to claim 1 is characterized in that: each of above-mentioned the 1st to the 4th engaging zones is the LDD zone.

3. according to claim 1 or 2 described substrate for electrooptic device, it is characterized in that: each of above-mentioned the 1st to the 4th light shielding part be configured in said elements portion directly over.

4. according to any described substrate for electrooptic device of claim 1 to 3, it is characterized in that:

The the above-mentioned the 1st and the 2nd light shielding part constitutes the 1st capacity cell, and the 1st capacity cell has a pair of the 1st capacitance electrode and is clamped in the 1st dielectric film between this a pair of the 1st capacitance electrode;

The the above-mentioned the 3rd and the 4th light shielding part constitutes the 2nd capacity cell, and the 2nd capacity cell has a pair of the 2nd capacitance electrode and is clamped in the 2nd dielectric film between this a pair of the 2nd capacitance electrode;

Above-mentioned the 1st capacity cell when picture signal is provided for above-mentioned the 1st pixel electrode via an above-mentioned data line, keeps the current potential of above-mentioned the 1st pixel electrode;

Above-mentioned the 2nd capacity cell when picture signal is provided for above-mentioned the 2nd pixel electrode via an above-mentioned data line, keeps the current potential of above-mentioned the 2nd pixel electrode.

5. substrate for electrooptic device according to claim 4 is characterized in that: in the above-mentioned a pair of the 1st and the 2nd capacitance electrode, at least wherein any one a pair of capacitance electrode comprises conductive light shielding film and constitutes.

6. substrate for electrooptic device is characterized in that possessing:

Substrate;

Be arranged on many data lines on the aforesaid substrate;

Wherein, above-mentioned the 1st pixel electrode is configured in above-mentioned a plurality of pixel, is formed with above-mentioned the 2nd light shielding part and in any one of the mutual adjacent pixels of above-mentioned the 2nd direction;

Above-mentioned the 2nd pixel electrode is configured in above-mentioned a plurality of pixel, be formed with above-mentioned the 4th light shielding part and in any one of the mutual adjacent pixels of above-mentioned the 2nd direction.

7. an electro-optical device is characterized in that, possesses any described substrate for electrooptic device of claim 1 to 6.

8. an electronic equipment is characterized in that, possesses the described electro-optical device of claim 7.

9. substrate for electrooptic device is characterized in that possessing:

Substrate;

Cross one another many data lines and multi-strip scanning line on aforesaid substrate;

Be prescribed accordingly with intersecting of above-mentioned many data lines and above-mentioned multi-strip scanning line and a plurality of pixels of the viewing area on constituting aforesaid substrate in a plurality of pixel electrodes of forming;

In the zone that the 1st direction of extending along above-mentioned data line in each non-open area spaced apart from each other, open area of above-mentioned a plurality of pixels is extended, form and have the 1st element portion of the 1st semiconductor layer along above-mentioned the 1st direction, the 1st semiconductor layer comprises: (i) with above-mentioned many data lines in, the 1st data line side source and drain areas that a data line that extends along above-mentioned the 1st direction in an above-mentioned zone is electrically connected, (ii) be positioned at the 1st channel region and the 2nd channel region of the both sides of above-mentioned the 1st data line example source and drain areas along above-mentioned the 1st direction, (iii) from above-mentioned the 1st data line side source and drain areas, be arranged in each the outside and 1st pixel electrode mutually different and each the 1st pixel electrode side source and drain areas that is electrically connected and the 2nd pixel electrode side source and drain areas of the 2nd pixel electrode of the above-mentioned the 1st and the 2nd channel region with above-mentioned a plurality of pixel electrodes along above-mentioned the 1st direction, (iv) be formed on the 1st engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st data line side source and drain areas, (v) be formed on the 2nd engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st pixel electrode side source and drain areas, (vi) be formed on the 3rd engaging zones between above-mentioned the 2nd channel region and above-mentioned the 1st data line side source and drain areas, (vii) be formed on the 4th engaging zones between above-mentioned the 2nd channel region and above-mentioned the 2nd pixel electrode side source and drain areas;

Adjacent with an above-mentioned zone and in upwardly extending another zone of above-mentioned the 1st side along the 2nd direction of intersecting with above-mentioned the 1st direction in above-mentioned non-open area, see along above-mentioned the 1st direction 1 amount of pixels ground that staggers from above-mentioned the 1st element portion and to form and have the 2nd element portion of the 2nd semiconductor layer, the 2nd semiconductor layer comprises: (viii) with above-mentioned many data lines in, the 2nd data line side source and drain areas that another data line that extends along above-mentioned the 1st direction in above-mentioned another zone is electrically connected, (ix) on above-mentioned the 1st direction, from above-mentioned the 2nd data line side source and drain areas, be formed on and the 3rd channel region of a side same side that is formed with above-mentioned the 1st channel region and the 4th channel region that is formed on and is formed with a side same side of above-mentioned the 2nd channel region, (x) from above-mentioned the 2nd data line side source and drain areas, be arranged in each the outside and 3rd pixel electrode mutually different and the 4th pixel electrode the 3rd pixel electrode side source and drain areas and the 4th pixel electrode side source and drain areas that are electrically connected of the above-mentioned the 3rd and the 4th channel region with above-mentioned a plurality of pixel electrodes along above-mentioned the 1st direction, (xi) be formed on the 5th engaging zones between above-mentioned the 3rd channel region and above-mentioned the 2nd data line side source and drain areas, (xii) be formed on the 6th engaging zones between above-mentioned the 3rd channel region and above-mentioned the 3rd pixel electrode side source and drain areas; (xiii) be formed on the 7th engaging zones between above-mentioned the 4th channel region and above-mentioned the 2nd data line side source and drain areas, (xiv) be formed on the 8th engaging zones between above-mentioned the 4th channel region and above-mentioned the 4th pixel electrode side source and drain areas;

Form and cover the 1st light shielding part of above-mentioned the 1st engaging zones in the upper layer side of above-mentioned the 1st semiconductor layer, along above-mentioned the 1st direction;

Upper layer side at above-mentioned the 1st semiconductor layer forms, covers width 2nd light shielding part wideer than above-mentioned the 1st light shielding part of above-mentioned the 2nd engaging zones and its above-mentioned the 2nd direction;

Form and cover the 3rd light shielding part of above-mentioned the 3rd engaging zones in the upper layer side of above-mentioned the 1st semiconductor layer, along above-mentioned the 1st direction;

Upper layer side at above-mentioned the 1st semiconductor layer forms, covers width 4th light shielding part wideer than above-mentioned the 3rd light shielding part of above-mentioned the 4th engaging zones and its above-mentioned the 2nd direction;

Form and cover the 5th light shielding part of above-mentioned the 5th engaging zones in the upper layer side of above-mentioned the 2nd semiconductor layer, along above-mentioned the 1st direction;

Upper layer side at above-mentioned the 2nd semiconductor layer forms, covers width 6th light shielding part wideer than above-mentioned the 5th light shielding part of above-mentioned the 6th engaging zones and its above-mentioned the 2nd direction;

Form and cover the 7th light shielding part of above-mentioned the 7th engaging zones in the upper layer side of above-mentioned the 2nd semiconductor layer, along above-mentioned the 1st direction;

Upper layer side at above-mentioned the 2nd semiconductor layer forms, covers width 8th light shielding part wideer than above-mentioned the 7th light shielding part of above-mentioned the 8th engaging zones and its above-mentioned the 2nd direction;

Wherein, the above-mentioned the 1st and the 2nd pixel electrode is configured in above-mentioned a plurality of pixel respectively, is formed with the above-mentioned the 1st and the 3rd light shielding part and in the mutual adjacent pixels of above-mentioned the 2nd direction;

The the above-mentioned the 3rd and the 4th pixel electrode is configured in above-mentioned a plurality of pixel respectively, be formed with the above-mentioned the 5th and the 7th light shielding part and in the mutual adjacent pixels of above-mentioned the 2nd direction.

10. substrate for electrooptic device according to claim 9 is characterized in that: each of above-mentioned the 1st to the 8th engaging zones is the LDD zone.

11., it is characterized in that according to claim 9 or 10 described substrate for electrooptic device: each of above-mentioned the 1st to the 8th light shielding part be configured in the above-mentioned the 1st and the 2nd element portion each directly over.

12. any described substrate for electrooptic device according to claim 9 to 11 is characterized in that:

The the above-mentioned the 5th and the 6th light shielding part constitutes the 3rd capacity cell, and the 3rd capacity cell has a pair of the 3rd capacitance electrode and is clamped in the 3rd dielectric film between this a pair of the 3rd capacitance electrode;

The the above-mentioned the 7th and the 8th light shielding part constitutes the 4th capacity cell, and the 4th capacity cell has a pair of the 4th capacitance electrode and is clamped in the 4th dielectric film between this a pair of the 4th capacitance electrode;

Above-mentioned the 2nd capacity cell when picture signal is provided for above-mentioned the 2nd pixel electrode via an above-mentioned data line, keeps the current potential of above-mentioned the 2nd pixel electrode;

Above-mentioned the 3rd capacity cell when picture signal is provided for above-mentioned the 3rd pixel electrode via above-mentioned another data line, keeps the current potential of above-mentioned the 3rd pixel electrode;

Above-mentioned the 4th capacity cell when picture signal is provided for above-mentioned the 4th pixel electrode via above-mentioned another data line, keeps the current potential of above-mentioned the 4th pixel electrode.

13. substrate for electrooptic device according to claim 12 is characterized in that: in above-mentioned a pair of the 1st to the 4th capacitance electrode, at least wherein any one a pair of capacitance electrode comprises conductive light shielding film and constitutes.

14. a substrate for electrooptic device is characterized in that possessing:

Substrate;

In the zone that the 1st direction of extending along above-mentioned data line in each non-open area spaced apart from each other, open area of above-mentioned a plurality of pixels is extended, form and have the 1st element portion of the 1st semiconductor layer along above-mentioned the 1st direction, the 1st semiconductor layer comprises: (i) with above-mentioned many data lines in, the 1st data line side source and drain areas that a data line that extends along above-mentioned the 1st direction in an above-mentioned zone is electrically connected, (ii) be positioned at the 1st channel region and the 2nd channel region of the both sides of above-mentioned the 1st data line side source and drain areas along above-mentioned the 1st direction, (iii) from above-mentioned the 1st data line side source and drain areas, be arranged in each the outside and 1st pixel electrode mutually different and each the 1st pixel electrode side source and drain areas that is electrically connected and the 2nd pixel electrode side source and drain areas of the 2nd pixel electrode of above-mentioned the 1st channel region and above-mentioned the 2nd channel region with above-mentioned a plurality of pixel electrodes along above-mentioned the 1st direction, (iv) be formed on the 1st engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st data line side source and drain areas, (v) be formed on the 2nd engaging zones between above-mentioned the 1st channel region and above-mentioned the 1st pixel electrode side source and drain areas, (vi) be formed on the 3rd engaging zones between above-mentioned the 2nd channel region and above-mentioned the 1st data line side source and drain areas, (vii) be formed on the 4th engaging zones between above-mentioned the 2nd channel region and above-mentioned the 2nd pixel electrode side source and drain areas;

Adjacent with an above-mentioned zone and in upwardly extending another zone of above-mentioned the 1st side along the 2nd direction of intersecting with above-mentioned the 1st direction in above-mentioned non-open area, see along above-mentioned the 1st direction 1 amount of pixels ground that staggers from above-mentioned the 1st element portion and to form and have the 2nd element portion of the 2nd semiconductor layer, the 2nd semiconductor layer comprises: (viii) with above-mentioned many data lines in, the 2nd data line side source and drain areas that another data line that extends along above-mentioned the 1st direction in above-mentioned another zone is electrically connected, (ix) on above-mentioned the 1st direction, from above-mentioned the 2nd data line side source and drain areas, be formed on and the 3rd channel region of a side same side that is formed with above-mentioned the 1st channel region and the 4th channel region that is formed on and is formed with a side same side of above-mentioned the 2nd channel region, (x) from above-mentioned the 2nd data line side source and drain areas, be arranged in each the outside and 3rd pixel electrode mutually different and the 4th pixel electrode the 3rd pixel electrode side source and drain areas and the 4th pixel electrode side source and drain areas that are electrically connected of above-mentioned the 3rd channel region and the 4th channel region with above-mentioned a plurality of pixel electrodes along above-mentioned the 1st direction, (xi) be formed on the 5th engaging zones between above-mentioned the 3rd channel region and above-mentioned the 2nd data line side source and drain areas, (xii) be formed on the 6th engaging zones between above-mentioned the 3rd channel region and above-mentioned the 3rd pixel electrode side source and drain areas; (xiii) be formed on the 7th engaging zones between above-mentioned the 4th channel region and above-mentioned the 2nd data line side source and drain areas, (xiv) be formed on the 8th engaging zones between above-mentioned the 4th channel region and above-mentioned the 4th pixel electrode side source and drain areas;

Above-mentioned the 2nd pixel electrode is configured in above-mentioned a plurality of pixel, be formed with above-mentioned the 4th light shielding part and in any one of the mutual adjacent pixels of above-mentioned the 2nd direction;

Above-mentioned the 3rd pixel electrode is configured in above-mentioned a plurality of pixel, be formed with above-mentioned the 6th light shielding part and in any one of the mutual adjacent pixels of above-mentioned the 2nd direction;

Above-mentioned the 4th pixel electrode is configured in above-mentioned a plurality of pixel, be formed with above-mentioned the 8th light shielding part and in any one of the mutual adjacent pixels of above-mentioned the 2nd direction.

15. an electro-optical device is characterized in that, possesses any described substrate for electrooptic device of claim 9 to 14.

16. an electronic equipment is characterized in that, possesses the described electro-optical device of claim 15.