CN101232480B - Method and device for regulating frequency offset - Google Patents
Method and device for regulating frequency offset Download PDFInfo
- Publication number
- CN101232480B CN101232480B CN2007101541599A CN200710154159A CN101232480B CN 101232480 B CN101232480 B CN 101232480B CN 2007101541599 A CN2007101541599 A CN 2007101541599A CN 200710154159 A CN200710154159 A CN 200710154159A CN 101232480 B CN101232480 B CN 101232480B
- Authority
- CN
- China
- Prior art keywords
- signal
- stride
- window
- output
- smooth
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
Disclosed is a device to realize automatic frequency control, comprising a rotator, a correlator, an equalizer and a slow tracker which includes the first multiplier, the second multiplier, a smoothing window adding element, a differentiator, a frequency displacement detector, an adjusting stride determining device and an accumulator.
Description
The cross reference of related application
The U.S. Patent application No.11/442 that the application relates on May 30th, 2006 and submits to, 838, incorporate the full content of this application here by reference into.
Technical field
Relate generally to wireless communication system of the present invention more specifically relates to the apparatus and method that are used for the regulating frequency skew in a kind of PHS of being used in receiver.
Background technology
Wireless communication system such as cellular system allows the user wirelessly transmitting and receive data between the user and/or between user and cell base station.Generally speaking, wireless communication system must operate under a certain CF, and power level is lower than a certain particular power level.Under these constraints, wireless system is attempted maximization and is transmitted for each user's data, and simultaneous adaptation is shared the every other user's of wireless system demand.Therefore, each wireless device must use intelligently and distribute bandwidth to come maximize data to transmit.
Developed the some kinds of methods that are used to maximize the use that distributes bandwidth, wherein a kind of is time division multiple access (TDMA).The communication system that the dissimilar employing TDMA of many kinds is arranged.The communication system of a kind of TDMA of use is personal handyphone system (PHS), and PHS is the mobile telephone system in a kind of 1.88-1.93GHz of being operated in frequency band.Because the low-cost advantage of PHS, PHS is widely used at present.Generally speaking, PHS has the through-put power of 500mW and the scope of 10-100 rice.
PHS uses TDMA to modulate (ADPCM) as audio coder & decoder (codec) (codec) as radio interface and adaptive difference pulse code.Audio coder & decoder (codec) is included in analog to digital converter (ADC) and the digital to analog converter of changing between the analog-and digital-form (DAC).TDMA is the digital data transmission scheme that a plurality of users of a kind of permission insert single radio frequency (RF) channel.The interference of interchannel distributes unique time slot to avoid through giving each user in each channel.For example a PHS frame comprises four channels: a control channel and three traffic channel.
With reference now to Fig. 1,, the PHS telephone system comprises PHS phone 10 with antenna 12 and the cell base station 11 with antenna 13.Exemplary PHS phone 10 comprises signal processing module 16, memory 22, power supply 24 and I/O module 26.Signal processing module 16 comprises sending module 18 and receiver module 20.I/O module 26 can comprise various user interfaces, for example microphone 26-1, loud speaker 26-2, display screen 26-3, keyboard 26-4 and camera 26-5 or the like.
Sending module 18 will convert the PHS compatible signal into from user's input of microphone 26-1.Receiver module 20 will be received from the data transaction of antenna 12 can discern form for the user, and exports via loud speaker 26-2.Signal processing module 16 use memories 22 are handled the data that send to antenna 12 and receive from antenna 12.Power supply 24 is to phone 10 power supplies.
Generally by 0 and 1 representative, these 0 and 1 are called as the position to numerical data.Data are normally utilized the baseband signal of beared information that amplitude, frequency or the phase place of carrier signal are modulated and are sent.QPSK (QPSK) is a kind of phase modulated that is commonly used in the communication system.In QPSK, information bit is grouped into and is called the right of dibit (dibit).Thereby QPSK uses four symbols to represent dibit value 00,01,10 and 11.QPSk is with these four sign map to four constant phase angles.For example, symbol 00 can be mapped to+3 π/4.On the other hand, PI/4-DQPSK uses differential coding, and wherein the mapping between symbol and the phase angle changes.In addition, PI/4-DQPSK is mapped to real with empty phase angle with in these four symbols each, thereby causes 8 constellation formulas to distribute.
Fig. 2 is the sketch map of exemplary PHS time slot format.The PHS time slot format is divided into control channel (CCH) and traffic channel (TCH) data.The implication of relevant field will be described below among CCH and the TCH.
Fig. 3 is the block diagram of the part of receiver data path.Notice that in RX path, i/q signal has become baseband signal after through RF and IF down-conversion.Hereinafter, unless otherwise indicated, otherwise all be meant the base band situation.
As shown in Figure 3, AFE(analog front end) (AFE) part is digital signal with base-band input signal from analog signal conversion.Digital signal after the conversion is transferred to hardware accelerator module 114.Hardware accelerator module 114 is handled digital input signals, and generation has compensated the signal behind the carrier frequency shift.Particularly, the digital signal after the conversion is become 3 times of character rates, for example 576kHz by decimation filter 116 further filtering and extraction.This signal at first passes through carrier recovery block 118, passes through circulator 120 then.The function of carrier recovery block 118 is the carrier frequency shifts that detect between burst and estimation reception and the transmission.Then, the circulator of back can compensate this carrier shift.Signal through rotation is passed to equalizer 126.Here, be application self-adapting judgement equalizer 126 under the situation of unique word (UW) at training sequence.Therefore, the exact position that needs UW.This information can obtain via correlator 128.It is relevant with UW that correlator 128 will be imported data, after detecting the peak value of correlated results, just can obtain the position of UW in the bursty data.This process is exactly traditional coherent detection process.In theory, this coherent detection process ratio divides the performance that detects superior.
For each coherent demodulator, the recovery of carrier wave is very important.Its quality influence the performance of functional block of back level.At present, the most widely used carrier frequency recovery scheme is automatic frequency control (AFC).Yet in the PHS system, data are sent with burst mode, therefore make the stable response time of AFC shorter relatively, generally arrive in tens of symbols some.Therefore for present embodiment, adopt open-loop carrier frequency estimation more suitable.Behind equalizer 126, use slow tracker 322 and follow the tracks of the carrier characteristics that becomes slowly.
In the coherent demodulation of psk signal, the carrier frequency shift that causes owing to the Doppler effect of limited oscillator precision or moving vehicle can cause the obvious decline of performance.In the PHS system, cell base station possibly have the skew up to ± 2ppm, and the individual station possibly have the skew up to ± 10ppm.Correcting frequency shift helps to improve receiver performance and alleviates the requirement to oscillator precision in demodulation, thereby reduces cost.
After the anglec of rotation that receives carrier recovery block 118 outputs, circulator 120 is offset this carrier frequency shift.Be considered to almost not have skew through the signal after the circulator 120, therefore at this moment relevant between this signal and the UW word just can identify accurate UW position, thereby can derive accurate bit timing.Then, equalizer 126 is eliminated the multipath interference based on the accurate bit timing of correlator 128 derivation.Signal through balanced is outputed to slow tracker 322, follows the tracks of because the variation of the carrier frequency that the unsteadiness of crystal oscillator causes, and calculates inadequately at initial offset and under the situation carrier frequency to be carried out minor adjustments accurately.
Summary of the invention
In one aspect, the invention discloses a kind of device that is used to realize automatic frequency control, comprising: circulator, said circulator rotation input signal to be minimizing the carrier frequency shift of said input signal, and generate through compensating signal; Correlator, said correlator is with said relevant with unique word to obtain correction of timing through compensating signal; Equalizer, said equalizer also generates through equalizing signal through compensating signal based on said correction of timing equilibrium is said; And slow tracker, said slow tracker, moves according to said slow tracking frequency shifted signal to indicate said circulator through compensating signal with saidly generate slow tracking frequency shifted signal through equalizing signal based on said; Wherein, said slow tracker comprises: first multiplier, be used for said through compensating signal with from the output multiplication of accumulator; Second multiplier is used for the output of said first multiplier and said is multiplied each other through equalizing signal; The smooth window summer is used to extract the imaginary part of the output of said second multiplier, and carries out N summation through smooth window, and N is the integer greater than 0; Differentiator is used for differential is carried out in the output of smooth window summer; The frequency shift (FS) amount detector is used for confirming required frequency offset according to the output of said differentiator, and regulating and controlling stride determiner and said smooth window summer in view of the above; Said adjusting stride determiner is used for confirming to regulate stride according to the output of said frequency shift (FS) amount detector, and determined adjusting stride is outputed to said circulator and accumulator as slow tracking frequency shifted signal; And said accumulator, be used to receive from the result of said adjusting stride determiner output and add up, and output is offered said first multiplier.
In another aspect, the invention discloses and a kind ofly be used to regulate input signal, comprising: rotate said input signal minimizing the carrier frequency shift of said input signal, and generate through compensating signal to compensate the method for its frequency shift (FS); With said relevant with unique word to obtain correction of timing through compensating signal; Also generate through equalizing signal through compensating signal based on said correction of timing equilibrium is said; And based on said through compensating signal with saidly generate slow tracking frequency shifted signal through equalizing signal, and be rotated according to said slow tracking frequency shifted signal; Wherein, the step that generates said slow tracking frequency shifted signal comprises: with said through compensating signal with from the output multiplication of accumulator, generate first multiplying signal; Said first multiplying signal and said is multiplied each other through equalizing signal, generate second multiplying signal; Extract the imaginary part of said second multiplying signal, and carry out N summation through smooth window, N is the integer greater than 0; Differential is carried out in output to said smooth window; Confirm required frequency offset according to said differential result, and generate slow tracking frequency shifted signal according to said required frequency offset; And according to said slow tracking frequency shifted signal regulating and controlling stride and level and smooth length of window.
Description of drawings
Fig. 1 is exemplary PHS telephone system;
Fig. 2 is the sketch map of exemplary PHS time slot format;
Fig. 3 is the block diagram of the part of receiver data path;
Fig. 4 is the functional block diagram of carrier recovery block 118;
Fig. 5 shows the functional block diagram of slow tracker 322;
Fig. 6 shows the improvement 322 ' to slow tracker 322; And
Fig. 7 shows the signal flow graph in slow tracker 322 '.
Embodiment
Be described in detail with reference to the attached drawings exemplary embodiment of the present invention below.
In theory, should be almost not have skew through the signal after the circulator 120.But, under actual conditions,, certainly exist certain residual bias because the precision of circulator is limit (because the effect of circulator 120 is to eliminate big frequency shift (FS)).Though this residual bias is very small than the skew before the rotation, also can produce certain influence to the processing of back level.Therefore, be necessary to eliminate this residual bias through further processing.Below the concise and to the point principle that derives and eliminate this residual bias of describing.
UW and PR are because the priori of its phase place is the best candidate that is used to derive residual bias.But for the TCH data, the length of PR and UW is not enough (as shown in Figure 2), therefore can add the output of equalizer 126.
For each TDD burst, initial phase is unknown, so initial phase, PR and UW are unknown.Supposing
is the complex signal (r (t) has passed through the processing of circulator 120) that receives; Wherein a (t) is an envelope,
(t) be that the supposition initial phase is the symbol phase under 0 the situation.θ
0Be initial phase, θ
n(t) be noise phase.
Fig. 5 shows the functional block diagram of slow tracker 322.After through first multiplier 324, initial phase θ
0With the estimated frequency shift phase place
Be removed (supposition θ
0Can derive, its process will be described below).Can derive
Δ f wherein
εBe uncorrected residual bias, after through second multiplier 326, obtain signal r2 (t), r2 (t) is removing the information-bearing phase place
(t) afterwards signal,
Therefore, the quadrature component of r2 (t) (imaginary part part) is r2q (t)=a (t) sin (2 π Δ f
εT+ θ
n(t)).In order to eliminate noise phase θ
n(t), we select suitable smooth window length to come smoothly to fall noise phase.Adopted the smooth window (this is based on the result that emulation obtains) of 6 symbols in an embodiment of the present invention.Therefore,
Differential according to sumq (t) carries out the frequency shift (FS) adjusting.
Below the concise and to the point θ that describes
0Derivation.θ
0Can derive based on the UW that goes out through coherent detection.
If Δ f is little to ignoring, then
In slow tracker 322 shown in Figure 5, input data r (t) are provided for the equalizer 126 and first multiplier 324.Multiplier 324 generates output r1 (t), and outputs to second multiplier 326.Output from equalizer 126 is provided for second multiplier 326 as second input, and module 328 extracts gained result's imaginary part, and offers smooth window 330.330 couples of results of smooth window sue for peace N time (N is 6 for the present invention).The length of smooth window 330 is optional.The output of smooth window 330 is by differentiator 332 differential.Result according to differential regulates the slow tracking frequency shifted signal of stride determiner 334 outputs to circulator 120, and is kept in the anglec of rotation register as θ.Circulator 120 is finely tuned according to slow tracking frequency shifted signal, thereby eliminates residual bias.Can find out that from this flow process circulator 120, equalizer 126 and slow tracker 322 have constituted an AFC (automatic frequency control) loop.In addition, regulate stride determiner 334 and also the result is outputed to accumulator 336, as feedback multiplier 324.
For example, under true environment, sometimes frequency of oscillation is owing to bigger last saltus step or saltus step down can take place certain uncertain reason.Although this phenomenon is not recurrent, in case take place, will produces very serious consequence, even cause communication to carry out.Its basic reason is that existing slow tracker 322 can't follow the tracks of this bigger frequency hopping.
Iff changes the step size (that is, this step size being made as a bigger predetermined value) of regulating stride determiner 334 and adapts to this bigger frequency hopping, then can sacrifice the performance (that is, because stride is bigger, and can't accurately regulate) under the home.That is to say accurate frequency offset correction and be two aspects of contradiction to the adaptability of unexpected oscillator saltus step.
Fig. 6 is the improvement 322 ' to above-mentioned slow tracker 322 according to the embodiment of the invention.In Fig. 6, between differentiator 332 and adjusting stride determiner 334, added the piece of Δ f detector 338 by name, its function is to detect whether tangible frequency hopping has taken place.Δ f detector 338 is also connected to smooth window 330, and is as shown in Figure 6.Obtained the result of slow tracking frequency skew in the output according to differentiator 332 after, Δ f detector 338 is with required regulated quantity and a certain preset threshold value Δ ft
HresCompare, if the change amount has surpassed threshold value Δ f very greatly
Thres, then indication is regulated stride determiner 334 and is revised the adjusting stride, and indicates smooth window 330 to revise N (that is, smooth window length), particularly is to increase to regulate stride (for example increasing to the several times of former stride) and increase smooth window length.Because stride becomes big and speed accelerates, therefore (generally after tens of time slots) just can capture this big frequency hopping in very short time.After having proofreaied and correct big frequency shift (FS), Δ f detector 338 detects skew and diminishes and (for example be lower than Δ f
Thres), then at this moment indicate 334 and 330 will regulate stride and N is reduced to initial value.Like this, this AFC loop not only can capture bigger frequency hopping fast, can also after catching fast, revert to initial smaller value, thereby has guaranteed the precision of proofreading and correct once more.
Can find out that based on above description Δ f detector 338 can comprise comparator and the register etc. that is used for storage threshold.In addition, Δ f detector 338 can be mutually integrated with adjusting stride determiner 334.In this case, control the length of window of smooth window 330 according to 334 output.
Fig. 7 shows the signal flow graph in slow tracker 322 '.In step 701, receive signal r (t), r (t) is through the signal after the circulator 120.In step 703, through after the multiplier 324, multiply each other through result with accumulator 336, obtained removal initial phase θ
0With the estimated frequency shift phase place
After signal r1 (t).In step 705,, obtained signal r2 (t) then through in multiplier 326, making r1 (t) and r (t) through the signal multiplication behind the equalizer 126.In step 707, smoothly fall noise phase and the summation of r2 (t).In step 709, the result after the summation is carried out differential, whether the regulated quantity of in step 711, judging the needs realization according to the differential result is greater than threshold value.If, then proceed to step 715, increase to regulate stride and level and smooth length of window and turn back to step 707 and carry out level and smooth again and summation.If not, then proceed to step 713, carry out frequency shift (FS) and regulate.
Fig. 7 is a kind of exemplary implementation.Fig. 7 can realize by different modes.For example, can only increase any one of regulating in stride and the level and smooth length of window.Perhaps, can increase earlier and regulate stride (for example being undertaken), under the situation that the increase of regulating stride still can't be satisfied the demand, increase smooth window length again by each increase 0.02ppm.
Although more than described, it will be understood by those skilled in the art that the present invention is not limited to these embodiment according to some embodiment of the present invention.Concrete scope of the present invention should be defined by the following claims.
Claims (8)
1. device that is used to realize automatic frequency control comprises:
Circulator, said circulator rotation input signal to be minimizing the carrier frequency shift of said input signal, and generate through compensating signal;
Correlator, said correlator is with said relevant with unique word to obtain correction of timing through compensating signal;
Equalizer, said equalizer also generates through equalizing signal through compensating signal based on said correction of timing equilibrium is said; And
Slow tracker, said slow tracker, moves according to said slow tracking frequency shifted signal to indicate said circulator through compensating signal with saidly generate slow tracking frequency shifted signal through equalizing signal based on said;
Wherein, said slow tracker comprises:
First multiplier, be used for said through compensating signal with from the output multiplication of accumulator;
Second multiplier is used for the output of said first multiplier and said is multiplied each other through equalizing signal;
The smooth window summer is used to extract the imaginary part of the output of said second multiplier, and carries out N summation through smooth window, and N is the integer greater than 0;
Differentiator is used for differential is carried out in the output of smooth window summer;
The frequency shift (FS) amount detector is used for confirming required frequency offset according to the output of said differentiator, and regulating and controlling stride determiner and said smooth window summer in view of the above;
Said adjusting stride determiner is used for confirming to regulate stride according to the output of said frequency shift (FS) amount detector, and determined adjusting stride is outputed to said circulator and accumulator as slow tracking frequency shifted signal; And
Said accumulator is used to receive from the result of said adjusting stride determiner output and adds up, and output is offered said first multiplier,
Wherein when said frequency shift (FS) amount detector confirms that said required frequency offset surpasses a certain threshold value; Indicate said smooth window summer to increase length of window; And indicate said adjusting stride determiner to increase and regulate stride; And when said frequency shift (FS) amount detector confirms that said required frequency offset is less than or equal to said threshold value, indicate the length of window of said smooth window summer and the adjusting stride of said adjusting stride determiner to revert to initial value.
2. device as claimed in claim 1, wherein said frequency shift (FS) amount detector comprises the register that is used to store said threshold value.
3. device as claimed in claim 1, wherein said frequency shift (FS) amount detector comprises the comparator that is used for said required frequency offset and said threshold.
4. device as claimed in claim 1, the initial value of wherein said adjusting stride is 0.02ppm, the initial value of said smooth window length N is 6 symbols.
5. personal handyphone system PHS receiver that comprises device as claimed in claim 1.
6. one kind is used to regulate input signal to compensate the method for its frequency shift (FS), comprising:
Rotate said input signal minimizing the carrier frequency shift of said input signal, and generate through compensating signal;
With said relevant with unique word to obtain correction of timing through compensating signal;
Also generate through equalizing signal through compensating signal based on said correction of timing equilibrium is said; And
, and be rotated through compensating signal with saidly generate slow tracking frequency shifted signal based on said according to said slow tracking frequency shifted signal through equalizing signal;
Wherein, the step that generates said slow tracking frequency shifted signal comprises:
With said through compensating signal with from the output multiplication of accumulator, generate first multiplying signal;
Said first multiplying signal and said is multiplied each other through equalizing signal, generate second multiplying signal;
Extract the imaginary part of said second multiplying signal, and carry out N summation through smooth window, N is the integer greater than 0;
Differential is carried out in output to said smooth window;
Confirm required frequency offset according to said differential result, and generate slow tracking frequency shifted signal according to said required frequency offset; And
According to said slow tracking frequency shifted signal regulating and controlling stride and level and smooth length of window,
Wherein when said required frequency offset surpasses a certain threshold value; Said slow tracking frequency shifted signal indication increases said adjusting stride and level and smooth length of window; And when said required frequency offset was less than or equal to said threshold value, said slow tracking frequency shifted signal indication reverted to initial value with said adjusting stride and level and smooth length of window.
7. method as claimed in claim 6, wherein said threshold value is provided with in advance.
8. method as claimed in claim 6, the initial value of wherein said adjusting stride is 0.02ppm, the initial value of said smooth window length N is 6 symbols.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US82829506P | 2006-10-05 | 2006-10-05 | |
| US60/828,295 | 2006-10-05 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101232480A CN101232480A (en) | 2008-07-30 |
| CN101232480B true CN101232480B (en) | 2012-09-05 |
Family
ID=39898658
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2007101541599A Expired - Fee Related CN101232480B (en) | 2006-10-05 | 2007-09-19 | Method and device for regulating frequency offset |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101232480B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101646232B (en) * | 2008-07-18 | 2014-07-02 | 美满电子科技(上海)有限公司 | Method, device and communication equipment for estimating frequency deviations |
| JP5896795B2 (en) * | 2012-03-14 | 2016-03-30 | 三菱電機株式会社 | Equalizer, receiver, and equalization method |
| CN103973609A (en) * | 2013-01-24 | 2014-08-06 | 郑国书 | Automatic correction method of offset frequency |
| CN103825853B (en) * | 2013-12-05 | 2017-04-12 | 成都天奥信息科技有限公司 | Digital audio FM modulation circuit of handheld ultrashort wave air radio |
| CN105282072B (en) * | 2014-06-30 | 2019-04-30 | 深圳市中兴微电子技术有限公司 | Frequency deviation estimating method and device in optical transport network |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1446014A (en) * | 2002-03-14 | 2003-10-01 | 深圳市中兴通讯股份有限公司上海第二研究所 | Realizing Method for automatic frequency tracking of mobile terminal system |
| CN1504017A (en) * | 2001-05-04 | 2004-06-09 | 辐射网络公司 | Adaptive equalizer system for short burst modems and link hopping radio networks |
| WO2005029798A1 (en) * | 2003-09-15 | 2005-03-31 | Intel Corporation | Adaptive iq imbalance correction for multicarrier wireless communication systems |
| CN2757451Y (en) * | 2004-11-19 | 2006-02-08 | 凯明信息科技股份有限公司 | Fine frequency corrector |
| WO2006078818A2 (en) * | 2005-01-20 | 2006-07-27 | Marvell World Trade Ltd. | Limiter based analog demodulator |
| WO2006083940A2 (en) * | 2005-01-31 | 2006-08-10 | Marvell World Trade Ltd. | Improved precision cordic processor |
-
2007
- 2007-09-19 CN CN2007101541599A patent/CN101232480B/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1504017A (en) * | 2001-05-04 | 2004-06-09 | 辐射网络公司 | Adaptive equalizer system for short burst modems and link hopping radio networks |
| CN1446014A (en) * | 2002-03-14 | 2003-10-01 | 深圳市中兴通讯股份有限公司上海第二研究所 | Realizing Method for automatic frequency tracking of mobile terminal system |
| WO2005029798A1 (en) * | 2003-09-15 | 2005-03-31 | Intel Corporation | Adaptive iq imbalance correction for multicarrier wireless communication systems |
| CN2757451Y (en) * | 2004-11-19 | 2006-02-08 | 凯明信息科技股份有限公司 | Fine frequency corrector |
| WO2006078818A2 (en) * | 2005-01-20 | 2006-07-27 | Marvell World Trade Ltd. | Limiter based analog demodulator |
| WO2006083940A2 (en) * | 2005-01-31 | 2006-08-10 | Marvell World Trade Ltd. | Improved precision cordic processor |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101232480A (en) | 2008-07-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7839923B2 (en) | Method and system for equalizing received signals in communications systems | |
| US8027414B2 (en) | Carrier frequency recovering apparatus using phase shift and method thereof | |
| JP2008543119A (en) | Numerical computation (CORDIC) processor with improved precision coordinate rotation | |
| CN101232480B (en) | Method and device for regulating frequency offset | |
| US10594535B2 (en) | System and method for extracting satellite to ground link quality using satellite telemetry signal and low complexity receiver | |
| WO2000001095A1 (en) | Method, apparatus and system for determining a location of a frequency synchronization signal | |
| JP2009514401A (en) | Frequency acquisition system and method | |
| CN101232489B (en) | Difference-related baseband demodulalation system and method | |
| US11502883B2 (en) | Adjusting receiver frequency to compensate for frequency offset during a sounding sequence used for fractional time determination | |
| US7720179B2 (en) | Method for timing detection | |
| WO1993019548A1 (en) | Apparatus for and method of synchronizing a clock signal | |
| US8547950B2 (en) | Squaring loss inhibition for low signal levels in positioning systems | |
| US6549594B1 (en) | Timing phase recovery method and apparatus | |
| EP0558034B1 (en) | Digital demodulator for pi/4 - QPSK signals | |
| CN112422168B (en) | Signal modulation and demodulation method and system in large dynamic satellite communication system | |
| CZ256293A3 (en) | Method of modifying a clock resetting system being controlled by a decision, and apparatus for making the same | |
| JP4898897B2 (en) | Compensation of data shift due to frequency offset using timing correlation value | |
| GB2368751A (en) | Iterative adjustment of the reference oscillator frequency offset in a receiver | |
| US7474718B2 (en) | Frequency control for a mobile communications device | |
| JP2934800B2 (en) | Digital radio communication system using multilevel quadrature amplitude modulation. | |
| US7496167B2 (en) | Storage efficient sliding window sum | |
| CN101232485A (en) | Communication system with carrier deviation estimating feedback | |
| CN101232364B (en) | Approximate phase angle calculator and method for calculating approximate phase angle | |
| JP4449259B2 (en) | AFC circuit | |
| US7218669B2 (en) | Wireless communication system operating in response in part to time signals from the global position satellite system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| REG | Reference to a national code |
Ref country code: HK Ref legal event code: DE Ref document number: 1122415 Country of ref document: HK |
|
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| REG | Reference to a national code |
Ref country code: HK Ref legal event code: WD Ref document number: 1122415 Country of ref document: HK |
|
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120905 Termination date: 20180919 |