CN101221716A - Data driver using gamma selection signal, and plane display device and driving method - Google Patents
Data driver using gamma selection signal, and plane display device and driving method Download PDFInfo
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Abstract
The invention relates to a data driver of using a gamma selection signal and a flat panel display and a driving method thereof. A first left sub-pixel, a first right sub-pixel, a second right pixel and a second left sub-pixel are electrically connected with a first data line, a second data line, a third data line and a fourth data line respectively. The data driver comprises gray scale voltage generating units from first to fourth for respectively outputting a first group of positive gray scale voltage, a second group of negative gray scale voltage, a second group of positive gray scale voltage and a first group of negative gray scale voltage. The data driver drives the sub-pixels according to the first group of positive gray scale voltage, the second group of negative gray scale voltage, the second group of positive gray scale voltage and the first group of negative gray scale voltage under the control of a polarity inversion signal and the gamma selection signal.
Description
Technical field
The invention relates to a kind of data driver and two-d display panel and driving method, particularly relevant for a kind of two-d display panel and driving method that uses the data driver of gamma selection signal and use this kind data driver.
Background technology
Because compact, low radiant quantity that flat-panel screens has, advantage such as do not take up space, become the main flow of monitor market in recent years gradually.Improve the visual angle and be one of principal element of the quality of image that influences flat-panel screens.
With LCD, the conventional ADS driving mode is by in an image time, allows a pixel receive two different pixel voltages in regular turn, and the visual angle that increases LCD is used in the arrangement that makes liquid crystal molecule produce different directions.The wherein a kind of practice that reaches above-mentioned effect is: in an image time, by time schedule controller transmit in regular turn correspond to same pixel two data to data driver, so that data driver produces corresponding two different pixel voltages of pixel so far, to increase the visual angle of LCD.
Yet, in an image time, transmitting data to the LCD of data driver that corresponds to a pixel by time schedule controller compares, the frequency of above-mentioned clock signal in order to the employed time schedule controller of LCD that improves the visual angle and data driver must increase to twice, could or receive the data transmission that will transmit.So, will increase the complexity of the circuit design of time schedule controller and data driver, and improve required cost.
Summary of the invention
In view of this, purpose of the present invention is exactly that a kind of flat-panel screens and driving method that uses the data driver of gamma selection signal and use this kind data driver is being provided.The present invention need not improve the frequency of the clock signal of time schedule controller and data driver, can reach the effect that improves the visual angle.Simultaneously, the present invention has splendid adaptive (flexibility), in the flat-panel screens applicable to various type of drive.
According to purpose of the present invention, a kind of data driver is proposed, comprising: the first, second, third and the 4th gray scale voltage generation unit; The first, second, third and the 4th digital analog converter; And the first, second, third and the 4th impact damper.First to fourth gray scale voltage generation unit is in order to export first group of positive gray scale voltage, second group of negative gray scale voltage, second group of positive gray scale voltage and first group of negative gray scale voltage respectively.When a gamma selection signal had first state, the input end of the first, second, third and the 4th digital analog converter was electrically connected to the output terminal of the first, second, third and the 4th gray scale voltage generation unit respectively.When gamma selection signal had second state, the input end of the first, second, third and the 4th digital analog converter was electrically connected to the 3rd, the 4th respectively, the output terminal of first and second gray scale voltage generation unit.When a polarity inversion signal was the third state, the input end of first to fourth impact damper was electrically connected to the output terminal of first to fourth digital analog converter respectively.When polarity inversion signal was four condition, the input end of first to fourth impact damper was electrically connected to the output terminal of the second, first, the 4th and the 3rd digital analog converter respectively.
According to another object of the present invention, a kind of flat-panel screens is proposed, comprise a two-d display panel, time schedule controller and a data driver.Two-d display panel comprises: first pixel and second pixel; First sweep trace; And the first, second, third and the 4th data line.First pixel comprises the first left sub-pixel and the first right sub-pixel, and second pixel comprises the second left sub-pixel and the second right sub-pixel.First sweep trace is in order to control first and second pixel.The first, second, third and the 4th data line is electrically connected to the first left sub-pixel, the first right sub-pixel, the second right sub-pixel and the second left sub-pixel respectively.Time schedule controller is in order to export a polarity inversion signal and a gamma selection signal.Data driver includes the first, second, third and the 4th gray scale voltage generation unit, in order to export first group of positive gray scale voltage, second group of negative gray scale voltage, second group of positive gray scale voltage and first group of negative gray scale voltage respectively.Data driver drives this a little pixel according to first group of positive gray scale voltage, second group of negative gray scale voltage, second group of positive gray scale voltage and first group of negative gray scale voltage under the control of polarity inversion signal and gamma selection signal.
The present invention also provides a kind of driving method of two-d display panel, two-d display panel has one first and one second pixel, and one first, one second, one the 3rd and one the 4th data line, first pixel comprises one first left sub-pixel and one first right sub-pixel, second pixel comprises one second left sub-pixel and one second right sub-pixel, first, second, the the 3rd and the 4th data line is electrically connected to the first left sub-pixel respectively, the first right sub-pixel, the second right sub-pixel and the second left sub-pixel, driving method comprises: receive one first pixel data, one second pixel data, one polarity inversion signal and a gamma selection signal; Produce one first group of positive gray scale voltage, one second group of negative gray scale voltage, one second group of positive gray scale voltage and one first group of negative gray scale voltage; When gamma selection signal has one first state, one first, 1 second, 1 the 3rd and 1 the 4th digital analog converter is respectively according to the negative gray scale voltage of first group of positive gray scale voltage, second group, second group of positive gray scale voltage and first group of negative gray scale voltage, with respectively to first pixel data, first pixel data, second pixel data, and second pixel data carry out digital-to-analogue conversion; When gamma selection signal has one second state, the first, second, third and the 4th digital analog converter is respectively according to the negative gray scale voltage of second group of positive gray scale voltage, first group, first group of positive gray scale voltage, and second group of negative gray scale voltage, with respectively to first pixel data, first pixel data, second pixel data, and second pixel data carry out digital-to-analogue conversion; When polarity inversion signal was a third state, one first, 1 second, 1 the 3rd and 1 the 4th impact damper received the output signal of the first, second, third and the 4th digital analog converter respectively; When polarity inversion signal was a four condition, the first, second, third and the 4th impact damper received the output signal of the second, first, the 4th and the 3rd digital analog converter respectively; And the first, second, third and the 4th impact damper drive the first left sub-pixel, the first right sub-pixel, the second right sub-pixel and the second left sub-pixel via the first, second, third and the 4th data line respectively.
Description of drawings
Fig. 1 uses the synoptic diagram of flat-panel screens first embodiment of an inversion driving mode for the present invention.
Fig. 2 is an example of data driver calcspar shown in Figure 1.
Fig. 3 is an example of pel array shown in Figure 1.
Fig. 4 is for to illustrate an example that discharges and recharges start signal STB, gamma selection signal Gamma_SL, picture start signal YDIO, polarity inversion signal POL according to embodiments of the invention.
Fig. 5 A and Fig. 5 B are respectively during first line during N the picture shown in Figure 4 during LT1 and second line in the LT2, the equivalent circuit diagram of data driver shown in Figure 2.
Fig. 6 is for illustrating left sub-pixel PL (1,1), right sub-pixel PR (1,1) and the GTG value of pixel P (1,1) and the relation curve of brightness according to embodiments of the invention.
Fig. 7 uses the synoptic diagram of flat-panel screens second embodiment of biserial inversion driving mode for the present invention.
Fig. 8 is an example of pel array shown in Figure 7.
Fig. 9 is for to illustrate an example that discharges and recharges start signal STB ', gamma selection signal Gamma_SL ', picture start signal YDIO ' and polarity inversion signal POL ' according to embodiments of the invention.
Figure 10 A is during first line during N the picture shown in Figure 9 during LT1 ' and second line in the LT2 ', the equivalent circuit diagram of data driver shown in Figure 7.
Figure 10 B is during the 3rd line during N the picture shown in Figure 9 during LT3 ' and the 4th line in the LT4 ', the equivalent circuit diagram of the data driver of Fig. 7.
Drawing reference numeral:
100,700: flat-panel screens
102,702: two-d display panel
104,704: time schedule controller
106,706: data driver
108,708: scanner driver
110,710: pel array
202 (1)～202 (4): the gray scale voltage generation unit
204 (1)～204 (4): digital analog converter
206 (1)～206 (4): impact damper
208,218: reverser
210,212,214,206: switch
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below.
Data driver of the present invention produces positive gray scale voltages of many groups and the negative gray scale voltages of many groups, a plurality of sub-pixels in the pixel is received respectively organize positive gray scale voltage according to this of correspondence to bear the pixel voltage that gray scale voltage is produced with this group.So, for a pixel, time schedule controller can only provide a pixel data, and a plurality of sub-pixels in pixel can be driven by different pixel voltages, can promote the visual angle of this pixel effectively.Simultaneously, the present invention has splendid adaptive, in the flat-panel screens applicable to various type of drive.
First embodiment
Please refer to Fig. 1, it illustrates the synoptic diagram according to the flat-panel screens of use point counter-rotating (dot inversion) type of drive of first embodiment of the invention.Flat-panel screens 100 comprises a two-d display panel 102, time schedule controller 104, a data driver 106 and one scan driver 108.Two-d display panel 102 comprises having pel array 110, a plurality of sweep trace S1～Sn that is made up of the capable m row of n pixel P, and a plurality of data line L1～L2m, and n, m are positive integer.
Now do explanation with a pixel P (1,1) and a pixel P (1,2) for example.Pixel P (1,1) comprises a left sub-pixel PL (1,1) and a right sub-pixel PR (1,1).Pixel P (1,2) comprises a left sub-pixel PL (1,2) and a right sub-pixel PR (1,2).Sweep trace S1 is in order to control pixel P (1,1) and pixel P (1,2).Data line L1～L4 is electrically connected to left sub-pixel PL (1,1), right sub-pixel PR (1,1), right sub-pixel PR (1,2) and left sub-pixel PL (1,2) respectively.
Please refer to Fig. 2, it illustrates the example of calcspar of the data driver 106 of Fig. 1.Data driver 106 comprises the first gray scale voltage generation unit 202 (1), the second gray scale voltage generation unit 202 (2), the 3rd gray scale voltage generation unit 202 (3) and the 4th gray scale voltage generation unit 202 (4), in order to export first group of positive gray scale voltage G1P, second group of negative gray scale voltage G2N, second group of positive gray scale voltage G2P and first group of negative gray scale voltage G1N respectively.First group of positive gray scale voltage G1P and first group of negative gray scale voltage G1N correspond to left sub-pixel PL (1,1) and PL (1,2), and second group of positive gray scale voltage and second group of negative gray scale voltage correspond to right sub-pixel PR (1,1) and PR (1,2).
Preferably, in data driver 106, gamma selection signal Gamma_SL controls a plurality of switches 210, so that the input end of the first, second, third and the 4th digital analog converter 204 (1)～204 (4) optionally is electrically connected to the output terminal of the first, second, third and the 4th gray scale voltage generation unit 202 (1)～202 (4) respectively.The gamma selection signal Gamma_SL that handles via reverser 208 controls a plurality of switches 212, so that the input end of the first, second, third and the 4th digital analog converter 204 (1)～204 (4) optionally is electrically connected to the 3rd, the 4th respectively, the output terminal of first and second gray scale voltage generation unit 202 (3), 202 (4), 202 (1) and 202 (2).
Preferably, in data driver 106, polarity inversion signal POL controls a plurality of switches 214, so that the input end of the first, second, third and the 4th impact damper 206 (1)～206 (4) optionally is electrically connected to the output terminal of the first, second, third and the 4th digital analog converter 204 (1)～204 (4) respectively.Control a plurality of switches 216 via what reverser 218 was handled in polarity inversion signal POL, so that the input end of the first, second, third and the 4th impact damper 206 (1)～206 (4) optionally is electrically connected to the output terminal of the second, first, the 4th and the 3rd digital analog converter 204 (2), 204 (1), 204 (4) and 204 (3) respectively.
Now the mode of operation with present embodiment is described as follows.Please be simultaneously with reference to Fig. 3, Fig. 4, Fig. 5 A and Fig. 5 B, wherein, Fig. 3 illustrates an example of the pel array 110 of Fig. 1, Fig. 4 illustrates an example that discharges and recharges start signal STB, gamma selection signal Gamma_SL, picture start signal YDIO, polarity inversion signal POL of present embodiment, Fig. 5 A and Fig. 5 B are respectively during first line during N the picture shown in Figure 4 during LT1 and second line in the LT2, the equivalent circuit diagram of the data driver 106 of Fig. 2.N is a positive integer.
Shown in Fig. 5 A, in the LT1, data driver 106 will drive the first row pixel of pel array 110 during first line.Money illustrates it with the pixel P (1,1) and the P (1,2) of the first row pixel for example.Time schedule controller 106 outputs correspond to pixel P (1,1) pixel data DATA (1,1) to first and second digital analog converter 204 (1) and 204 (2), and output corresponds to pixel P (1,2) pixel data DATA (1,2) is to the 3rd and the 4th digital analog converter 204 (3) and 204 (4).
At this moment, gamma selection signal Gamma_SL has first state, for example is high levels, and polarity inversion signal POL then has the third state, for example is high levels.So, first group of positive gray scale voltage G1P of the first gray scale voltage generation unit, 202 (1) outputs is sent to first digital analog converter 204 (1), first digital analog converter 204 (1) will be according to first group of positive gray scale voltage G1P with pixel data DATA (1,1) converts a positive polarity pixel voltage VPL (1,1) to.Second group of negative gray scale voltage G2N of second, third and the output of the 4th gray scale voltage generation unit 202 (2)～202 (4), second group of positive gray scale voltage G2P and first group of negative gray scale voltage G1N are sent to second, third and the 4th digital analog converter 204 (2)～204 (4).Second digital analog converter 204 (2) will convert pixel data DATA (1,1) to a negative polarity pixel voltage VPR (1,1) according to second group of negative gray scale voltage G2N.The 3rd digital analog converter 204 (3) will convert pixel data DATA (1,2) to a positive polarity pixel voltage VPR (1,2) according to second group of positive gray scale voltage G2P.The 4th digital analog converter 204 (4) will convert pixel data DATA (1,2) to a negative polarity pixel voltage VPL (1,2) according to first group of negative gray scale voltage G1N.
Then, positive polarity pixel voltage VPL (1,1), negative polarity pixel voltage VPR (1,1), positive polarity pixel voltage VPR (1,2) and negative polarity pixel voltage VPL (1,2) then be sent to data line L1～L4 via the first, second, third and the 4th impact damper 206 (1)～206 (4) respectively.Positive polarity pixel voltage VPL (1,1), negative polarity pixel voltage VPR (1,1), positive polarity pixel voltage VPR (1,2) and negative polarity pixel voltage VPL (1,2) will be transferred into respectively left sub-pixel PL (1,1), right sub-pixel PR (1,1), the right sub-pixel PR (1 that electrically connects with data line L1～L4 again, 2) and left sub-pixel PL (1,2).The polarity of these sub-pixels distributes as shown in Figure 3.
Then, shown in Fig. 5 B, in the LT2, data driver 106 will drive the second row pixel of pel array 110 during second line.Money illustrates it with the pixel P (2,1) and the P (2,2) of the second row pixel for example.Pixel P (2,1) comprises a left sub-pixel PL (2,1) and a right sub-pixel PR (2,1).Pixel P (2,2) comprises a left sub-pixel PL (2,2) and a right sub-pixel PR (2,2).The first, second, third and the 4th data line L1～L4 is electrically connected to right sub-pixel PR (2,1), left sub-pixel PL (2,1), left sub-pixel PL (2,2) and right sub-pixel PR (2,2) respectively.Sweep trace S2 is adjacent to sweep trace S1, in order to control pixel P (2,1) and P (2,2).
During second line in the LT2, time schedule controller 106 outputs correspond to pixel P (2,1) pixel data DATA (2,1) to first and second digital analog converter 204 (1) and 204 (2), and output corresponds to pixel P (2,2) pixel data DATA (2,2) is to the 3rd and the 4th digital analog converter 204 (3) and 204 (4).
At this moment, gamma selection signal Gamma_SL has second state, for example is low level, and polarity inversion signal POL then similarly has the third state (high levels).So, first group of positive gray scale voltage G1P of the first gray scale voltage generation unit, 202 (1) outputs is sent to the 3rd digital analog converter 204 (3), the 3rd digital analog converter 204 (3) will be according to first group of positive gray scale voltage G1P with pixel data DATA (2,2) convert a positive polarity pixel voltage VPL (2,2) to.Second group of negative gray scale voltage G2N of second, third and the output of the 4th gray scale voltage generation unit 202 (2)～202 (4), second group of positive gray scale voltage G2P and first group of negative gray scale voltage G1N are sent to the 4th, first and second digital analog converter 204 (4), 204 (1) and 204 (2).The 4th digital analog converter 204 (4) will convert pixel data DATA (2,2) to a negative polarity pixel voltage VPR (2,2) according to second group of negative gray scale voltage G2N.First digital analog converter 204 (1) will convert pixel data DATA (2,1) to a positive polarity pixel voltage VPR (2,1) according to second group of positive gray scale voltage G2P.Second digital analog converter 204 (2) will convert pixel data DATA (2,1) to a negative polarity pixel voltage VPL (2,1) according to first group of negative gray scale voltage G1N.
Then, positive polarity pixel voltage VPR (2,1) and negative polarity pixel voltage VPL (2,1), positive polarity pixel voltage VPL (2,2), negative polarity pixel voltage VPR (2,2) then is sent to data line L1～L4 via the first, second, third and the 4th impact damper 206 (1)～206 (4) respectively.Positive polarity pixel voltage VPR (2,1) and negative polarity pixel voltage VPL (2,1), positive polarity pixel voltage VPL (2,2), negative polarity pixel voltage VPR (2,2) be transferred into respectively right sub-pixel PR (2,1), left sub-pixel PL (2,1), the left sub-pixel PL (2 that electrically connects with data line L1～L4 again, 2) and right sub-pixel PR (2,2).The polarity of these sub-pixels distributes as shown in Figure 3.
As shown in Figure 4, when N image time drove pixel P (1,1) and P (1,2), the state of polarity inversion signal POL was the third state (high levels).When N+1 image time drove pixel P (1,1) and P (1,2), the state of polarity inversion signal POL was a four condition (low level).N image time is adjacent with N+1 image time.So, can reach the effect of the reversal of poles that makes adjacent two pictures.
As shown in Figure 3, left side sub-pixel PL (1,1) with left sub-pixel PL (1,2) polarity is opposite, and left sub-pixel PL (1,1) is also opposite with the polarity of left sub-pixel PL (2,1), and in next image time, the polarity of all sub-pixels all corresponding sub-pixel polarity with previous image time is opposite.Therefore, can reach the effect of an inversion driving really according to the type of drive of the waveform of Fig. 4.
In addition, though opposite with the polarity of the sub-pixel of adjacent lines with delegation's sub-pixel, a same pixel voltage that online data transmitted is a same polarity.For example, data line L1 transmits the pixel voltage VPL (1,1) of positive polarity in the LT1 during first line, and transmits the pixel voltage VPR (2,1) of positive polarity during second line in the LT2.Because same the polarity of voltage that online data transmitted is all identical, so can reduce the size of online data voltage change amount, can reduce the energy loss of online data.
Preferably, as shown in Figure 3, left sub-pixel PL (1,1) and PL (1,2) pixel electrode PEL (1,1) and PEL (1,2) have area identical in fact, and right sub-pixel PR (1,1) the pixel electrode PER (1,1) with PR (1,2) also has area identical in fact with PER (1,2).Similarly, the pixel electrode PEL (2 of left sub-pixel PL (2,1) and PL (2,2), 1) have area identical in fact with PEL (2,2), and right sub-pixel PR (1,2) and PR (2,2) pixel electrode PER (1,2) and PER (2,2) also have area identical in fact.
The above-mentioned first gray scale voltage generation unit 202 (1), the second gray scale voltage generation unit 202 (2), the 3rd gray scale voltage generation unit 202 (3) and the 4th gray scale voltage generation unit 202 (4) are for example reached with a resistance string separately, perhaps the first gray scale voltage generation unit 202 (1) and the 4th gray scale voltage generation unit 202 (4) are reached with a resistance string, and the second gray scale voltage generation unit 202 (2) and the 3rd gray scale voltage generation unit 202 (3) are then reached with a resistance string in addition.
Please refer to Fig. 6, its illustrate be left sub-pixel PL (1,1), right sub-pixel PR (1,1), with the GTG value of pixel P (1,1) and the relation curve of brightness.Relation curve 602 has shown left sub-pixel PL (1, one example of the GTG value 1) and the relation of brightness, relation curve 604 has shown right sub-pixel PR (1, one example of the GTG value 1) and the relation of brightness, relation curve 606 has then shown an example of the relation of the GTG value of pixel P (1,1) and brightness.The brightness of pixel P (1,1) be left sub-pixel PL (1,1) with the brightness of right sub-pixel PR (1,1) and.
Because all are in order to drive left sub-pixel PL (1,1) pixel voltage is with reference to first group of positive gray scale voltage G1P and first group of negative gray scale voltage G1N and produces, and all are in order to drive right sub-pixel PR (1,1) pixel voltage is with reference to second group of positive gray scale voltage G2P and second group of negative gray scale voltage G2N and produces, therefore, under the pixel data of same gray level value, be sent to left sub-pixel PL (1,1) will be different with the pixel voltage of right sub-pixel PR (1,1).That is left sub-pixel PL (1,1) also can be different with the arrangement mode of the liquid crystal molecule of right sub-pixel PR (1,1), and make the visual angle of pixel P (1,1) increase.
In present embodiment, by two groups of positive gray scale voltages and two groups of negative gray scale voltages are provided, and the pixel voltage that makes all left sub-pixel PL is first group of positive gray scale voltage G1P of reference and first group of negative gray scale voltage G1N produces, and the pixel voltage of all right sub-pixel PR is second group of positive gray scale voltage G2P of reference and second group of negative gray scale voltage G2N produces.So, 104 need of time schedule controller provide an identical pixel data to left sub-pixel PL and right sub-pixel PR, and do not need respectively to provide different pixel voltage at left sub-pixel PL with right sub-pixel PR as the conventional practice.Therefore, the time schedule controller 104 of present embodiment does not need to increase to twice with the clock frequency of data driver 106.Therefore, present embodiment can not improve the complexity of the circuit design of time schedule controller and data driver, and can save cost.
Second embodiment
Please refer to Fig. 7, it illustrates the synoptic diagram according to the flat-panel screens 700 of use biserial counter-rotating (2-lineinversion) type of drive of second embodiment of the invention.Flat-panel screens 700 comprises a two-d display panel 702, time schedule controller 704, a data driver 706 and one scan driver 708.Two-d display panel 702 comprises having pel array 710, a plurality of sweep trace S1 '～Sn ' that is made up of the capable m row of n pixel P, and a plurality of data line L1 '～L2m '.
Different with first embodiment is that in pel array 710, each sub-pixel of adjacent two row is identical with the data line ways of connecting, and gamma selection signal Gamma_SL ' changes state just now after during two lines.So, can reach the driving effect of biserial counter-rotating.
Now for example it is described with pixel P ' (1,1), P ' (1,2), P ' (2,1), P ' (2,2), P ' (3,1), P ' (3,2), P ' (4,1) and P ' (4,2) in pel array 710.Each pixel comprises a left sub-pixel and a right sub-pixel.Data line L1 is electrically connected to left sub-pixel PL ' (1,1), left sub-pixel PL ' (2,1), right sub-pixel PR ' (3,1) and right sub-pixel PR ' (4,1).Data line L2 is electrically connected to right sub-pixel PR ' (1,1), right sub-pixel PR ' (2,1), left sub-pixel PL ' (3,1), reaches left sub-pixel PL ' (4,1).Data line L3 is electrically connected to right sub-pixel PR ' (1,2), right sub-pixel PR ' (2,2), left sub-pixel PL ' (3,2), reaches left sub-pixel PL ' (4,2).Data line L4 is electrically connected to left sub-pixel PL ' (1,2), left sub-pixel PL ' (2,2), right sub-pixel PR ' (3,2), reaches right sub-pixel PR ' (4,2).
Sweep trace S1 to S4 arranges in regular turn.Sweep trace S1 is in order to control pixel P ' (1,1) and P ' (1,2).Sweep trace S2 is in order to control pixel P ' (2,1) and P ' (2,2).Sweep trace S3 is in order to control pixel P ' (3,1) and P ' (3,2).Sweep trace S4 is in order to control pixel P ' (4,1) and P ' (4,2).
Now the mode of operation with present embodiment is described as follows.Please be simultaneously with reference to Fig. 8, Fig. 9, Figure 10 A and Figure 10 B.Fig. 8 is an example of the pel array 710 of Fig. 7.Fig. 9 is an example that discharges and recharges start signal STB ', gamma selection signal Gamma_SL ', picture start signal YDIO ', polarity inversion signal POL ' of present embodiment.Figure 10 A is during first line during N the picture shown in Figure 9 during LT1 ' and second line in the LT2 ', the equivalent circuit diagram of the data driver 706 of Fig. 7.Figure 10 B is during the 3rd line during N the picture shown in Figure 9 during LT3 ' and the 4th line in the LT4 ', the equivalent circuit diagram of the data driver 706 of Fig. 7.
Shown in Figure 10 A, during LT1 ' and second line in the LT2 ', data driver 706 will drive the first row pixel and the second row pixel of pel array 710 respectively during first line.During first line in the LT1 ', time schedule controller 706 outputs correspond to pixel P ' (1,1) pixel data DATA ' (1,1) to first and second digital analog converter 204 (1) and 204 (2), and output corresponds to pixel P ' (1,2) pixel data DATA ' (1,2) is to the 3rd and the 4th digital analog converter 204 (3) and 204 (4).During second line in the LT2 ', time schedule controller 706 outputs correspond to pixel P ' (2,1) pixel data DATA ' (2,1) to first and second digital analog converter 204 (1) and 204 (2), and output corresponds to pixel P ' (2,2) pixel data DATA ' (2,2) is to the 3rd and the 4th digital analog converter 204 (3) and 204 (4).
In the LT1 ', gamma selection signal Gamma_SL has first state during first line, for example is high levels, and polarity inversion signal POL then has the third state, for example is high levels.Therefore, during first line in the LT1 ', positive polarity pixel voltage VPL ' (1,1), negative polarity pixel voltage VPR ' (1,1), positive polarity pixel voltage VPR ' (1,2) and negative polarity pixel voltage VPL ' (1,2) exported by the impact damper 206 (1)～206 (4) of data driver 706 respectively, and be sent to left sub-pixel PL ' (1 respectively, 1), right sub-pixel PR ' (1,1), right sub-pixel PR ' (1,2) and left sub-pixel PL ' (1,2).
Similarly, in the LT2 ', gamma selection signal Gamma_SL also is maintained at first state during second line, and polarity inversion signal POL still is maintained at the third state.Therefore, during second line in the LT2 ', positive polarity pixel voltage VPL ' (2,1), negative polarity pixel voltage VPR ' (2,1), positive polarity pixel voltage VPR ' (2,2) and negative polarity pixel voltage VPL ' (2,2) exported by the impact damper 206 (1)～206 (4) of data driver 706 respectively, and be sent to left sub-pixel PL ' (2 respectively, 1), right sub-pixel PR ' (2,1), right sub-pixel PR ' (2,2) and left sub-pixel PL ' (2,2).
Shown in Figure 10 B, during LT3 ' and the 4th line in the LT4 ', data driver 706 will drive the third line pixel and the fourth line pixel of pel array 710 respectively during the 3rd line.During the 3rd line in the LT3 ', time schedule controller 706 outputs correspond to pixel P ' (3,1) pixel data DATA ' (3,1) to first and second digital analog converter 204 (1) and 204 (2), and output corresponds to pixel P ' (3,2) pixel data DATA ' (3,2) is to the 3rd and the 4th digital analog converter 204 (3) and 204 (4).During the 4th line in the LT4 ', time schedule controller 706 outputs correspond to pixel P ' (4,1) pixel data DATA ' (4,1) to first and second digital analog converter 204 (1) and 204 (2), and output corresponds to pixel P ' (4,2) pixel data DATA ' (4,2) is to the 3rd and the 4th digital analog converter 204 (3) and 204 (4).
At this moment, gamma selection signal Gamma_SL transfers second state to, for example is low level, and polarity inversion signal POL then similarly has the third state (high levels).So, positive polarity pixel voltage VPR ' (3,1) and negative polarity pixel voltage VPL ' (3,1), positive polarity pixel voltage VPL ' (3,2), negative polarity pixel voltage VPR ' (3,2) will be exported by the first, second, third and the 4th impact damper 206 (1)～206 (4) respectively, and be sent to respectively right sub-pixel PR ' (3,1), left sub-pixel PL ' (3,1), left sub-pixel PL ' (3 respectively, 2) and right sub-pixel PR ' (3,2).
Similarly, in the LT4 ', gamma selection signal Gamma_SL also is maintained at second state during the 4th line, and polarity inversion signal POL still is maintained at the third state.Therefore, during the 4th line in the LT4 ', positive polarity pixel voltage VPR ' (4,1) and negative polarity pixel voltage VPL ' (4,1), positive polarity pixel voltage VPL ' (4,2), negative polarity pixel voltage VPR ' (4,2) will be exported by the first, second, third and the 4th impact damper 206 (1)～206 (4) respectively, and be sent to right sub-pixel PR ' (4 respectively respectively, 1), left sub-pixel PL ' (4,1), left sub-pixel PL ' (4,2) and right sub-pixel PR ' (4,2).
The polarity of these sub-pixels as shown in Figure 8.As shown in Figure 8, first row is identical with the polarity of the adjacent subpixels of the second row pixel.The third line is identical with the polarity of the adjacent subpixels of fourth line pixel, but different with the sub-pixel of second row.Therefore, can reach the effect of biserial inversion driving really according to the type of drive of the waveform of Fig. 9.
Present embodiment similarly has the visual angle of increase, reduces the online data voltage variety with the minimizing energy loss, and the advantages such as clock frequency that need not increase time schedule controller 704 and data driver 706.
From the above, in the flat-panel screens that goes for multiple different inversion driving by the data driver that uses gamma selection signal of the present invention.Data driver of the present invention is applicable to an inversion driving (as first embodiment), also can be used in biserial inversion driving (as second embodiment), so also be not restricted to this two kinds of type of drive, as long as suitably change the waveform of gamma selection signal and polarity inversion signal, can allow left sub-pixel and right sub-pixel receive the pixel voltage of positive polarity or negative polarity, and reach the effect of different inversion driving.Therefore, data driver of the present invention has more splendid adaptive.
Though the present invention discloses as above with embodiment; right its is not in order to limit the present invention; any have a technical field of the invention know the knowledgeable usually; without departing from the spirit and scope of the present invention; when doing various changes and retouching; and can think to carry other different embodiment, so protection scope of the present invention is as the criterion when looking the claim scope person of defining.
Claims (18)
1. a data driver is characterized in that, described data driver comprises:
One first, 1 second, 1 the 3rd and 1 the 4th gray scale voltage generation unit is in order to export one first group of positive gray scale voltage, one second group of negative gray scale voltage, one second group of positive gray scale voltage and one first group of negative gray scale voltage respectively;
One first, one second, one the 3rd and one the 4th digital analog converter, when a gamma selection signal has one first state, described first, described second, the described the 3rd and the input end of described the 4th digital analog converter be electrically connected to described first respectively, described second, the described the 3rd and the output terminal of described the 4th gray scale voltage generation unit, when described gamma selection signal has one second state, described first, described second, the described the 3rd and the input end of described the 4th digital analog converter be electrically connected to the described the 3rd respectively, the described the 4th, described first and the output terminal of the described second gray scale voltage generation unit; And
One first, one second, one the 3rd and one the 4th impact damper, when a polarity inversion signal is a third state, described first, described second, the described the 3rd and the input end of described the 4th impact damper be electrically connected to described first respectively, described second, the described the 3rd and the output terminal of described the 4th digital analog converter, when described polarity inversion signal is a four condition, described first, described second, the described the 3rd and the input end of described the 4th impact damper be electrically connected to described second respectively, described first, the described the 4th and the output terminal of described the 3rd digital analog converter.
2. data driver as claimed in claim 1, it is characterized in that, described data driver is in order to drive a two-d display panel, described two-d display panel has one first and one second pixel, and one first, one second, one the 3rd and one the 4th data line, described first pixel comprises one first left sub-pixel and one first right pixel, described second pixel comprises one second left sub-pixel and one second right sub-pixel, described first, described second, the described the 3rd with described the 4th data line be electrically connected to the described first left sub-pixel respectively, the described first right sub-pixel, the described second right sub-pixel and the described second left sub-pixel;
Wherein, described first, described second, the described the 3rd and the output terminal of described the 4th impact damper be electrically connected to one first, 1 second, 1 the 3rd and 1 the 4th data line respectively;
Wherein, described first and second digital analog converter corresponds in addition one first pixel data of described first pixel in order to reception, the described the 3rd and described the 4th digital analog converter correspond to one second pixel data of described second pixel in addition in order to reception;
Wherein, described first group of positive gray scale voltage and described first group of negative gray scale voltage correspond to the described first left sub-pixel and the described second left sub-pixel, and described second group of positive gray scale voltage and described second group of negative gray scale voltage correspond to the described first right sub-pixel and the described second right sub-pixel.
3. a flat-panel screens is characterized in that, described flat-panel screens comprises:
One two-d display panel comprises:
One first pixel and one second pixel, described first pixel comprise one first left sub-pixel and one first right sub-pixel, and described second pixel comprises one second left sub-pixel and one second right sub-pixel;
One first sweep trace, in order to control described first with described second pixel;
One first, 1 second, 1 the 3rd and 1 the 4th data line is electrically connected to the described first left sub-pixel, the described first right sub-pixel, the described second right sub-pixel and the described second left sub-pixel respectively;
Time schedule controller is in order to export a polarity inversion signal and a gamma selection signal; And
One data driver comprises:
One first, 1 second, 1 the 3rd and 1 the 4th gray scale voltage generation unit, in order to export one first group of positive gray scale voltage, one second group of negative gray scale voltage, one second group of positive gray scale voltage and one first group of negative gray scale voltage respectively, described data driver drives described these sub-pixels according to described first group of positive gray scale voltage, described second group of negative gray scale voltage, described second group of positive gray scale voltage and described first group of negative gray scale voltage under the control of described polarity inversion signal and described gamma selection signal.
4. flat-panel screens as claimed in claim 3, it is characterized in that, described data driver comprises one first in addition, one second, one the 3rd and one the 4th digital analog converter, when described gamma selection signal has one first state, described first, described second, the described the 3rd and the input end of described the 4th digital analog converter be electrically connected to described first respectively, described second, the described the 3rd and the output terminal of described the 4th gray scale voltage generation unit, when described gamma selection signal has one second state, described first, described second, the described the 3rd and the input end of described the 4th digital analog converter be electrically connected to the described the 3rd respectively, the described the 4th, described first and the output terminal of the described second gray scale voltage generation unit.
5. flat-panel screens as claimed in claim 4, it is characterized in that, described data driver comprises one first in addition, one second, one the 3rd and one the 4th impact damper, when described polarity inversion signal is a third state, described first, described second, the described the 3rd and the input end of described the 4th impact damper be electrically connected to described first respectively, described second, the described the 3rd and the output terminal of described the 4th digital analog converter, when described polarity inversion signal is a four condition, described first, described second, the described the 3rd and the input end of described the 4th impact damper be electrically connected to described second respectively, described first, the described the 4th and the output terminal of described the 3rd digital analog converter, described first, described second, the described the 3rd and the output terminal of described the 4th impact damper be electrically connected to described first respectively, described second, the described the 3rd with described the 4th data line.
6. flat-panel screens as claimed in claim 5, it is characterized in that, when one first image time drives described first pixel and described second pixel, the state of described polarity inversion signal be the described third state and described four condition the two one of, when one second image time drives described first pixel and described second pixel, the state of described polarity inversion signal is the two another of the described third state and described four condition, and described first image time is adjacent with described second image time.
7. flat-panel screens as claimed in claim 4, it is characterized in that, described time schedule controller corresponds to one first pixel data of described first pixel to described first and second digital analog converter in order to output in addition, and output one second pixel data that corresponds to described second pixel is to the described the 3rd and described the 4th digital analog converter, described first group of positive gray scale voltage and described first group of negative gray scale voltage correspond to the described first left sub-pixel and the described second left sub-pixel, and described second group of positive gray scale voltage and described second group of negative gray scale voltage correspond to the described first right sub-pixel and the described second right sub-pixel.
8. flat-panel screens as claimed in claim 7, it is characterized in that, the pixel electrode of the described first left sub-pixel and the described second left sub-pixel has area identical in fact, and the pixel electrode of the described first right sub-pixel and the described second right sub-pixel also has area identical in fact.
9. flat-panel screens as claimed in claim 7 is characterized in that, described panel comprises in addition:
One the 3rd pixel and one the 4th pixel, described the 3rd pixel comprises one the 3rd left sub-pixel and one the 3rd right sub-pixel, described the 4th pixel comprises one the 4th left sub-pixel and one the 4th right sub-pixel, the described the first, the described the second, the described the 3rd with described the 4th data line be electrically connected to the described the 3rd right sub-pixel, the described the 3rd left sub-pixel, the described the 4th left sub-pixel and the described the 4th right sub-pixel respectively;
One second sweep trace is adjacent to described first sweep trace and in order to control described the 3rd pixel and described the 4th pixel;
Wherein, one the 3rd pixel data that described time schedule controller in addition corresponds to described the 3rd pixel in order to output is to described first and second digital analog converter, and output one the 4th pixel data that corresponds to described the 4th pixel is to the described the 3rd and described the 4th digital analog converter;
Wherein, when driving described first pixel and described second pixel, the state of described gamma selection signal be described first state and described second state the two one of, when driving described the 3rd pixel and described the 4th pixel, the state tool of described gamma selection signal is the two another of described first state and described second state.
10. flat-panel screens as claimed in claim 9, it is characterized in that, the pixel electrode of the described the 3rd left sub-pixel and described the 4th left sub-pixel has area identical in fact, and the pixel electrode of the described the 3rd right sub-pixel and described the 4th right sub-pixel also has area identical in fact.
11. flat-panel screens as claimed in claim 7 is characterized in that, described panel comprises in addition:
One the 3rd to 1 the 8th pixel, each pixel comprises a left sub-pixel and a right sub-pixel, described first data line is electrically connected to the left sub-pixel of described the 3rd pixel, the right sub-pixel of described the 5th pixel, and the right sub-pixel of described the 7th pixel, described second data line is electrically connected to the right sub-pixel of described the 3rd pixel, the left sub-pixel of described the 5th pixel, and the left sub-pixel of described the 7th pixel, described the 3rd data line is electrically connected to the right sub-pixel of described the 4th pixel, the left sub-pixel of described the 6th pixel, and the left sub-pixel of described the 8th pixel, described the 4th data line is electrically connected to the left sub-pixel of described the 4th pixel, the right sub-pixel of described the 6th pixel, and the right sub-pixel of described the 8th pixel; And
One second to 1 the 4th sweep trace, described first arranges in regular turn to described the 4th sweep trace, described second sweep trace is in order to control described the 3rd pixel and described the 4th pixel, described three scan line is in order to control described the 5th pixel and described the 6th pixel, and described the 4th sweep trace is in order to control described the 7th pixel and described the 8th pixel;
Wherein, described time schedule controller in addition in order to output correspond to one the 3rd pixel data of described the 3rd pixel, described the 5th pixel one the 5th pixel data, and one the 7th pixel data of described the 7th pixel to described first and second digital analog converter, and output correspond to one the 4th pixel data of described the 4th pixel, described the 6th pixel one the 6th pixel data, and one the 8th pixel data of described the 8th pixel to the described the 3rd and described the 4th digital analog converter;
Wherein, when driving described first pixel to described the 4th pixel, the state of described gamma selection signal be described first state and described second state the two one of, when driving described the 5th pixel to described the 8th pixel, the state tool of described gamma selection signal is the two another of described first state and described second state.
12. the driving method of a two-d display panel, described two-d display panel has one first and one second pixel, and one first, one second, one the 3rd and one the 4th data line, described first pixel comprises one first left sub-pixel and one first right sub-pixel, described second pixel comprises one second left sub-pixel and one second right sub-pixel, described first, described second, the described the 3rd with described the 4th data line be electrically connected to the described first left sub-pixel respectively, the described first right sub-pixel, the described second right sub-pixel and the described second left sub-pixel, described driving method comprises:
Receive one first pixel data, one second pixel data, a polarity inversion signal and a gamma selection signal;
Produce one first group of positive gray scale voltage, one second group of negative gray scale voltage, one second group of positive gray scale voltage and one first group of negative gray scale voltage;
When described gamma selection signal has one first state, one first, 1 second, 1 the 3rd and 1 the 4th digital analog converter is respectively according to described first group of positive gray scale voltage, described second group of negative gray scale voltage, described second group of positive gray scale voltage and described first group of negative gray scale voltage, with respectively to described first pixel data, described first pixel data, described second pixel data, and described second pixel data carry out digital-to-analogue conversion;
When described gamma selection signal has one second state, described first, described second, the described the 3rd and described the 4th digital analog converter respectively according to described second group of positive gray scale voltage, described first group of negative gray scale voltage, described first group of positive gray scale voltage, and described second group of negative gray scale voltage, with respectively to described first pixel data, described first pixel data, described second pixel data, and described second pixel data carry out digital-to-analogue conversion;
When described polarity inversion signal was a third state, that one first, 1 second, 1 the 3rd and 1 the 4th impact damper receives respectively was described first, described second, the described the 3rd and the output signal of described the 4th digital analog converter;
When described polarity inversion signal is a four condition, described first, described second, the described the 3rd and described the 4th impact damper receive respectively described second, described first, the described the 4th and the output signal of described the 3rd digital analog converter; And
Described first, described second, the described the 3rd and described the 4th impact damper drive the described first left sub-pixel, the described first right sub-pixel, the described second right sub-pixel and the described second left sub-pixel via the described the first, the described the second, the described the 3rd with described the 4th data line respectively.
13. driving method as claimed in claim 12, wherein, described first group of positive gray scale voltage and described first group of negative gray scale voltage correspond to the described first left sub-pixel and the described second left sub-pixel, and described second group of positive gray scale voltage and described second group of negative gray scale voltage correspond to the described first right sub-pixel and the described second right sub-pixel.
14. driving method as claimed in claim 13, the pixel electrode of the wherein said first left sub-pixel and the described second left sub-pixel has area identical in fact, and the pixel electrode of the described first right sub-pixel and the described second right sub-pixel also has area identical in fact.
15. driving method as claimed in claim 12, wherein said panel comprises one the 3rd pixel and one the 4th pixel and one second sweep trace in addition, described the 3rd pixel comprises one the 3rd left sub-pixel and one the 3rd right sub-pixel, described the 4th pixel comprises one the 4th left sub-pixel and one the 4th right sub-pixel, described first, described second, the described the 3rd with described the 4th data line be electrically connected to the described the 3rd right sub-pixel respectively, the described the 3rd left sub-pixel, the described the 4th left sub-pixel and the described the 4th right sub-pixel, described second sweep trace is adjacent to described first sweep trace and in order to control described the 3rd pixel and described the 4th pixel, and described method comprises in addition:
Receive one the 3rd pixel data and one the 4th pixel data;
When described gamma selection signal has described first state, described first, described second, the described the 3rd and described the 4th digital analog converter respectively according to described first group of positive gray scale voltage, described second group of negative gray scale voltage, described second group of positive gray scale voltage and described first group of negative gray scale voltage, with respectively to described the 3rd pixel data, described the 3rd pixel data, described the 4th pixel data, and described the 4th pixel data carry out digital-to-analogue conversion;
When described gamma selection signal has described second state, described first, described second, the described the 3rd and described the 4th digital analog converter respectively according to described second group of positive gray scale voltage, described first group of negative gray scale voltage, described first group of positive gray scale voltage, and described second group of negative gray scale voltage, with respectively to described the 3rd pixel data, described the 3rd pixel data, described the 4th pixel data, and described the 4th pixel data carry out digital-to-analogue conversion;
By described first, described second, the described the 3rd and described the 4th impact damper drive the described the 3rd right sub-pixel, the described the 3rd left sub-pixel, the described the 4th left sub-pixel and the described the 4th right sub-pixel via the described the first, the described the second, the described the 3rd with described the 4th data line respectively;
Wherein, when driving described first pixel and described second pixel, the state of described gamma selection signal be described first state and described second state the two one of, when driving described the 3rd pixel and described the 4th pixel, the state tool of described gamma selection signal is the two another of described first state and described second state.
16. driving method as claimed in claim 13, the pixel electrode of the wherein said the 3rd left sub-pixel and described the 4th left sub-pixel has area identical in fact, and the pixel electrode of the described the 3rd right sub-pixel and described the 4th right sub-pixel also has area identical in fact.
17. driving method as claimed in claim 12, wherein said panel comprises one the 3rd to 1 the 8th pixel in addition, and one second to 1 the 4th sweep trace, each pixel comprises a left sub-pixel and a right sub-pixel, described first data line is electrically connected to the left sub-pixel of described the 3rd pixel, the right sub-pixel of described the 5th pixel, and the right sub-pixel of described the 7th pixel, described second data line is electrically connected to the right sub-pixel of described the 3rd pixel, the left sub-pixel of described the 5th pixel, and the left sub-pixel of described the 7th pixel, described the 3rd data line is electrically connected to the right sub-pixel of described the 4th pixel, the left sub-pixel of described the 6th pixel, and the left sub-pixel of described the 8th pixel, described the 4th data line is electrically connected to the left sub-pixel of described the 4th pixel, the right sub-pixel of described the 6th pixel, and the right sub-pixel of described the 8th pixel, described first arranges in regular turn to described the 4th sweep trace, described second sweep trace is in order to control described the 3rd pixel and described the 4th pixel, described three scan line is in order to control described the 5th pixel and described the 6th pixel, described the 4th sweep trace is in order to control described the 7th pixel and described the 8th pixel, and described method comprises in addition:
Wherein, drive described first during to described the 4th pixel, the state of described gamma selection signal be described first state and described second state the two one of, drive the described the 5th during to described the 8th pixel, the state tool of described gamma selection signal is the two another of described first state and described second state.
18. driving method as claimed in claim 12, wherein, when one first image time drives described first pixel and described second pixel, the state of described polarity inversion signal be the described third state and described four condition the two one of, when one second image time drives described first pixel and described second pixel, the state of described polarity inversion signal is the two another of the described third state and described four condition, and described first image time is adjacent with described second image time.
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