CN101221714A - Driving device and driving method thereof - Google Patents
Driving device and driving method thereof Download PDFInfo
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- CN101221714A CN101221714A CN 200710002173 CN200710002173A CN101221714A CN 101221714 A CN101221714 A CN 101221714A CN 200710002173 CN200710002173 CN 200710002173 CN 200710002173 A CN200710002173 A CN 200710002173A CN 101221714 A CN101221714 A CN 101221714A
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Abstract
The invention provides a driving device and a driving method thereof. The driving device comprises a digital-analog conversion circuit and a signal amplifying circuit, wherein, the digital-analog conversion circuit is used to receive digital data and converts the digital data into an analog signal; the signal amplifying circuit is coupled with the digital-analog conversion circuit for receiving the analog signal to generate a driving signal and dynamically changing the driving capability of the driving signal according to at least one bit in the digital data.
Description
Technical field
The present invention relates to the method that a kind of drive unit and generation thereof drive signal, particularly relate to a kind of method that can reduce the drive unit of power consumption and produce the driving signal.
Background technology
The characteristic of liquid crystal molecule can not be fixed under a certain voltage and constant, not so of long duration exactly always, even no longer liquid crystal molecule is applied voltage, liquid crystal molecule also can be destroyed because of characteristic, so that can't rotate in response to the variation of electric field again, and then form different GTGs.So must drive liquid crystal in the mode that exchanges, destroyed with the characteristic of avoiding liquid crystal molecule, for example, once bestow the liquid crystal positive polarity voltage, so that the liquid crystal forward rotation, the liquid crystal reverse voltage is just bestowed in another time, so that the liquid crystal backward rotation.
The mode of AC driving is divided into two kinds, and a kind of is the fixed type of drive of common voltage (being commonly referred to as Vcom), and another kind is the type of drive of common voltage change.The synoptic diagram that is the fixed type of drive of common voltage shown in Figure 1.Please refer to Fig. 1.In Fig. 1, show, this kind type of drive promptly is to be that the center makes operational amplifier (Operational Amplifier with the common voltage, be called for short OPAMP) output voltage be divided into positive and negative polarity, and each luma data (00～FF) corresponding voltage that its positive and negative polarity all arranged for example.When the output voltage of operational amplifier during, be called positive polarity output, and, be called negative polarity and export when the output voltage of operational amplifier during less than common voltage greater than common voltage.
No matter the output voltage of operational amplifier is positive polarity or negative polarity, just higher regardless of the output voltage that is operational amplifier, or the voltage of common voltage is higher, as long as the output voltage of operational amplifier and the common voltage voltage difference between the two is fixed, the GTG of one group of same brightness can be arranged all.Though the GTG that showed this moment is living, owing to the turn to difference of liquid crystal molecule, therefore can avoid liquid crystal molecule to turn to and be fixed on same direction always in positive and negative polarity, and the destruction of causing characteristic.
Yet, this kind type of drive has its shortcoming, for example, suppose that desire output one complete black picture (its luma data is 00) is to display panel, when the output voltage of operational amplifier is positive polarity, if its luma data 00 is less than G1 (G1 and G2 are any luma data), then the output voltage of operational amplifier must reach interval 1 level; And when the output voltage of operational amplifier was negative polarity, less than G2, then the output voltage of operational amplifier must reach interval 4 level as if luma data.Say expressly, exactly when liquid crystal molecule is done the conversion of positive and negative polarity, because the characteristic of AC driving, make the output voltage of operational amplifier have large-scale voltage and change.
Similarly, the type of drive of common voltage change also has such problem.Please refer to Fig. 2, the synoptic diagram that is the type of drive of common voltage change shown in Figure 2.As shown in Figure 2, each luma data (00～FF) corresponding voltage that still has its positive and negative polarity for example.When the output voltage of operational amplifier during, be called positive polarity output, and, be called negative polarity and export when the output voltage of operational amplifier during less than common voltage greater than common voltage.No matter be that the output voltage of operational amplifier is higher, or the voltage of common voltage is higher,, the GTG of one group of same brightness can be arranged all as long as the output voltage of operational amplifier and the common voltage voltage difference between the two is fixed.
Yet, this kind type of drive is under following four kinds of conditions, the output voltage of operational amplifier also has large-scale change: first kind is, the same polarity that is changed to when luma data, be assumed to be positive polarity, and 00 and FF between conversion mutually, if luma data 00 is less than G1 (G1, G2, G3 and G4 are any luma data), and luma data FF is greater than G4, and then the output voltage of operational amplifier can conversion mutually between interval 1 and interval 4.Second kind is, the variation of supposing luma data conversion mutually between the luma data FF of the luma data 00 of negative polarity and negative polarity, if luma data 00 is less than G2, and luma data FF is greater than G3, and then the output voltage of operational amplifier can conversion mutually between interval 3 and interval 2.
The third is, the opposed polarity that is changed to when luma data, suppose that luma data is 00, and polarity is conversion mutually between positive polarity and negative polarity, if positive polarity luma data 00 is less than G1, and negative polarity luma data 00 is less than G2, and then the output voltage of operational amplifier can conversion mutually between interval 1 and interval 3.The 4th kind is, the variation of supposing luma data conversion mutually between the luma data FF of the luma data FF of positive polarity and negative polarity, if positive polarity luma data FF is greater than G3, and FF is greater than G4 for the negative polarity luma data, and then the output voltage of operational amplifier can conversion mutually between interval 2 and interval 4.
As previously discussed, when the output voltage of operational amplifier has large-scale change, so that make that the time of operational amplifier output voltage transition is longer, and then the stabilization time that voltage is changed is longer, just can limit the scope of using thus.(Slew Rate is called for short SR, i.e. the maximum output voltage rate of change dV that allowed of an electronic package with rotation rate
o(t)/dt), the rotation rate of operational amplifier can be expressed as SR=I/C
c, wherein I is the electric current of operational amplifier, Cc is then for being coupled to the building-out capacitor of operational amplifier.If the output voltage difference of operational amplifier is 10 volts (V), as will in 5 microseconds (us), finishing conversion, then rotation rate SR must be 2V/us, but if will in 2.5 microseconds, finish conversion, then rotation rate SR must be 4V/us, one times of 1 times of the electric current of operational amplifier palpus increase just or building-out capacitor minimizing.
In order to shorten the stabilization time of operational amplifier output voltage transition, if the minimizing building-out capacitor, because the time of operational amplifier output voltage transition is directly proportional with building-out capacitor, building-out capacitor is littler, the time of operational amplifier output voltage transition is just shorter, but easily causes the operational amplifier concussion.If strengthen the electric current of operational amplifier, because the electric current of the time of operational amplifier output voltage transition with operational amplifier is inversely proportional to, when the electric current of operational amplifier is healed big, the time of operational amplifier output voltage transition is just shorter, yet accelerating the way of stabilization time ignorantly, an electric current that strengthens operational amplifier but can increase power consumption, so that influenced competitiveness of product.
Summary of the invention
The purpose of this invention is to provide the method that a kind of drive unit and generation thereof drive signal, it can reduce power consumption.
A further object of the present invention just provides the method for a kind of drive unit and generation driving signal thereof, and it can dynamically change the stabilization time that drive unit switches output voltage.
Based on above-mentioned and other purpose, the present invention proposes a kind of drive unit, and it comprises D/A conversion circuit and signal amplifier.D/A conversion circuit is in order to receiving digital data, and is analog signal with digital data conversion.Signal amplifier is coupled to D/A conversion circuit, produces the driving signal in order to receive analog signal, and dynamically changes the driving force that drives signal according at least one position in the numerical data.
Based on above-mentioned and other purpose, the present invention proposes a kind of drive unit, and it comprises D/A conversion circuit, control circuit and signal amplifier.D/A conversion circuit is in order to receiving digital data, and is analog signal with digital data conversion.Control circuit produces controlling signal in order at least one position in the foundation numerical data.Signal amplifier is coupled to D/A conversion circuit and control circuit, produces the driving signal in order to receive analog signal, and dynamically changes the driving force that drives signal according to controlling signal.
Based on above-mentioned and other purpose, the present invention proposes a kind of driving method of drive unit.This driving method comprises the following steps: that with digital data conversion be analog signal; Dynamically determine a driving force according at least one position in the numerical data; And produce the driving signal with the driving force that determined according to analog signal.
According to the described drive unit of one embodiment of the invention, above-mentioned signal amplifier comprises operational amplifier, and above-mentioned driving signal comprises by operational amplifier and producing.Operational amplifier comprises positive input terminal, negative input end, control end and output terminal, wherein the positive input terminal of operational amplifier receives analog signal, the negative input end of operational amplifier is coupled to the output terminal of operational amplifier, at least one position in the control end receiving digital data of operational amplifier, and the output of the output terminal of operational amplifier drives signal.
According to the described drive unit of one embodiment of the invention, above-mentioned signal amplifier comprises operational amplifier, and above-mentioned driving signal comprises by operational amplifier and producing.Operational amplifier comprises positive input terminal, negative input end, control end and output terminal, wherein the positive input terminal of operational amplifier receives analog signal, the negative input end of operational amplifier is coupled to the output terminal of operational amplifier, the control end of operational amplifier receives controlling signal, and the output of the output terminal of operational amplifier drives signal.
According to the described drive unit of one embodiment of the invention, above-mentioned operational amplifier also comprises first input stage and gain stage.Wherein first input stage comprises the first transistor, transistor seconds and first controlled current source.The grid of the first transistor is as the positive input terminal of operational amplifier.The grid of transistor seconds is as the negative input end of operational amplifier.First end of first controlled current source is coupled to first source/drain electrode of the first transistor and transistor seconds, and second end of first controlled current source is coupled to first current potential, and wherein the magnitude of current that provided is provided according to the signal of operational amplifier control end first controlled current source.The first input end of gain stage and second input end are coupled to second source/drain electrode of the first transistor and second source/drain electrode of transistor seconds respectively, produce the driving signal in order to the first input end of foundation gain stage and second input end.
According to the described drive unit of one embodiment of the invention, the first above-mentioned controlled current source comprises first current source, second current source and first switch.First end of first current source is as first end of first controlled current source, and second end of first current source is as second end of first controlled current source.First end of second current source is coupled to first end of first current source.First end of first switch is coupled to second end of second current source, and second end of first switch is coupled to second end of first current source, determines the keying state of first switch in order to the signal of foundation operational amplifier control end.
According to the described drive unit of another embodiment of the present invention, above-mentioned operational amplifier also comprises second input stage.Wherein second input stage comprises the 3rd transistor, the 4th transistor and second controlled current source.The 3rd transistorized grid is coupled to the grid of the first transistor, and the 3rd transistorized second source/drain electrode is coupled to the 3rd input end of gain stage.The 4th transistorized grid is coupled to the grid of transistor seconds, and the 4th transistorized second source/drain electrode is coupled to the four-input terminal of gain stage.First end of second controlled current source is coupled to the 4th transistorized first source/drain electrode of the 3rd transistor AND gate, and second end of second controlled current source is coupled to second current potential, and the magnitude of current that provided is provided according to the signal of operational amplifier control end second controlled current source.Wherein gain stage produces the driving signal in order to first input end, second input end, the 3rd input end and the four-input terminal of foundation gain stage.
According to the described drive unit of above-mentioned another embodiment, the second above-mentioned controlled current source comprises the 3rd current source, the 4th current source and second switch.First end of the 3rd current source is as first end of second controlled current source, and second end of the 3rd current source is as second end of second controlled current source.First end of the 4th current source is coupled to first end of the 3rd current source.First end of second switch is coupled to second end of the 4th current source, and second end of second switch is coupled to second end of the 3rd current source, determines the keying state of second switch in order to the signal of foundation operational amplifier control end.
According to the described drive unit of an embodiment more of the present invention, above-mentioned operational amplifier also comprises input stage and gain stage.Input stage is coupled to the positive input terminal and the negative input end of operational amplifier, in order to receive analog signal.Gain stage is coupled to input stage, produces the driving signal in order to the output of foundation input stage, and determines to drive the driving force of signal according to the control end of operational amplifier.
According to the described drive unit of an above-mentioned embodiment again, above-mentioned input stage comprises the first transistor, transistor seconds, first current source, the 3rd transistor and the 4th transistor.The grid of the first transistor is as the positive input terminal of operational amplifier.The grid of transistor seconds is as the negative input end of operational amplifier.First end of first current source is coupled to first source/drain electrode of the first transistor and first source/drain electrode of transistor seconds, and second end of first current source is coupled to first current potential.The 3rd transistorized first source/drain electrode couples the second source/drain electrode and the 3rd transistorized grid of the first transistor, and the 3rd transistorized second source/drain electrode couples second current potential.The 4th transistorized first source/drain electrode couples second source/drain electrode of transistor seconds, the 4th transistorized grid couples the 3rd transistorized grid, the 4th transistorized second source/drain electrode couples second current potential, and wherein the signal of the 4th transistor first source/drain electrode is as the output of input stage.
According to the described drive unit of an above-mentioned embodiment again, above-mentioned gain stage comprises the 5th transistor, controlled electric capacity and second current source.The 5th transistorized grid receives the output of input stage, and the 5th transistorized second source/drain electrode couples second current potential.First end of controlled electric capacity and second end are coupled to the 5th transistorized grid and first source/drain electrode respectively, and the electric capacity that provided is provided according to the signal of operational amplifier control end wherein controlled electric capacity.Second current source is coupled between the 5th transistorized first source/drain electrode and first current potential.Wherein the signal of the 5th transistor first source/drain electrode is as driving signal.
According to the described drive unit of an above-mentioned embodiment again, above-mentioned controlled electric capacity comprises first electric capacity, second electric capacity and switch.First end of first electric capacity and second end are respectively as first end and second end of controlled electric capacity.First end of second electric capacity is coupled to first end of first electric capacity.First end of switch and second end are coupled to second end of second electric capacity and second end of first electric capacity respectively, determine whether conducting in order to the signal of foundation operational amplifier control end.
According to the described drive unit of another embodiment of the present invention, above-mentioned input stage comprises operational amplification circuit.The positive input terminal of operational amplification circuit receives analog signal, and the negative input end of operational amplification circuit couples the output terminal of operational amplification circuit, and wherein the signal exported of operational amplification circuit is the output of input stage.
According to the described drive unit of above-mentioned another embodiment, above-mentioned gain stage comprises gain circuitry and controlled electric capacity.The input end of gain circuitry couples the output terminal of operational amplification circuit.First end of controlled electric capacity and second end are coupled to the input end and the output terminal of gain circuitry respectively, and the electric capacity that provided is provided according to the signal of operational amplifier control end wherein controlled electric capacity.
According to the described drive unit of above-mentioned another embodiment, above-mentioned controlled electric capacity comprises first electric capacity, second electric capacity and switch.First end of first electric capacity and second end are respectively as first end and second end of controlled electric capacity.First end of second electric capacity is coupled to first end of first electric capacity.First end of switch and second end are coupled to second end of second electric capacity and second end of first electric capacity respectively, determine whether conducting in order to the signal of foundation operational amplifier control end.
According to the described drive unit of one embodiment of the invention, it also comprises latch cicuit, is used to latch and provide numerical data.
According to the described drive unit of one embodiment of the invention, wherein controlling signal comprises by control circuit and producing.This control circuit comprise counting circuit and with door.Counting circuit is in order to receive and the counting clock signal output count results when counting reaches default value.With door in order at least one position in count pick up result and the numerical data, produce controlling signal according to this.
According to the described drive unit of another embodiment of the present invention, wherein controlling signal comprises by control circuit and producing.This control circuit comprises delay circuit and XOR gate.Delay circuit also postpones in order at least one position in the receiving digital data.XOR gate is coupled to delay circuit, in order to the output of at least one position in the receiving digital data with delay circuit, produces controlling signal according to this.
According to the described drive unit of an embodiment more of the present invention, wherein controlling signal comprises by control circuit and producing.This control circuit comprises comparator circuit and change-over circuit.Comparator circuit is in order to receive and comparison reference and driving signal.Change-over circuit is coupled to comparator circuit, in order to the comparative result of foundation comparator circuit at least one position in the numerical data that is received is converted to controlling signal.
The present invention differentiates the change scope of the output voltage of operational amplifier according to numerical data, when changing the scope overrate, just dynamically change the rotation rate of operational amplifier according at least one position in the numerical data, different supply of current (really needing electric current that electric current just is provided) is provided, and then dynamically change the driving force of the driving signal that operational amplifier exports, reach purpose of power saving.And the mode that changes the rotation rate of operational amplifier comprises the size of current of controlling operational amplifier, or changes the building-out capacitor size of operational amplifier, also or simultaneously changes said two devices.Therefore the present invention can dynamically adjust the driving force that drives signal along with the change scope of output voltage, uses the equilibrium point of asking for a best between the power consumption of stabilization time that shortens operational amplifier conversion output voltage and operational amplifier.
For above and other objects of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and formula is described in detail as follows in conjunction with the accompanying drawings.
Description of drawings
Fig. 1 is the synoptic diagram of the fixed type of drive of common voltage.
Fig. 2 is the synoptic diagram of the type of drive of common voltage change.
Fig. 3 is the calcspar according to the drive unit of one embodiment of the invention.
Fig. 4 is the process flow diagram that drives the signal method according to the generation of one embodiment of the invention.
Fig. 5 is the circuit diagram according to the operational amplifier of one embodiment of the invention.
Fig. 5 A is for explaining key diagram of the present invention with the two relation of the output voltage of operational amplifier and luma data.
Fig. 6, Fig. 7, Fig. 8 are the circuit diagram according to the operational amplifier of another embodiment of the present invention.
Fig. 8 A is the enforcement example that another kind of input stage is described according to the present invention.
Fig. 8 B is the enforcement example that another kind of gain stage is described according to the present invention.
Fig. 9 is the circuit diagram according to the operational amplifier of yet another embodiment of the invention.
Figure 10 is the calcspar according to the drive unit of another embodiment of the present invention.
Figure 11 is the sequential chart of controlling signal and highest significant position.
Figure 12 is the circuit diagram according to the control circuit of one embodiment of the invention.
Figure 13 is the circuit diagram according to the control circuit of another embodiment of the present invention.
Figure 14 is the circuit diagram according to the control circuit of yet another embodiment of the invention.
The reference numeral explanation
310: latch cicuit
320: D/A conversion circuit
330: signal amplifier
410,420: step
500,800: operational amplifier
501,502,801,901: control end
510,530,810,910: input stage
511,512,531,532,811～814,816～819,821,827: transistor
513,533: controlled current source
514,515,534,535,815,822,831,833: current source
516,536,826,832,925: switch
550,820,920: gain stage
823,922: controlled electric capacity
824,825,828,829,923,924: electric capacity
911: operational amplification circuit
921: gain circuitry
1010: control circuit
1210: counting circuit
1220: with door
1310: delay circuit
1320: XOR gate
1410: comparator circuit
1420: change-over circuit
CLK: clock signal
GND: ground voltage
IN: numerical data
RV: reference value
VDD: supply voltage
VIN: analog signal
VOUT: drive signal
Embodiment
For the convenience that illustrates, below the described drive unit of each embodiment be all source electrode driving device, in order to drive liquid crystal panel, so be not in order to limit purposes of the present invention.
Fig. 3 is the calcspar according to the drive unit of one embodiment of the invention.Fig. 4 is the process flow diagram according to the driving method of one embodiment of the invention.Please according to the explanation needs and with reference to Fig. 3 and Fig. 4.Comprise latch cicuit 310, D/A conversion circuit 320 and signal amplifier 330 among Fig. 3.Latch cicuit 310 receiving digital data IN, and (as the step 410 of Fig. 4) after latching numerical data IN, exported.D/A conversion circuit 320 receives the numerical data IN that is exported by latch cicuit 310, and numerical data IN is converted to analog signal VIN (as the step 420 of Fig. 4).Signal amplifier 330 receives analog signal VIN, and dynamically determine a driving force (as the step 430 of Fig. 4) then to produce and drive signal VOUT (as the step 440 of Fig. 4) again with the driving force that is determined according to analog signal VIN according at least one position in the numerical data.
In aforementioned article, carried, size of current by the control operational amplifier, or change the building-out capacitor size of operational amplifier, just can change the stabilization time of operational amplifier conversion output voltage, and then change the driving force of the driving signal that operational amplifier exports.Fig. 5 promptly is the size of current by the control operational amplifier, and then changes the typical case that operational amplifier is exported the driving force that drives signal.Please continue with reference to Fig. 5.
Operational amplifier 500 shown in Figure 5 comprises first input stage 510, second input stage 530 and gain stage 550.Wherein input stage 510 comprises transistor 511,512 and controlled current source 513.In this embodiment, transistor 511 and 512 adopts P-type mos field effect transistor (P-type Metal Oxide Semiconductor transistor) to realize.The grid of the grid of transistor 511 and transistor 512 can be respectively as the positive and negative input end of operational amplifier 500.
First end of controlled current source 513 is coupled to the source electrode of transistor 511 and 512, and second end of controlled current source 513 is coupled to supply voltage VDD (i.e. first current potential), and the magnitude of current that provided is provided according to the signal of operational amplifier control end 501 controlled current source 513.Controlled current source 513 comprises current source 514,515 and switch 516.First end of current source 514 (for example electric current sinks end) is as first end of controlled current source 513, and second end of current source 514 (for example electric current feed end) is as second end of controlled current source 513.First end of current source 515 is coupled to first end of current source 514.First end of switch 516 is coupled to second end of current source 515, and second end of switch 516 is coupled to second end of current source 514, and this switch 516 is the keying state of determine switch 516 in order to the signal of foundation operational amplifier control end 501.
First end of controlled current source 533 is coupled to the source electrode of transistor 531 and 532, and second end of controlled current source 533 is coupled to ground voltage GND (i.e. second current potential), and wherein the magnitude of current that provided is provided according to the signal of this operational amplifier control end 502 this second controlled current source.Controlled current source 533 comprises current source 534,535 and switch 536.First end of current source 534 is as first end of controlled current source 533, and second end of current source 534 is as second end of controlled current source 533.First end of current source 535 is coupled to first end of current source 534.First end of switch 536 is coupled to second end of current source 535, and second end of switch 536 is coupled to second end of current source 534, and this switch 536 is the keying state of determine switch 536 in order to the signal of foundation operational amplifier control end 502.
The first input end of gain stage 550, second input end, the 3rd input end and four-input terminal are coupled to the drain electrode of transistor 511,512,531 and 532 respectively, and this gain stage 550 drives signal VOUT in order to produce according to its first input end, second input end, the 3rd input end and four-input terminal.
Fig. 5 A is for explaining key diagram of the present invention with the two relation of the output voltage of operational amplifier and luma data.And for the convenience that illustrates, this figure comes for example with the fixed type of drive of common voltage, so is not in order to limit the present invention.Please refer to Fig. 5 A.Specifically, if numerical data IN (being luma data) is 6 positions, and hypothesis interval 1 and interval 4 to correspond to luma data be 000000～011111 scope, and interval 2 and interval 3 to correspond to luma data be 100000～111111 scope.If numerical data IN is between 000000～011111, then when the output voltage of operational amplifier was positive polarity, output voltage can drop in interval 1, and when the output voltage of operational amplifier was negative polarity, output voltage then can drop in interval 4.By above design planning, in output voltage dropped on interval 1 or interval 4, this moment, the highest significant position of numerical data IN was 0, dropped in interval 2 or the interval 3 and work as output voltage, and then the highest significant position of numerical data IN is 1 at this moment.
Therefore, can utilize the highest significant position of numerical data IN to come the switch 516 of design drawing 5 and 536 keying state.Please according to the explanation needs and with reference to Fig. 5 and Fig. 5 A.When numerical data IN between 000000～011111, highest significant position is 0, this moment is because the output voltage of operational amplifier can drop on interval 1 or interval 4, cause the variation of output voltage bigger, so the stabilization time of voltage transition is longer, so the time can make switch 516 and 536 short circuits of Fig. 5, make current source 514,515,534 and 535 common supply of current, to improve the rotation rate of operational amplifier, shorten the stabilization time of voltage transition.
Otherwise, when numerical data IN between 100000～111111, highest significant position is 1, this moment is because the output voltage of operational amplifier can drop on interval 2 or interval 3, cause the variation of output voltage less, so the stabilization time of voltage transition is shorter, so the time can make Fig. 5 switch 516 and 536 the open circuit, make and have only current source 514 and 534 supply of current, to save energy.
Yet those skilled in the art should be known in and as shown in Figure 6, perhaps constitutes operational amplifier with input stage 530 and gain stage 550 separately if constitute operational amplifier with input stage 510 and gain stage 550 separately, as shown in Figure 7, all can implement the present invention.Wherein Fig. 6 and Fig. 7 are all the circuit diagram according to the operational amplifier of another embodiment of the present invention.
The size of current of utilizing the control operational amplifier is being described, so change the driving force that drives signal example after, below will enumerate two and utilize the building-out capacitor sizes that change operational amplifiers, and then change the example of the driving force that drives signal.And equally for example with the signal amplifier among Fig. 3 330.
The grid of transistor 811 is as the negative input end of operational amplifier.The grid of transistor 812 is as the positive input terminal of operational amplifier.First end of current source 815 is coupled to the source electrode of transistor 811 and 812, and second end of current source 815 is coupled to supply voltage VDD (i.e. first current potential).The drain electrode of transistor 813 couples the drain electrode of transistor 811 and the grid of transistor 813, and the source electrode of transistor 813 couples ground voltage GND (i.e. second current potential).The drain electrode of transistor 814 couples the drain electrode of transistor 812, and the grid of transistor 814 couples the grid of transistor 813, and the source electrode of transistor 814 also couples ground voltage GND, and wherein the signal of the drain electrode of transistor 814 is as the output of input stage 810.
Controlled electric capacity 823 comprises electric capacity 824,825 and switch 826.First end of electric capacity 824 and second end are respectively as first end and second end of controlled electric capacity 823.First end of electric capacity 825 is coupled to first end of electric capacity 824.
First end of switch 826 and second end are coupled to second end of electric capacity 825 and second end of electric capacity 824 respectively, determine whether conducting in order to the signal of foundation operational amplifier control end 801.
The control mode of switch 826 shown in Figure 8 is the same with the control mode of switch 516 shown in Figure 5 or 536, so do not repeat them here.Yet must be noted that because the rotation rate SR of this operational amplifier can be expressed as=I/ (C
1+ C
2), wherein I is the electric current of operational amplifier, and C
1With C
2Be expressed as electric capacity 824 and 825 respectively,,, just should make switch 826 open circuits, otherwise just should make switch 826 short circuits to accelerate the stabilization time of operational amplifier output voltage transition therefore if need to improve rotation rate.
Those skilled in the art can embodied in other input stage 810 and gain stage 820.For example, Fig. 8 A is the enforcement example that another kind of input stage 810 is described according to the present invention.Please refer to Fig. 8 A, input stage 810 comprises transistor 816,817,818,819 and current source 831.In this embodiment, transistor 816 and 817 is implemented with the P-type mos field effect transistor, and transistor 818 and 819 is then implemented with N type metal oxide semiconductor field effect transistor.
The grid of transistor 819 is as the positive input terminal of operational amplifier.The grid of transistor 818 is as the negative input end of operational amplifier.Two ends of current source 831 are coupled to the source electrode and first current potential (for example ground voltage GND) of transistor 818,819 separately.The drain electrode of transistor 816 couples the drain electrode of transistor 818 and the grid of transistor 816, and the source electrode of transistor 816 couples second current potential (for example supply voltage VDD).The drain electrode of transistor 817 couples the drain electrode of transistor 819, and the grid of transistor 817 couples the grid of transistor 816, and the source electrode of transistor 817 also couples supply voltage VDD.Wherein, the signal of the drain electrode of transistor 817 is as the output of input stage 810.
Fig. 8 B is the enforcement example that another kind of gain stage 820 is described according to the present invention.Please refer to Fig. 8 B, gain stage 820 comprises transistor 827, current source 833 and controlled electric capacity.Controlled electric capacity comprises electric capacity 828,829 and switch 832.The transistor 827 of this embodiment is implemented with the P-type mos field effect transistor.The grid of transistor 827 receives the output of input stage 810, and the source electrode of transistor 827 couples supply voltage VDD.Current source 833 is coupled between the drain electrode and ground voltage GND of transistor 827.First end of switch 832 and second end are coupled to second end of electric capacity 828 and second end of electric capacity 829 respectively, determine whether conducting in order to the signal of foundation operational amplifier control end 801.Above-mentioned Fig. 8 A is similar to Fig. 8 to the control mode of Fig. 8 B, so do not repeat them here.
Fig. 9 is the circuit diagram according to the operational amplifier of yet another embodiment of the invention.Please refer to Fig. 9.This operational amplifier comprises positive input terminal, negative input end, control end (shown in 901) and output terminal.Wherein the positive input terminal of operational amplifier receives analog signal VIN, the negative input end of operational amplifier is coupled to the output terminal of operational amplifier, at least one position among the control end 901 receiving digital data IN of operational amplifier, and the output of the output terminal of operational amplifier drives signal VOUT.
Operational amplifier shown in Figure 9 comprises input stage and gain stage equally, is respectively shown in 910 and 920.Input stage 910 comprises operational amplification circuit 911.The positive input terminal of operational amplification circuit 911 receives analog signal VIN, and the negative input end of operational amplification circuit 911 couples the output terminal of operational amplification circuit 911, and wherein the signal exported of operational amplification circuit 911 is the output of input stage 910.
Controlled electric capacity 922 comprises electric capacity 923,924 and switch 925.First end of electric capacity 923 and second end are respectively as first end and second end of controlled electric capacity 922.First end of electric capacity 924 is coupled to first end of electric capacity 923.First end of switch 925 and second end are coupled to second end of electric capacity 924 and second end of electric capacity 923 respectively, determine whether conducting in order to the signal of foundation operational amplifier control end 901.
The same with the described embodiment of Fig. 8, the control mode of switch 925 shown in Figure 9 also is identical with the control mode of switch 516 shown in Figure 5 or 536, so do not repeat them here.Yet must be noted that because the rotation rate SR of this operational amplifier can be expressed as=I/ (C equally
1+ C
2), wherein I is the electric current of operational amplifier, and C
1With C
2Be expressed as electric capacity 923 and 924 respectively,,, just should make switch 925 open circuits, otherwise just should make switch 925 short circuits to accelerate the stabilization time of operational amplifier output voltage transition therefore if need to improve rotation rate.
Though the foregoing description has fully demonstrated application mode of the present invention, yet in the application of high-order, the user except can be according to signal that the operational amplifier control end received and the keying of gauge tap, opening and closing time that more can gauge tap, as shown in figure 10.
Figure 10 is the calcspar according to the drive unit of another embodiment of the present invention.Please according to the explanation needs and with reference to Figure 10 and Fig. 4.Circuit shown in Figure 10 is for to add a control circuit 1010 with circuit shown in Figure 3.Latch cicuit 310 is in order to latch and to provide numerical data IN (as the step 410 of Fig. 4).D/A conversion circuit 320 receives the numerical data IN that is exported by latch cicuit 310, and numerical data IN is converted to analog signal VIN (as the step 420 of Fig. 4).Control circuit 1010 produces controlling signal CS in order at least one position among the foundation numerical data IN.Signal amplifier 330 is coupled to D/A conversion circuit 320 and control circuit 1010, in order to receive analog signal VIN and controlling signal CS, and dynamically determine a driving force (can regard as and utilize at least one position among the numerical data IN and dynamically determine driving force according to controlling signal CS, step 430 as Fig. 4), then produce driving signal VOUT (as the step 440 of Fig. 4) with the driving force that is determined according to analog signal IN again.
Specifically, utilize controlling signal CS to go to control switch 516 shown in Figure 5 and 536 exactly, or remove to control switch shown in Figure 6 516, also or remove to control the keying state and the opening and closing time of switch shown in Figure 7 536, certainly also can be used to control switch 826 shown in Figure 8, or the keying state and the opening and closing time of switch shown in Figure 9 925.Therefore, both can utilize controlling signal CS to control the time that the size of current of operational amplifier and electric current change, and also can utilize controlling signal CS to control the size of the building-out capacitor of operational amplifier, and time of changing of building-out capacitor value.
Below with one among the numerical data IN, highest significant position (MSB) for example illustrates the manner of execution of controlling signal CS with the two sequential of controlling signal CS, as shown in figure 11, sequential described in the right figure is not in order to limit the present invention just in order to do explanation slightly.Figure 11 is the sequential chart of controlling signal and highest significant position.Please refer to Figure 11.Show among Figure 11, when highest significant position (MSB) presents high logic (being noble potential), controlling signal CS is the of short duration time of activation one, just reverts back to state originally, so the switch of Be Controlled signal CS control also only can change the state of keying momently.
In other words, no matter the internal circuit of control circuit 1010 is how to design, Zong design preferably, exactly make controlling signal CS when the operational amplifier output voltage has large-scale variation, can control the keying of the switch in the operational amplifier, impel the electric current of operational amplifier or the value of building-out capacitor to change, and then the rotation rate of raising operational amplifier, increase driving force, then with being about to the switch reverse operating, to revert back to rotation rate originally, reach the saving of power consumption.
Below enumerate wherein three kinds of enforcement sample attitudes of control circuit 1010, Figure 12 is wherein a kind of.Figure 12 is the circuit diagram according to the control circuit of one embodiment of the invention.Please refer to Figure 12.The control circuit 1010 of this embodiment comprise counting circuit 1210 with door 1220.Counting circuit 1210 is in order to receive and counting clock signal CLK.When highest significant position (MSB) transition (for example being promoted to noble potential) of numerical data IN, counting circuit 1210 just begins counting clock signal CLK.This moment, the count results of counting circuit 1210 outputs was 1 for example.When counting reached a default value, counting circuit 1210 was with regard to the count results of output logic " 0 ".At least one position among count results of being exported in order to count pick up circuit 1210 with door 1220 and the numerical data IN produces controlling signal CS according to this.
Figure 13 is the circuit diagram according to the control circuit of another embodiment of the present invention.Please refer to Figure 13.The control circuit 1010 of this embodiment comprises delay circuit 1310 and XOR gate 1320.Delay circuit 1310 also postpones in order at least one position among the receiving digital data IN.XOR gate 1320 is coupled to delay circuit 1310, in order to the output of at least one position among the receiving digital data IN with delay circuit 1310, produces controlling signal CS according to this.
Figure 14 is the circuit diagram according to the control circuit of yet another embodiment of the invention.Please refer to Figure 14 and Figure 10.The control circuit 1010 of this embodiment comprises comparator circuit 1410 and change-over circuit 1420.Comparator circuit 1410 is coupled to the output terminal of signal amplifier 330, in order to receive and to compare a reference value RV and drive signal VOUT.Wherein the current potential of reference value RV can be set arbitrarily by the user, for example is set to drive 9/10ths of signal VOUT current potential.Change-over circuit 1420 is coupled to comparator circuit 1410, in order to the comparative result of foundation comparator circuit 1410 at least one position among the numerical data IN that is received is converted to controlling signal CS.
Though the various embodiments described above provide multiple possible enforcement kenel to the internal circuit in operational amplifier and the control circuit, yet those skilled in the art should know, each manufacturer is neither the same with the design of control circuit for operational amplifier, therefore dynamically change the value of the electric current or the building-out capacitor of operational amplifier so long as utilize at least one position among the numerical data IN, and then the dynamic driving force that drives signal that changes, or utilize at least one position among the numerical data IN and the generation controlling signal, and utilize controlling signal dynamically to change the value of the electric current or the building-out capacitor of operational amplifier, and then dynamically change the driving force that drives signal, just met spiritual place of the present invention.
In sum, the present invention differentiates the change scope of the output voltage of operational amplifier according to numerical data, when changing the scope overrate, just dynamically change the rotation rate of operational amplifier according at least one position in the numerical data, use the stabilization time of dynamic change operational amplifier conversion output voltage, and then dynamically change the driving force of the driving signal that operational amplifier exports.And the mode that changes the rotation rate of operational amplifier comprises the size of current of controlling operational amplifier, or changes the building-out capacitor size of operational amplifier, also or simultaneously changes said two devices.Therefore the present invention can dynamically adjust the driving force that drives signal along with the change scope of output voltage, uses the equilibrium point of asking for a best between the power consumption of stabilization time that shortens operational amplifier conversion output voltage and operational amplifier.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; those skilled in the art can do some changes and retouching under the premise without departing from the spirit and scope of the present invention, so protection scope of the present invention is as the criterion with claim of the present invention.
Claims (56)
1. drive unit comprises:
One D/A conversion circuit in order to receiving a numerical data, and is an analog signal with this digital data conversion; And
One signal amplifier is coupled to this D/A conversion circuit, and produce one in order to receive this analog signal and drive signal, and the driving force that dynamically changes this driving signal according at least one position in this numerical data.
2. drive unit as claimed in claim 1, wherein this signal amplifier comprises:
One operational amplifier, comprise positive input terminal, negative input end, control end and output terminal, wherein the positive input terminal of this operational amplifier receives this analog signal, the negative input end of this operational amplifier is coupled to the output terminal of this operational amplifier, the control end of this operational amplifier receives at least one position in this numerical data, and the output terminal of this operational amplifier is exported this driving signal.
3. drive unit as claimed in claim 2, wherein this operational amplifier also comprises:
One first input stage comprises:
One the first transistor, its grid is as the positive input terminal of this operational amplifier;
One transistor seconds, its grid is as the negative input end of this operational amplifier;
One first controlled current source, its first end is coupled to first source/drain electrode of this first transistor and this transistor seconds, and second end of this first controlled current source is coupled to one first current potential, and wherein the magnitude of current that provided is provided according to the signal of this operational amplifier control end this first controlled current source; And
One gain stage, its first input end and second input end are coupled to second source/drain electrode of this first transistor and second source/drain electrode of this transistor seconds respectively, in order to produce this driving signal according to the first input end of this gain stage and second input end.
4. drive unit as claimed in claim 3, wherein this first controlled current source comprises:
One first current source, its first end are as first end of this first controlled current source, and second end of this first current source is as second end of this first controlled current source;
One second current source, its first end is coupled to first end of this first current source; And
One first switch, its first end is coupled to second end of this second current source, and second end of this first switch is coupled to second end of this first current source, in order to determine the keying state of this first switch according to the signal of this operational amplifier control end.
5. drive unit as claimed in claim 3, wherein this first transistor and this transistor seconds respectively are a N type metal oxide semiconductor field effect transistor.
6. drive unit as claimed in claim 5, wherein this first current potential is a ground voltage.
7. drive unit as claimed in claim 3, wherein this first transistor and this transistor seconds respectively are a P-type mos field effect transistor.
8. drive unit as claimed in claim 7, wherein this first current potential is a supply voltage.
9. drive unit as claimed in claim 3, wherein this operational amplifier also comprises:
One second input stage comprises:
One the 3rd transistor, its grid is coupled to the grid of this first transistor, and the 3rd transistorized second source/drain electrode is coupled to the 3rd input end of this gain stage;
One the 4th transistor, its grid is coupled to the grid of this transistor seconds, and the 4th transistorized second source/drain electrode is coupled to the four-input terminal of this gain stage; And
One second controlled current source, its first end is coupled to the 4th transistorized first source/drain electrode of the 3rd transistor AND gate, and second end of this second controlled current source is coupled to one second current potential, and wherein the magnitude of current that provided is provided according to the signal of this operational amplifier control end this second controlled current source;
Wherein this gain stage is in order to produce this driving signal according to first input end, second input end, the 3rd input end and the four-input terminal of this gain stage.
10. drive unit as claimed in claim 9, wherein this second controlled current source comprises:
One the 3rd current source, its first end are as first end of this second controlled current source, and second end of the 3rd current source is as second end of this second controlled current source;
One the 4th current source, its first end is coupled to first end of the 3rd current source; And
One second switch, its first end is coupled to second end of the 4th current source, and second end of this second switch is coupled to second end of the 3rd current source, in order to determine the keying state of this second switch according to the signal of this operational amplifier control end.
11. drive unit as claimed in claim 10, wherein this first transistor and this transistor seconds respectively are a P-type mos field effect transistor, and the 3rd transistor AND gate the 4th transistor respectively is a N type metal oxide semiconductor field effect transistor.
12. drive unit as claimed in claim 11, wherein this first current potential is a supply voltage, and this second current potential is a ground voltage.
13. drive unit as claimed in claim 2, wherein this operational amplifier also comprises:
One input stage is coupled to the positive input terminal and the negative input end of this operational amplifier, in order to receive this analog signal; And
One gain stage is coupled to this input stage, in order to producing this driving signal according to the output of this input stage, and determines the driving force of this driving signal according to the control end of this operational amplifier.
14. drive unit as claimed in claim 13, wherein this input stage comprises:
One the first transistor, its grid is as the positive input terminal of this operational amplifier;
One transistor seconds, its grid is as the negative input end of this operational amplifier;
One first current source, its first end are coupled to first source/drain electrode of this first transistor and first source/drain electrode of this transistor seconds, and second end of this first current source is coupled to one first current potential;
One the 3rd transistor, the 3rd transistorized first source/drain electrode couple the second source/drain electrode and the 3rd transistorized grid of this first transistor, and the 3rd transistorized second source/drain electrode couples one second current potential; And
One the 4th transistor, the 4th transistorized first source/drain electrode couples second source/drain electrode of this transistor seconds, the 4th transistorized grid couples the 3rd transistorized grid, the 4th transistorized second source/drain electrode couples this second current potential, and wherein the signal of the 4th transistor first source/drain electrode is as the output of this input stage.
15. drive unit as claimed in claim 13, wherein this gain stage comprises:
One the 5th transistor, its grid receives the output of this input stage, and the 5th transistorized second source/drain electrode couples this second current potential;
One controlled electric capacity, its first end and second end are coupled to the 5th transistorized grid and first source/drain electrode respectively, and wherein the electric capacity that provided is provided according to the signal of this operational amplifier control end this controlled electric capacity; And
One second current source is coupled between the 5th transistorized first source/drain electrode and this first current potential;
Wherein the signal of the 5th transistor first source/drain electrode drives signal as this.
16. drive unit as claimed in claim 15, wherein this controlled electric capacity comprises:
One first electric capacity, its first end and second end is first end and second end of this controlled electric capacity of conduct respectively;
One second electric capacity, its first end is coupled to first end of this first electric capacity; And
One switch, its first end and second end are coupled to second end of this second electric capacity and second end of this first electric capacity respectively, in order to determine whether conducting according to the signal of this operational amplifier control end.
17. drive unit as claimed in claim 14, wherein this first transistor and this transistor seconds respectively are a P-type mos field effect transistor, and the 3rd transistor, the 4th transistor and the 5th transistor respectively are a N type metal oxide semiconductor field effect transistor.
18. drive unit as claimed in claim 17, wherein this first current potential and this second current potential are respectively supply voltage and ground voltage.
19. drive unit as claimed in claim 13, wherein this input stage comprises:
One operational amplification circuit, its positive input terminal receives this analog signal, and its negative input end couples the output terminal of this operational amplification circuit, and wherein the signal exported of this operational amplification circuit is the output of this input stage.
20. drive unit as claimed in claim 19, wherein this gain stage comprises:
One gain circuitry, its input end couples the output terminal of this operational amplification circuit; And
One controlled electric capacity, its first end and second end are coupled to the input end and the output terminal of this gain circuitry respectively, and wherein the electric capacity that provided is provided according to the signal of this operational amplifier control end this controlled electric capacity.
21. drive unit as claimed in claim 20, wherein this controlled electric capacity comprises:
One first electric capacity, its first end and second end is first end and second end of this controlled electric capacity of conduct respectively;
One second electric capacity, its first end is coupled to first end of this first electric capacity; And
One switch, its first end and second end are coupled to second end of this second electric capacity and second end of this first electric capacity respectively, in order to determine whether conducting according to the signal of this operational amplifier control end.
22. drive unit as claimed in claim 1 also comprises a latch cicuit, is used to latch and this numerical data is provided.
23. drive unit as claimed in claim 22 is used to drive a display panel.
24. drive unit as claimed in claim 23, wherein this display panel comprises display panels.
25. a drive unit comprises:
One D/A conversion circuit in order to receiving a numerical data, and is an analog signal with this digital data conversion;
One control circuit is in order to produce a controlling signal according at least one position in this numerical data; And
One signal amplifier is coupled to this D/A conversion circuit and this control circuit, and produce one in order to receive this analog signal and drive signal, and the driving force that dynamically changes this driving signal according to this controlling signal.
26. drive unit as claimed in claim 25, wherein this control circuit comprises:
One counting circuit in order to receive and to count a clock signal, is exported a count results when counting reaches a default value; And
One with door, at least one in order to receive in this count results and this numerical data, produce this controlling signal according to this.
27. drive unit as claimed in claim 25, wherein this control circuit comprises:
One delay circuit is in order to receive at least one position in this numerical data and to postpone; And
One XOR gate is coupled to this delay circuit, in order to receive the output of at least one position and this delay circuit in this numerical data, produces this controlling signal according to this.
28. drive unit as claimed in claim 25, wherein this control circuit comprises:
One comparator circuit is coupled to the output terminal of this signal amplifier, in order to receive and relatively a reference value and this driving signal; And
One change-over circuit is coupled to this comparator circuit, in order to the comparative result according to this comparator circuit at least one position in this numerical data that is received is converted to this controlling signal.
29. drive unit as claimed in claim 28, wherein the current potential of this reference value is about 9/10ths of this driving signal current potential.
30. drive unit as claimed in claim 25, wherein this signal amplifier comprises:
One operational amplifier, comprise positive input terminal, negative input end, control end and output terminal, wherein the positive input terminal of this operational amplifier receives this analog signal, the negative input end of this operational amplifier is coupled to the output terminal of this operational amplifier, the control end of this operational amplifier receives this controlling signal, and the output terminal of this operational amplifier is exported this driving signal.
31. drive unit as claimed in claim 30, wherein this operational amplifier also comprises:
One first input stage comprises:
One the first transistor, its grid is as the positive input terminal of this operational amplifier;
One transistor seconds, its grid is as the negative input end of this operational amplifier;
One first controlled current source, its first end is coupled to first source/drain electrode of this first transistor and this transistor seconds, and second end of this first controlled current source is coupled to one first current potential, and wherein this first controlled current source is according to this controlling signal that this operational amplifier control end received and the magnitude of current that provided is provided; And
One gain stage, its first input end and second input end are coupled to second source/drain electrode of this first transistor and second source/drain electrode of this transistor seconds respectively, in order to produce this driving signal according to the first input end of this gain stage and second input end.
32. drive unit as claimed in claim 31, wherein this first controlled current source comprises:
One first current source, its first end are as first end of this first controlled current source, and second end of this first current source is as second end of this first controlled current source;
One second current source, its first end is coupled to first end of this first current source; And
One first switch, its first end is coupled to second end of this second current source, and second end of this first switch is coupled to second end of this first current source, in order to determine the keying state of this first switch according to this controlling signal.
33. drive unit as claimed in claim 31, wherein this first transistor and this transistor seconds respectively are a N type metal oxide semiconductor field effect transistor.
34. drive unit as claimed in claim 33, wherein this first current potential is a ground voltage.
35. drive unit as claimed in claim 31, wherein this first transistor and this transistor seconds respectively are a P-type mos field effect transistor.
36. drive unit as claimed in claim 35, wherein this first current potential is a supply voltage.
37. drive unit as claimed in claim 31, wherein this operational amplifier also comprises:
One second input stage comprises:
One the 3rd transistor, its grid is coupled to the grid of this first transistor, and the 3rd transistorized second source/drain electrode is coupled to the 3rd input end of this gain stage;
One the 4th transistor, its grid is coupled to the grid of this transistor seconds, and the 4th transistorized second source/drain electrode is coupled to the four-input terminal of this gain stage; And
One second controlled current source, its first end is coupled to the 4th transistorized first source/drain electrode of the 3rd transistor AND gate, and second end of this second controlled current source is coupled to one second current potential, and wherein this second controlled current source is according to this controlling signal that this operational amplifier control end received and the magnitude of current that provided is provided;
Wherein this gain stage is in order to produce this driving signal according to first input end, second input end, the 3rd input end and the four-input terminal of this gain stage.
38. drive unit as claimed in claim 37, wherein this second controlled current source comprises:
One the 3rd current source, its first end are as first end of this second controlled current source, and second end of the 3rd current source is as second end of this second controlled current source;
One the 4th current source, its first end is coupled to first end of the 3rd current source; And
One second switch, its first end is coupled to second end of the 4th current source, and second end of this second switch is coupled to second end of the 3rd current source, in order to determine the keying state of this second switch according to this controlling signal.
39. drive unit as claimed in claim 38, wherein this first transistor and this transistor seconds respectively are a P-type mos field effect transistor, and the 3rd transistor AND gate the 4th transistor respectively is a N type metal oxide semiconductor field effect transistor.
40. drive unit as claimed in claim 39, wherein this first current potential is a supply voltage, and this second current potential is a ground voltage.
41. drive unit as claimed in claim 30, wherein this operational amplifier also comprises:
One input stage is coupled to the positive input terminal and the negative input end of this operational amplifier, in order to receive this analog signal; And
One gain stage is coupled to this input stage, in order to producing this driving signal according to the output of this input stage, and according to this controlling signal that this operational amplifier control end received and determine the driving force of this driving signal.
42. drive unit as claimed in claim 41, wherein this input stage comprises:
One the first transistor, its grid is as the positive input terminal of this operational amplifier;
One transistor seconds, its grid is as the negative input end of this operational amplifier;
One first current source, its first end are coupled to first source/drain electrode of this first transistor and first source/drain electrode of this transistor seconds, and second end of this first current source is coupled to one first current potential;
One the 3rd transistor, the 3rd transistorized first source/drain electrode couple the second source/drain electrode and the 3rd transistorized grid of this first transistor, and the 3rd transistorized second source/drain electrode couples one second current potential; And
One the 4th transistor, the 4th transistorized first source/drain electrode couples second source/drain electrode of this transistor seconds, the 4th transistorized grid couples the 3rd transistorized grid, the 4th transistorized second source/drain electrode couples this second current potential, and wherein the signal of the 4th transistor first source/drain electrode is as the output of this input stage.
43. drive unit as claimed in claim 41, wherein this gain stage comprises:
One the 5th transistor, its grid receives the output of this input stage, and the 5th transistorized second source/drain electrode couples this second current potential;
One controlled electric capacity, its first end and second end are coupled to the 5th transistorized grid and first source/drain electrode respectively, and wherein the electric capacity that provided is provided according to this controlling signal this controlled electric capacity; And
One second current source is coupled between the 5th transistorized first source/drain electrode and this first current potential;
Wherein the signal of the 5th transistor first source/drain electrode drives signal as this.
44. drive unit as claimed in claim 43, wherein this controlled electric capacity comprises:
One first electric capacity, its first end and second end is first end and second end of this controlled electric capacity of conduct respectively;
One second electric capacity, its first end is coupled to first end of this first electric capacity; And
One switch, its first end and second end are coupled to second end of this second electric capacity and second end of this first electric capacity respectively, in order to determine whether conducting according to this controlling signal.
45. drive unit as claimed in claim 42, wherein this first transistor and this transistor seconds respectively are a P-type mos field effect transistor, and the 3rd transistor, the 4th transistor and the 5th transistor respectively are a N type metal oxide semiconductor field effect transistor.
46. drive unit as claimed in claim 45, wherein this first current potential and this second current potential are respectively supply voltage and ground voltage.
47. drive unit as claimed in claim 41, wherein this input stage comprises:
One operational amplification circuit, its positive input terminal receives this analog signal, and its negative input end couples the output terminal of this operational amplification circuit, and wherein the signal exported of this operational amplification circuit is the output of this input stage.
48. drive unit as claimed in claim 47, wherein this gain stage comprises:
One gain circuitry, its input end couples the output terminal of this operational amplification circuit; And
One controlled electric capacity, its first end and second end are coupled to the input end and the output terminal of this gain circuitry respectively, and wherein the electric capacity that provided is provided according to this controlling signal this controlled electric capacity.
49. drive unit as claimed in claim 48, wherein this controlled electric capacity comprises:
One first electric capacity, its first end and second end is first end and second end of this controlled electric capacity of conduct respectively;
One second electric capacity, its first end is coupled to first end of this first electric capacity; And
One switch, its first end and second end are coupled to second end of this second electric capacity and second end of this first electric capacity respectively, in order to determine whether conducting according to this controlling signal.
50. drive unit as claimed in claim 25 also comprises a latch cicuit, is used to latch and this numerical data is provided.
51. drive unit as claimed in claim 50 is used to drive a display panel.
52. drive unit as claimed in claim 51, wherein this display panel comprises display panels.
53. the driving method of a drive unit comprises:
With a digital data conversion is an analog signal;
Dynamically determine a driving force according at least one position in this numerical data; And
Produce one with the driving force that is determined according to this analog signal and drive signal.
54. the driving method as drive unit as described in the claim 53 also comprises and latchs and provide this numerical data.
55. as the driving method of drive unit as described in the claim 53, wherein this driving signal is used to drive a display panel.
56. as the driving method of drive unit as described in the claim 55, wherein this display panel comprises display panels.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007100021737A CN101221714B (en) | 2007-01-12 | 2007-01-12 | Driving device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007100021737A CN101221714B (en) | 2007-01-12 | 2007-01-12 | Driving device |
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| CN2010101738397A Division CN101853626B (en) | 2007-01-12 | 2007-01-12 | Driving device |
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| CN101221714A true CN101221714A (en) | 2008-07-16 |
| CN101221714B CN101221714B (en) | 2010-09-29 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8599185B2 (en) | 2010-01-11 | 2013-12-03 | Novatek Microelectronics Corp. | Driving apparatus of display with precharge mechanism |
| CN102136262B (en) * | 2010-01-21 | 2014-07-23 | 联咏科技股份有限公司 | Display actuating device |
| WO2016008129A1 (en) * | 2014-07-17 | 2016-01-21 | Lattice Semiconductor Corporation | Frequency response compensation in digital to analog converter |
| CN112669747A (en) * | 2020-12-14 | 2021-04-16 | 北京奕斯伟计算技术有限公司 | Display processing method, display processing device and display panel |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3730886B2 (en) * | 2001-07-06 | 2006-01-05 | 日本電気株式会社 | Driving circuit and liquid crystal display device |
| JP2005017536A (en) * | 2003-06-24 | 2005-01-20 | Nec Yamagata Ltd | Display control circuit |
| CN1614679A (en) * | 2003-11-04 | 2005-05-11 | 联咏科技股份有限公司 | Driving circuit of displaying device and planar displaying device |
| CN1674078A (en) * | 2004-03-26 | 2005-09-28 | 联咏科技股份有限公司 | Source electrode driver and liquid crystal display device |
-
2007
- 2007-01-12 CN CN2007100021737A patent/CN101221714B/en active Active
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8599185B2 (en) | 2010-01-11 | 2013-12-03 | Novatek Microelectronics Corp. | Driving apparatus of display with precharge mechanism |
| CN102136262B (en) * | 2010-01-21 | 2014-07-23 | 联咏科技股份有限公司 | Display actuating device |
| WO2016008129A1 (en) * | 2014-07-17 | 2016-01-21 | Lattice Semiconductor Corporation | Frequency response compensation in digital to analog converter |
| US9319060B2 (en) | 2014-07-17 | 2016-04-19 | Lattice Semiconductor Corporation | Frequency response compensation in a digital to analog converter |
| CN112669747A (en) * | 2020-12-14 | 2021-04-16 | 北京奕斯伟计算技术有限公司 | Display processing method, display processing device and display panel |
| CN112669747B (en) * | 2020-12-14 | 2022-11-25 | 北京奕斯伟计算技术股份有限公司 | Display processing method, display processing device and display panel |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101221714B (en) | 2010-09-29 |
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