CN101213658A - Semiconductor device and semiconductor device assembly - Google Patents
Semiconductor device and semiconductor device assembly Download PDFInfo
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- CN101213658A CN101213658A CNA2006800239853A CN200680023985A CN101213658A CN 101213658 A CN101213658 A CN 101213658A CN A2006800239853 A CNA2006800239853 A CN A2006800239853A CN 200680023985 A CN200680023985 A CN 200680023985A CN 101213658 A CN101213658 A CN 101213658A
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- semiconductor device
- resin bed
- resin material
- side resin
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Disclosed are a semiconductor device wherein warping of a semiconductor chip due to a sudden temperature change can be prevented without increasing the thickness, and a semiconductor device assembly. The semiconductor device comprises a semiconductor chip, a front side resin layer formed on the front surface of the semiconductor chip by using a first resin material, and a back side resin layer formed on the back surface of the semiconductor chip by using a second resin material having a higher thermal expansion coefficient than the first resin material. The back side resin layer is formed thinner than the front side resin layer.
Description
Technical field
The present invention relates to semiconductor device and semiconductor device is cut into the semiconductor device aggregate of the wafer state before the monolithic.
Background technology
(wafer-level chip scale package: practicability Wafer Level-Chip Size Package) advances can to make the WL-CSP of semiconductor device miniaturization, multifunction and high performance recently.In WL-CSP, finish packaging process with wafer state after, utilize each chip size formation package dimension that cuts out.
That is, in the manufacturing process of the semiconductor device that adopts WL-CSP, after the formation polyimides reaches distribution again on the surface of the wafer that is manufactured with a plurality of semiconductor chips, be formed for face side resin bed with its sealing.And, after forming outside terminal on the face side resin bed, by along the line of cut of between each semiconductor chip, setting, cut off (cutting, dicing) passivating film and sealing resin, and cut off wafer, obtain having the WL-CSP semiconductor device of same package size with semiconductor chip.
Patent documentation 1: the Japan Patent spy opens the 2003-60119 communique
Patent documentation 2: the Japan Patent spy opens the 2004-336020 communique
The following formation of face side resin bed that is: behind the resin of coating as the material of face side resin bed on the surface of wafer, by once heating, is cooled off then, makes the lip-deep hardening of resin of this wafer.At this moment, the resin on the wafer surface produces thermal contraction.If produce this kind thermal contraction, then to the surperficial stress application of wafer, so that wafer produces is crooked, its result, the function element in the wafer sustains damage.
Be anti-bending of planting wafer here, consider on the back side of wafer, to form the rear side resin bed of same thickness with face side resin bed identical materials.Thus, when being used for cooling off after the heating of hardening of resin, the resin thermal contraction similarly on the surface of wafer and the back side is so it is crooked to prevent that wafer from producing.
But if form rear side resin bed with face side resin bed same thickness on the back side of wafer, the thickness that then cuts off the semiconductor device that this wafer obtains becomes big.
In addition, in this kind semiconductor device, be provided on the surface of rear side resin bed mark manufacturing company name or production code member etc.As the method for mark manufacturing company name etc. on the surface of side resin bed overleaf, for example consider laser processing.That is, consider, thereby form the groove of fine concavity, mint-mark manufacturing company name etc. on the surface of this rear side resin bed by surface irradiation laser to the rear side resin bed.
Yet, utilize laser processing overleaf on the surface of side resin bed under the situation of mint-mark manufacturing company name etc., if the rear side resin bed only forms with resin material,, there is the problem that is difficult to this manufacturing company's name of identification etc. then because the gloss on the surface of rear side resin bed.For addressing this problem, in the resin material that forms the rear side resin bed, sneak into filler, suppress the gloss on the surface of rear side resin bed with this.
But, if the filler of sneaking in the resin material is many, then overleaf on the surface of side resin bed, because that filler causes producing is bigger concavo-convex.Therefore, be difficult to discern mint-mark overleaf the concavity of the lip-deep expression manufacturing company name etc. of side resin bed groove with produce by filler concavo-convex, produce on the contrary and make the worse result of identification.
Summary of the invention
Therefore, first purpose of the present invention is for providing a kind of increase that does not cause thickness, and can prevent because the bending of the semiconductor chip that rapid variations in temperature causes.
Second purpose of the present invention is for providing a kind of increase that does not cause thickness, and can prevent because the bending of the semiconductor chip that rapid variations in temperature causes.
The 3rd purpose of the present invention is for realizing utilizing the laser processing raising of the identifications such as manufacturing company's name of mint-mark on the surface of side resin bed overleaf.
For the semiconductor device of the present invention that reaches described first purpose possesses: semiconductor chip; The face side resin bed, it uses first resin material, is formed on the surface of described semiconductor chip; Rear side resin bed, its use have second resin material of the thermal coefficient of expansion bigger than described first resin material, are formed on described semiconductor chip backside side, and thinner than described face side resin bed.
According to this structure, use first resin material to form the face side resin bed in the face side of semiconductor chip, use thermal coefficient of expansion second resin material bigger to form the thin rear side resin bed of specific surface side resin bed in its rear side than first resin material.Thin by the rear side resin bed being formed specific surface side resin bed, compare with the situation that rear side forms the resin bed with same thickness with face side at semiconductor chip, can reduce the thickness of semiconductor device.In addition, even rear side resin bed specific surface side resin bed is thin, material as the rear side resin bed, by using thermal coefficient of expansion than the second big resin material of first resin material that forms the face side resin bed, follow rapid variations in temperature, when face side resin bed and thermal expansion of rear side resin bed or thermal contraction, can make the stress that applies to semiconductor chip backside by the rear side resin bed and the stress that applies to the surface of semiconductor chip by the face side resin bed about equally.Thereby, can prevent that the thickness of semiconductor device from increasing, and can prevent because rapid variations in temperature causes semiconductor chip to produce bending.
Described second resin material is preferably the resin material with modulus of elasticity littler than described first resin material.Material as the rear side resin bed; because use second resin material with little modulus of elasticity; even, still can absorb the impact that is applied on this rear side resin bed fully, and can protect semiconductor chip fully so the rear side resin bed is become than thin type.
For example, if described first resin material is a bisphenol A type epoxy resin, described second resin is a polyimides, and then the thermal coefficient of expansion of second resin material is greater than the thermal coefficient of expansion of first resin material, and the modulus of elasticity of second resin material is less than the modulus of elasticity of first resin material.
In addition, described semiconductor device also can further possess outside terminal, and it disposes on the described face side resin bed, and when installation base plate is installed described semiconductor device, with the electrode butt on the described installation base plate.
Be used to reach the semiconductor device aggregate of the present invention of described second purpose, possess: the substrate that is manufactured with a plurality of semiconductor chips; The face side resin bed, it uses first resin material to be formed on the surface of described substrate; Rear side resin bed, its use have second resin material of the thermal coefficient of expansion bigger than described first resin material, are formed on the rear side of described substrate, and thinner than described face side resin bed.
According to this structure, use first resin material to form the face side resin bed in the face side of substrate, use second resin material to form the thin rear side resin bed of specific surface side resin bed in its rear side with thermal coefficient of expansion bigger than first resin material.Thin by the rear side resin bed being formed specific surface side resin bed, compare with the situation that rear side forms the resin bed with same thickness with face side at substrate, can reduce the thickness of semiconductor device.In addition, even rear side resin bed specific surface side resin bed is thin, material as the rear side resin bed, by using thermal coefficient of expansion than the second big resin material of first resin material that forms the face side resin bed, during cooling after the heating of the hardened material that is used to make face side resin bed and rear side resin bed, when these material thermal contractions, can make stress that stress that the back side to substrate applies and surface to substrate apply about equally.Thereby, can prevent that the thickness of the semiconductor device that obtains from the semiconductor device aggregate from increasing, and it is crooked to prevent that substrate from producing.
Described second resin material is preferably the resin material with modulus of elasticity littler than described first resin material.As the material of rear side resin bed, because use second resin material, so, still can absorb the impact that is applied on this rear side resin bed fully even the rear side resin bed is become than thin type with little modulus of elasticity.Therefore, under the state of semiconductor device aggregate, each semiconductor chip can be protected fully, in addition, the semiconductor device that obtains from the semiconductor device aggregate, semiconductor chip can be protected fully.
For example, if described first resin material is a bisphenol A type epoxy resin, described second resin is a polyimides, and then the thermal coefficient of expansion of second resin material is greater than the thermal coefficient of expansion of first resin material, and the modulus of elasticity of second resin material is less than the modulus of elasticity of first resin material.
For the semiconductor device of the present invention that reaches described the 3rd purpose possesses: semiconductor chip; The rear side resin bed, it uses resin material to be formed on described semiconductor chip backside side, and described resin material is to be mixed with more than the 5 weight % in resin and the resin of the filler in the scope below the 10 weight %.
According to this structure, the resin material that forms the rear side resin bed is mixed with more than the 5 weight % in resin and the filler in the scope below the 10 weight %.Thus, can suppress the gloss on the surface of rear side resin bed, can prevent from simultaneously to cause producing on the surface of side resin bed overleaf big concavo-convex by filler.Thus, can realize utilizing the laser processing raising of the identification of manufacturing company's name of mint-mark etc. on the surface of side resin bed overleaf.
Described semiconductor device also can further possess: the face side resin bed, and it is formed on the surface of described semiconductor chip; Outside terminal, it is arranged on the described face side resin bed, and when installation base plate is installed described semiconductor device, with the electrode butt on the described installation base plate.
Among the present invention above-mentioned, other purpose, feature and effect be with reference to accompanying drawing in addition, and be further clear and definite by following execution mode.
Description of drawings
Fig. 1 is an end view of diagrammatically representing the structure of the described semiconductor device of first execution mode of the present invention.
Fig. 2 is a stereogram of gathering the face side observation of the semiconductor device aggregate that forms from semiconductor device shown in Figure 1.
Fig. 3 is the graphic end view of semiconductor device aggregate shown in Figure 2.
Fig. 4 is an end view of diagrammatically representing the structure of the described semiconductor device of second execution mode of the present invention.
Fig. 5 is the stereogram of semiconductor device shown in Figure 4.
Fig. 6 is the method for explanation mark manufacturing company name or product serial number etc. on the surface of rear side resin bed shown in Figure 4, the end view that the surface of amplification rear side resin bed is represented.
Embodiment
Below, explain embodiments of the present invention with reference to accompanying drawing.
Fig. 1 is an end view of diagrammatically representing the structure of the described semiconductor device of first execution mode of the present invention.
This semiconductor device 1 is for adopting WL-CSP (wafer-level chip scale package: semiconductor device WaferLevel-Chip Size Package).Semiconductor device 1 possesses semiconductor chip 10.
Face side resin bed 11 has the thickness of about 40～100 μ m.This face side resin bed 11 for example uses modulus of elasticity to be 16GPa; and the thermal coefficient of expansion under the temperature that is lower than vitrification point (135 ℃) is 2.5～8.5ppm/ ℃, and the thermal coefficient of expansion under the temperature more than the vitrification point is that 19.0～44.0ppm/ ℃ bisphenol A type epoxy resin forms.
On the other hand, on the 10b of the back side of semiconductor chip 10, use to have the big thermal coefficient of expansion of bisphenol A type epoxy resin that likens to the material of face side resin bed 11, and the resin material that has than its little modulus of elasticity forms rear side resin bed 12.As resin material, be 60.0ppm/ ℃ polyimides but illustration such as modulus of elasticity are 2.5GPa, thermal coefficient of expansion with this kind thermal coefficient of expansion and modulus of elasticity.Rear side resin bed 12 has the thickness of about 10～30 μ m, forms specific surface side resin bed 11 and approaches.
In addition, face side resin bed 11 is provided with and is used for a plurality of outside terminals 13 of being connected with installation base plate 2.A plurality of outside terminals 13 for example are arranged in clathrate at the central portion of face side resin bed 11 sides.Each outside terminal 13 forms spherical, and is electrically connected with semiconductor chip 10 that semiconductor device 1 possesses.In this semiconductor device 1, each outside terminal 13 by with installation base plate 2 on each piston ring land (land) butt, reach installation to installation base plate 2.
So, thin by rear side resin bed 12 being formed specific surface side resin bed 11, compare with the situation that back side 10b side forms the resin bed with same thickness with surperficial 10a side at semiconductor chip 10, can reduce its thickness.In addition, even rear side resin bed 12 specific surface side resin beds 11 are thin, material as rear side resin bed 12, by using thermal coefficient of expansion than the big resin material of resin material that forms face side resin bed 11, when face side resin bed 11 and 12 thermal expansions of rear side resin bed or thermal contraction, can make the stress that applies to the back side of semiconductor chip 10 by rear side resin bed 12 and the stress that applies to the surface of semiconductor chip 10 by face side resin bed 11 about equally.Thereby, can prevent that the thickness of semiconductor device 1 from increasing, and can prevent because rapid variations in temperature causes semiconductor chip 10 to produce bending.
In addition; as the material of rear side resin bed 12, because use polyimides, so even rear side resin bed 12 forms than unfertile land with smaller modulus of elasticity; still can absorb the impact that this rear side resin bed 12 is applied fully, and the semiconductor chip 10 that can adequately protect.
Fig. 2 is a stereogram of gathering the surperficial 30a side observation of the semiconductor device aggregate 3 that forms from semiconductor device shown in Figure 11, and Fig. 3 is its graphic end view.
The line of cut L that semiconductor device 1 utilizes not shown edges such as cutting blade to be set in 10 of each semiconductor chips cuts off the semiconductor device aggregate 3 that 1 set of a plurality of semiconductor devices forms, and is cut into the monolithic that respectively comprises a semiconductor chip 10 and gets.
Face side resin bed 11 and the 12 following formation of rear side resin bed.That is, when forming face side resin bed 11 and rear side resin bed 12, coating is as the bisphenol A type epoxy resin of the material of face side resin bed 11 on the surperficial 30a of substrate 30.In addition, on the 30b of the back side of substrate 30 coating as the polyimides of the material of rear side resin bed 12.At this moment, than the bisphenol A type epoxy resin unfertile land coating polyimide on the surperficial 30a that is coated in substrate 30.Then, these resins are cooled to normal temperature (about 25 ℃) after being heated to about 170 ℃～180 ℃ by substrate 30.Thus, the sclerosis of polyimides on the back side 30b of bisphenol A type epoxy resin on the surperficial 30a of substrate 30 and substrate 30, thus on the surperficial 30a of substrate 30 and back side 30b, form face side resin bed 11 and rear side resin bed 12 respectively.
During cooling after the heating that is used to form face side resin bed 11 and rear side resin bed 12, be coated in the bisphenol A type epoxy resin generation thermal contraction on the surperficial 30a of substrate 30, in addition, be coated in the polyimides thermal contraction on the back side 30b of substrate 30.On the 30b of the back side of substrate 30, polyimide coating must be thinner than the bisphenol A type epoxy resin on the surperficial 30a of substrate 30, but because polyimides has the thermal coefficient of expansion bigger than bisphenol A type epoxy resin, thus polyimides to the back side 30b of substrate 30 apply with the surperficial 30a that acts on substrate 30 by bisphenol A type epoxy resin on the stress of the roughly the same size of stress.Therefore, substrate 30 does not produce the anxiety of bending.
In addition, by being formed, rear side resin bed 12 is thinner than face side resin bed 11, with form resin bed in the surperficial 30a side of substrate 30 and back side 30b side and compare with same thickness, can reduce by the thickness that cuts off the semiconductor device 1 that semiconductor aggregate 3 obtains.
And then, as the material of rear side resin bed 12,,, still can absorb the impact that is applied on the rear side resin bed 12 fully even form rear side resin bed 12 than unfertile land because use resin material with little modulus of elasticity.Therefore, under the state of semiconductor aggregate 3, each semiconductor chip 10 that can adequately protect, in addition, in the semiconductor device 1 that is obtained by semiconductor aggregate 3, semiconductor chip 10 can adequately protect.
And, as first resin material, the illustration bisphenol A type epoxy resin, as the second resin material illustration polyimides, but as long as the thermal coefficient of expansion of second resin material is greater than the thermal coefficient of expansion of first resin material, and the modulus of elasticity of second resin material then as first resin material and second resin material, can use illustrative material material in addition less than the modulus of elasticity of first resin material.
Fig. 4 diagrammatically represents the end view of the structure of the described semiconductor device of second execution mode of the present invention.In addition, Fig. 5 is the stereogram of this semiconductor device.
This semiconductor device 101 is for adopting WL-CSP (wafer-level chip scale package: semiconductor device WaferLevel-Chip Size Package).Semiconductor device 101 possesses semiconductor chip 110.
In addition, on face side resin bed 111, be provided with and be used for a plurality of outside terminals 115 of being connected with installation base plate 102.A plurality of outside terminals 115 for example are arranged in clathrate at the central portion of face side resin bed 111 sides.Each outside terminal 115 forms spherical, and is electrically connected with semiconductor chip 110 that semiconductor device 101 possesses.In this semiconductor device 101, each outside terminal 115 by with installation base plate 102 on each piston ring land (land) butt, reach installation to installation base plate 102.
On the other hand, on the 110b of the back side of semiconductor chip 110, be formed for protecting this back side 110b, and prevent the rear side resin bed 112 of the bending of semiconductor chip 110.This rear side resin bed 112 for example has the thickness of 10～20 μ m.
The resin material that forms rear side resin bed 112 uses and is mixed with more than the 5 weight % in resins such as epoxy resin 116 and the resin material of the filler 113 in the scope below the 10 weight %.Filler 113 for example is the shot-like particle of silicon dioxide, and its particle diameter forms average 2 μ m, below the maximum 10 μ m.
Overleaf on the surperficial 112a of side resin bed 112 as shown in Figure 5, mark manufacturing company name or product serial number etc.
Fig. 6 is the method for explanation mark manufacturing company name etc. on the surperficial 112a of rear side resin bed 112 shown in Figure 4, amplifies the end view that the surperficial 112a of rear side resin bed 112 represents.
Manufacturing company's name etc. is utilized the laser processing upward mint-mark of surperficial 112a of side resin bed 112 overleaf.That is,,, form the groove 114 of fine concavity by the resin of pruning from irradiated part to the surperficial 112a irradiating laser of rear side resin bed 112, thus mint-mark manufacturing company name etc.
As this semiconductor device 101, if 112 uses of rear side resin bed are mixed with more than the 5 weight % in resin 116 and the resin material of the filler 113 in the scope below the 10 weight % forms, the gloss that can suppress the surperficial 112a of rear side resin bed 112 can prevent from simultaneously to be caused the surperficial 112a of side resin bed 112 overleaf to go up producing by filler 113 big concavo-convex.Thus, the groove 114 of the concavity of the irradiation formation that utilizes laser L can be easily discerned, and the raising of identification can be realized.
And, as semiconductor device 101, illustration adopt the semiconductor device of WL-CSP, but the present invention has been not limited to adopt the semiconductor device of WL-CSP, can be widely used on semiconductor chip backside, having the rear side resin bed, and on this rear side resin bed the semiconductor device of mark manufacturing company or product serial number.
In addition, implement various design alterations in the scope of the item that can put down in writing within the scope of the claims.That is, described execution mode only is used to the concrete example that makes technology contents of the present invention clear and definite, and the present invention is not limited ground by these concrete examples and explains that aim of the present invention and scope are only limited by the scope of claim.
The patent that the application and on June 29th, 2005 propose to the Japan patent Room is special be willing to 2005-189571 number and special be willing to 2005-189572 number corresponding, the whole of these applications openly are incorporated into herein by reference.
Claims (9)
1. semiconductor device is characterized in that possessing:
Semiconductor chip;
The face side resin bed, it uses first resin material, is formed on the surface of described semiconductor chip;
Rear side resin bed, its use have second resin material of the thermal coefficient of expansion bigger than described first resin material, are formed on described semiconductor chip backside side, and thinner than described face side resin bed.
2. semiconductor device according to claim 1 is characterized in that,
Described second resin material has than the little modulus of elasticity of described first resin material.
3. semiconductor device according to claim 2 is characterized in that,
Described first resin material is a bisphenol A type epoxy resin,
Described second resin material is a polyimide amide.
4. according to each described semiconductor device in the claim 1～3, it is characterized in that,
Further possess outside terminal, it is configured on the described face side resin bed, and when installation base plate is installed described semiconductor device, with the electrode butt on the described installation base plate.
5. semiconductor device aggregate is characterized in that possessing:
Be manufactured with the substrate of a plurality of semiconductor chips;
The face side resin bed, it uses first resin material to be formed on the surface of described substrate;
Rear side resin bed, its use have second resin material of the thermal coefficient of expansion bigger than described first resin material, are formed on the rear side of described substrate, and thinner than described face side resin bed.
6. semiconductor device aggregate according to claim 5 is characterized in that,
Described second resin material has than the little modulus of elasticity of described first resin material.
7. semiconductor device aggregate according to claim 6 is characterized in that,
Described first resin material is a bisphenol A type epoxy resin,
Described second resin material is a polyimide amide.
8. semiconductor device is characterized in that possessing:
Semiconductor chip;
The rear side resin bed, it uses resin material to be formed on described semiconductor chip backside side,
Described resin material is to be mixed with more than the 5 weight % in resin and the resin of the filler in the scope below the 10 weight %.
9. semiconductor device according to claim 8 is characterized in that further possessing:
The face side resin bed, it is formed on the surface of described semiconductor chip;
Outside terminal, it is arranged on the described face side resin bed, and when installation base plate is installed described semiconductor device, with the electrode butt on the described installation base plate.
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP189571/2005 | 2005-06-29 | ||
| JP189572/2005 | 2005-06-29 | ||
| JP2005189572A JP2007012756A (en) | 2005-06-29 | 2005-06-29 | Semiconductor device |
| JP2005189571A JP4939002B2 (en) | 2005-06-29 | 2005-06-29 | Semiconductor device and semiconductor device assembly |
| PCT/JP2006/312882 WO2007001018A1 (en) | 2005-06-29 | 2006-06-28 | Semiconductor device and semiconductor device assembly |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010101666401A Division CN101847611B (en) | 2005-06-29 | 2006-06-28 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101213658A true CN101213658A (en) | 2008-07-02 |
| CN101213658B CN101213658B (en) | 2010-05-26 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2006800239853A Active CN101213658B (en) | 2005-06-29 | 2006-06-28 | Semiconductor device and semiconductor device assembly |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP4939002B2 (en) |
| CN (1) | CN101213658B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108140622A (en) * | 2015-11-04 | 2018-06-08 | 琳得科株式会社 | Thermosetting resin film and the 2nd protective film form external member, the forming method of the 1st protective film of thermosetting resin film, the 1st protective film formation piece and semiconductor wafer of film |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5509542B2 (en) * | 2008-05-21 | 2014-06-04 | 日立化成株式会社 | Wiring member connection structure and wiring member connection method |
| CN205282460U (en) * | 2013-05-31 | 2016-06-01 | 株式会社村田制作所 | Semiconductor device and installation structure |
| TWI750140B (en) * | 2015-11-04 | 2021-12-21 | 日商琳得科股份有限公司 | Wafer protecting method |
| JP7280789B2 (en) * | 2019-09-24 | 2023-05-24 | 株式会社東芝 | power module |
| JP7374039B2 (en) | 2020-03-30 | 2023-11-06 | 三井化学東セロ株式会社 | Method of manufacturing electronic devices |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1190837C (en) * | 1999-02-15 | 2005-02-23 | 株式会社日立制作所 | Semiconductor device, method of manufacture thereof, electronic device |
| JP2002270720A (en) * | 2001-03-09 | 2002-09-20 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
| JP2004063551A (en) * | 2002-07-25 | 2004-02-26 | Hitachi Chem Co Ltd | Semiconductor element surface protecting film and semiconductor element unit |
| JP3870876B2 (en) * | 2002-08-27 | 2007-01-24 | 松下電工株式会社 | Manufacturing method of semiconductor device |
-
2005
- 2005-06-29 JP JP2005189571A patent/JP4939002B2/en active Active
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108140622A (en) * | 2015-11-04 | 2018-06-08 | 琳得科株式会社 | Thermosetting resin film and the 2nd protective film form external member, the forming method of the 1st protective film of thermosetting resin film, the 1st protective film formation piece and semiconductor wafer of film |
| TWI638845B (en) | 2015-11-04 | 2018-10-21 | 日商琳得科股份有限公司 | Kit for heat-curable resin film and second protective film forming film, heat-curable resin film, sheet for forming first protective film, and method of forming first protective film for conductive wafer |
| CN108140622B (en) * | 2015-11-04 | 2021-03-05 | 琳得科株式会社 | Kit of thermosetting resin film and 2 nd protective film forming film, and method for forming same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101213658B (en) | 2010-05-26 |
| JP2007012755A (en) | 2007-01-18 |
| JP4939002B2 (en) | 2012-05-23 |
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