CN101212237B - Method and device for implement primary/secondary verdicting - Google Patents
Method and device for implement primary/secondary verdicting Download PDFInfo
- Publication number
- CN101212237B CN101212237B CN2006101697009A CN200610169700A CN101212237B CN 101212237 B CN101212237 B CN 101212237B CN 2006101697009 A CN2006101697009 A CN 2006101697009A CN 200610169700 A CN200610169700 A CN 200610169700A CN 101212237 B CN101212237 B CN 101212237B
- Authority
- CN
- China
- Prior art keywords
- master control
- signal
- control board
- control borad
- main control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Hardware Redundancy (AREA)
Abstract
The invention relates to a method and a device thereof for realizing judgment of an active unit and a standby unit, which comprises a main control layer, in which an active main control board and a standby main control board respectively apply connection between the main control board and a module layer to send a state signal and a differential signal to the module layer, and the module layer which is used for receiving the state signal from the main control layer, determining the active main control board in the active state according to the state signal and receiving the differential signal sent by the active main control board. Therefore, the realization of the invention can effectively solve the judgment problem of the active unit and the standby unit. At the same time, the invention can reduce occurrences of failures, improve the system reliability and reduce the maintenance cost of the device.
Description
Technical field
The present invention relates to communication technical field, relate in particular to a kind of method and device of realizing active and standby machine ruling.
Background technology
In some communication systems,, adopt main-standby mode usually in order to guarantee the reliability of system.Adopt this mode in system, to be provided with two master control borads, and a master control borad is in mainly use state, another piece master control borad is in stand-by state, when finding to be in the master control borad of leading with state unusual condition is arranged, can enable slave control board automatically, in order to avoid systemic breakdown.
The system of above-mentioned employing main-standby mode generally is provided with two aspects, i.e. master control layer and module layer in described system.Described master control borad is positioned at the master control layer, and module layer can be provided with various modules or be interface board.When master control borad need be communicated by letter with each intermodule, owing to there is the active and standby state of using of master control borad, so module need be selected master control borad with state information according to the active and standby of master control borad, and communicate, i.e. the problem of the active and standby machine of ruling how with being in main master control borad with state.
About the solution of the active and standby machine problem of ruling, as shown in Figure 1, the system among the figure has two aspects, i.e. master control layer and module layer in the prior art.In the master control layer, when master control borad A and B active and standby time spent each other, the master control layer of two master control borads and the signal of communication line of intermodule all pass through and output to backboard after this plate drives, and at backboard altogether, link module again and communicate with it.Like this, the master control layer has only one group of holding wire to link each module, and each module does not need to know which piece master control borad is in the main state of using yet.
This shows that under the scheme that prior art provides, owing to be connected with the cross complaint holding wire between two master control borads, the active and standby of master control borad is that logic control by the cross complaint signal between two master control borads and this plate determines with state.Also just because of these characteristics, when a master control borad occurring when unusual, tend to have influence on the problem of the output of another piece master control borad, and then the communicating by letter of influence and module layer.
Summary of the invention
The purpose of this invention is to provide a kind of method and device of realizing active and standby machine ruling, can realize and the communicating by letter of different master control borads, and, can not have influence on the output of another piece master control borad when a master control borad occurring when unusual by this method.
The objective of the invention is to be achieved through the following technical solutions:
The invention provides a kind of method that realizes active and standby machine ruling, comprising:
At the master control layer, main control board and slave control board utilize separately its with module layer between be connected to module layer transmit status signal and differential signal;
At module layer, receive the status signal that the master control layer is sent, and determine to be in main main control board, and receive the differential signal that described main control board sends with state according to described status signal.
Alternatively, described differential signal comprises differential clock signal, difference synchronizing signal and difference telephone path signal.
Alternatively, described status signal comprises logical signal 0 and logical signal 1, is used to distinguish the differential signal that main control board and slave control board are sent.
Alternatively, the step of the differential signal that sends of this main control board of described reception comprises:
The status signal of sending when first master control borad that receives the master control layer is the logical signal of main control board correspondence, when the status signal that second master control borad sends is the logical signal of slave control board correspondence, determine that then this first master control borad is a main control board, and receive the differential signal that this first master control borad sends, perhaps, the status signal of sending when second master control borad that receives the master control layer is the logical signal of main control board correspondence, when the status signal that first master control borad sends is the logical signal of slave control board correspondence, determine that then this second master control borad is a main control board, and receive the differential signal that this second master control borad sends.
Alternatively, the step of the differential signal that sends of this main control board of described reception also comprises:
When the status signal of sending when first master control borad that receives the master control layer and second master control borad is the logical signal of main control board correspondence, determine that then this first master control borad is a main control board, and receive the differential signal that this first master control borad sends, perhaps, when the status signal of sending when first master control borad that receives the master control layer and second master control borad is the logical signal of slave control board correspondence, determine that then this second master control borad is a main control board, and receive the differential signal that this second master control borad sends.
The present invention also provides a kind of device of realizing active and standby machine ruling, comprises master control borad and module, and described module includes: driver element, logic judgment unit and differential driving unit, wherein,
Described driver element is used to receive the main control board of master control borad and the status signal that slave control board sends, and offers logic judgment unit;
Described logic judgment unit is used for selecting to be in the main differential signal that sends with the main control board of state according to described status signal control differential driving unit;
Described differential driving unit is used for the differential signal that main control board definite and reception master control layer sends under the control of logic judgment unit triggers.
Alternatively, described status signal comprises: the logical signal of the logical signal of main control board correspondence and slave control board correspondence, and described logic judgment unit comprises:
When two master control borads of master control layer are in active and standbyly when using state respectively,, select to determine to be in main main control board with state then according to its logical signal that sends.
Alternatively, described logic judgment unit also comprises:
When two master control borads of master control layer all are in mainly when use state, select then to determine that first master control borad wherein is to be in the main main control board of using state;
When two master control borads of master control layer all are in stand-by state, select then to determine that second master control borad wherein is to be in main main control board with state.
Alternatively, described driver element comprises driver, and described logic judgment unit comprises logic chip, and described differential driving unit comprises differential driver.
As seen from the above technical solution provided by the invention, the present invention can select the signal of different master control borads by the state of differentiating two master control borads at module layer, and then the communicating by letter of realization and different master control borad.Simultaneously, the active and standby machine ruling by the present invention realizes can reduce fault, improves system reliability, and has reduced maintenance cost.
Description of drawings
Fig. 1 is a method schematic diagram of realizing active and standby machine ruling in the prior art;
Fig. 2 is for realizing the apparatus structure schematic diagram of active and standby machine ruling among the present invention;
Fig. 3 is a method schematic diagram of realizing active and standby machine ruling in the embodiment of the invention;
Fig. 4 is a schematic diagram of realizing the ruling of activestandby state logic in the embodiment of the invention;
Fig. 5 is the device circuit figure that realizes active and standby machine ruling in the embodiment of the invention.
Embodiment
The invention provides a kind of method that realizes active and standby machine ruling, specifically comprise: at the master control layer, main control board and slave control board utilize signal bus between itself and the module layer to module layer transmit status signal and differential signal separately; At module layer, receive the status signal that the master control layer is sent, and determine to be in main main control board, and receive the differential signal that described main control board sends with state according to described status signal.Described differential signal comprises differential clock signal, difference synchronizing signal and difference telephone path signal.Described status signal can comprise logical signal 0 and logical signal 1, is used to distinguish the differential signal that main control board and slave control board are sent.
Under the normal condition, first master control borad and second master control borad are in the active and standby state of using, at this moment, in order to realize the ruling of active and standby machine, at first the status signal from first master control borad and second master control borad is carried out logic determines, and be the differential signal that main control board sends according to the judged result confirmation of receipt, its specific implementation step comprises:
The status signal of sending when first master control borad that receives the master control layer, and be designated as the logical signal of main control board correspondence, when the status signal that second master control borad sends is designated as the logical signal of slave control board correspondence, determine that then this first master control borad is a main control board, and generate corresponding enable signal, even the enable signal of the first master control borad correspondence is 1, facilitate the use the control of described enable signal and receive the differential signal that this first master control borad sends and use for module communication, perhaps, the status signal of sending when second master control borad that receives the master control layer is designated as the logical signal of main control board correspondence, when the status signal that first master control borad sends is designated as the logical signal of slave control board correspondence, determine that then this second master control borad is a main control board, and generate corresponding enable signal, even the enable signal of the second master control borad correspondence is 1, facilitates the use the control of described enable signal and receive the differential signal that this second master control borad sends and use for module communication.
When first master control borad and second master control borad are in abnormality, when promptly first master control borad and second master control borad are in the master simultaneously with state or stand-by state, in order not influence the output of master control borad, also must carry out the ruling of active and standby machine, therefore, also need to carry out logic determines to the status signal from first master control borad and second master control borad, and be the differential signal that main control board sends according to the judged result confirmation of receipt, its specific implementation step comprises:
When the status signal of sending when first master control borad that receives the master control layer and second master control borad is the logical signal of main control board correspondence, this logical signal is carried out logic determines, determine that this first master control borad is a main control board, and generate corresponding enable signal, even the enable signal of the first master control borad correspondence is 1, facilitate the use the control of described enable signal and receive the differential signal that this first master control borad sends and use for module communication, perhaps, when the status signal of sending when first master control borad that receives the master control layer and second master control borad is the logical signal of slave control board correspondence, this logical signal is carried out logic determines, determine that this second master control borad is a main control board, and generate corresponding enable signal, even the enable signal of the second master control borad correspondence is 1, facilitates the use the control of described enable signal and receive the differential signal that this second master control borad sends and use for module communication.
For can clearer understanding technical scheme of the present invention, comprise that with the master control layer master control borad A and master control borad B are example below, the logic ruling process of corresponding status signal is described in detail.
(1) to represent that master control borad is in main when using state when described status signal, and logical signal is 0, and described 0 presentation logic is low; When being in stand-by state with master control borad, logical signal is 1, described 1 presentation logic height.The logic determines processing procedure of this moment comprises:
1, if the status signal that the master control borad A that module layer receives sends is that logical signal is 0, the status signal that master control borad B sends is that logical signal is 1, then judge that at module layer master control borad A is in main master control borad with state, and generate corresponding enable signal (even the enable signal of master control borad A correspondence is 1), facilitate the use described enable signal control and receive the differential signal that master control borad A sends; Simultaneously, the enable signal that makes master control borad B correspondence is 0, and expression master control borad B is a stand-by state, it is not carried out differential signal and receives operation; Perhaps,
2, if the status signal that the master control borad A that module layer receives sends is that logical signal is 1, the status signal that master control borad B sends is that logical signal is 0, then judge that at module layer master control borad B is in main master control borad with state, and generate corresponding enable signal (even the enable signal of master control borad B correspondence is 1), facilitate the use described enable signal control and receive the differential signal that master control borad B sends; Simultaneously, the enable signal that makes master control borad A correspondence is 0, and expression master control borad A is a stand-by state, it is not carried out differential signal and receives operation; Perhaps,
3, if the status signal that the master control borad A that module layer receives sends is that logical signal is 0, the status signal that master control borad B sends is that logical signal is 0, then judge that at module layer master control borad A is in main master control borad with state, and generate corresponding enable signal (even the enable signal of master control borad A correspondence is 1), facilitate the use described enable signal control and receive the differential signal that master control borad A sends; Simultaneously, the enable signal that makes master control borad B correspondence is 0, and expression master control borad B is a stand-by state, it is not carried out differential signal and receives operation; Perhaps,
4, if the status signal that the master control borad A that module layer receives sends is that logical signal is 1, the status signal that master control borad B sends is that logical signal is 1, then judge that at module layer master control borad B is in main master control borad with state, and generate corresponding enable signal (even the enable signal of master control borad B correspondence is 1), facilitate the use described enable signal control and receive the differential signal that master control borad B sends; Simultaneously, the enable signal that makes master control borad A correspondence is 0, and expression master control borad A is a stand-by state, it is not carried out differential signal and receives operation.
Above-mentioned deterministic process 3 or 4 is the deterministic processes when unusual condition appears in master control borad, the deterministic process when promptly master control borad A and master control borad B are in the master with state or stand-by state.
(2) to represent that master control borad is in main when using state when described status signal, and logical signal is 1, and described 1 presentation logic is low; When being in stand-by state with master control borad B, logical signal is 0, described 0 presentation logic height, and the logic determines processing procedure of this moment comprises:
1, if the status signal that the master control borad A that module layer receives sends is that logical signal is 1, the status signal that master control borad B sends is that logical signal is 0, then judge that at module layer master control borad A is in main master control borad with state, and generate corresponding enable signal (even the enable signal of master control borad A correspondence is 1), facilitate the use described enable signal control and receive the differential signal that master control borad A sends; Simultaneously, the enable signal that makes master control borad B correspondence is 0, and expression master control borad B is a stand-by state, it is not carried out differential signal and receives operation; Perhaps,
2, if the status signal that the master control borad A that module layer receives sends is that logical signal is 0, the status signal that master control borad B sends is that logical signal is 1, then judge that at module layer master control borad B is in main master control borad with state, and generate corresponding enable signal (even the enable signal of master control borad B correspondence is 1), facilitate the use described enable signal control and receive the differential signal that master control borad B sends; Simultaneously, the enable signal that makes master control borad A correspondence is 0, and expression master control borad A is a stand-by state, it is not carried out differential signal and receives operation; Perhaps,
3, if the status signal that the master control borad A that module layer receives sends is that logical signal is 1, the status signal that master control borad B sends is that logical signal is 1, then judge that at module layer master control borad A is in main master control borad with state, and generate corresponding enable signal (even the enable signal of master control borad A correspondence is 1), facilitate the use described enable signal control and receive the differential signal that master control borad A sends; Simultaneously, the enable signal that makes master control borad B correspondence is 0, and expression master control borad B is a stand-by state, it is not carried out differential signal and receives operation; Perhaps,
4, if the status signal that the master control borad A that module layer receives sends is that logical signal is 0, the status signal that master control borad B sends is that logical signal is 0, then judge that at module layer master control borad B is in main master control borad with state, and generate corresponding enable signal (even the enable signal of master control borad B correspondence is 1), facilitate the use described enable signal control and receive the differential signal that master control borad B sends; Simultaneously, the enable signal that makes master control borad A correspondence is 0, and expression master control borad A is a stand-by state, it is not carried out differential signal and receives operation;
Above-mentioned deterministic process 3 or 4 is the deterministic processes when unusual condition appears in master control borad, the deterministic process when promptly master control borad A and master control borad B are in the master with state or stand-by state.
The present invention also provides a kind of device of realizing active and standby machine ruling, as shown in Figure 2, can comprise master control borad and module in its specific implementation process, and described module includes: driver element, logic judgment unit and differential driving unit, wherein,
Described driver element is used to receive the main control board of master control borad and the status signal that slave control board sends, and offers logic judgment unit;
Described logic judgment unit is used for selecting to be in the main differential signal that sends with the main control board of state according to described status signal control differential driving unit;
Described differential driving unit is used for the differential signal that main control board definite and reception master control layer sends under the control of logic judgment unit triggers.
Wherein, the content that the logic determines process of described logic judgment unit specifically comprises does not repeat them here as previously mentioned.
For ease of understanding to the implementation of active and standby machine ruling, below in conjunction with accompanying drawing to realizing that embodiments of the invention are described in detail.
As shown in Figure 3, at the master control layer, two master control borads all have the holding wire with module layer, and also export active and standby holding wire with state separately, two groups of signal buss all enter module, specifically with which piece master control borad communicate by letter, promptly select for use and where organize holding wire, determine with state according to the active and standby of two plates by module.
Wherein, described module is carried out the logic ruling as shown in Figure 4 to the active and standby of two master control borads with state, enter logic chip in the module from the activestandby state line of two master control borads, produce the enable signal that control is selected through logic determines, described enable signal is used to control selects to be in main master control borad output differential signal with state.Have only the differential signal of a chip for driving output effective simultaneously, the signal of output uses for inside modules.
Present embodiment also provides a kind of circuit arrangement of realizing active and standby machine ruling, as shown in Figure 5.
U1 and U1 ' be differential driver as the differential driving unit, be used under the control of logic judgment unit triggers, determining and receive the differential signal that the main control board of master control layer sends; OE is an Enable Pin; U2 and U2 ' be driver as driver element, be used to receive the main control board of master control borad and the status signal that slave control board sends, and offer logic judgment unit; U3 be logic chip as logic judgment unit, be used for selecting to be in the main differential signal that sends with the main control board of state according to described status signal control differential driving unit.
Signal from master control borad A has: CLKA+CLKA-is a pair of differential clock signal; FOA+FOA-is a pair of difference synchronizing signal; DHWA+DHWA-is a pair of difference telephone path signal.ABS_A is the activestandby state signal.
Signal from master control borad B has: CLKB+CLKB-is a pair of differential clock signal; FOB+FOB-is a pair of difference synchronizing signal; DHWB+DHWB-is a pair of difference telephone path signal.ABS_B is the activestandby state signal.
After passing through U1 and U1 ' conversion respectively, two groups of differential signal A/B synthesize one group, two status signal ABS_A/B draw through on the resistance, through the laggard logic chip of going into of overdriving, produce control enable signal OEA (height enables) and OEB (height enables), the ruling condition is as shown in table 1.
Table 1, (" 0 " presentation logic is low, " 1 " presentation logic height for ruling condition table.)
| Master control borad A condition | Master control borad B state | The ABS_A level | The ABS_B level | The OEA level | The OEB level | The U1 state | U1 ' state |
| Main using | Standby | 0 | 1 | 1 | 0 | Output | Close |
| Standby | Main using | 1 | 0 | 0 | 1 | Close | Output |
| Main using | Main using | 0 | 0 | 1 | 0 | Output | Close |
| Main using | Main using | 0 | 0 | 0 | 1 | Close | Output |
The enable signal OEA (height enables) or the OEB (height enables) of the output of process logic determines ruling can only control a chip for driving U1 or U1 ', and output signal is used for this module.If two master control borads are main simultaneously, module is selected master control borad A or master control borad B.
Therefore, the present invention can realize when a master control borad is unusual, can not influence the differential signal output of another piece plate, thereby a plate the problem includes: of having avoided problem in the prior art scheme influences the problem of another piece plate when problem is arranged.Simultaneously, also can reduce fault, improve system reliability, reduce maintenance cost.
The above; only for the preferable embodiment of the present invention, but protection scope of the present invention is not limited thereto, and anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claim.
Claims (9)
1. a method that realizes active and standby machine ruling is characterized in that, comprising:
At the master control layer, main control board and slave control board utilize separately its with module layer between be connected to module layer transmit status signal and differential signal;
At module layer, receive the status signal that the master control layer is sent, and determine to be in main main control board, and receive the differential signal that described main control board sends with state according to described status signal.
2. a kind of method that realizes active and standby machine ruling according to claim 1 is characterized in that described differential signal comprises differential clock signal, difference synchronizing signal and difference telephone path signal.
3. a kind of method that realizes active and standby machine ruling according to claim 1 is characterized in that described status signal comprises logical signal 0 and logical signal 1, is used to distinguish the differential signal that main control board and slave control board are sent.
4. a kind of method that realizes active and standby machine ruling according to claim 3 is characterized in that, the step of the differential signal that this main control board of described reception sends comprises:
The status signal of sending when first master control borad that receives the master control layer is the logical signal of main control board correspondence, when the status signal that second master control borad sends is the logical signal of slave control board correspondence, determine that then this first master control borad is a main control board, and receive the differential signal that this first master control borad sends, perhaps, the status signal of sending when second master control borad that receives the master control layer is the logical signal of main control board correspondence, when the status signal that first master control borad sends is the logical signal of slave control board correspondence, determine that then this second master control borad is a main control board, and receive the differential signal that this second master control borad sends.
5. a kind of method that realizes active and standby machine ruling according to claim 4 is characterized in that, the step of the differential signal that this main control board of described reception sends also comprises:
When the status signal of sending when first master control borad that receives the master control layer and second master control borad is the logical signal of main control board correspondence, determine that then this first master control borad is a main control board, and receive the differential signal that this first master control borad sends, perhaps, when the status signal of sending when first master control borad that receives the master control layer and second master control borad is the logical signal of slave control board correspondence, determine that then this second master control borad is a main control board, and receive the differential signal that this second master control borad sends.
6. a device of realizing active and standby machine ruling comprises master control borad and module, it is characterized in that described module includes: driver element, logic judgment unit and differential driving unit, wherein,
Described driver element is used to receive the main control board of master control borad and the status signal that slave control board sends, and offers logic judgment unit;
Described logic judgment unit is used for selecting to be in the main differential signal that sends with the main control board of state according to described status signal control differential driving unit;
Described differential driving unit is used for the differential signal that main control board definite and reception master control layer sends under the control of logic judgment unit triggers.
7. a kind of device of realizing active and standby machine ruling according to claim 6 is characterized in that described status signal comprises: the logical signal of the logical signal of main control board correspondence and slave control board correspondence, and described logic judgment unit comprises:
When two master control borads of master control layer are in active and standbyly when using state respectively,, select to determine to be in main main control board with state then according to its logical signal that sends.
8. a kind of device of realizing active and standby machine ruling according to claim 7 is characterized in that described logic judgment unit also comprises:
When two master control borads of master control layer all are in mainly when use state, select then to determine that first master control borad wherein is to be in the main main control board of using state;
When two master control borads of master control layer all are in stand-by state, select then to determine that second master control borad wherein is to be in main main control board with state.
9. a kind of device of realizing active and standby machine ruling according to claim 6 is characterized in that described driver element comprises driver, and described logic judgment unit comprises logic chip, and described differential driving unit comprises differential driver.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2006101697009A CN101212237B (en) | 2006-12-27 | 2006-12-27 | Method and device for implement primary/secondary verdicting |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2006101697009A CN101212237B (en) | 2006-12-27 | 2006-12-27 | Method and device for implement primary/secondary verdicting |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101212237A CN101212237A (en) | 2008-07-02 |
| CN101212237B true CN101212237B (en) | 2011-07-20 |
Family
ID=39611961
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2006101697009A Expired - Fee Related CN101212237B (en) | 2006-12-27 | 2006-12-27 | Method and device for implement primary/secondary verdicting |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101212237B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1321004A (en) * | 2000-04-25 | 2001-11-07 | 华为技术有限公司 | Method and equipment for swapping active with standby switches |
| CN1412957A (en) * | 2002-05-22 | 2003-04-23 | 华为技术有限公司 | Method for providing clock in network equipment and its equipment |
| CN2624529Y (en) * | 2002-11-09 | 2004-07-07 | 深圳市中兴通讯股份有限公司 | Main and spare circuit board switching unit |
-
2006
- 2006-12-27 CN CN2006101697009A patent/CN101212237B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1321004A (en) * | 2000-04-25 | 2001-11-07 | 华为技术有限公司 | Method and equipment for swapping active with standby switches |
| CN1412957A (en) * | 2002-05-22 | 2003-04-23 | 华为技术有限公司 | Method for providing clock in network equipment and its equipment |
| CN2624529Y (en) * | 2002-11-09 | 2004-07-07 | 深圳市中兴通讯股份有限公司 | Main and spare circuit board switching unit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101212237A (en) | 2008-07-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101910972B (en) | Interface device for host device, interface device for slave device, host device, slave device, communication system and interface voltage switching method | |
| CN103490966A (en) | Dual-redundancy CAN bus data receiving and processing method | |
| CN103840993A (en) | Dual-redundancy CAN bus data transmission method | |
| CN103490959A (en) | Dual-redundancy CAN bus fault detection method | |
| CN1809176B (en) | Digital distribution frame based alignment method and its apparatus | |
| CN102724093A (en) | Advanced telecommunications computing architecture (ATCA) machine frame and intelligent platform management bus (IPMB) connection method thereof | |
| CN103095463A (en) | Peripheral component interface express (PCIE) exchange network system and communication method | |
| CN102394734B (en) | RS 485 communication system with nonpolarized connection and control method thereof | |
| US7073088B2 (en) | Data bus arrangement and control method for efficiently compensating for faulty signal lines | |
| CN103186440A (en) | Method, device and system for detecting in-place state of sub cards | |
| CN102081586A (en) | Multiple I2C (Inter-IC) slot circuit system and method for transmitting I2C signal | |
| CN106603276B (en) | Fault processing method and fault processing device for SERDES link group | |
| CN104750057B (en) | Sample processing pipeline control system | |
| CN101713800A (en) | Test method of digital substation relay protection device and special device thereof | |
| CN106155954A (en) | The system and method that a kind of module identification and COM1 distribute automatically | |
| WO2021249270A1 (en) | Photoelectric transceiving device and control method thereof | |
| CN101212237B (en) | Method and device for implement primary/secondary verdicting | |
| CN101296063B (en) | Main/standby switching device, method and single plate | |
| CN212965857U (en) | CAN bus turn-off fault detection device | |
| CN114666244A (en) | Vehicle-mounted gateway test system | |
| CN113253652A (en) | Unit communication control device, method and unit | |
| CN105489160A (en) | Data transmission device, data transmission method and system of LED display screen | |
| CN1801670B (en) | Backup method and apparatus for optical communication chain circuit | |
| CN108337143B (en) | Communication structure, communication system, and communication method | |
| CN101582055A (en) | Serial port takeover method and device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110720 Termination date: 20151227 |
|
| EXPY | Termination of patent right or utility model |