CN101211291A

CN101211291A - Method for testing memory in embedded system

Info

Publication number: CN101211291A
Application number: CNA2006100227311A
Authority: CN
Inventors: 何三波
Original assignee: MAIPU (SICHUAN) COMMUNICATION TECHNOLOGY Co Ltd
Current assignee: MAIPU (SICHUAN) COMMUNICATION TECHNOLOGY Co Ltd
Priority date: 2006-12-31
Filing date: 2006-12-31
Publication date: 2008-07-02

Abstract

The invention relates to a memory testing technology in embedded system technology equipment test and aims to solve the technical problems that: a method for controlling memory testing by software and roundly testing the memory is provided so as to lower the test cost. The invention has the technical proposal of the method for testing the memory in the embedded system. The method has the steps as follow: (1) a memory testing mark is arranged in a parameter register; (2) when a processor runs a basic hardware initializing program in a ROM, whether the memory testing mart is existed is judged; the step (3) is entered if the memory testing mart is existed, and the processor jumps into the memory to run a system initializing program if not; (3) the processor runs the memory testing program in the ROM to roundly test the memory; (4) the test is completed, and the testing result is preserved; (5) an application program starts up in the memory, and the testing result is output to a user interface. The invention has the advantages that the hardware is not required to provide any information, and the hardware design and cost are simplified.

Description

A kind of in embedded system the method for test memory

Technical field

The present invention relates to the memory test technology in the test of embedded system frock.

Background technology

Because in the test of embedded system frock, memory test is a requisite test event, by detecting internal memory, the fault of the solder failure of internal memory or internal memory itself in the discovering device, the qualification rate of raising product export.The method of relatively passing through is at present, by testing apparatus the internal memory of embedded system is tested, owing to increased hardware tools, what bring is exactly that unnecessary hardware tools is bought and handling cost.

Summary of the invention

Technical matters to be solved by this invention is for reducing testing cost, to provide a kind of method that can internally deposit into the software control memory test of capable full test.

The present invention solves the problems of the technologies described above the technical scheme that is adopted to be, a kind of in embedded system the method for test memory, may further comprise the steps:

A, the memory test sign is set in parameter register;

When b, processor move the basic hardware initialize routine in ROM, judged whether the memory test sign; If enter step c; If not, processor jumps to operational system initialize routine in the internal memory;

C, processor running memory test procedure in ROM internally deposits into capable full test;

D, test finish, and preserve test result;

E, application program output to user interface at internal storage starting with test result.

The invention has the beneficial effects as follows, utilize processor in ROM, to move in the basic hardware initialize routine, judge whether internally to deposit into capable full test by software approach.The present invention uses software approach to enter the memory test pattern, does not need hardware that any information is provided, and has simplified hardware design and hardware cost.

Description of drawings

Fig. 1 is a control flow chart of the present invention.

Embodiment

The startup boot sequence that embedded system is general: system powers on, and processor executes the basic hardware initialize routine in ROM after, jumps in the internal memory and moves, after loading application programs and initialization application program finish, and the system start-up success.When embedded system is moved the basic hardware initialize routine in ROM, be the best opportunity that internally deposits into row test, can internally deposit into capable full test this moment, in case otherwise processor enter in the internal memory behind the working procedure, just can not internally deposit into capable full test.

Among the present invention, the laggard access customer of system start-up interface, if need internally deposit into the row test, then import the memory test order, finish the memory test sign is set in the parameter register of processor, after promptly test command was carried out, system carried out the value record of memory test to a sign in parameter register, as with v0 as the memory test sign, preserve v0 to parameter register a0;

Software systems are restarted, and processor jumps to operation basic hardware initialize routine among the ROM, and the value of preserving parameter register a0 is in register s0, processor executes hardware initialization in ROM after, whether the value of judging register s0 is v0, if v0 then internally deposits into capable full test;

After test finishes, test result r0 is kept among the parameter register a0, processor jumps to operational system initialize routine in the internal memory, at this moment, takes out test result r0 from parameter register a0, is kept at certain location adrs0 in the internal memory.Loading application programs, after application initialization was finished, the ad-hoc location adrs0 from internal memory took out test result r0, outputs to user interface.

If the value of register s0 is not for v0, then is not test pattern, internally do not deposit into the row test, zero clearing parameter register a0 jumps to operational system initialize routine in the internal memory.

As shown in Figure 1, the idiographic flow of operation is as follows:

(1) memory test sign v0 is write among the processor parameter register a0, and processor is jumped to the entry address of the correspondence of ROM;

(2) processor is before ROM operation basic hardware initialize routine, and the value of preserving parameter register a0 is to processor register s0.Move the basic hardware initialize routine then;

(3) processor basic hardware initialization;

(4) whether the value of judging parameter register s0 is memory test sign v0, if then carry out

Otherwise processor jumps to internal memory executive system initialize routine (5);

(5) internally deposit into capable full test;

(6) test result is kept at a0 in the parameter register; Jump to internal memory operational system initialize routine, test result is write on the assigned address adrs0 of internal memory;

(7) application program is at internal storage starting;

(8) output test result.

Claims

1. the method for a test memory in embedded system is characterized in that, may further comprise the steps:

A, the memory test sign is set in parameter register;

D, test finish, and preserve test result;

2. a kind of according to claim 1 in embedded system the method for test memory, it is characterized in that, described step a specifically: system enters user interface, and user's input test order is finished and write the test sign in parameter register.

As described in the claim 2 a kind of in embedded system the method for test memory, it is characterized in that further comprising the steps of among the described step a: after user's input test order, restart software systems, processor jumps to ROM operation basic hardware initialize routine.

As described in the claim 1,2 or 3 a kind of in embedded system the method for test memory, it is characterized in that the described preservation test result of steps d specifically may further comprise the steps:

D1, processor are saved in its parameter register with test result;

D2, processor jump to internal memory operational system initialize routine;

The test result that d3, processor are preserved parameter register is saved in certain location in the internal memory.