CN101211285A

CN101211285A - EMS memory error emulation devices and method

Info

Publication number: CN101211285A
Application number: CNA2006101324408A
Authority: CN
Inventors: 温增兴
Original assignee: Mitac Computer Shunde Ltd; Mitac International Corp
Current assignee: Mitac Computer Shunde Ltd; Shunda Computer Factory Co Ltd; Mitac International Corp
Priority date: 2006-12-29
Filing date: 2006-12-29
Publication date: 2008-07-02
Anticipated expiration: 2026-12-29
Also published as: CN100530117C

Abstract

The invention relates to a memory error simulating device and a method. The memory error simulating device comprises a logic circuit and an error simulating circuit, and the memory error simulating method uses the two circuits to simulate a memory error bit; the memory error simulating method includes the following steps: a control signal is provided to the error simulating circuit by using the logic circuit, and the error simulating circuit responds the control signal to generate at least one error bit in access data of a motherboard and the memory. The motherboard receives the data containing the error bit, if the motherboard can detect the error bit and correct, the motherboard is indicated to have the error automatic check and correcting functions.

Description

EMS memory error emulation devices and method thereof

Technical field

The present invention refers to especially that about a kind of EMS memory error emulation devices a kind of dummy error position offers the EMS memory error emulation devices that motherboard carries out the ECC test.

Background technology

Parity check (parity check) and wrong self-verifying and corrigendum (Error Checking andCorrecting; ECC) these two technology are common calculator memory debug technology.The parity check technology is to add a position in the data of each byte, the summation that is used for writing down eight positions in the byte is odd number or even number, when microprocessor will be from the internal memory reading of data, just can compare the consistance of checking position and data, if the discovery mistake, computing machine can require data retransmission automatically, but parity check has individual problem, can only judge a bit-errors exactly and produce the mistake of data, if make a mistake simultaneously in two positions, that just can't have been come out by detecting.

Parity check was the most normal data collecting method that is used in the past, yet, though parity check can be detected mistake, can not revise little mistake to.

Mistake self-verifying and corrigendum are that a kind of motherboard is guaranteed very important function of data correctness and integrality, it utilizes matrix-style to go to detect the memory bits mistake, and position automatically corrects mistakes, if computing machine is used for server, support that the computing machine of data integrity detection is just extremely important for one so.The overwhelming majority is designed to the computing machine of high-order server all can support the ECC internal memory, and verify that whether motherboard has the function of supporting ECC also is one of indispensable test event of producing by motherboard, the testing authentication of legacy hosts plate all is to use the Dram module with good function, the Dram module of its good function is done the test of short circuiting switch circuit with the emulation EMS memory error, yet this mode often causes the welding loose contact easily and damages the Dram modular assembly.In view of this, industry need be developed a kind of error emulation devices, does not need the Dram module is welded action, improves verification efficiency to reduce mistake.

Summary of the invention

In order to solve the above problems, the present invention discloses a kind of EMS memory error emulation devices and method thereof, EMS memory error emulation devices is the extension apparatus between internal memory and the motherboard, it includes slot and circuit board, slot provides internal memory to plug, the affixed and electric connection of circuit board and slot, and circuit board is inserted in the slot of motherboard again, internal memory is satisfied and the motherboard electric connection, and can transmit data side by side.

Circuit board includes logical circuit and wrong artificial circuit, and the EMS memory error emulation mode utilizes above-mentioned circuit with emulation EMS memory error position, and the step of method includes utilizes logical circuit that wrong artificial circuit one controlling signal is provided; Mistake artificial circuit response controlling signal is to producing at least one error bit in the access data of motherboard and internal memory.After EMS memory error emulation devices produces error bit,, represent that promptly motherboard has wrong self-verifying and orthofunction more if motherboard can be checked make mistake position and corrigendum.

This EMS memory error emulation devices this with the extension board structure be easy to change multi-form within storing module test, all adopt BGA (Ball Grid Array as existing Dram module chip, the ball array encapsulation) encapsulation is difficult for the welding additional circuit, therefore the EMS memory error emulation devices of extension board framework helps to reduce the manual operation mistake, and the advantage of saving the test duration is arranged.

Description of drawings

Fig. 1 is the present invention's EMS memory error emulation devices synoptic diagram;

Fig. 2 is the system block diagrams of the present invention's EMS memory error emulation devices;

Fig. 3 is the system block diagrams of the present invention's logical circuit; And

Fig. 4 is the process flow diagram of the present invention's EMS memory error emulation mode.

Embodiment

Fig. 1 is the present invention's EMS memory error emulation devices synoptic diagram, and in the lump with reference to Fig. 2, Fig. 2 is the system block diagrams of the present invention's EMS memory error emulation devices.As shown in Figure 1, EMS memory error emulation devices 10 is an extension board structure, that is, originally can directly be inserted in and deposit 20 within the slot 301 of motherboard 30 and be inserted in EMS memory error emulation devices 10, EMS memory error emulation devices 10 is inserted in the slot 301 of motherboard 30 again, internal memory 20 sees through EMS memory error emulation devices 10 and is connected to motherboard 30, and carries out data and transmit side by side.

EMS memory error emulation devices 10 includes slot 101 and circuit board 102, the stitch 1012 of slot 101 is welded on the circuit board 102 with affixed slot 101 with circuit board 102 and reach electric connection, on the other hand, slot 101 is after plugging internal memory 20, buckling parts 1011 with two ends closely fastens internal memory 20, in this, internal memory 20 is reached electric connection with circuit board 102.When the EMS memory error emulation devices 10 that plugs internal memory 20 is inserted in the slot 301 of motherboard 30 through circuit board 102 again, internal memory 20 is then reached electric connection with motherboard 30, and motherboard 30 promptly sees through EMS memory error emulation devices 10 so that internal memory 20 is carried out data access.

As shown in Figure 2, the circuit board 102 of EMS memory error emulation devices 10 disposes logical circuit 1021 and wrong artificial circuit 1022, wherein logical circuit 1021 is in order to providing wrong artificial circuit 1,022 one controlling signal, and mistake artificial circuit 1022 is according to producing at least one error bit in the access data of this controlling signal to motherboard 30 and internal memory 20.The one concrete profit of implementing according to the present invention, T type switch 1022a, the 1022b of mistake artificial circuit 1022 respond this controlling signal, when controlling signal is ' 1 ',

T type switch

1022a, 1022b are in enabled status, thereby make the data line 1022e, the 1022f ground connection that are connected to internal memory 20, cause access data to produce error bit.As shown in the figure, position selector switch 1022c, the 1022d of mistake artificial circuit 1022 is electrically connected to

T type switch

1022a, 1022b respectively, the number that position selector switch 1022c, 1022d provide the user to select the dummy error position is voluntarily singly seen user's emulation single dislocation mistake (Single-Bit Error; SBE) or multiple bit-errors (Multi-Bit Error; MBE), utilize

position selector switch

1022c, 1022d one of them or both all to give T type switch 1022a, the 1022b of conducting correspondence and respectively.Motherboard 30 electrically connects with

position selector switch

1022c, 1022d,

T type switch

1022a, 1022b when

position selector switch

1022c, 1022d conducting correspondence, motherboard 30 has promptly comprised error bit in the data that receive internal memory 20, if motherboard 30 has wrong self-verifying and corrigendum (ECC) function, can check out this error bit and corrigendum.

Please refer to Fig. 3, it is the system block diagrams of the present invention's logical circuit 1021, as shown in the figure, logical circuit 1021 comprises starting switch 1023, circuit 1024 is eliminated in spring, pulse bandwidth produces circuit 1025 and frequency eliminating circuit 1026, wherein starting switch 1023 provides the user to push to produce trigger signals, starting switch 1023 is electrically connected at spring and eliminates circuit 1024, spring is eliminated circuit 1024 in order to eliminate the switch bounce of starting switch 1023, this switch bounce is that starting switch 1023 is pressed the back because of spring that mechanical shock own caused, such spring can produce the input of several pulse waves, if the spring of starting switch is not eliminated, will cause the signal of subsequent conditioning circuit output error.Spring is eliminated circuit 1024 and is promptly exported trigger signals to pulse bandwidth generation circuit 1025 after start, pulse bandwidth produces circuit 1025 response trigger signals to produce the controlling signal of drive error artificial circuit 1022, and set this controlling signal in a preset frequency, the width of this preset frequency must be greater than the width of the frequency of operation of internal memory 20, can receive controlling signal and be enough to produce an error bit in time with

data line

1022e, 1022f ground connection at T type switch 1022a, 1022b.Frequency eliminating circuit 1026 produces the required frequency of circuit 1025 runnings in order to high-frequency signals frequency elimination to the spring of an input is eliminated circuit 1024 with pulse bandwidth, and exports it.

The specific embodiment one of according to the present invention, frequency eliminating circuit 1026 inputs one frequency is the high-frequency signals S1 of 4MHz, utilize several T type flip- flop 1026a 1026d and 100 times of frequency eliminator 1026e that the high-frequency signals S1 of 4MHz is carried out frequency elimination obtaining S2, S3 and the S4 signal that frequency is 20kHz, 500kHz and 1MHz respectively, and export respectively that circuit 1024 is eliminated in spring, second logic lock combination 1025d operates required frequency with counter 1025 to provide to.Starting switch 1023 is after being pressed, see through spring and eliminate D type flip-flop 1024a, the 1024b generation pulse wave edge-triggered once of circuit 1024, and export trigger signals to pulse bandwidth and produce circuit 1025, pulse bandwidth produces circuit 1025 and sees through counter 1025a and first logic lock combination 1025b output fixed width pulse wave, and cooperates D type flip-flop 1025c and second logic lock combination 1025d to produce controlling signal and export wrong artificial circuit 1022 to.

Please refer to Fig. 4, with enforcement, step is as follows: plug internal memory 20 in EMS memory error emulation devices 10 (step 401) according to the method for the process flow diagram of the present invention's EMS memory error emulation mode, the present invention's EMS memory error emulation devices 10 for it; EMS memory error emulation devices 10 is inserted in the slot 301 (step 402) of motherboard 30; Motherboard 30 sees through EMS memory error emulation devices 10 so that internal memory 20 is carried out data access (step 403); Tong Over

position selector switch

1022c, 1022d select the number (step 404) of dummy error position; Utilize frequency eliminating circuit 1026 to provide spring to eliminate circuit 1024 and produce the required frequency (step 405) of circuit 1025 runnings with pulse bandwidth; Started by press switch 1023 is to produce trigger signals (step 406); The switch bounce (step 407) that circuit 1024 is eliminated starting switch 1023 is eliminated in spring; Pulse bandwidth produces circuit 1025 response trigger signals to produce controlling signal (step 408);

T type switch

1022a, 1022b are to answering controlling signal to cause the

data line

1022e, 1022f ground connection of correspondence to produce error bit (step 409); Motherboard 30 receives the data (step 410) that comprise error bit; Motherboard 30 is checked and is made mistake the position and correct it (step 411).

Though the present invention discloses as above with aforementioned embodiment, so it is not in order to limit the present invention.Without departing from the spirit and scope of the invention, institute changes and retouching for it, all belongs to the present invention's scope of patent protection.

Claims

1. an EMS memory error emulation devices connects an internal memory and a motherboard, provides this motherboard with transmission mode arranged side by side this internal memory to be carried out the access of data, and this EMS memory error emulation devices includes:

One logical circuit, it sends a controlling signal when start; And

One wrong artificial circuit, it is electrically connected at this internal memory and this motherboard, for this motherboard with also

The defeated mode of biographies is carried out data access to this internal memory, and this mistake artificial circuit responds this controlling signal and produces at least one error bit with the data to transmission arranged side by side.

2. EMS memory error emulation devices according to claim 1, it is characterized in that, this logical circuit comprises a starting switch and circuit is eliminated in a spring, and this starting switch is sent this controlling signal in order to trigger this logical circuit, and this spring is eliminated circuit in order to eliminate the switch bounce of this starting switch.

3. as the EMS memory error emulation devices as described in the claim 2, it is characterized in that, this logical circuit more comprises a pulse bandwidth and produces a circuit and a frequency eliminating circuit, this pulse bandwidth produces circuit in order to set this controlling signal in a preset frequency, and this frequency eliminating circuit produces circuit and the required frequency of this spring elimination circuit running in order to this pulse bandwidth to be provided.

4. EMS memory error emulation devices according to claim 1 is characterized in that, this mistake artificial circuit comprises at least one T type switch, in order to respond this controlling signal with the data line ground connection of correspondence and produce this error bit.

5. EMS memory error emulation devices according to claim 1 is characterized in that, this mistake artificial circuit more comprises at least one selector switch, in order to select the number of this error bit.

6. as the EMS memory error emulation devices as described in the claim 2, it is characterized in that this spring is eliminated circuit and comprised at least one D type flip-flop.

7. as the EMS memory error emulation devices as described in the claim 3, it is characterized in that this pulse bandwidth produces circuit and comprises a counter.

8. as the EMS memory error emulation devices as described in the claim 3, it is characterized in that this frequency eliminating circuit comprises at least one T type flip-flop.

9. EMS memory error emulation mode is applicable to that a motherboard carries out the access test of data to an internal memory, and the step of this method includes:

Trigger a starting switch to produce a trigger signals;

Respond this trigger signals and produce a controlling signal to make a pulse bandwidth produce circuit;

Respond this control signal and these data are produced at least one error bit to make at least one T type switch; And

If this motherboard detects this error bit, then this motherboard is supported wrong self-verifying and corrigendum.

10. as the EMS memory error emulation mode as described in the claim 9, it is characterized in that this method utilizes a spring to eliminate circuit to eliminate the switch bounce of this starting switch.

11. the EMS memory error emulation mode as described in the claim 10 is characterized in that, this method utilizes a frequency eliminating circuit to operate required frequency to provide this pulse bandwidth to produce circuit with this spring elimination circuit.

12. the EMS memory error emulation mode as described in the claim 9 is characterized in that this this controlling signal of T type switching response causes the data line ground connection of correspondence to produce this error bit.

13. as the EMS memory error emulation mode as described in the claim 12, it is characterized in that, this method is utilized this pulse bandwidth to produce circuit these control signals is set in a preset frequency, the width of this preset frequency is greater than the band width of this internal memory, makes at this T type switch and can produce this error bit in the time of this data line ground connection.