CN101202231A - Method for manufacturing inlaid structure - Google Patents
Method for manufacturing inlaid structure Download PDFInfo
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- CN101202231A CN101202231A CNA2006101473239A CN200610147323A CN101202231A CN 101202231 A CN101202231 A CN 101202231A CN A2006101473239 A CNA2006101473239 A CN A2006101473239A CN 200610147323 A CN200610147323 A CN 200610147323A CN 101202231 A CN101202231 A CN 101202231A
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Abstract
A manufacturing method for an inlaying structure comprises the following steps: a semiconductor basement is provided; a dielectric layer is formed on the semiconductor basement; a photo resist layer is coated on the dielectric layer in a spinning way and is patterned to form an opening pattern; the part of the dielectric layer at a bottom part of the opening pattern is etched to form an opening in the dielectric layer; the photo resist layer is incinerated and removed through the oxide plasma. The method of the invention can reduce bombardment damage to the dielectric layer caused by ion bombardment when the photo resist layer on the dielectric layer is removed and improve the stability of breakdown voltage and the device.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of manufacture method of mosaic texture.
Background technology
Along with reducing day by day of semiconductor technology live width, industry selects for use copper to replace the interconnection material of aluminium as back segment, select for use advanced low-k materials as insulating material accordingly, because copper is difficult to etching and very easily diffusion, industry is introduced mosaic technology, overcome the shortcoming that is difficult to etching, and the introducing barrier layer stops the diffusion of copper in advanced low-k materials.Number of patent application is that 02106882.8 Chinese patent discloses a kind of mosaic technology, and Fig. 1 to Fig. 4 is the manufacture method generalized section of described disclosed mosaic technology.
As shown in Figure 1, provide a substrate 100 with metal carbonyl conducting layer, described metal carbonyl conducting layer material can be a copper.In described substrate 100, form first dielectric layer 102, described first dielectric layer 102 is used for covering the copper surface of the metal carbonyl conducting layer of substrate 100, to avoid described copper surface to be exposed in the air or in other aggressive chemistry processing procedure, the method of its formation is plasma enhanced chemical vapor deposition (PECVD), and its thickness is 30 to 100nm.
Form second dielectric layer 104 on described first dielectric layer 102, described second dielectric layer 104 is an advanced low-k materials.Form an anti-reflecting layer 106 on described second dielectric layer 104, described anti-reflecting layer 106 can be the organic or inorganic material.On described anti-reflecting layer 106, form a photoresist layer 108, form connecting hole patterns of openings 110 by exposure imaging.
As shown in Figure 2, serve as the cover curtain with described photoresist layer 108, by etching described connecting hole patterns of openings 110 is transferred to and formed connecting hole 110a in described second dielectric layer 104, described connecting hole 110a exposes described first dielectric layer 102 surfaces in the bottom.
As shown in Figure 3, remove described photoresist layer 108 and anti-reflecting layer 106 by ashing and wet-cleaned.
Spin coating photoresist and form channel patterns on described connecting hole 110a neutralizes second dielectric layer 104 is transferred to described channel patterns in described second dielectric layer 104 by etching then, forms groove 112 as shown in Figure 4.As shown in Figure 5, remove first dielectric layer 102 of described connecting hole 110a bottom by etching.And remove the described photoresist that is formed with channel patterns.
In described groove 112 and connecting hole 110a the filled conductive material for example copper promptly form copper enchasing structure.
In the manufacturing process of above-mentioned mosaic texture, include the step of two steps removal photoresist, promptly after forming described connecting hole 110a and after forming described groove 112.The method of removing photoresist is ashing and wet-cleaned, its key step is: at first the photoresist to described semiconductor-based basal surface carries out first step plasma ashing, plasma gas is an oxygen, and interpolation assist gas argon gas, wherein oxygen flow is 200sccm, and the flow of argon gas is 500sccm, and the radio frequency source power that produces described plasma is 300w, ambient pressure is 20mT, and the time of plasma ashing is 10s; Then the photoresist to described semiconductor-based basal surface carries out the second step plasma ashing, and this step ionic medium body gas is oxygen, and flow is 400sccm, and radio frequency source power is 300w, and ambient pressure is 15mT, and the time is 20s; Then, carry out wet-cleaned, to remove the residue of photoresist with the mixed solution of the concentrated sulfuric acid and hydrogen peroxide.
In the mosaic texture of copper as interconnecting metal, dielectric layer is the material of low-k, its hardness is less relatively, in with said method place to go photoresist process, the ion bombardment meeting of plasma causes damage to intermetallic dielectric layer, thereby cause the puncture voltage of described intermetallic dielectric layer to reduce the stability decreases of device.
Summary of the invention
Therefore, the object of the present invention is to provide a kind of manufacture method of mosaic texture, to solve the problem that when removing photoresist, causes the dielectric layer damage in the existing mosaic texture manufacturing process.
For achieving the above object, the manufacture method of a kind of mosaic texture provided by the invention comprises: the semiconductor substrate is provided; On the described semiconductor-based end, form dielectric layer; Spin coating photoresist layer on described dielectric layer, and graphically form patterns of openings; The dielectric layer of the described patterns of openings of etching bottom forms opening in described dielectric layer; Remove described photoresist layer by the oxygen gas plasma ashing.
The flow that produces the oxygen of described oxygen gas plasma is 400 to 800sccm.
The radio frequency source power that produces described oxygen gas plasma is 200 to 400W, and bias power is 300 to 500W.
The pressure of described oxygen gas plasma environment is 10 to 30mT.
The time of described oxygen gas plasma ashing is 10 to 30s.
This method also comprises the step of carrying out wet-cleaned with the mixed solution of hydrofluoric acid, ammoniacal liquor and polar organic solvent.
Described dielectric layer is a kind of or its combination in fluorine silex glass, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, the black diamond.
This method further comprises: forming anti-reflecting layer before the spin coating photoresist on described dielectric layer.
This method further comprises: fill metal material in described opening.
Compared with prior art, the present invention has the following advantages:
The inventive method removes photoresist layer on the described dielectric layer by the oxygen gas plasma ashing, the flow of oxygen that produces described oxygen gas plasma is bigger, improved ashing speed, shortened the bombardment time of energetic ion, and big oxygen flow helps the photoresist that reduces or eliminates on the dielectric layer surface residual to the dielectric layer surface; Described in addition oxygen gas plasma ambient pressure is lower, and the introducing bias power, to alleviate the bombardment of oxygen gas plasma, reduce the damage of ion bombardment to described dielectric layer to the dielectric layer surface, help to keep the puncture voltage of dielectric layer, thereby improved the stability of the device that forms.
Description of drawings
Fig. 1 to Fig. 5 is the generalized section of each step corresponding structure of manufacturing process of existing a kind of mosaic texture;
Fig. 6 is the flow chart of the embodiment of the manufacture method of mosaic texture of the present invention;
Fig. 7 to Figure 16 is the generalized section of each step corresponding structure of the embodiment of the manufacture method of mosaic texture of the present invention.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.
In the manufacturing process of mosaic texture of the present invention, remove the photoresist layer that is formed on the low dielectric coefficient medium layer by the oxygen gas plasma ashing, the flow of oxygen is bigger, pressure is lower, to alleviate or to eliminate ion bombardment in the oxygen gas plasma podzolic process to the damage of dielectric layer, the puncture voltage that keeps dielectric layer, thereby the stability of the device that raising forms.
Fig. 6 is the flow chart of the embodiment of the manufacturing process of mosaic texture of the present invention.
As shown in Figure 6, at first, provide the semiconductor substrate, in the described semiconductor-based end, be formed with conductive layer (S100).The described semiconductor-based end can be materials such as silicon on polysilicon, monocrystalline silicon, amorphous silicon, the insulating barrier (SOI), arsenicization are sowed, silicon Germanium compound, and described conductive can be a kind of or its combination in copper, aluminium, titanium, titanium nitride, the tungsten.
On the described semiconductor-based end, form the barrier layer, on described barrier layer, form dielectric layer (S110); Described barrier layer comprises a kind of or its combination in silicon nitride, carbon nitrogen silicon compound, the O-N-Si compound.The formation method on described barrier layer is a kind of in physical vapour deposition (PVD), plasma enhanced chemical vapor deposition, low-pressure chemical vapor deposition, high density plasma CVD, the ald.Described dielectric layer is a kind of or its combination in black diamond, fluorine silex glass, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, silica, silicon nitride, the carborundum.The method that forms described dielectric layer is a kind of in physical vapour deposition (PVD), the chemical vapour deposition (CVD).
Spin coating photoresist layer on described dielectric layer, and by exposure imaging formation patterns of openings, described dielectric layer surface (S120) is exposed in described patterns of openings bottom.
With described photoresist layer is etch mask layer, and the dielectric layer of the described patterns of openings of etching bottom forms opening (S130) in described dielectric layer; Described open bottom is exposed described barrier layer, continues the barrier layer of the described open bottom of etching, and to remove the barrier layer of described open bottom, opening described in the present embodiment is groove and/or connecting hole.
After in described dielectric layer, forming opening, the described semiconductor-based end that has photoresist layer, placed the oxygen gas plasma environment, remove described photoresist layer (S140) by the oxygen gas plasma ashing.The pressure of the environment of described oxygen gas plasma is 10 to 30mT, and the flow that produces the oxygen of described oxygen gas plasma is 400 to 800sccm, and radio frequency source power is 200 to 400W, and bias power is 300 to 500W; Oxygen flow described in the present embodiment is 600sccm, radio frequency source power is 300W, bias power is 400W, make oxygen molecule be decomposed into oxygen atom by radio-frequency (RF) energy, carbon in the very fast and described photoresist layer of described oxygen atom, hydrogen generation chemical reaction, generate CO, CO2, H2O, and take away by gas extraction system.The time of described oxygen gas plasma ashing is 10 to 30s, can remove photoresist layer on the described dielectric layer by the oxygen gas plasma ashing.Further, the mixed solution by hydrofluoric acid, ammoniacal liquor and polar organic solvent carries out wet-cleaned to described dielectric layer surface, and it is residual to remove photoresist.Fill in the opening in described dielectric layer metal material for example copper promptly form interconnection line.
The inventive method removes photoresist layer on the described dielectric layer by the oxygen gas plasma ashing, the flow of oxygen that produces described oxygen gas plasma is bigger, improved ashing speed, shortened the bombardment time of energetic ion, and big flow oxygen helps the photoresist that reduces or eliminates on the dielectric layer surface residual to the dielectric layer surface; Described in addition oxygen gas plasma ambient pressure is lower, and the introducing bias power, to alleviate the bombardment of oxygen gas plasma, reduce the damage of ion bombardment to described dielectric layer to the dielectric layer surface, help to keep the puncture voltage of dielectric layer, thereby improved the stability of the device that forms.
Being example below with the dual-damascene structure is described in detail the manufacture method of mosaic texture of the present invention, need to prove that the inventive method also is applicable to single inlay structure.Fig. 7 to Figure 16 is the generalized section of each step corresponding structure of the embodiment of the manufacture method of mosaic texture of the present invention.
Step 1 as shown in Figure 7, provides semiconductor substrate 200, is formed with device layer and conductive layer 200b in the described semiconductor-based end 200.The described semiconductor-based end 200 can be materials such as silicon on polysilicon, monocrystalline silicon, amorphous silicon, the insulating barrier (SOI), arsenicization are sowed, silicon Germanium compound, and described device layer can be a metal oxide semiconductor transistor.Described conductive layer 200b material can be a kind of or its combination in copper, aluminium, titanium, titanium nitride, the tungsten.
Step 2, as shown in Figure 8, at first, to carrying out the plasma surface preliminary treatment in the described semiconductor-based end 200 with device layer.Can reduce or eliminate the pollutant of substrate surface by the plasma surface preliminary treatment, improve the character of Facing material of the described semiconductor-based ends 200, strengthen the barrier layer that subsequent technique forms and the adhesiveness on surface, the described semiconductor-based ends 200.
After the plasma preliminary treatment of finishing surface, the described semiconductor-based ends 200, deposition one barrier layer 202 on surface, the described semiconductor-based ends 200.The method that deposits described barrier layer 202 is a kind of in physical vapour deposition (PVD), low-pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, high density plasma CVD, the ald.Described barrier layer 202 is a kind of or its combination in silicon nitride, nitrogen silicon oxide compound, the nitrogen-doped silicon carbide, and the reacting gas that deposits described barrier layer 202 is a kind of or its combination in ammonia, silane, TEOS, dichloro-dihydro silicon, nitrous oxide, the nitrogen.Barrier layer 202 thickness of deposition are 20 to 80nm.
As shown in Figure 9, on described barrier layer 202, form dielectric layer 204.Described dielectric layer 204 is a kind of or its combination in black diamond, fluorine silex glass, phosphorosilicate glass, Pyrex, the boron-phosphorosilicate glass.The method that forms described dielectric layer 204 is physical vapour deposition (PVD) or chemical vapour deposition (CVD).Described dielectric layer 204 can be one or more layers.
After forming described dielectric layer 204, need form groove and/or connecting hole in described dielectric layer 204, present embodiment is with formation groove and connecting hole, and the situation of formation groove is that example describes behind elder generation's formation connecting hole.
Step 3, as shown in figure 10, spin coating anti-reflecting layer 206 on described dielectric layer 204, spin coating first photoresist layer 208 forms first patterns of openings 210 by technologies such as exposure imagings on described anti-reflecting layer 206.
Step 4 as shown in figure 11, is a barrier material with described first photoresist layer 208, and described anti-reflecting layer 206 of etching and dielectric layer 204 form connecting hole 210a in described dielectric layer 204, and described connecting hole 210a exposes 202 surfaces, described barrier layer in the bottom.
Step 5, as shown in figure 12, after in described dielectric layer 204, forming opening, with the described semiconductor-based end that has first photoresist layer 208 as in the oxygen gas plasma environment, remove described first photoresist layer 208 and anti-reflecting layer 206 by the oxygen gas plasma ashing.The pressure of the environment of described oxygen gas plasma is 10 to 30mT, and the flow that produces the oxygen of described oxygen gas plasma is 400 to 800sccm, and radio frequency source power is 200 to 400W, and bias power is 300 to 500W; Oxygen flow described in the present embodiment is 600sccm, radio frequency source power is 300W, bias power is 400W, make oxygen molecule be decomposed into oxygen atom by radio-frequency (RF) energy, described oxygen atom very fast with photoresist in carbon, hydrogen generation chemical reaction, generate CO, CO2, H2O, and taken away by gas extraction system.The time of described oxygen gas plasma ashing is 10 to 30s, can remove photoresist layer on the described dielectric layer by the ashing of oxygen gas plasma.Further, the mixed solution by hydrofluoric acid, ammoniacal liquor and polar organic solvent carries out wet-cleaned to described dielectric layer surface, and it is residual to remove photoresist.
Step 6, as shown in figure 13, spin coating sacrifice layer 212 on described connecting hole 210a neutralization medium layer 204, described sacrifice layer 212 can be photoresist, antireflection material etc.Spin coating second photoresist layer 214 on described sacrifice layer 212, and exposure imaging generates second patterns of openings 216.
Step 7 as shown in figure 14, is transferred to formation groove 216a in the described dielectric layer 204 by etching with described channel patterns 216, removes described second photoresist layer 214 and sacrifice layer 212.The method of removing described second photoresist layer 214 is identical with the method for removing described first photoresist layer 208.As shown in figure 15, expose on barrier layer 202 to the described conductive layer 200b surface of the described connecting hole 210a of etching bottom.As shown in figure 16, fill metal material in described connecting hole 210a and groove 216a, copper for example forms the mosaic texture of copper.
The inventive method removes photoresist layer on the described dielectric layer by the oxygen gas plasma ashing, and the flow of the oxygen of the described oxygen gas plasma of generation is bigger among the present invention, can improve ashing speed, shorten the bombardment time of energetic ion, and the oxygen of big flow helps the photoresist that reduces or eliminates on the dielectric layer surface residual to the dielectric layer surface; Described in addition oxygen gas plasma ambient pressure is lower, and the introducing bias power, to alleviate the bombardment of oxygen gas plasma, reduce the damage of ion bombardment to described dielectric layer to the dielectric layer surface, help to keep the puncture voltage of dielectric layer, thereby improved the stability of the device that forms.
Though the present invention with preferred embodiment openly as above; but it is not to be used for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (9)
1. the manufacture method of a mosaic texture comprises:
The semiconductor substrate is provided;
On the described semiconductor-based end, form dielectric layer;
Spin coating photoresist layer on described dielectric layer, and graphically form patterns of openings;
The dielectric layer of the described patterns of openings of etching bottom forms opening in described dielectric layer;
Remove described photoresist layer by the oxygen gas plasma ashing.
2. the manufacture method of mosaic texture as claimed in claim 1 is characterized in that: the flow that produces the oxygen of described oxygen gas plasma is 400 to 800sccm.
3. the manufacture method of mosaic texture as claimed in claim 1 is characterized in that: the radio frequency source power that produces described oxygen gas plasma is 200 to 400W, and bias power is 300 to 500W.
4. the manufacture method of mosaic texture as claimed in claim 1 is characterized in that: the pressure of described oxygen gas plasma environment is 10 to 30mT.
5. the manufacture method of mosaic texture as claimed in claim 1 is characterized in that: the time of described oxygen gas plasma ashing is 10 to 30s.
6. the manufacture method of mosaic texture as claimed in claim 1, it is characterized in that: this method also comprises the step of carrying out wet-cleaned with the mixed solution of hydrofluoric acid, ammoniacal liquor and polar organic solvent.
7. the manufacture method of mosaic texture as claimed in claim 1, it is characterized in that: described dielectric layer is a kind of or its combination in fluorine silex glass, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, the black diamond.
8. the manufacture method of mosaic texture as claimed in claim 1, it is characterized in that: this method further comprises: forming anti-reflecting layer before the spin coating photoresist on described dielectric layer.
9. as the manufacture method of the mosaic texture under the claim 1, it is characterized in that: this method further comprises: fill metal material in described opening.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2006101473239A CN100517605C (en) | 2006-12-15 | 2006-12-15 | Method for manufacturing inlaid structure |
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| CNB2006101473239A CN100517605C (en) | 2006-12-15 | 2006-12-15 | Method for manufacturing inlaid structure |
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| CN101202231A true CN101202231A (en) | 2008-06-18 |
| CN100517605C CN100517605C (en) | 2009-07-22 |
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| CN102024697A (en) * | 2009-09-17 | 2011-04-20 | 中芯国际集成电路制造(上海)有限公司 | Etching method for low dielectric constant material |
| CN101762993B (en) * | 2008-12-25 | 2012-01-25 | 中芯国际集成电路制造(上海)有限公司 | Method for removing photoresist and method for manufacturing connecting hole |
| CN102436154A (en) * | 2011-12-21 | 2012-05-02 | 信利半导体有限公司 | Photoresist stripping method in repairing process of TFT (thin film transistor) liquid crystal display |
| CN101764059B (en) * | 2008-12-25 | 2012-05-23 | 中芯国际集成电路制造(上海)有限公司 | Dual-damascene structure forming method and groove forming method |
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| CN102024697A (en) * | 2009-09-17 | 2011-04-20 | 中芯国际集成电路制造(上海)有限公司 | Etching method for low dielectric constant material |
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| CN102610496B (en) * | 2012-03-31 | 2017-11-07 | 上海集成电路研发中心有限公司 | Large ratio of height to width structure removes gluing method |
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| CN104851779A (en) * | 2014-02-18 | 2015-08-19 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device manufacture method |
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| CN105093816B (en) * | 2015-09-23 | 2019-08-02 | 武汉华星光电技术有限公司 | A kind of manufacturing method thereof and display panel of the signal wire of display panel |
| CN106683983A (en) * | 2017-01-12 | 2017-05-17 | 福建中科晶创光电科技有限公司 | Method for removing photoresist on surface of etched substrate and implementation device |
| CN106683983B (en) * | 2017-01-12 | 2019-07-02 | 福建中科晶创光电科技有限公司 | A kind of method and implementing device of removal etching meron photomask surface glue |
| CN109216540A (en) * | 2017-06-30 | 2019-01-15 | 中电海康集团有限公司 | MTJ device and its production method |
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| CN107564803B (en) * | 2017-08-31 | 2020-04-17 | 京东方科技集团股份有限公司 | Etching method, process equipment, thin film transistor device and manufacturing method thereof |
| CN113690178A (en) * | 2021-08-23 | 2021-11-23 | 长江先进存储产业创新中心有限责任公司 | Method for manufacturing metal conductive structure |
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