CN101201758A - Method for detecting timer, switching multiprocessor and supporting hot plug of processor - Google Patents

Method for detecting timer, switching multiprocessor and supporting hot plug of processor Download PDF

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Publication number
CN101201758A
CN101201758A CNA2006101646952A CN200610164695A CN101201758A CN 101201758 A CN101201758 A CN 101201758A CN A2006101646952 A CNA2006101646952 A CN A2006101646952A CN 200610164695 A CN200610164695 A CN 200610164695A CN 101201758 A CN101201758 A CN 101201758A
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Prior art keywords
timer
processor
working storage
bit
zero
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段秋月
陈玄同
刘文涵
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Inventec Corp
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Inventec Corp
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Abstract

The invention discloses a detection method of terminating timers, a multiprocessor switching method and a method for supporting hot-swappable processors. The invention starting a controller register with a warn-backup that is connected with a terminating timer by communication to examine various functions of starting, timing, stopping and responding of the terminating timer. And after the operating system is started, the invention uses the terminating timer to implement automatic switching between multiple processors and support hot-swappable processors. The invention can examine various functions of the terminating timer, and implements switch between multiple processors automatically and periodically, without limitation to types of the operating system and processors, furthermore, the invention supports hot-swappable processors and improves security of hot-swapping operation.

Description

The method that timer detects, multiprocessor switches and hot plug of processor is supported
Technical field
The present invention relates to the computer hardware management method, relate in particular to timer detection method, multiprocessor changing method and hot plug of processor support method.
Background technology
In order to improve the treatment efficiency of computing machine, a kind of known method is for installing a plurality of processors in same system.Known multicomputer system can be divided into asymmetric multicomputer system (Asymmetricalmultiprocessor system) and symmetric multiprocessor system (Symmetrical multiprocessorsystem).In asymmetric multicomputer system, a processor is primary processor (masterprocessor), and other processor be primary processor from processor (slave processor), only in order to carry out specific function.In the symmetric multiprocessor system, task is distributed to each processor equably, thereby it can bring into play the maximum efficiency of each processor.
In multicomputer system, when any one processor Shi Junhui that breaks down causes the appearance of variety of issue.Carry out the technology of Hot Spare (Hot Spare Boot) when at present, existing a kind of multicomputer system to start.That is, two processors are installed on motherboard, when can't guidance system if first starts that processor breaks down starting, system can utilize second processor to start.(Programmable ArrayLogic, PAL) realize by circuit by stopping timer (Dead man Timer), the Hot Spare start-up control working storage (Hot SpareBoot Control Register) of communicating by letter with the termination timer and other outside array logic able to programme for this function.
After a multicomputer system started for electricity, motherboard produced a PGOOD signal.Stop timer according to one of PGOOD unblanking, and then give one period start-up time of primary processor (Primary Processor) (2 seconds).If primary processor normally starts, then write 1, to stop to stop timer by certain bits (STOP_HSB) to Hot Spare start-up control working storage in this start-up time.If primary processor is abnormal the startup when arrive in start-up time, then motherboard stops (Disable) primary processor, and starts one second processor.At this moment, stop timer and be activated once more, and then give one period start-up time of second processor (2 seconds).If second processor normally starts, then write 1, to stop to stop timer by certain bits (STOP_HSB) to Hot Spare start-up control working storage in this start-up time.If second processor does not normally start when arrive in start-up time, promptly in stopping the timer preset time, do not write 1 to the certain bits (STOP_HSB) of Hot Spare start-up control working storage, then trigger change BOOT_NEXT stitch state.This BOOT_NEXT stitch will drive the termination timer and restart, and stop (Disable) second processor, and start next processor.
Therefore the major defect of known technology is as follows:
1. the method that the every function that stops timer is not detected in the known technology, thereby also can't detect when mistake appears in operating termination timer, and then cause the reduction of multicomputer system usefulness.
2. the processor switching method of known technology depends on the instruction of processor self, is subjected to the restriction of operating system and processor type.
3. lack software support method in the known technology to hot plug of processor.
Summary of the invention
In order to solve problem and the defective in the above-mentioned known technology, the object of the present invention is to provide a kind of termination timer detection method, multiprocessor changing method and hot plug of processor support method.
A kind of detection method that stops timer provided by the present invention, realize that by the Hot Spare start-up control working storage of communicating by letter with the termination timer the method comprises following steps:
A) be set response time and the interval time that stops timer;
B) write 0 zero-bit, the start-stop timer to Hot Spare start-up control working storage;
C) judge whether 0 successfully write the zero-bit of Hot Spare start-up control working storage, to judge whether stop timer successfully starts;
D), then in the response time that stops timer,, whether normal to judge the clocking capability that stops timer according to the value of the zero-bit of regularly judging Hot Spare start-up control working storage interval time if stop the timer initiation success;
E) write 1 zero-bit, stop to stop timer to Hot Spare start-up control working storage;
F) judge whether 1 successfully write the zero-bit of Hot Spare start-up control working storage, to judge whether stop timer successfully stops;
G) write 0 zero-bit, restart the termination timer to Hot Spare start-up control working storage; And
H) when the response time that stops timer arrives, judge the value of the zero-bit of Hot Spare start-up control working storage, stop timer whether can normal response to judge.
Wherein step d) further comprises: the value that reads the zero-bit of Hot Spare start-up control working storage; And whether the value of judging the zero-bit of the Hot Spare start-up control working storage read equal 0, if equal, the clocking capability that then stops timer is normal, otherwise the clocking capability that stops timer is undesired.
Step h wherein) further comprises: the value that reads the zero-bit of Hot Spare start-up control working storage; And whether the value of judging the zero-bit of the Hot Spare start-up control working storage read equal 1, if equal, then stopping timer can normal response, otherwise stopping timer can not normal response.
The changing method of a kind of multiprocessor provided by the present invention automaticallyes switch between the first processor and second processor by stopping timer and Hot Spare start-up control working storage, and the method comprises following steps:
The response time that stops timer is set;
Start first processor, and write 0 zero-bit, the start-stop timer to Hot Spare start-up control working storage;
Whether the response time of judging the termination timer arrives, and when the response time that stops timer arrives, stops timer and sends a control signal; And
According to control signal, stop first processor, and start second processor.
Wherein control signal is a BOOT_NEXT stitch condition change signal.
A kind of hot plug of processor support method provided by the present invention is supported the hot plug of processor by stopping timer and Hot Spare start-up control working storage, and the method comprises following steps:
A1) be set the response time that stops timer;
B1) judge whether the processor of extracting that need carry out hot plug operations is the primary processor of work at present;
C1) be not primary processor if extract processor, then stop (Disable) to extract processor, and carry out hot plug operations extracting processor;
D1) otherwise, write 0 zero-bit, the start-stop timer to Hot Spare start-up control working storage; And
E1) when the response time that stops timer arrives, carry out the processor switching by stopping timer, and stop (Disable) primary processor, primary processor is carried out hot plug operations.
Step b1 wherein) further comprise: the needs that obtain user's input carry out the numbering of extracting processor of hot plug operations; Obtain the numbering of the primary processor of work at present; And judge whether the numbering of extracting processor is identical with the numbering of primary processor, and whether extract processor with judgement is primary processor.
Step e1 wherein) further comprises: when the response time that stops timer arrives, read the value of the zero-bit of Hot Spare start-up control working storage; And when the value of the zero-bit of Hot Spare start-up control working storage is 0, execution in step b1).
In sum, the present invention can detect the every function that stops timer, and self-timing ground switches between a plurality of processors, and is not subjected to the restriction of operating system and processor type, and software support to hot plug of processor, the security that improves hot plug operations have been realized.
Description of drawings
Fig. 1 is according to termination timer detection method process flow diagram of the present invention;
Whether normally whether Fig. 2 for starting success and clocking capability detection method process flow diagram according to termination timer of the present invention;
Whether normal Fig. 3 be according to termination timer response of the present invention detection method process flow diagram;
Fig. 4 is the method flow diagram that switches according to multiprocessor behind the os starting of the present invention; And
Fig. 5 is the support method flow diagram according to hot plug of processor of the present invention.
Wherein, description of reference numerals is as follows:
Step 100 is provided with response time and the interval time that stops timer
Step 110 writes 0 zero-bit to Hot Spare start-up control working storage, the start-stop timer
Whether step 120 stops timer and successfully starts
Whether the clocking capability that step 130 stops timer is normal
Step 140 writes 1 zero-bit to Hot Spare start-up control working storage, stops to stop timer
Whether step 150 stops timer and successfully stops
Step 160 writes 0 zero-bit to Hot Spare start-up control working storage, restarts the termination timer
Step 170 stops whether normal response of timer
Step 180 reporting errors
The step 200 reading system current time, give Timer1 with assignment with current time in system and response time
Step 210 reads the value of the zero-bit of Hot Spare start-up control working storage
Whether step 220 is 0
The step 230 reading system current time, give Timer2 with the current time in system assignment
Step 240Timer1-Timer2>interval time?
Step 250 reads the value of the zero-bit of Hot Spare start-up control working storage
Whether step 260 is 0
Step 270 is according to waiting for interval time
Step 280 reporting errors
The step 300 reading system current time, give Timer1 with assignment with current time in system and response time
The step 310 reading system current time, give Timer2 with the current time in system assignment
Step 320Timer1-Timer2=0?
Step 330 is waited for 1 millisecond
Step 340 reads the value of the zero-bit of Hot Spare start-up control working storage
Whether step 350 is 1
Step 360 reporting errors
Step 400 is provided with the response time that stops timer
Step 410 starts first processor, writes 0 zero-bit to Hot Spare start-up control working storage, the start-stop timer
The step 420 reading system current time, give Timer1 with assignment with current time in system and response time
The step 430 reading system current time, give Timer2 with the current time in system assignment
Step 440Timer1-Timer2=0?
Step 450 is waited for 1 millisecond
Step 460 stops timer and triggers change BOOT_NEXT stitch state
Step 470 stops first processor according to BOOT_NEXT stitch state, starts second processor
Step 500 is provided with the response time that stops timer
Whether step 501 is extracted processor is primary processor
Step 502 stops to extract processor, carries out hot plug operations to extracting processor
Step 503 writes 0 zero-bit to Hot Spare start-up control working storage, the start-stop timer
The step 504 reading system current time, give Timer1 with assignment with current time in system and response time
The step 505 reading system current time, give Timer2 with the current time in system assignment
Step 506Timer1-Timer2=0?
Step 507 is waited for 1 millisecond
Step 508 reads the value of the zero-bit of Hot Spare start-up control working storage
Whether step 509 is 1
Step 510 is carried out processor and is switched, and stops primary processor, and primary processor is carried out hot plug operations
Embodiment
Below, part elaborates to better embodiment of the present invention in conjunction with the accompanying drawings.
Please refer to Fig. 1, is the detection method process flow diagram of termination timer of the present invention shown in the figure.At first, be provided with response time of stopping timer (as, 2000 milliseconds) and interval time (as, 10 milliseconds) (step 100).Then, write 0 zero-bit, start-stop timer (step 110) to the Hot Spare start-up control working storage of communicating by letter with the termination timer.Whether successfully detect and stop timer startup (step 120), its detailed detection method will be described with reference to figure 2.When stopping the timer initiation failure, by sending mode such as look-at-me to System Reports mistake (step 180), and finally to User Alarms, type of alarm can adopt modes such as known audible alarm.After the termination timer successfully started, normally whether the clocking capability of detection termination timer (step 130), and its detailed detection method will be described with reference to figure 2.When the clocking capability that stops timer is undesired, by sending mode such as look-at-me to System Reports mistake (step 180), and finally to User Alarms, the type of alarm that its type of alarm can be when stopping the timer initiation failure is different, so that distinguish.When the clocking capability that stops timer just often, write 1 zero-bit to Hot Spare start-up control working storage, stop to stop timer (step 140).Detect to stop timer and whether successfully stop (step 150), whether successfully whether its detection method stops timer and successfully starts similarly with detecting, please refer to and stop the timer detailed description of startup to detecting.When stopping timer and stop to fail, by sending mode such as look-at-me to System Reports mistake (step 180), and finally to User Alarms.When the termination timer stops successfully, write 0 to Hot Spare start-up control working storage, restart termination timer (step 160).When the response time that stops timer arrives, detect and stop whether normal response (step 170) of timer, its detailed detection method will be described with reference to figure 3.When stopping timer can not normal response the time, by sending mode such as look-at-me to System Reports mistake (step 180), and finally to User Alarms.When stopping timer response just often, the detection of every function of stopping timer all to be finished, and stopped timer and do not have mistake, testing process finishes.
Please refer to Fig. 2, be the clocking capability that whether successfully starts according to termination timer of the present invention and stops timer detection method process flow diagram whether normally shown in the figure.After stopping timer initiation (step 110), the current time of reading system, the response time that the current time and the step 100 of system is provided with give a parameter Timer1 (step 200) of termination timer with assignment.Read the value (step 210) of the zero-bit of Hot Spare start-up control working storage, judge whether the value that reads is 0 (step 220).When the value that reads is not 0, promptly 0 zero-bit that can't successfully write Hot Spare start-up control working storage then stops the timer initiation failure, by sending mode such as look-at-me to System Reports mistake (step 280), and finally to User Alarms.When the value that reads is 0, then stop timer and successfully start.Then, the reading system current time, the current time in system assignment is given the parameter Timer2 (step 230) that stops timer.Does the value of judging parameter Timer1 deduct the interval time (step 240) that the value of parameter Timer2 is provided with greater than step 100? when less than interval time, the detection of end process.Otherwise, read the value (step 250) of the zero-bit of Hot Spare start-up control working storage, judge whether the value that reads is 0 (step 260).When the value that reads is 0, then according to waiting for (step 270) interval time.When arrived in interval time, repeating step 230 was to detect the clocking capability that stops timer.When the value that reads is not 0, the clocking capability that then stops timer is undesired, by sending mode such as look-at-me to System Reports mistake (step 280), and finally to User Alarms, the detection of end process.
Stop whether timer successfully stops the testing process (not shown) of (cancelling) and above-mentioned detection stops the similar process whether timer successfully starts.That is, read the value of the zero-bit of Hot Spare start-up control working storage, judge that the value that reads is 1? when the value that reads is not 1, then stop timer and stop failure, by sending mode such as look-at-me to the System Reports mistake, and finally to User Alarms.When the value that reads is 1, then stop timer and successfully stop.
Please refer to Fig. 3 whether normally, is to stop timer response detection method process flow diagram shown in the figure.As shown in Figure 1, when restart stop timer after (step 160), the current time of reading system, the response time that the current time and the step 100 of system is provided with give a parameter Timer1 (step 300) of termination timer with assignment.Then, the reading system current time, the current time in system assignment is given the parameter Timer2 (step 310) that stops timer.Does the value that the value of judging parameter Timer1 deducts parameter Timer2 equal 0 (step 320)? when being not equal to 0, the response time that promptly stops timer does not also arrive, and then waits for 1 millisecond (step 330), and repeating step 310 then.When equaling 0, the response time that promptly stops timer arrives, and then reads the value (step 340) of the zero-bit of Hot Spare start-up control working storage, judges whether the value that reads is 1 (step 350).When the value that reads is 1, the response time that promptly stops timer, the value of the zero-bit of Hot Spare start-up control working storage was transformed to 1 by 0 when arriving, and it is normal to stop timer response, the detection of end process.When the value that reads is not 1, it is undesired promptly to stop timer response, then by sending mode such as look-at-me to System Reports mistake (step 360), and finally to User Alarms, the detection of end process.
According to foregoing description, the present invention can be to the startup, the timing that stop timer, stop every functions such as (cancelling) and response detects, and notifies the user by various type of alarms.
Please refer to Fig. 4, is according to multiprocessor changing method process flow diagram behind the os starting of the present invention shown in the figure, and it automaticallyes switch between the first processor and second processor by stopping timer and Hot Spare start-up control working storage.At first, be set the response time (step 400) that stops timer.Then, start first processor, write 0 zero-bit, start-stop timer (step 410) to Hot Spare start-up control working storage.The current time of reading system, the response time that current time of system and step 400 are provided with give a parameter Timer1 (step 420) who stops timer with assignment.Once more the reading system current time, the current time in system assignment is given the parameter Timer2 (step 430) that stops timer.Does the value that the value of judging parameter Timer1 deducts parameter Timer2 equal 0 (step 440)? when being not equal to 0, the response time that promptly stops timer does not also arrive, and then waits for 1 millisecond (step 450), and repeating step 430 then.When equaling 0, the response time that promptly stops timer arrives, and stops timer and sends a control signal, and this control signal changes BOOT_NEXT stitch state (step 460) in order to trigger.System host board stops first processor according to the stitch state of BOOT_NEXT, starts second processor (step 470).During above-mentioned termination timer wait-for-response, whether normal method is monitored the state that stops timer can to adopt detection to stop timer response, stop timer response when undesired when detecting, can notify the user to finish this second processor handoff procedure by modes such as audible alarms.
As mentioned above, by the response time that stops timer is set, can realize that self-timing ground switches between a plurality of processors, and not be subjected to the restriction of operating system and processor type.
Please refer to Fig. 5, is the support method flow diagram according to hot plug of processor of the present invention shown in the figure.At first, be set the response time (step 500) that stops timer.Then, need judgement be carried out the primary processor (step 501) that processor is work at present of extracting of hot plug operations? above-mentioned judgement can be adopted following method: the needs that obtain user's input carry out the numbering of extracting processor of hot plug operations, the numbering of the primary processor of reading system work at present, do you judge that the numbering of extracting processor is identical with the numbering of primary processor? when both number identical, then need to carry out the primary processor that processor is work at present of extracting of hot plug operations, otherwise otherwise.
When extracting processor for the primary processor of work at present, system stops (Disable) and extracts processor, carries out hot plug operations (step 502) to extracting processor.When extracting processor and be the primary processor of work at present, carry out the processor blocked operation.As improvement, can adopt modes such as dialog box to point out the user to carry out hot plug operations earlier to extracting processor, need carry out the processor blocked operation.When the user selects not carry out the processor blocked operation, point out the user once more and finish this process.When the user selects to carry out the processor switching, write 0 zero-bit, start-stop timer (step 503) to Hot Spare start-up control working storage.Then, the current time of reading system, the response time that current time of system and step 500 are provided with give a parameter Timer1 (step 504) who stops timer with assignment.Once more the reading system current time, the current time in system assignment is given the parameter Timer2 (step 505) that stops timer.Does the value that the value of judging parameter Timer1 deducts parameter Timer2 equal 0 (step 506)? when being not equal to 0, the response time that promptly stops timer does not also arrive, and then waits for 1 millisecond (step 507), and repeating step 505 then.When equaling 0, the response time that promptly stops timer arrives, and then reads the value (step 508) of the zero-bit of Hot Spare start-up control working storage, judges whether the value that reads is 1 (step 509).When the value that reads is 1, the response that promptly stops timer is normal, carries out processor and switches, and stops (Disable) primary processor, and primary processor is carried out hot plug operations (step 510).When the value that reads is not 1, the response that promptly stops timer is undesired, and then repeating step 501.
As mentioned above, the present invention can realize the software support to hot plug of processor, and improves the security of hot plug operations by the processor handoff technique.
Though the present invention discloses as above with aforesaid better embodiment, so it is not in order to limit the present invention.Those skilled in the art should recognize under the situation of the scope and spirit of the present invention that do not break away from appending claims of the present invention and disclosed, the change of doing with modify all belong to protection scope of the present invention in.Please refer to appending claims about the protection domain that the present invention defined.

Claims (8)

1. detection method that stops timer, it is by stopping the Hot Spare start-up control working storage that timer communicates by letter and realize that the method includes the steps of with one:
A) response time and an interval time of this termination timer are set;
B) write 0 zero-bit, start this termination timer to this Hot Spare start-up control working storage;
C) judge whether 0 successfully write the zero-bit of this Hot Spare start-up control working storage, whether successfully start to judge this termination timer;
D), then in this stops this response time of timer,, whether normal with the clocking capability of judging this termination timer according to the value of the zero-bit of regularly judging this Hot Spare start-up control working storage this interval time if should stop the timer initiation success;
E) write 1 zero-bit, stop this termination timer to this Hot Spare start-up control working storage;
F) judge whether 1 successfully write the zero-bit of this Hot Spare start-up control working storage, whether successfully stop judging this termination timer;
G) write 0 zero-bit, restart this termination timer to this Hot Spare start-up control working storage; And
H) when this this response time that stops timer arrives, judge the value of the zero-bit of this Hot Spare start-up control working storage, whether can normal response to judge this termination timer.
2. the detection method of termination timer as claimed in claim 1, wherein step d) further comprises:
Read the value of the zero-bit of this Hot Spare start-up control working storage; And
Whether the value of judging the zero-bit of this Hot Spare start-up control working storage that reads equals 0, if equal, the clocking capability that then should stop timer is normal, otherwise this clocking capability that stops timer is undesired.
3. the detection method of termination timer as claimed in claim 1, wherein step h) further comprise:
Read the value of the zero-bit of this Hot Spare start-up control working storage; And
Whether the value of judging the zero-bit of this Hot Spare start-up control working storage read equals 1, if equal, then should stop timer can normal response, otherwise this stops timer can not normal response.
4. the changing method of a multiprocessor, it stops timer by one and a Hot Spare start-up control working storage automaticallyes switch between a first processor and one second processor, and the method includes the steps of:
One response time of this termination timer is set;
Start this first processor, and write 0 zero-bit, start this termination timer to this Hot Spare start-up control working storage;
Whether this response time of judging this termination timer arrives, and when this this response time that stops timer arrived, this termination timer sent a control signal; And
According to this control signal, stop this first processor, and start this second processor.
5. the changing method of multiprocessor as claimed in claim 4, wherein this control signal is a BOOT_NEXT stitch condition change signal.
6. hot plug of processor support method, it stops the hot plug that timer and a Hot Spare start-up control working storage are supported processor by one, and the method includes the steps of:
A1) response time of this termination timer is set;
B1) judge and to carry out one of hot plug operations whether extract processor be a primary processor of work at present;
C1) be not this primary processor if this extracts processor, then stop this extracting processor, and this is extracted processor carry out hot plug operations;
D1) otherwise, write 0 zero-bit to this Hot Spare start-up control working storage, start this termination timer; And
E1) when this this response time that stops timer arrives, carry out processor by this termination timer and switch, and stop this primary processor, this primary processor is carried out hot plug operations.
7. hot plug of processor support method as claimed in claim 6, wherein step b1) further comprise:
The needs that obtain user input carry out hot plug operations this extract the numbering of processor;
Obtain the numbering of this primary processor of work at present; And
Whether judge whether this numbering of extracting processor is identical with the numbering of this primary processor, be this primary processor to judge that this extracts processor.
8. hot plug of processor support method as claimed in claim 6, wherein step e1) further comprise:
When this this response time that stops timer arrives, read the value of the zero-bit of this Hot Spare start-up control working storage; And
When the value of the zero-bit of this Hot Spare start-up control working storage is 0, execution in step b1).
CNA2006101646952A 2006-12-14 2006-12-14 Method for detecting timer, switching multiprocessor and supporting hot plug of processor Pending CN101201758A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103631736A (en) * 2013-11-27 2014-03-12 华为技术有限公司 Method and device for controlling equipment resources
WO2020000354A1 (en) * 2018-06-29 2020-01-02 Intel Corporation Cpu hot-swapping

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103631736A (en) * 2013-11-27 2014-03-12 华为技术有限公司 Method and device for controlling equipment resources
CN103631736B (en) * 2013-11-27 2016-08-17 华为技术有限公司 device resource control method and device
WO2020000354A1 (en) * 2018-06-29 2020-01-02 Intel Corporation Cpu hot-swapping
US11327918B2 (en) 2018-06-29 2022-05-10 Intel Corporation CPU hot-swapping

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