CN101197399B - Thin film silicon/crystalline silicon back junction solar battery - Google Patents

Thin film silicon/crystalline silicon back junction solar battery Download PDF

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CN101197399B
CN101197399B CN2007103042307A CN200710304230A CN101197399B CN 101197399 B CN101197399 B CN 101197399B CN 2007103042307 A CN2007103042307 A CN 2007103042307A CN 200710304230 A CN200710304230 A CN 200710304230A CN 101197399 B CN101197399 B CN 101197399B
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silicon
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silicon layer
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CN101197399A (en
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赵雷
王文静
刁宏伟
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Institute of Electrical Engineering of CAS
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Abstract

A thin film silicon/crystalline silicon back junction solar cell comprises a p-type silicon substrate (1), an n-type doping thin film silicon layer (2) arranged on the backlight surface of the p-type silicon substrate (1), a back electrode (3) arranged on the n-type doping thin film silicon layer (2) and a front transparent conductive electrode (4) arranged on the phototropic surface of the p-typesilicon substrate (1), wherein a first sort of intrinsic thin film silicon layer (5) is arranged between the p-type silicon substrate (1) and the n-type doping thin film silicon layer (2); a second s ort of intrinsic thin film silicon layer (6) and/or a p-type doping thin film silicon layer (7) are/is arranged between the p-type silicon substrate (1) and the front transparent conductive electrode (4); moreover, the front transparent conductive electrode (4) can also be provided with a metal gate line (8).

Description

A kind of thin film silicon/crystalline silicon back junction solar battery
Technical field
The present invention relates to a kind of solar cell, particularly a kind of thin film silicon/crystalline silicon back junction solar battery.
Background technology
The research of silicon solar cell and utilization are to realize one of main path of regenerative resource, crystal silicon battery accounts for more than 90% of the total share in photovoltaic market, wherein most batteries based on pn knot all by the High temperature diffusion preparation, consumed energy is big, complex process.
Japan Sanyo company has developed a kind of HIT (Heterojunction with Intrinsic Thin Layer) heterojunction battery.Described in United States Patent (USP) 5213628, utilize doped amorphous silicon film on crystal silicon, to make the pn knot, and insert one deck intrinsic amorphous silicon layer betwixt and come the passivation heterojunction boundary.Because si deposition technology can be finishing below 200 ℃, than conventional batteries, this heterojunction battery has the stable and thin-film silicon cell advantages of being cheap of monocrystalline silicon battery concurrently: adopt the low temperature preparation process of no High temperature diffusion, energy consumption is little; The cost of material is low; Preparation technology is simple relatively; What particularly amorphous silicon had has improved battery efficiency greatly to the superior passivation ability in crystal silicon surface.
The achievement in research of Sanyo causes the extensive concern of international coverage, have with thin film silicon, comprise: noncrystal membrane silicon (a-Si:H), nano-crystal film silicon (nc-Si:H), microcrystalline film silicon (μ c-Si:H) etc. are emitter, monocrystalline silicon is the thin film silicon/crystalline silicon solar cell of absorbent layer structure, particularly n type thin film silicon/silicon/crystalline silicon heterogenous junction battery of p type becomes the research focus of field of solar energy, and is more extensive because this p type crystalline silicon substrate is used in field of solar energy.The basic structure that the battery of being studied adopts all is that side to light is the preceding pn junction structure of TCO (transparent conductive oxide) electrode/n type thin film silicon/p type crystalline silicon, between n type thin film silicon and p type crystalline silicon, contain or do not contain the intrinsic membrane silicon layer, and substantially all be to launch around the microstructure of thin film silicon.Such as, United States Patent (USP) 5066340 discloses a kind of battery structure that inserts microcrystal silicon layer between amorphous silicon and crystal silicon heterojunction.Chinese patent application 200510098526.9 discloses solar cell of a kind of TCO/n of having type nanocrystal silicon/intrinsic nanocrystal silicon/p type crystalline silicon structure and preparation method thereof.
But the efficiency far based on the thin film silicon/crystalline silicon heterojunction battery of p type silicon substrate that experiment is made is lower than the level that Sanyo is obtained on n type silicon substrate.The reason that causes this situation be the more important thing is relevant with the concrete structure of battery except the performance of p type silicon substrate itself.The basic structure that present this battery adopts is TCO/n type thin film silicon/p type crystalline silicon/aluminium.We find that these common transparent conductive oxides are not preferred cathode material, because their work function is very high usually.The knot direction of an electric field that TCO is produced on formed schottky junction on the n type thin film silicon is just opposite with the knot direction of an electric field of the pn knot that forms between n type thin film silicon and p type crystalline silicon.If n type thin film silicon is very thin, described schottky junction can overlap with described pn knot part, causes battery open circuit voltage to descend, and directly contacts with following structure if TCO penetrates n type thin film silicon, and contact point also can form the short-channel of inside battery.General, the knot of the schottky junction between nesa coating and the n type thin film silicon is wide more than tens nanometers, therefore, wants to overcome above-mentioned ill effect, and it is wide that the thickness of n type doping film silicon is greater than this knot at least.But doping film silicon internal flaw is many, poor optical properties, and thickness too conference forms the dead layer of light at solar battery surface.The synthesis result of above-mentioned two kinds of effects makes and be difficult to obtain high efficiency heterojunction battery on p type crystalline silicon substrate.
The nesa coating that work function is high is preferred anode material, and the metal species material that work function is low is only preferred cathode material, but these materials are normally lighttight, is produced on the side to light of solar cell just to have certain degree of difficulty.
Summary of the invention
The objective of the invention is for transparency conductive electrode work function before overcoming in the prior art too highly, a kind of thin film silicon/crystalline silicon back junction solar battery based on p type silicon substrate is provided thin film silicon/crystalline silicon heterojunction battery adverse effect based on p type silicon substrate.
The basic structure of battery of the present invention comprises: p type silicon substrate, the n type doping film silicon layer on p type silicon substrate shady face, the back electrode on n type doping film silicon layer, the preceding transparency conductive electrode on p type silicon substrate side to light.Described p type silicon substrate is the CZ monocrystalline substrate, FZ monocrystalline substrate, and polysilicon substrate.The preferable range of p type silicon substrate thickness is 30-500 μ m, and resistivity is in the scope of 0.1-100 Ω cm.Described p type surface of silicon substrate can be the plane, also can pass through such as wet etching or other PROCESS FOR TREATMENT and has suede structure; Described n type doping film silicon layer is amorphous silicon, nanocrystal silicon, microcrystal silicon or other material, and the preferable range of n type doping film silicon layer thickness is between 1-50nm; Described back electrode is any conductive material, and preferably work function is lower than the material of 4.5eV.Transparency conductive electrode is the material that work function is higher than 5.0eV before described.
In battery of the present invention,, therefore can will do thicklyer in the acceptable economically scope of n type doping film silicon layer because the pn knot is in the shady face of solar cell.And the schottky junction electric field that forms between preceding transparency conductive electrode with high work function on the side to light and the p type silicon substrate just can play the effect of few son back of the body field.
The intrinsic thin film silicon is compared with doping film silicon, and internal flaw is few.In order to improve the interface quality of thin film silicon/crystalline silicon heterojunction, in solar cell of the present invention, between p type silicon substrate and described n type doping film silicon layer, can contain first kind of intrinsic membrane silicon layer.Described this intrinsic membrane silicon layer is amorphous silicon, nanocrystal silicon, microcrystal silicon or other material.The thickness of intrinsic membrane silicon layer is the scope between 1-30nm preferably.
In order to improve the interface interfacial characteristics of few son back of the body field, in solar cell of the present invention, between p type silicon substrate and preceding transparency conductive electrode, can also contain second kind of intrinsic membrane silicon layer.Described this intrinsic membrane silicon layer is amorphous silicon, nanocrystal silicon, microcrystal silicon or other material.Intrinsic film silicon layer thickness is the scope between 1-30nm preferably.Between described second kind of intrinsic membrane silicon layer and preceding transparency conductive electrode, can also further contain one deck p type doping film silicon layer, to play the effect that strengthens few son back of the body field.Described p type doping film silicon layer is amorphous silicon, nanocrystal silicon, microcrystal silicon or other material, and the thickness of p type doping film silicon layer is the scope between 1-30nm preferably.The present invention can also only contain described p type doping film silicon layer between described p type silicon substrate and preceding transparency conductive electrode.
For the side direction collection efficiency and convenient electrical connection that increase electric current, solar cell of the present invention can also have metal grid lines on preceding transparency conductive electrode.The shape of grid line and distribution can be adopted the design in the conventional solar cell.
Description of drawings
The basic structure schematic diagram of Fig. 1 battery of the present invention is among the figure: 1p type silicon substrate, 2n type doping film silicon layer, 3 back electrodes, 4 preceding transparency conductive electrodes;
Fig. 2 a is the structural representation of one of specific embodiment of the invention, and Fig. 2 b is the I-V characteristic curve under the AM1.5 rayed of this example battery theoretical modeling;
Fig. 3 a is two a structural representation of the specific embodiment of the invention, and Fig. 3 b is the I-V characteristic curve under the AM1.5 rayed of this example battery theoretical modeling;
Fig. 4 a is three a structural representation of the specific embodiment of the invention, and Fig. 4 b is the I-V characteristic curve under the AM1.5 rayed of this example battery theoretical modeling;
Fig. 5 a is four a structural representation of the specific embodiment of the invention, and Fig. 5 b is the I-V characteristic curve under the AM1.5 rayed of this example battery theoretical modeling;
Fig. 6 a is five a structural representation of the specific embodiment of the invention, and Fig. 6 b is the I-V characteristic curve under the AM1.5 rayed of this example battery theoretical modeling;
Fig. 7 a is six a structural representation of the specific embodiment of the invention, and Fig. 7 b is the I-V characteristic curve under the AM1.5 rayed of this example battery theoretical modeling;
Fig. 8 a is seven a structural representation of the specific embodiment of the invention, and Fig. 8 b is the I-V characteristic curve under the AM1.5 rayed of this example battery theoretical modeling;
Fig. 9 a is eight a structural representation of the specific embodiment of the invention, and Fig. 9 b is the I-V characteristic curve under the AM1.5 rayed of this example battery theoretical modeling.
Embodiment
The invention will be further described below in conjunction with the drawings and specific embodiments.
As shown in Figure 1, basic structure of the present invention comprises: p type silicon substrate 1, the n type doping film silicon layer 2 on p type silicon substrate 1 shady face, the back electrode 3 on n type doping film silicon layer 2, the preceding transparency conductive electrode 4 on p type silicon substrate 1 side to light.P type silicon substrate 1 is the CZ monocrystalline substrate, FZ monocrystalline substrate, and polysilicon substrate.P type silicon substrate 1 thickness is in the scope of 30-500 μ m, and resistivity is in the scope of 0.1-100 Ω cm.The surface of p type silicon substrate 1 can be the plane or have suede structure; N type doping film silicon layer 2 is amorphous silicon, nanocrystal silicon, microcrystal silicon or other material, and its thickness is between 1-50nm; Back electrode 3 is any conductive materials, and preferably work function is lower than the material of 4.5eV; Preceding transparency conductive electrode 4 is materials that work function is higher than 5.0eV.
In solar cell of the present invention, between p type silicon substrate 1 and n type doping film silicon layer 2, can contain first kind of intrinsic membrane silicon layer 5; Between p type silicon substrate 1 and preceding transparency conductive electrode 4, can also contain second kind of intrinsic membrane silicon layer 6, between second kind of intrinsic membrane silicon layer 6 and preceding transparency conductive electrode 4, can also contain one deck p type doping film silicon layer 7; Perhaps, can also between p type silicon substrate 1 and preceding transparency conductive electrode 4, only contain p type doping film silicon layer 7.Described first kind of intrinsic membrane silicon layer 5, second kind of intrinsic membrane silicon layer 6 and p type doping film silicon layer 7 are selected from amorphous silicon, nanocrystal silicon, microcrystal silicon or other material respectively, and thickness is between 1-30nm.
For the side direction collection efficiency and convenient electrical connection that increase electric current, solar cell of the present invention can also have metal grid lines 8 on preceding transparency conductive electrode 4.The shape of grid line and distribution can be adopted the design in the conventional solar cell, and this is well-known to those skilled in the art.
Embodiment 1
The battery structure of one of specific embodiment of the invention is as shown in Fig. 2 a, and p type silicon substrate 1 is the FZ monocrystalline substrate, and its thickness is 300 μ m, and resistivity is 1.0 Ω cm, and substrate surface is the plane, does not contain suede structure; Be n type doping film silicon layer 2 on p type silicon substrate 1 shady face, n type doping film silicon layer 2 is n type doped amorphous silicon, and band gap width is 1.74eV, doping content 1.0 * 10 20/ cm 3, thickness is 10nm; On n type doping film silicon layer 2 is back electrode 3, and the work function of back electrode 3 is 4.2eV; Be preceding transparency conductive electrode 4 on p type silicon substrate 1 side to light, the work function of preceding transparency conductive electrode 4 is 5.6eV.The side to light light reflectivity is 10%, do not consider the defective in the amorphous silicon, Fig. 2 b provides the I-V characteristic curve of this battery under AM1.5 spectrum that adopts AFORS-HET software (German Hahn-Meitner research institute exploitation) to simulate, and the performance that obtains is: open circuit voltage V OC=681.7mV, short-circuit current density J SC=32.08mA/cm 2, fill factor, curve factor FF=83.9%, efficiency eta=18.35%.
Embodiment 2
Two battery structure of the specific embodiment of the invention is shown in Fig. 3 a, and p type silicon substrate 1 is the FZ monocrystalline substrate, and its thickness is 500 μ m, and resistivity is 1.0 Ω cm, and substrate surface has suede structure; Be the amorphous silicon that 5, the first kinds of intrinsic membrane silicon layer 5 of first kind of intrinsic membrane silicon layer are intrinsics on p type silicon substrate 1 shady face, band gap width is 1.72eV, and thickness is 2nm; Be n type doping film silicon layer 2 on first kind of intrinsic membrane silicon layer 5, n type doping film silicon layer 2 is n type doped amorphous silicon, and band gap width is 1.74eV, doping content 1.0 * 10 20/ cm 3, thickness is 10nm; On n type doping film silicon layer 2 is back electrode 3, and the work function of back electrode 3 is 4.2eV; Be preceding transparency conductive electrode 4 on p type silicon substrate 1 side to light, the work function of preceding transparency conductive electrode 4 is 5.6eV.The side to light light reflectivity is 5%, do not consider the defective in the amorphous silicon, Fig. 3 b provides the I-V characteristic curve of this battery under AM1.5 spectrum that adopts AFORS-HET software (German Hahn-Meitner research institute exploitation) to simulate, and the performance that obtains is: open circuit voltage V OC=667.4mV, short-circuit current density J SC=27.28mA/cm 2, fill factor, curve factor FF=83.68%, efficiency eta=15.24%.
Embodiment 3
Three battery structure of the specific embodiment of the invention is shown in Fig. 4 a, and p type silicon substrate 1 is the CZ monocrystalline substrate, and its thickness is 30 μ m, and resistivity is 1.0 Ω cm, and substrate surface is the plane, does not contain suede structure; Be the amorphous silicon that 5, the first kinds of intrinsic membrane silicon layer 5 of first kind of intrinsic membrane silicon layer are intrinsics on p type silicon substrate 1 shady face, band gap width is 1.72eV, and thickness is 1nm; Be n type doping film silicon layer 2 on first kind of intrinsic membrane silicon layer 5, n type doping film silicon layer 2 is n type doped amorphous silicon, and band gap width is 1.74eV, doping content 1.0 * 10 20/ cm 3, thickness is 50nm; On n type doping film silicon layer 2 is back electrode 3, and the work function of back electrode 3 is 4.2eV; Be the amorphous silicon that 6, the second kinds of intrinsic membrane silicon layer 6 of second kind of intrinsic membrane silicon layer are intrinsics on p type silicon substrate 1 side to light, band gap width is 1.72eV, and thickness is 1nm; Be preceding transparency conductive electrode 4 on second kind of intrinsic membrane silicon layer 6, the work function of preceding transparency conductive electrode 4 is 5.2V.The side to light light reflectivity is 10%, do not consider the defective in the amorphous silicon, Fig. 4 b provides the I-V characteristic curve of this battery under AM1.5 spectrum that adopts AFORS-HET software (German Hahn-Meitner research institute exploitation) to simulate, and the performance that obtains is: open circuit voltage V OC=734.9mV, short-circuit current density J SC=32.73mA/cm 2, fill factor, curve factor FF=83.41%, efficiency eta=20.06%.
Embodiment 4
Four battery structure of the specific embodiment of the invention is shown in Fig. 5 a, and p type silicon substrate 1 is the CZ monocrystalline substrate, and its thickness is 30 μ m, and resistivity is 0.1 Ω cm, and substrate surface contains suede structure; Be the microcrystal silicon that 5, the first kinds of intrinsic membrane silicon layer 5 of first kind of intrinsic membrane silicon layer are intrinsics on p type silicon substrate 1 shady face, band gap width is 1.35eV, and thickness is 15nm; Be n type doping film silicon layer 2 on first kind of intrinsic membrane silicon layer 5, n type doping film silicon layer 2 is nanocrystal silicons that the n type mixes, and band gap width is 1.85eV, doping content 1.0 * 10 20/ cm 3, thickness is 25nm; On n type doping film silicon layer 2 is back electrode 3, and the work function of back electrode 3 is 4.2eV; Be the amorphous silicon that 6, the second kinds of intrinsic membrane silicon layer 6 of second kind of intrinsic membrane silicon layer are intrinsics on p type silicon substrate 1 side to light, band gap width is 1.72eV, and thickness is 1nm; Be p type doping film silicon layer 7 on second kind of intrinsic membrane silicon layer 6, p type doping film silicon layer 7 is p type doped amorphous silicon, and band gap width is 1.74eV, doping content 1.0 * 10 20/ cm 3, thickness is 30nm; Be preceding transparency conductive electrode 4 on p type doping film silicon layer 7, the work function of preceding transparency conductive electrode 4 is 5.2eV; On preceding transparency conductive electrode 4, be metal grid lines 8.The side to light light reflectivity is 5%, do not consider the defective in the amorphous silicon, Fig. 5 b provides the I-V characteristic curve of this battery under AM1.5 spectrum that adopts AFORS-HET software (German Hahn-Meitner research institute exploitation) to simulate, and the performance that obtains is: open circuit voltage V OC=794mV, short-circuit current density J SC=32.09mA/cm 2, fill factor, curve factor FF=87.37%, efficiency eta=22.26%.
Embodiment 5
Five battery structure of the specific embodiment of the invention is shown in Fig. 6 a, and p type silicon substrate 1 is the polysilicon substrate, and its thickness is 300 μ m, and resistivity is 0.1 Ω cm, and substrate surface has suede structure; Be the amorphous silicon that 5, the first kinds of intrinsic membrane silicon layer 5 of first kind of intrinsic membrane silicon layer are intrinsics on p type silicon substrate 1 shady face, band gap width is 1.72eV, and thickness is 2nm; Be n type doping film silicon layer 2 on first kind of intrinsic membrane silicon layer 5, n type doping film silicon layer 2 is n type doped amorphous silicon, and band gap width is 1.74eV, doping content 1.0 * 10 20/ cm 3, thickness is 10nm; On n type doping film silicon layer 2 is back electrode 3, and the work function of back electrode 3 is 4.2eV; Be p type doping film silicon layer 7 on p type silicon substrate 1 side to light, p type doping film silicon layer 7 is p type doped amorphous silicon, and band gap width is 1.74eV, doping content 1.0 * 10 20/ cm 3, thickness is 5nm; Be preceding transparency conductive electrode 4 on p type doping film silicon layer 7, preceding transparency conductive electrode 4 work functions are 5.2eV.The side to light light reflectivity is 5%, do not consider the defective in the amorphous silicon, Fig. 6 b provides the I-V characteristic curve of this battery under AM1.5 spectrum that adopts AFORS-HET software (German Hahn-Meitner research institute exploitation) to simulate, and the performance that obtains is: open circuit voltage V OC=682.5mV, short-circuit current density J SC=33.1mA/cm 2, fill factor, curve factor FF=83.85%, efficiency eta=18.94%.
Embodiment 6
Six battery structure of the specific embodiment of the invention is shown in Fig. 7 a, and p type silicon substrate 1 is the polysilicon substrate, and its thickness is 30 μ m, and resistivity is 100 Ω cm, and substrate surface contains suede structure; Be n type doping film silicon layer 2 on p type silicon substrate 1 shady face, n type doping film silicon layer 2 is n type doped amorphous silicon, and band gap width is 1.74eV, doping content 1.0 * 10 20/ cm 3, thickness is 50nm; On n type doping film silicon layer 2 is back electrode 3, and the work function of back electrode 3 is 4.2eV; Be the amorphous silicon that 6, the second kinds of intrinsic membrane silicon layer 6 of second kind of intrinsic membrane silicon layer are intrinsics on p type silicon substrate 1 side to light, band gap width is 1.72eV, and thickness is 2nm; Be preceding transparency conductive electrode 4 on second kind of intrinsic membrane silicon layer 6, the work function of preceding transparency conductive electrode 4 is 5.6eV; On preceding transparency conductive electrode 4, be metal grid lines 8.The side to light light reflectivity is 5%, do not consider the defective in the amorphous silicon, Fig. 7 b provides the I-V characteristic curve of this battery under AM1.5 spectrum that adopts AFORS-HET software (German Hahn-Meitner research institute exploitation) to simulate, and the performance that obtains is: open circuit voltage V OC=723.5mV, short-circuit current density J SC=37.42mA/cm 2, fill factor, curve factor FF=65.64%, efficiency eta=17.77%.
Embodiment 7
Seven battery structure of the specific embodiment of the invention is shown in Fig. 8 a, and p type silicon substrate 1 is the FZ monocrystalline substrate, and its thickness is 300 μ m, and resistivity is 50 Ω cm, and substrate surface is the plane; Be n type doping film silicon layer 2 on p type silicon substrate 1 shady face, n type doping film silicon layer 2 is n type doped amorphous silicon, and band gap width is 1.74eV, doping content 1.0 * 10 20/ cm 3, thickness is 10nm; On n type doping film silicon layer 2 is back electrode 3, and the work function of back electrode 3 is 4.2eV; Be the amorphous silicon that 6, the second kinds of intrinsic membrane silicon layer 6 of second kind of intrinsic membrane silicon layer are intrinsics on p type silicon substrate 1 side to light, band gap width is 1.72eV, and thickness is 2nm; Be p type doping film silicon layer 7 on second kind of intrinsic membrane silicon layer 6, p type doping film silicon layer 7 is a p type doped amorphous silicon carbon, and band gap width is 2.0eV, doping content 1.0 * 10 20/ cm 3, thickness is 2nm; Be preceding transparency conductive electrode 4 on p type doping film silicon layer 7, the work function of preceding transparency conductive electrode 4 is 5.6eV.On preceding transparency conductive electrode 4, be metal grid lines 8.The side to light light reflectivity is 10%, do not consider the defective in the amorphous silicon, Fig. 8 b provides the I-V characteristic curve of this battery under AM1.5 spectrum that adopts AFORS-HET software (German Hahn-Meitner research institute exploitation) to simulate, and the performance that obtains is: open circuit voltage V OC=651.5mV, short-circuit current density J SC=35.49mA/cm 2, fill factor, curve factor FF=75.46%, efficiency eta=17.45%.
Embodiment 8
Eight battery structure of the specific embodiment of the invention is shown in Fig. 9 a, and p type silicon substrate 1 is the CZ monocrystalline substrate, and its thickness is 250 μ m, and resistivity is 1.0 Ω cm, and substrate surface is the plane; Be n type doping film silicon layer 2 on p type silicon substrate 1 shady face, n type doping film silicon layer 2 is n type doped amorphous silicon, and band gap width is 1.74eV, doping content 1.0 * 10 20/ cm 3, thickness is 30nm; On n type doping film silicon layer 2 is back electrode 3, and the work function of back electrode 3 is 4.2eV; Be p type doping film silicon layer 7 on p type silicon substrate 1 side to light, p type doping film silicon layer 7 is p type doped amorphous silicon, and band gap width is 1.74eV, doping content 1.0 * 10 20/ cm 3, thickness is 5nm; Be preceding transparency conductive electrode 4 on p type doping film silicon layer 7, preceding transparency conductive electrode 4 work functions are 5.6eV.On preceding transparency conductive electrode 4, be metal grid lines 8.The side to light light reflectivity is 10%, do not consider the defective in the amorphous silicon, Fig. 9 b provides the I-V characteristic curve of this battery under AM1.5 spectrum that adopts AFORS-HET software (German Hahn-Meitner research institute exploitation) to simulate, and the performance that obtains is: open circuit voltage V OC=684.3mV, short-circuit current density J SC=30.39mA/cm 2, fill factor, curve factor FF=83.81%, efficiency eta=17.43%.

Claims (9)

1. thin film silicon/crystalline silicon back junction solar battery, it is characterized in that this solar cell comprises p type silicon substrate (1), n type doping film silicon layer (2) on p type silicon substrate (1) shady face, back electrode (3) on described n type doping film silicon layer (2), and the preceding transparency conductive electrode (4) on p type silicon substrate (1) side to light, described p type silicon substrate (1) is CZ monocrystalline substrate, FZ monocrystalline substrate or polysilicon substrate, and the surface is the plane or has suede structure; Described n type doping film silicon layer (2) is amorphous silicon, nanocrystal silicon, microcrystal silicon or other material; Described back electrode (3) is any conductive material; Transparency conductive electrode (4) is the material that work function is higher than 5.0eV before described.
2. thin film silicon/crystalline silicon back junction solar battery according to claim 1 is characterized in that containing first kind of intrinsic membrane silicon layer (5) between p type silicon substrate (1) and n type doping film silicon layer (2); Described first kind of intrinsic membrane silicon layer (5) is amorphous silicon, nanocrystal silicon, microcrystal silicon or other material.
3. thin film silicon/crystalline silicon back junction solar battery according to claim 1 is characterized in that containing second kind of intrinsic membrane silicon layer (6) between p type silicon substrate (1) and preceding transparency conductive electrode (4); Described second kind of intrinsic membrane silicon layer (6) is amorphous silicon, nanocrystal silicon, microcrystal silicon or other material.
4. thin film silicon/crystalline silicon back junction solar battery according to claim 1 is characterized in that containing p type doping film silicon layer (7) between p type silicon substrate (1) and preceding transparency conductive electrode (4); Described p type doping film silicon layer (7) is amorphous silicon, nanocrystal silicon, microcrystal silicon or other material.
5. thin film silicon/crystalline silicon back junction solar battery according to claim 2 is characterized in that containing second kind of intrinsic membrane silicon layer (6) between p type silicon substrate (1) and preceding transparency conductive electrode (4); Described second kind of intrinsic membrane silicon layer (6) is amorphous silicon, nanocrystal silicon, microcrystal silicon or other material.
6. thin film silicon/crystalline silicon back junction solar battery according to claim 2 is characterized in that containing p type doping film silicon layer (7) between p type silicon substrate (1) and preceding transparency conductive electrode (4); Described p type doping film silicon layer (7) is amorphous silicon, nanocrystal silicon, microcrystal silicon or other material.
7. thin film silicon/crystalline silicon back junction solar battery according to claim 3 is characterized in that containing p type doping film silicon layer (7) between second kind of intrinsic membrane silicon layer (6) and preceding transparency conductive electrode (4); Described p type doping film silicon layer (7) is amorphous silicon, nanocrystal silicon, microcrystal silicon or other material.
8. thin film silicon/crystalline silicon back junction solar battery according to claim 5 is characterized in that containing p type doping film silicon layer (7) between second kind of intrinsic membrane silicon layer (6) and preceding transparency conductive electrode (4); Described p type doping film silicon layer (7) is amorphous silicon, nanocrystal silicon, microcrystal silicon or other material.
9. according to any described thin film silicon/crystalline silicon back junction solar battery in the claim 1 to 8, it is characterized in that on preceding transparency conductive electrode (4), containing the metal grid lines (8) that increases electric current side direction collection efficiency.
CN2007103042307A 2007-12-26 2007-12-26 Thin film silicon/crystalline silicon back junction solar battery Expired - Fee Related CN101197399B (en)

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