CN101193307A - Method for storing and exchanging filtering parameter data - Google Patents
Method for storing and exchanging filtering parameter data Download PDFInfo
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- CN101193307A CN101193307A CN 200610123657 CN200610123657A CN101193307A CN 101193307 A CN101193307 A CN 101193307A CN 200610123657 CN200610123657 CN 200610123657 CN 200610123657 A CN200610123657 A CN 200610123657A CN 101193307 A CN101193307 A CN 101193307A
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Abstract
The invention discloses a method for storing and exchanging parameter data of deblocking filtering, which includes the following steps: a parameter required by deblocking filtering is filled into an internal memory area during a decoding process; macro-block data in a top row on an external memory area of a chip is read into an internal memory area I during deblocking filtering; macro-block information on the left side required by filtering in the top row is obtained from the internal memory area I so as to carry out filtering; macro-block data in a next row is read into an internal memory area II from the external memory area, so as to obtain the macro-block information on the left side and obtain above macro-block information from the memory area I for carrying out filtering; then the macro-block data in the next row is read into the internal memory area I from the external memory area, so as to obtain the macro-block information on the left side; afterwards, the above macro-block information is obtained from the memory area II to carry out filtering; and the last two steps are carried out for macro-blocks in the remained rows repeatedly in turn to carry out deblocking filtering, until deblocking filtering for the macro-blocks in an entire frame is completed. By adopting the method provided by the invention, the memory space in the chip can be saved, and the interaction with data outside the chip can be optimized.
Description
Technical field
The present invention relates to a kind of method that is used for storage of de-blocking filter supplemental characteristic and exchange.
Background technology
In block-based video coding and decoding system, the codec inverse transformation quantizes the back image blocking artifact can occur.The reason of its generation has two, and a most important reason is in the block-based frame and the dct transform of Inter prediction residue.The quantizing process of its conversion coefficient is coarse relatively, thereby the conversion coefficient that the inverse quantization process is recovered has error, can cause in the borderline vision of image block discontinuous.Second reason comes from motion compensated prediction.Motion compensation block may be to duplicate the interpolation sampling point data from the diverse location of different frame and come; Because the coupling of motion compensation block can not be an absolutely accurate, so it is discontinuous to produce data on the border of copy block.Certainly, in the discontinuous image block that also is copied to needs compensation in the border that exists in the reference frame.In order to overcome this blocking effect, take in the encoding and decoding ring, to introduce the de-blocking filter system usually, to improve the subjective evaluation quality level of image.
De-blocking filter is handled and is applied to the macro block that each has been decoded and has finished.In coding collar and decoding ring, use the de-blocking filter system to mainly contain two advantages:
1, the false border that produces owing to motion compensation, conversion and quantification in the image can be smoothed, reduces the image block effect, improved the subjective vision effect;
2, filtered frame is used for the motion compensated prediction of subsequent frame, thereby the picture quality of having avoided false border accumulated error to cause further reduces.
De-blocking filter is a unit with the macro block, handles successively according to raster scan order.The filtering of each macro block is in the image: de-blocking filter is done in brightness and colourity respectively, and the situation that is divided into 4 * 4 sub-pieces with minimum is an example, as shown in Figure 1, and at first from left to right to vertical boundary filtering, more from top to bottom to horizontal boundary filtering.The sample value of revising in the current macro vertical boundary filtering is as the input of horizontal boundary filtering.And, except needing the current macro parameter information, also need to use the parameter information of current macro top macro block to the coboundary filtering of current macro; To the left margin filtering of current macro, except needing the current macro parameter information, also need to use the parameter information of current macro left side macro block.
It denys the power on false border and false border that image block edge after different prediction mode has determined to rebuild in the coding collar has.Filter according to different situation selection varying strengths could make deblocking effect can reach optimum efficiency.Therefore need to determine boundary intensity BS, the boundary intensity of chrominance block replaces with the boundary intensity of correspondence position luminance block, and the decision tree of determining boundary intensity as shown in Figure 2.Therefore, to the filtering of each strip block boundary, all need to use the parameter information of the affiliated sub-piece in both sides, border.These parameter informations have plenty of directly to read from code stream and obtain, and what have then is to obtain by modes such as prediction, calculating in front the decode procedure.Because the loop de-blocking filter is to carry out after all macro block decodings of a two field picture finish, therefore whole whole macro blocks of two field picture and de-blocking filter relevant parameter all need to preserve.
For the supplemental characteristic of the needed whole frame macro block of de-blocking filter, if they all are placed in the chip,, will expend a large amount of chip stored spaces because data volume is bigger, make chip area bigger, cost is higher; If all be placed in the memory of chip exterior, when each macro block filtering, read in relevant macroblock parameters data from the outside to chip by DMA, then have some macroblock parameters data and be repeated to read in, wasted the bandwidth resources of DMA; Simultaneously frequent DMA read-write has reduced efficient.
Summary of the invention
The object of the present invention is to provide a kind of method that is used for storage of coding and decoding video chip de-blocking filter supplemental characteristic and exchange, thereby can either save the memory space of chip internal, can optimize again and the outer data interaction of sheet.
Purpose of the present invention can realize by following technical measures: a kind of storage of coding and decoding video chip de-blocking filter supplemental characteristic and switching method of being used for may further comprise the steps:
(1), when image macro decoding initialization, earlier in internal memory according to the required memory space of image size dynamic assignment one two field picture macroblock parameters data, and the memory space first address passed to chip register;
(2), in macro-block decoding process, the parameter that de-blocking filter is needed is filled up in the chip internal storage area structure that is divided into memory block I and memory block II, simultaneously the delegation of filling up data is earlier write in the chip exterior memory with the direct memory access mode in batches according to the address of step (1) register;
(3), when the macro block decoding of whole two field picture finish start de-blocking filter after, read in image the top delegation macroblock parameters data from chip external memory district to the I of chip internal memory block by the direct memory access mode;
(4), the left side macroblock parameters information that needs when from the I of chip internal memory block, obtaining the filtering of image the top delegation, carry out the de-blocking filter of this row macro block;
(5), read in next line macroblock parameters data by the direct memory access mode to the II of chip internal memory block from chip external memory district, obtain the parameter information of left side macro block, obtain the parameter information of top macro block more internally among the I of memory block, carry out the de-blocking filter of this row macro block;
(6), read in from chip external memory district again toward next line macroblock parameters data to the I of chip internal memory block by the direct memory access mode again, obtain the parameter information of left side macro block, obtain the parameter information of top macro block more internally among the II of memory block, carry out the de-blocking filter of this row macro block;
(7), to remainder row macro block, de-blocking filter is carried out after each row macro block being read the parameter information of corresponding left side macro block and top macro block in repeating step (5) and (6) successively, finishes until whole frame macro block de-blocking filter.
The chip internal memory block of step of the present invention (2) is provided with the storage organization of two row macroblock parameters, preserves the two row macroblock parameters data that de-blocking filter needs.Its space size is the required space of supplemental characteristic of two row macro blocks, and the length of wherein said row is that the full-size image that chip is supported is the width of unit with the macro block.
The exchanges data that the direct memory access mode of step of the present invention (3), (5) and (6) is carried out is that the supplemental characteristic with delegation's macro block is that unit carries out the read-write operation inside and outside the chip, and this mode obtains chip exterior macroblock parameters memory address by the access chip internal register.
After adopting method of the present invention, compared with prior art have the following advantages:
What 1, produce in the decode procedure stores chip exterior for the useful macroblock parameters of de-blocking filter into by DMA, whole frame macro block decoding finishes and reads in by DMA when beginning de-blocking filter again, effectively reduce the memory space of chip internal, saved chip area, reduced chip cost.
2, can deposit the storage organization of two row macroblock parameters in the chip internal setting, make to the macro block de-blocking filter time, can directly obtain relevant macroblock parameters data, avoid repeating to read the DMA bandwidth waste that supplemental characteristic causes at chip internal.
3, the supplemental characteristic with delegation's macro block is that unit carries out dma operation, avoids frequent dma operation to bring the reduction of DMA efficient.
Description of drawings
Fig. 1 is for needing the border schematic diagram of filtering in the macro block;
Fig. 2 adjudicates tree-like schematic diagram for boundary intensity in the boundary filtering;
Fig. 3 is a chip internal supplemental characteristic storage organization schematic diagram of the present invention;
Fig. 4 is a de-blocking filter process flow block diagram of the present invention.
Embodiment
The present invention is based on Video Codec chip key link---and the design of de-blocking filter realizes.Because the supplemental characteristic amount is bigger, it is higher to be retained in the chip cost, therefore the present invention takes the mode of filtering relevant parameter storage in the chip slapper outside, write out in batches by direct memory access mode (DMA) by the decoder module before the filtering, read in by direct memory access mode (DMA) again during filtering.As shown in Figure 3, according to filter sequence, all before current macro filtering, so the parameter information of these two macro blocks had read in chip to the filtering of these two macro blocks of A, B.For avoiding the repetition reading of data, to improve direct memory access mode (DMA) bandwidth availability ratio, embodiments of the present invention are as follows:
(1), definition chip register RMbDeblockInfo, be used for depositing the first address of depositing supplemental characteristic in the memory chip, for the usefulness of direct memory access mode (DMA) addressing.
(2), the memory block MbDeblockInfoArray of definition chip internal, its size is the required space (being divided into memory block I and memory block II) of supplemental characteristic of two row macro blocks, and the length of " OK " refers to that the full-size image that chip is supported is the width of unit with the macro block here.
As shown in Figure 4, the method for storage of concrete de-blocking filter supplemental characteristic and exchange is following steps:
1, during the decoding software initialization, in internal memory,, and the memory space first address passed to chip register RmbDeblockInfo according to the required memory space of image size dynamic assignment one two field picture macroblock parameters data.
2, after the decoding of startup chip, in macro-block decoding process, the relevant parameter that obtains is filled up in the MbDeblockInfoArray structure, when filling in wherein delegation, then another has been filled up the direct memory access mode (DMA) that worked of data and write in the chip exterior memory in batches, alternately data have been write out in this way.In decode procedure, these supplemental characteristics are also used by decode procedures such as infra-frame prediction, inter predictions simultaneously.Because filtering desired parameters information has comprised kinematic parameter, so inter prediction can utilize this structure to carry out the prediction of motion vector.
3, the macro block decoding when whole two field picture finishes, start de-blocking filter after, at first read in image the top delegation macroblock parameters data (see figure 3) to the I zone of MbDeblockInfoArray from chip external memory district by direct memory access mode (DMA).
4, begin the de-blocking filter of image the top delegation macro block according to the macro block filtering order, because this row macro block is the image coboundary, only need left side macro block A parameter information during filtering, because the supplemental characteristic of one's own profession macro block all has been stored in the chip, therefore easily addressing obtains.
5, then, read in next line macroblock parameters data by direct memory access mode (DMA) to the II zone of MbDeblockInfoArray from chip external memory district, this moment, de-blocking filter also needed the parameter information of top macro block B except the parameter information of needs left side macro block A, the top macro-block line parameter information here is owing to being stored in the I zone of MbDeblockInfoArray, so can addressing easily obtain in chip.
6, read in from chip external memory district again toward next line macroblock parameters data to the I of MbDeblockInfoArray by the direct memory access mode again, obtain the parameter information of left side macro block, from the II of MbDeblockInfoArray, obtain the parameter information of top macro block again, carry out the de-blocking filter of this row macro block;
7, the de-blocking filter process of remaining row to remainder row macro block repeating step 5 and 6 successively, is carried out de-blocking filter after each row macro block being read the parameter information of corresponding left side macro block and top macro block, finishes until whole frame macro block de-blocking filter.
Claims (4)
1. one kind is used for the method that the de-blocking filter supplemental characteristic is stored and exchanged, and it is characterized in that may further comprise the steps:
(1), when image macro decoding initialization, earlier in internal memory according to the required memory space of image size dynamic assignment one two field picture macroblock parameters data, and the memory space first address passed to chip register;
(2), in macro-block decoding process, the parameter that de-blocking filter is needed is filled up in the chip internal storage area structure that is divided into memory block I and memory block II, simultaneously the delegation of filling up data is earlier write in the chip exterior memory with the direct memory access mode in batches according to the address of step (1) register;
(3), when the macro block decoding of whole two field picture finish start de-blocking filter after, read in image the top delegation macroblock parameters data from chip external memory district to the I of chip internal memory block by the direct memory access mode;
(4), the left side macroblock parameters information that needs when from the I of chip internal memory block, obtaining the filtering of image the top delegation, carry out the de-blocking filter of this row macro block;
(5), read in next line macroblock parameters data by the direct memory access mode to the II of chip internal memory block from chip external memory district, obtain the parameter information of left side macro block, obtain the parameter information of top macro block more internally among the I of memory block, carry out the de-blocking filter of this row macro block;
(6), read in from chip external memory district again toward next line macroblock parameters data to the I of chip internal memory block by the direct memory access mode again, obtain the parameter information of left side macro block, obtain the parameter information of top macro block more internally among the II of memory block, carry out the de-blocking filter of this row macro block;
(7), to remainder row macro block, de-blocking filter is carried out after each row macro block being read the parameter information of corresponding left side macro block and top macro block in repeating step (5) and (6) successively, finishes until whole frame macro block de-blocking filter.
2. the method for de-blocking filter supplemental characteristic storage according to claim 1 and exchange is characterized in that: the chip internal memory block of described step (2) is provided with the storage organization of two row macroblock parameters, preserves the two row macroblock parameters data that de-blocking filter needs.
3. the method for de-blocking filter supplemental characteristic storage according to claim 1 and 2 and exchange, it is characterized in that: the space size of described internal storage region is the required space of supplemental characteristic of two row macro blocks, and the length of wherein said row is that the full-size image that chip is supported is the width of unit with the macro block.
4. the method for de-blocking filter supplemental characteristic storage according to claim 1 and exchange, it is characterized in that: the exchanges data that the direct memory access mode of described step (3), (5) and (6) is carried out is that the supplemental characteristic with delegation's macro block is that unit carries out the read-write operation inside and outside the chip, and this mode obtains chip exterior macroblock parameters memory address by the access chip internal register.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102088610A (en) * | 2011-03-08 | 2011-06-08 | 美商威睿电通公司 | Video codec and motion estimation method thereof |
| CN102541808A (en) * | 2011-12-06 | 2012-07-04 | 苏州希图视鼎微电子有限公司 | Soc (System on chip) chip system and method for realizing configurable buffer in Soc chip |
| CN114556243A (en) * | 2019-09-20 | 2022-05-27 | 诺信公司 | Flexible mapping with application data identifiers for PLC communications |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102088610A (en) * | 2011-03-08 | 2011-06-08 | 美商威睿电通公司 | Video codec and motion estimation method thereof |
| CN102088610B (en) * | 2011-03-08 | 2013-12-18 | 开曼群岛威睿电通股份有限公司 | Video codec and motion estimation method thereof |
| CN102541808A (en) * | 2011-12-06 | 2012-07-04 | 苏州希图视鼎微电子有限公司 | Soc (System on chip) chip system and method for realizing configurable buffer in Soc chip |
| CN114556243A (en) * | 2019-09-20 | 2022-05-27 | 诺信公司 | Flexible mapping with application data identifiers for PLC communications |
| CN114556243B (en) * | 2019-09-20 | 2024-06-04 | 诺信公司 | Flexible mapping with application data identifiers for PLC communications |
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Address after: 510663 301-303, 401-402, zone C1, 182 science Avenue, Science City, Guangzhou high tech Industrial Development Zone, Guangdong Province Patentee after: Guangzhou Ankai Microelectronics Co.,Ltd. Address before: 510663 301-303, 401-402, zone C1, 182 science Avenue, Science City, Guangzhou high tech Industrial Development Zone, Guangdong Province Patentee before: ANYKA (GUANGZHOU) MICROELECTRONICS TECHNOLOGY Co.,Ltd. |
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Address after: 510555 No. 107 Bowen Road, Huangpu District, Guangzhou, Guangdong Patentee after: Guangzhou Ankai Microelectronics Co.,Ltd. Address before: 510663 301-303, 401-402, zone C1, 182 science Avenue, Science City, Guangzhou high tech Industrial Development Zone, Guangdong Province Patentee before: Guangzhou Ankai Microelectronics Co.,Ltd. |
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