CN101193217A - LCD TV set with dual-channel LVDS output circuit - Google Patents
LCD TV set with dual-channel LVDS output circuit Download PDFInfo
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- CN101193217A CN101193217A CNA2006100702974A CN200610070297A CN101193217A CN 101193217 A CN101193217 A CN 101193217A CN A2006100702974 A CNA2006100702974 A CN A2006100702974A CN 200610070297 A CN200610070297 A CN 200610070297A CN 101193217 A CN101193217 A CN 101193217A
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Abstract
The invention discloses an LCD TV set with a dual LVDS output circuit, which comprises an image processing main chip to output single channel image signal. An image signal output of the image processing main chip is connected with an input of an LVDS driving chip; a single-channel image signal is processed in the LVDS driving chip and then a dual-channel LVDS signal is outputted to an LCD display screen. The invention providing a dual-channel LVDS output circuit to the image processing main chip without an LVDS driving function not only has the advantages of simple circuit structure, small size and low cost, but also reduces transmission rate of the LVDS signal and ensures stability of the signal transmission. Meanwhile, the main chip needs not to output the dual-channel LVDS signal, thus reducing requirements and working loads on the main chip and improving the processing speed thereof to ensure reliability of whole machine operation.
Description
Technical field
The invention belongs to technical field of television sets, relate to a kind of improvement of TV set circuit, specifically, relate to a kind of dual-channel LVDS output circuit that is used for liquid crystal TV set.
Background technology
Liquid crystal TV set only needs one road LVDS output to get final product because himself radiationless advantage more and more is subjected to consumers in general's favor, and the liquid crystal display screen resolution of past liquid crystal TV set is lower.And along with the progressively raising of consumer to the image definition requirement, high-resolution liquid crystal display screen has appearred.If adopt the television set of high-resolution liquid crystal screen that one road LVDS output is only arranged, then need higher LVDS transmission rate, it is heavier to be equivalent to load; If be divided into two-way LVDS output, then the transmission rate of each road LVDS reduces half, is equivalent to alleviate load, can satisfy the more display requirement of high-resolution liquid crystal screen.So great majority adopt the color television set of high-resolution liquid crystal screen all to use binary channels LVDS interface at present, guarantee the stability of signal transmission with the speed that reduces each road LVDS.
At present, in order to realize the output of dual-channel LVDS signal, existing TV set circuit generally all is to adopt the image processing master chip with dual-channel LVDS signal output function to realize.The image processing master chip that adopts the sort circuit structure not only to need to have high integration degree causes the complete machine cost to raise, and the market competitiveness descends; And increased the weight of the work load of master chip undoubtedly, and having influenced its processing speed, the complete machine operational reliability can not get abundant guarantee.
Summary of the invention
The present invention is in order to solve the problem that the master chip burden is heavy, the complete machine cost raises that available technology adopting master chip output dual-channel LVDS signal is caused, a kind of novel liquid crystal TV set with dual-channel LVDS output circuit is provided, by output the LVDS chip for driving is set at the image processing master chip, realized the output function of dual-channel LVDS signal, alleviated the work load of master chip, improved operating rate, and reduced requirement to master chip, can select master chip for use, save the complete machine cost with dual-channel LVDS output function.
For solving the problems of the technologies described above, the present invention is achieved by the following technical solutions:
A kind of liquid crystal TV set with dual-channel LVDS output circuit comprises the image processing master chip, output single channel picture signal; The image signal output end of described image processing master chip connects the input of a LVDS chip for driving; After described LVDS chip for driving was handled the single channel picture signal of input, output binary channels LVDS signal was to LCDs.
Wherein, the single channel picture signal of described image processing master chip output is the Transistor-Transistor Logic level signal, comprises 24, respectively with the corresponding connection of 24 R, G, B signal input part of described LVDS chip for driving.
Be operated in the TTL signal and change under the mode of operation of LVDS signal for what control that described LVDS chip for driving can be correct, described image processing master chip is selected pin output low level control signal by its GPIO mouth to the input pattern of described LVDS chip for driving, and the input of controlling described LVDS chip for driving receives the Transistor-Transistor Logic level signal.
In order to notify described LVDS chip for driving when to begin to receive data, the data enable signal pin of described LVDS chip for driving receives the square wave control signal of described image processing master chip output, when square-wave signal is high level, data-signal is effective, and the LVDS chip for driving receives the TTL picture element signal of image processing master chip output.
The line synchronizing signal input of described LVDS chip for driving, field sync signal input and clock end receive line synchronizing signal, field sync signal and the clock signal of image processing master chip output respectively.
For convenience decoding deck and LCDs is connected, the corresponding connection of the binary channels LVDS signal output part of described LVDS chip for driving with the respective pin of an interface, connect liquid crystal display screen by described interface, realize the data communication between television set decoding deck and the liquid crystal display screen display panel.
In the present invention, described image processing master chip is the image zoom process chip; The conversion of signals chip that it is DS90C387 that described LVDS chip for driving adopts a model, include dual input passage dual output passage is realized.For described LVDS chip for driving is operated under single channel input, the binary channels output services pattern, need have the control signal of certain potentials to the work simulation control pin output of described LVDS chip for driving.In the present invention, the mode of operation control pin of described LVDS chip for driving connects a direct current power supply through resistance pressure-dividing network, DC power supply is after the divider resistance dividing potential drop, to the voltage signal of the mode of operation control pin of described LVDS chip for driving output certain potentials, control described LVDS chip for driving and enter single input dual output mode of operation.
Compared with prior art, advantage of the present invention and good effect are: the present invention is by setting up the LVDS chip for driving on decoding deck, single channel TTL picture element signal to the output of image processing master chip is changed, generate binary channels LVDS signal and export to LCDs, the needs of high-resolution liquid crystal screen have not only been satisfied, and reduced requirement to the image processing master chip, can select for use do not have the dual-channel LVDS output function, cheap image zoom process chip realizes, thereby effectively saved the complete machine cost.Dual-channel LVDS output circuit of the present invention is simple in structure, volume is little, has greatly reduced the transmission rate of LVDS signal, and has guaranteed the stability of signal transmission.Owing to no longer need master chip to carry out the output of binary channels LVDS signal, thereby effectively alleviated the workload of master chip, improved its processing speed, the complete machine reliability of operation is guaranteed.
Description of drawings
Fig. 1 is the schematic diagram of dual-channel LVDS output circuit among the present invention.
Embodiment
Below in conjunction with the drawings and specific embodiments the present invention is done explanation in further detail.
The present invention is in order to alleviate the workload of master chip, improve its processing speed, and satisfy the demand of high-resolution liquid crystal display screen to the LVDS signal, being provided with a model on the television set decoding deck is the LVDS chip for driving of DS90C387, assistant images processing main chip output binary channels LVDS signal has not only reduced the requirement to master chip, has saved the complete machine cost, and making system's operation more stable, whole aircraft reliability is ensured.Concrete annexation between described LVDS chip for driving and the image processing master chip is referring to shown in Figure 1.
Among Fig. 1 ,+3.3V DC power supply DVO_VCC3.3 connects the VCC pin of LVDS chip for driving N019 on the one hand by filter capacitor C544～C547, gives the Transistor-Transistor Logic level supplying power for input end of described LVDS chip for driving N019; The LVDSVCC pin that connects LVDS chip for driving N019 on the other hand by decoupling capacitor C526～C528, the output channel power supply of giving described LVDS chip for driving N019; The PLLVCC pin that connects LVDS chip for driving N019 again by filter capacitor C529～C531 is given described LVDS chip for driving N019 inner phase-locked loop power supply, satisfies the power reguirements of described LVDS chip for driving N019 with this.
In the present invention, it is the image zoom process chip N001H realization of X240 that the image processing master chip adopts a model, and the picture signal that generates after its convergent-divergent is handled outputs to wherein one tunnel input channel of described LVDS chip for driving N019 with the form of Transistor-Transistor Logic level signal by its 24 output DVODATA0～DVODATA23.Its concrete annexation is: 24 output DVODATA0～DVODATA23 of image processing master chip N001H are respectively by 24 R, Gs, the B signal input part corresponding connection of a resistance with LVDS chip for driving N019.The binary channels LVDS signal RXO and the RXE that generate after described LVDS chip for driving N019 handles export to the liquid crystal display screen display circuit by its two-way output channel respectively, realize that the output of video image shows.Wherein, in binary channels LVDS signal RXO and RXE, RXO0-, RXO0+, RXO1-, RXO1+, RXO2-, RXO2+, RXO3-, RXO3+ and RXE0-, RXE0+, RXE1-, RXE1+, RXE2-, RXE2+, RXE3-, RXE3+ are the LVDS data-signals; RXOC-, RXOC+ and RXEC-, RXEC+ are the LVDS clock signals.For convenience decoding deck and LCDs is connected, the corresponding connection of the binary channels LVDS signal output part of described LVDS chip for driving N019 with the respective pin of an interface XP009, connect LCDs by described interface XP009, realize the data communication between television set decoding deck and the liquid crystal display screen display panel.
Because described LVDS chip for driving N019 one has the conversion of signals chip of dual input passage, dual output passage, can be operated under the various modes, therefore, in order to allow described LVDS chip for driving N019 be operated under the input of single channel Transistor-Transistor Logic level signal, the binary channels LVDS signal output mode, need the corresponding control pin of described LVDS chip for driving N019 be configured.In the present invention, the mode of operation control pin DUAL of described LVDS chip for driving N019 is on the one hand by a divider resistance R364 connection+3.3V DC power supply DVO_VCC3.3, on the other hand by another divider resistance R365 ground connection, the resistance of two divider resistance R364, R365 is identical, be 10K Ω, thereby making the current potential that is input to described LVDS chip for driving N019 work simulation control pin DUAL is 1.65V, and then controls described LVDS chip for driving N019 and be operated under single channel input, the binary channels output services pattern.Be operated in the TTL signal and change under the mode of operation of LVDS signal for what control that described LVDS chip for driving N019 can be correct, described image processing master chip N001H selects pin/PD output low level control signal by its GPIO mouth to the input pattern of described LVDS chip for driving N019, and the input of controlling described LVDS chip for driving N019 receives the Transistor-Transistor Logic level signal.
Line synchronizing signal input HSYNC, the field sync signal input VSYNC of described LVDS chip for driving N019 and clock end CLKIN receive line synchronizing signal DVOHSYNC1, field sync signal DVOVSYNC1 and the clock signal DVOCLK of image processing master chip N001H output respectively.In order to notify described LVDS chip for driving N019 when to begin to receive data, the data enable signal pin DE of described LVDS chip for driving N019 receives the square wave control signal from described image processing master chip N001H output.When square-wave signal was high level, the expression data-signal was effective, and LVDS chip for driving N019 receives the Transistor-Transistor Logic level signal of the one-row pixels of image processing master chip N001H output; When arriving, next high level square-wave signal receives the Transistor-Transistor Logic level signal of next line pixel.In one-period, comprise 60 square-wave signals, the 60 groups of row pixels that receive in the piece image respectively to be produced and the Transistor-Transistor Logic level signal of row pixel; The picture element signal of piece image under in following one-period, receiving.
The present invention is directed to does not have integrated LVDS to drive the master chip of function, and above-mentioned binary channels LVDS output circuit is provided.Adopt this circuit can reduce the transmission rate of single channel LVDS signal greatly, improve the stability of transmission signals, and can support the high-resolution liquid crystal display screen of SVGA to QXGA.This circuit structure equally also can be applied in other electric equipments with LCDs.
Certainly; above-mentioned explanation is not to be limitation of the present invention; the present invention also is not limited in above-mentioned giving an example, and variation, remodeling, interpolation or replacement that those skilled in the art are made in essential scope of the present invention also should belong to protection scope of the present invention.
Claims (10)
1. the liquid crystal TV set with dual-channel LVDS output circuit comprises the image processing master chip, output single channel picture signal; It is characterized in that: the image signal output end of described image processing master chip connects the input of a LVDS chip for driving; After described LVDS chip for driving was handled the single channel picture signal of input, output binary channels LVDS signal was to LCDs.
2. the liquid crystal TV set with dual-channel LVDS output circuit according to claim 1 is characterized in that: the single channel picture signal of described image processing master chip output is the Transistor-Transistor Logic level signal.
3. the liquid crystal TV set with dual-channel LVDS output circuit according to claim 2, it is characterized in that: the single channel Transistor-Transistor Logic level signal of described image processing master chip output comprises 24, respectively with the corresponding connection of 24 R, G, B signal input part of described LVDS chip for driving.
4. the liquid crystal TV set with dual-channel LVDS output circuit according to claim 3, it is characterized in that: described image processing master chip is selected pin output low level control signal by its GPIO mouth to the input pattern of described LVDS chip for driving, and the input of controlling described LVDS chip for driving receives the Transistor-Transistor Logic level signal.
5. the liquid crystal TV set with dual-channel LVDS output circuit according to claim 4, it is characterized in that: the data enable signal pin of described LVDS chip for driving receives the square wave control signal of described image processing master chip output, when square-wave signal is high level, data-signal is effective, and the LVDS chip for driving receives the TTL picture element signal of image processing master chip output.
6. the liquid crystal TV set with dual-channel LVDS output circuit according to claim 5 is characterized in that: the line synchronizing signal input of described LVDS chip for driving, field sync signal input and clock end receive line synchronizing signal, field sync signal and the clock signal of image processing master chip output respectively.
7. the liquid crystal TV set with dual-channel LVDS output circuit according to claim 1, it is characterized in that: the corresponding connection of the binary channels LVDS signal output part of described LVDS chip for driving with the respective pin of an interface, connect liquid crystal display screen by described interface, realize the data communication between television set decoding deck and the liquid crystal display screen display panel.
8. the liquid crystal TV set with dual-channel LVDS output circuit according to claim 1, it is characterized in that: DC power supply is after the resistance pressure-dividing network dividing potential drop, to the mode of operation control pin output voltage signal of described LVDS chip for driving, control described LVDS chip for driving and enter single input dual output mode of operation.
9. the liquid crystal TV set with dual-channel LVDS output circuit according to claim 1 is characterized in that: described LVDS chip for driving is that a model is DS90C387, includes the conversion of signals chip of dual input passage dual output passage.
10. the liquid crystal TV set with dual-channel LVDS output circuit according to claim 1 is characterized in that: described image processing master chip is the image zoom process chip.
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| Application Number | Priority Date | Filing Date | Title |
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| CNA2006100702974A CN101193217A (en) | 2006-11-21 | 2006-11-21 | LCD TV set with dual-channel LVDS output circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2006100702974A CN101193217A (en) | 2006-11-21 | 2006-11-21 | LCD TV set with dual-channel LVDS output circuit |
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| CN101193217A true CN101193217A (en) | 2008-06-04 |
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| CNA2006100702974A Pending CN101193217A (en) | 2006-11-21 | 2006-11-21 | LCD TV set with dual-channel LVDS output circuit |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102117592A (en) * | 2009-12-30 | 2011-07-06 | 乐金显示有限公司 | Data transmitting device and flat plate display using the same |
| CN101800038B (en) * | 2009-02-10 | 2012-06-27 | 环旭电子股份有限公司 | Computer display system and method for judging data output sequence of image processing unit |
| CN102148018B (en) * | 2010-02-09 | 2013-02-13 | 深圳市新超亮特种显示设备有限公司 | Circuit for extracting field synchronizing signal from LVDS (Low Voltage Differential Signaling) signal and processing field synchronizing signal |
| CN109168072A (en) * | 2018-09-28 | 2019-01-08 | 天津市英贝特航天科技有限公司 | A kind of LVDS interface expander and its working method |
| CN109785781A (en) * | 2019-04-03 | 2019-05-21 | 京东方科技集团股份有限公司 | Generation method and device, the display device of driving signal |
| CN111028752A (en) * | 2019-11-20 | 2020-04-17 | 深圳市鑫乐意科技有限公司 | Method for converting LVDS signal into RSDS signal |
| CN112331135A (en) * | 2020-11-05 | 2021-02-05 | Tcl华星光电技术有限公司 | Display panel and driving method |
-
2006
- 2006-11-21 CN CNA2006100702974A patent/CN101193217A/en active Pending
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101800038B (en) * | 2009-02-10 | 2012-06-27 | 环旭电子股份有限公司 | Computer display system and method for judging data output sequence of image processing unit |
| CN102117592A (en) * | 2009-12-30 | 2011-07-06 | 乐金显示有限公司 | Data transmitting device and flat plate display using the same |
| US8421792B2 (en) | 2009-12-30 | 2013-04-16 | Lg Display Co., Ltd. | Data transmitting device and flat plate display using the same |
| CN104778914A (en) * | 2009-12-30 | 2015-07-15 | 乐金显示有限公司 | Data transmitting device and flat plate display using the same |
| CN104778914B (en) * | 2009-12-30 | 2018-01-05 | 乐金显示有限公司 | Data transmission set and the flat-panel monitor using the data transmission set |
| CN102148018B (en) * | 2010-02-09 | 2013-02-13 | 深圳市新超亮特种显示设备有限公司 | Circuit for extracting field synchronizing signal from LVDS (Low Voltage Differential Signaling) signal and processing field synchronizing signal |
| CN109168072A (en) * | 2018-09-28 | 2019-01-08 | 天津市英贝特航天科技有限公司 | A kind of LVDS interface expander and its working method |
| CN109785781A (en) * | 2019-04-03 | 2019-05-21 | 京东方科技集团股份有限公司 | Generation method and device, the display device of driving signal |
| CN111028752A (en) * | 2019-11-20 | 2020-04-17 | 深圳市鑫乐意科技有限公司 | Method for converting LVDS signal into RSDS signal |
| CN111028752B (en) * | 2019-11-20 | 2023-09-01 | 深圳市鑫乐意科技有限公司 | Method for converting LVDS signals into RSDS signals |
| CN112331135A (en) * | 2020-11-05 | 2021-02-05 | Tcl华星光电技术有限公司 | Display panel and driving method |
| CN112331135B (en) * | 2020-11-05 | 2021-09-24 | Tcl华星光电技术有限公司 | Display panel and driving method |
| US11705053B2 (en) | 2020-11-05 | 2023-07-18 | Tcl China Star Optoelectronics Technology Co., Ltd. | Display panel and driving method thereof |
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Open date: 20080604 |