CN101170511A - Device and method for realizing multi-core processor communication in built-in operating system - Google Patents
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Abstract
The invention discloses a device and a method for realizing multicore processor communication in an embedded operating system, which comprises a memory module and a network module, wherein the memory module is used, in the external communication, to memorize the message transmitted to the network module and inform the network module of delivering the message; the network module is used to receive the message delivered by the memory module, simultaneously deliver an interruption request and finish the communication of CPU core. The invention overcomes the drawbacks of the prior art; firstly, both the external communication and the inter-core communication are connected with protocol stack, with stronger function and more convenient upper application development; besides, the external communication and the inter-core communication are transparent for the upper layer, which keeps the application layer free from paying attention to the transmission details of the bottom layer.
Description
Technical field
The present invention relates to the communications field of polycaryon processor in embedded OS, relate to the device and method of realizing multi-core processor communication in a kind of embedded OS more specifically.
Background technology
Along with the continuous expansion of telecommunication service, system is more and more higher to the requirement of processor, and traditional single core processor can not adapt to the needs of large-scale application gradually, and under this background, polycaryon processor begins to demonstrate cutting edge on this wonderful stage of telecommunications.Than traditional single core processor, the performance of corresponding polycaryon processor is higher, and price is lower, therefore is subjected to pursuing of telecommunications manufacturer deeply.
Embedded OS all has a cover protocol stack, and by with the binding of network interface and protocol stack, upper layer application just can be by protocol stack and extraneous free communication, and need not to pay close attention to the problem of message format.The network system of embedded OS as shown in Figure 1.
Embedded OS is supported SENS (enhanced network storehouse mostly, Scalable EnhancedNetworks Stack) protocol stack, the SENS protocol stack provides interchangeable network device driver, and aim at this network stack and the network interface device driver of writing is known as END (network driver of enhancing, Enhanced Network Driver).As shown in Figure 2, the SENS model comprises three parts: and protocol driver, MUX (polynary interface, multiplexer) and END.The SENS model is independent of the hardware device interface, and it makes the developer can be absorbed in the exploitation of END itself the network device driver refinement.Between driver and upper-layer protocol (as TCP/IP), the SENS model provides the protocol-driven layer.Between protocol layer and driver, the SENS model provides MUX layer.The MUX layer is direct and the END driver is mutual, and its application programming interfaces provide the UDI that is independent of procotol, can be mutual simultaneously with a plurality of independently END unit.
For single core processor, a general nuclear only is furnished with a network interface, and this network interface only is responsible for communicating by letter with extraneous.And, can run into following problem for polycaryon processor:
Do (1) how a plurality of nuclears communicate by letter with the external world?
Does (2) if think transmission protocol message between nuclear and the nuclear, how this communicate by letter again?
Well do not address the above problem in the current technology, following defective arranged:
(1) internuclear communication is independent of nuclear and extraneous communication mode, needs two cover mechanism to finish communication work, underaction for upper layer application.
Therefore (2) internuclear communication does not articulate protocol stack, can only receive and dispatch message, and the function that can't the use agreement stack provides causes function very single.
In sum, the technical scheme of multi-core processor communication in a kind of embedded OS of current needs.
Summary of the invention
Technical problem to be solved by this invention provides the device and method of realizing multi-core processor communication in a kind of embedded OS, can carry out internuclear communication, also can communicate with the external world.
In order to address the above problem, the invention provides
It is additional to treat that claim is appraised and decided the back
Compared with prior art, using the present invention, overcome the deficiencies in the prior art, at first is that correspondence with foreign country or internuclear communication all articulate protocol stack, with better function, and the upper layer application exploitation is convenient; Secondly correspondence with foreign country is communicated by letter for the upper strata transparence with internuclear, make application layer need not pay close attention to the transmission details of bottom.
Description of drawings
Fig. 1 is the network system layer structure chart of embedded OS;
Fig. 2 is the SENS structure chart;
Fig. 3 is a structure drawing of device of realizing multi-core processor communication in the embedded OS of the specific embodiment of the invention;
Fig. 4 is a method flow diagram of realizing multi-core processor communication in the embedded OS of the specific embodiment of the invention;
Fig. 5 is message transmission flow figure in the instantiation of the present invention;
Fig. 6 is that message receives flow chart in the instantiation of the present invention.
Embodiment
The invention will be further described below in conjunction with the drawings and specific embodiments.
As shown in Figure 3, multi-core processor communication device in a kind of embedded OS comprises CPU module, interrupt module, memory modules, mixed-media network modules mixed-media, wherein
(1) CPU module
The CPU module is each CPU nuclear that polycaryon processor has, and each CPU nuclear comprises two covering devices: the one, and the IP recognition unit is used to discern the IP address that needs send message, thereby selects different dispensing devices to send; The 2nd, the END unit is used for being responsible for binding IP address, and communicates with protocol stack, and the END unit comprises correspondence with foreign country END unit and the internuclear END of communication unit, and wherein, correspondence with foreign country END unit is used for correspondence with foreign country; Internuclear communication END unit is used for the internuclear communication of CPU;
(2) interrupt module
Interrupt module comprises two parts: the one, and internuclear interrupt location, be used for the interruption between the Controlled CPU nuclear, be to send interrupt requests between CPU nuclear and the CPU nuclear, each CPU endorses to authorize to intended target CPU and send interrupt requests, and target CPU nuclear also can be distributed the source CPU nuclear on ground by this internuclear interrupt location identification interrupt requests simultaneously; The 2nd, the network interface interrupt location is used to make CPU nuclear energy enough to discern the map network module and whether receives interrupt requests;
(3) memory modules
Memory modules comprises two parts: the one, and the shared drive unit that many CPU nuclears are shared, being used to make between the CPU nuclear can mutual communication, the shared drive unit comprises the shared drive lock, and wherein the shared drive lock is used to make the operation of shared drive can not conflict, and has guaranteed fail safe and reliability; The 2nd, each CPU nuclear exclusive privately owned internal storage location, be used for the external communication of mixed-media network modules mixed-media, the message that storage sends or receives from mixed-media network modules mixed-media to mixed-media network modules mixed-media;
(4) mixed-media network modules mixed-media is used to make CPU to endorse to communicate with the external world.
Mixed-media network modules mixed-media refers to CPU and checks the network interface of answering, and each CPU nuclear all has the network interface of a correspondence, and by network interface, CPU endorses to communicate with the external world.
Realize the device of multi-core processor communication in a kind of embedded OS, comprise mixed-media network modules mixed-media, memory modules, CPU module, interrupt module, wherein,
Described memory modules comprise shared drive unit that many CPU nuclear is shared and each CPU examine exclusive privately owned internal storage location, wherein,
The shared drive unit that many CPU nuclears are shared in internuclear communication, is used to make mutual communication between the CPU nuclear, the message of the internuclear transmission of storage CPU;
Described shared drive unit comprises the shared drive lock, and wherein the shared drive lock is used for the operation of shared drive, and the operation of shared drive can not conflicted, and has guaranteed fail safe and reliability.
The privately owned internal storage location of each CPU nuclear is used for the external communication of described mixed-media network modules mixed-media, the message that storage sends or receives from mixed-media network modules mixed-media to mixed-media network modules mixed-media;
Described privately owned internal storage location in correspondence with foreign country, is used to store the message that sends to mixed-media network modules mixed-media, and the informing network module sends this message.
Described mixed-media network modules mixed-media is used to receive the message that described privately owned internal storage location sends, and sends interrupt requests simultaneously, finishes the communication of CPU nuclear;
Described mixed-media network modules mixed-media is that CPU checks the network interface of answering, and each CPU nuclear all has the network interface of a correspondence, and by network interface, CPU nuclear communicates with the external world.
The CPU module is each CPU nuclear that polycaryon processor has, and each CPU nuclear comprises the network driver END unit of IP recognition unit, enhancing, wherein
Described IP recognition unit is used to discern the IP address that needs send message, thereby selects corresponding END unit to send;
Described END unit is used to receive the transmission information of described IP recognition unit, binding IP address, and communicate with protocol stack.
Described END unit comprises correspondence with foreign country END unit and the internuclear END of communication unit, wherein,
Described correspondence with foreign country END unit is used for correspondence with foreign country, receives the message that protocol stack sends, and sends to the privately owned internal storage location of corresponding memory modules;
Described internuclear communication END unit is used for the internuclear communication of CPU, and the shared drive unit of memory modules is provided with the shared drive lock, receives the message that protocol stack sends and also sends to the shared drive unit.
Described interrupt module comprises internuclear interrupt location, network interface interrupt location, wherein,
Described internuclear interrupt location is used for the interruption between the Controlled CPU nuclear, the interrupt requests of reception sources CPU nuclear, select the END unit of internuclear communication in the current C PU nuclear, from the shared drive unit of memory modules, take out data, deliver protocol stack, and interruption is set to target CPU nuclear, finish the communication of CPU nuclear; Be can send interrupt requests between CPU nuclear and the CPU nuclear, each CPU endorses to authorize to intended target CPU and send interrupt requests, and target CPU nuclear is also distributed the source CPU nuclear on ground by this internuclear interrupt location identification interrupt requests simultaneously;
Described network interface interrupt location is used to receive the interrupt requests of described mixed-media network modules mixed-media and sends to CPU nuclear, and CPU nuclear takes out described message from the privately owned internal storage location of corresponding memory modules, deliver protocol stack, and to destination address interruption is set, and finishes the communication of CPU nuclear.
As shown in Figure 4, realize the method for multi-core processor communication in a kind of embedded OS, may further comprise the steps,
Privately owned internal storage location in the memory modules is put in each CPU caryogamy, be may further comprise the steps,
The correspondence with foreign country END unit of step 1101, initialization CPU module comprises designated equipment number, distributes MAC (medium access control) address etc.;
Privately owned internal storage location in step 1102, the initialization memory modules;
Step 1103, the IP address is bound, comprise correspondence with foreign country END unit is tied among the MUX, and protocol stack and correspondence with foreign country END unit are bound, the IP address that select this moment is IP0;
Step 1104, the network interface interrupt location of interrupt module is set.
The shared drive unit of step 120, allocate memory module;
Configuration shared drive unit may further comprise the steps,
The internuclear communication END unit of step 1201, initialization CPU module comprises designated equipment number, distributes MAC Address etc.;
Step 1202, initialization shared drive unit are provided with the shared drive lock simultaneously;
Step 1203, the IP address is bound, comprise internuclear communication END unit is tied among the MUX, and protocol stack is bound with the internuclear END of communication unit, the IP address that select this moment is IP1;
Step 1204, the internuclear interrupt location of interrupt module is set.
The IP address of the IP recognition unit recognition objective of step 130, CPU module is according to the END unit of IP address choice correspondence;
If step 140 correspondence with foreign country is then put into message the privately owned internal storage location of memory modules, and to destination address interruption is set by the network interface interrupt location of interrupt module, send interrupt requests simultaneously, the message of finishing CPU nuclear sends;
If the shared drive unit of memory modules is then put into message in the internuclear communication of CPU, and to destination address interruption is set by the internuclear interrupt location of interrupt module, send interrupt requests simultaneously, the message of finishing CPU nuclear sends.
If the internuclear interrupt location of interrupt module is received interrupt requests, then from the shared drive unit of memory modules, take out data, deliver protocol stack, the message of finishing CPU nuclear receives.
The invention will be further described below in conjunction with instantiation.
The message forwarding step of CPU nuclear as shown in Figure 5.
The IP recognition unit of step 210, CPU module sends the target ip address of message as required and selects corresponding END unit;
This moment, target ip address was internuclear address.
The message receiving step of CPU nuclear as shown in Figure 6.
Step 3 10, detection interrupt module judge whether it is that network interface interrupts, if then execution in step 320, otherwise execution in step 340;
If the network interface interrupt location is received interruption, illustrate that then the map network module has message to send into.
The END unit of correspondence with foreign country in step 320, the selection current C PU nuclear;
Step 330, take out data from the privately owned internal storage location of corresponding memory modules, and deliver protocol stack, the message of finishing CPU nuclear receives, and finishes;
Step 340, detection interrupt module judge whether it is internuclear interruption, if then execution in step 350, otherwise, finish;
If internuclear interrupt location is received interruption, then illustrating internuclearly has message to send into.
The END unit of internuclear communication in step 350, the selection current C PU nuclear;
Step 360, the shared drive unit of memory modules is provided with the shared drive lock;
Step 370, take out data from the shared drive unit of corresponding memory modules, and deliver protocol stack, the message of finishing CPU nuclear receives.
Step 380, the shared drive lock is removed in the shared drive unit of memory modules, finish.
The invention provides polycaryon processor correspondence with foreign country and internuclear method for communicating in embedded OS, adopted the system of this method not only can to communicate with the network equipment of outside, internuclear the communicating that can also allow inside, and the difference of two kinds of communications is transparent fully for the application layer of system, no matter be internuclear communication or the support that correspondence with foreign country can adopt the embedded OS protocol stack to be provided flexibly, make the communication function of system improve more with powerful, because of the shared drive mode of internuclear communication employing, its efficient and reliability are also very high in addition.
The above; only for the preferable embodiment of the present invention, but protection scope of the present invention is not limited thereto, and anyly is familiar with the people of this technology in the disclosed technical scope of the present invention; the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claim.
Claims (10)
1. realize the device of multi-core processor communication in the embedded OS, it is characterized in that,
Comprise memory modules, mixed-media network modules mixed-media, wherein,
Described memory modules in correspondence with foreign country, is used to store the message that sends to mixed-media network modules mixed-media, and the informing network module sends this message;
Described mixed-media network modules mixed-media is used to receive the message that described memory modules sends, and sends interrupt requests simultaneously, finishes the communication of CPU nuclear.
2. device as claimed in claim 1 is characterized in that,
Described memory modules comprise shared drive unit that many CPU nuclear is shared and each CPU examine exclusive privately owned internal storage location, wherein,
The shared drive unit that many CPU nuclears are shared in internuclear communication, is used to make mutual communication between the CPU nuclear, the message of the internuclear transmission of storage CPU;
The privately owned internal storage location of each CPU nuclear is used for the external communication of described mixed-media network modules mixed-media, the message that storage sends or receives from mixed-media network modules mixed-media to mixed-media network modules mixed-media.
3. device as claimed in claim 2 is characterized in that,
Described shared drive unit comprises the shared drive lock, and wherein the shared drive lock is used for the operation of shared drive.
4. device as claimed in claim 3 is characterized in that,
Described mixed-media network modules mixed-media is that CPU checks the network interface of answering, and each CPU nuclear all has the network interface of a correspondence, and by network interface, CPU nuclear communicates with the external world.
5. device as claimed in claim 4 is characterized in that,
Also comprise the CPU module, the CPU module is each CPU nuclear that polycaryon processor has, and each CPU nuclear comprises the network driver END unit of IP recognition unit, enhancing, wherein
Described IP recognition unit is used to discern the IP address that needs send message, thereby selects corresponding END unit to send;
Described END unit is used to receive the transmission information of described IP recognition unit, binding IP address, and communicate with protocol stack.
6. device as claimed in claim 5 is characterized in that,
Described END unit comprises correspondence with foreign country END unit and the internuclear END of communication unit, wherein,
Described correspondence with foreign country END unit is used for correspondence with foreign country, receives the message that protocol stack sends, and sends to the privately owned internal storage location of corresponding memory modules;
Described internuclear communication END unit is used for the internuclear communication of CPU, and the shared drive unit of memory modules is provided with the shared drive lock, receives the message that protocol stack sends and also sends to the shared drive unit.
7. device as claimed in claim 6 is characterized in that,
Also comprise interrupt module, described interrupt module comprises internuclear interrupt location, network interface interrupt location, wherein,
Described internuclear interrupt location is used for the interruption between the Controlled CPU nuclear, and the interrupt requests of reception sources CPU nuclear is selected internuclear communication END unit in the current C PU nuclear, from the shared drive unit of memory modules, take out data, deliver protocol stack, and interruption is set, finish the communication of CPU nuclear to target CPU nuclear;
Described network interface interrupt location is used to receive the interrupt requests of described mixed-media network modules mixed-media and sends to CPU nuclear, and CPU nuclear takes out message from the privately owned internal storage location of corresponding memory modules, deliver protocol stack, and to destination address interruption is set, and finishes the communication of CPU nuclear.
8. realize the method for multi-core processor communication in the embedded OS, described system comprises memory modules, may further comprise the steps,
A, initialization CPU module dispose described memory modules, and memory modules is used for the external communication of mixed-media network modules mixed-media, the message that storage sends to mixed-media network modules mixed-media;
After b, memory modules receive described message,
If the correspondence with foreign country of CPU nuclear is then put into described message the privately owned internal storage location of memory modules, and to destination address interruption is set by the network interface interrupt location of interrupt module, send interrupt requests simultaneously, the message of finishing CPU nuclear sends;
If the shared drive unit of memory modules is then put into described message in the internuclear communication of CPU, and to destination address interruption is set by the internuclear interrupt location of interrupt module, send interrupt requests simultaneously, the message of finishing CPU nuclear sends.
9. method as claimed in claim 8 is characterized in that,
Comprise among the described step a,
The END unit of step 1101, initialization CPU module comprises designated equipment number, distribution media accessing to control address;
Step 1102, initialization memory modules;
Step 1103, the IP address is bound, comprise the END unit is tied in the polynary interface, and protocol stack and END unit are bound;
Step 1104, interrupt module is set; Described interrupt module comprises internuclear interrupt location, network interface interrupt location, and described internuclear interrupt location is used for the interruption between the Controlled CPU nuclear; Described network interface interrupt location is used to make CPU nuclear identification map network module whether to receive interrupt requests;
The IP address of step 1105, CPU module recognition objective is according to the END unit of IP address choice correspondence.
10. method as claimed in claim 8 is characterized in that,
Also comprise,
If the network interface interrupt location of described interrupt module is received interrupt requests, then from the privately owned internal storage location of corresponding memory modules, take out data, deliver protocol stack, the message of finishing CPU nuclear receives;
If the internuclear interrupt location of described interrupt module is received interrupt requests, then from the shared drive unit of memory modules, take out data, deliver protocol stack, the message of finishing CPU nuclear receives.
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