CN101154341A - Image zooming circuit and method thereof - Google Patents
Image zooming circuit and method thereof Download PDFInfo
- Publication number
- CN101154341A CN101154341A CN 200610141594 CN200610141594A CN101154341A CN 101154341 A CN101154341 A CN 101154341A CN 200610141594 CN200610141594 CN 200610141594 CN 200610141594 A CN200610141594 A CN 200610141594A CN 101154341 A CN101154341 A CN 101154341A
- Authority
- CN
- China
- Prior art keywords
- accumulated value
- horizontal
- line
- value
- vertically scale
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Image Processing (AREA)
- Editing Of Facsimile Originals (AREA)
Abstract
An image zooming circuit and a method of zooming images to different proportions are provided. The image zooming circuit comprises a line buffer storage, a first zooming circuit, a second zooming circuit and a line buffer control device, wherein, the first zooming circuit is coupled with the line buffer storage and does a first image zooming interpolation operation to the data output by the line buffer storage; the second zooming circuit is coupled with the line buffer storage and does a second image zooming interpolation operation to the data output by the line buffer storage; the line buffer control device is coupled with the line buffer storage, the first zooming circuit and the second zooming circuit to control the line buffer storage to receive and output a scanning beam data according to the running states of the first zooming circuit and the second zooming circuit.
Description
Technical field
The present invention relates to the circuit and the method for the control of a kind of image-zooming, particularly relate to a kind of framework of image-zooming control circuit of the image that can produce at least two different zoom ratios at same image simultaneously and the memory control methods of use thereof.
Background technology
Flat-panel screens for example LCD is widely used recently.Improvement along with semiconductor technology, make LCD have advantages such as low electric power consumption, slim amount is light, resolution is high, color saturation is high, the life-span is long, thereby be widely used in the electronic product closely bound up such as the LCD screen of mobile computer or desktop PC and LCD TV (LCD TV) with life.
Because two-d display panel generally all is to have only a rated resolution, therefore the resolution that must have image-zooming circuit (Scaler) will import signal of video signal between input signal of video signal and panel zooms to the rated resolution of two-d display panel.The resolution of for example importing signal of video signal is 640*480, and the rated resolution of panel is 1024*768, then needs the input signal of video signal of image-zooming circuit with 640*480, utilizes the mode of interpolative operation, converts the required 1024*768 resolution of panel to.
Existing image-zooming circuit in general all can built-in one group of line memory buffer (line buffer), does to supply this image-zooming circuit that computing is temporary to be used.When the dual-display panel that is applied in different resolution, digital camera or Double screen handset or the like, in the time of need doing the situation of two kinds of different zooms to same image, then need to use two group image convergent-divergent circuit, wherein this two group images convergent-divergent circuit comprises one group of line memory buffer respectively.So, certainly will need to increase cost, and, certainly will cause the difficulty of circuit layout, also be easy to generate interference if need two group image convergent-divergent circuit on the circuit board.
Therefore, certainly will need one can integrate two group image convergent-divergent circuit and can make above-mentioned two group image convergent-divergent circuit share the apparatus and method of one group of line memory buffer to address the above problem.
Summary of the invention
The purpose of this invention is to provide a kind of image-zooming circuit,, make it share same line memory buffer to reach the effect that same image-zooming is become a plurality of different proportions in order to integrate a plurality of convergent-divergent circuit.
A further object of the present invention provides a kind of image scaling method, in order to share same line memory buffer, an image-zooming is become at least two ratios, to reach the effect that reduces the cost.
The present invention proposes a kind of image-zooming circuit, comprises line buffer storage, the first convergent-divergent circuit, the second convergent-divergent circuit and line buffering control device.The first convergent-divergent circuit couples the line buffer storage, and the data that the line buffer storage is exported are made the first image-zooming interpolative operation.The second convergent-divergent circuit couples the line buffer storage, and the data that the line buffer storage is exported are made the second image-zooming interpolative operation.The line buffering control device couples line buffer storage, the first convergent-divergent circuit and the second convergent-divergent circuit, and in order to the operating state according to the first convergent-divergent circuit and the second convergent-divergent circuit, the control line buffer storage receives or output one scan line data.
According to the described image-zooming circuit of preferred embodiment of the present invention, above-mentioned line buffering control device comprises vertically scale control module and horizontal scaling control module.The vertically scale control module comprises the first vertically scale parameter and the second vertically scale parameter, the vertically scale control module receives the line buffering and reads end signal, output one vertical useful signal, wherein when the line buffering reads the end signal generation: one first accumulated value is added the first vertically scale parameter as first accumulated value, and export the arithmetic section of first accumulated value; Second accumulated value is added the second vertically scale parameter as second accumulated value, and export the arithmetic section of second accumulated value; When the integral part of first accumulated value integral part greater than second accumulated value, when then online buffering reads the end signal generation, second accumulated value adds the second vertically scale parameter as second accumulated value, and export the arithmetic section of second accumulated value, (vice versa more than or equal to the integral part of first accumulated value up to second accumulated value, promptly work as the integral part of second accumulated value greater than the first innumerable value added integral part, when then online buffering reads the end signal generation, first accumulated value adds the first vertically scale parameter as first accumulated value, and export the arithmetic section of first accumulated value, up to the integral part of first accumulated value more than or equal to second accumulated value); When the integral part of second accumulated value more than or equal to first accumulated value, and line cushions when reading the end signal activation: the i-1 bar scan-line data that the line buffer storage of erasing is stored; The control line buffer storage receives i+1 bar scan-line data; And this vertical useful signal of generation; The horizontal scaling control module comprises the first horizontal scaling parameter and the second horizontal scaling parameter, couple the vertically scale control module, receive vertical useful signal, output line buffer storage address added value, wherein at each Preset Time: the 3rd accumulated value is added the horizontal scaling parameter do, and export the arithmetic section of the 3rd accumulated value as the 3rd accumulated value; The 4th accumulated value is added the second horizontal scaling parameter as the 4th accumulated value, and export the arithmetic section of the 4th accumulated value; According to the integral part of the 3rd accumulated value and the 4th accumulated value, export an address added value with control line buffer storage output data; When the integral part of the 3rd accumulated value during greater than the integral part of the 4th accumulated value, then the 4th accumulated value is added the second horizontal scaling parameter as the 4th accumulated value, up to the integral part of the 4th accumulated value more than or equal to the 3rd accumulated value, wherein i is the natural number greater than 1, and vice versa (promptly working as the integral part of the 4th accumulated value greater than the 3rd innumerable value added integral part).
According to the described image-zooming circuit of preferred embodiment of the present invention, the first above-mentioned convergent-divergent circuit couples horizontal scaling control module, vertically scale control module and line buffer storage, in order to according to the arithmetic section of first accumulated value and the arithmetic section of the 3rd accumulated value, the data that the line buffer storage is exported are made the first image-zooming interpolative operation.
According to the described image-zooming circuit of preferred embodiment of the present invention, the second above-mentioned convergent-divergent circuit couples horizontal scaling control module, vertically scale control module and line buffer storage, in order to according to the arithmetic section of second accumulated value and the arithmetic section of the 4th accumulated value, the data that the line buffer storage is exported are made the second image-zooming interpolative operation.
The present invention proposes a kind of image scaling method, in order to image data, be scaled the first ratio image data and the second ratio image data, and common lines buffer storage, the method comprise the following steps: to provide vertical accumulated value, horizontal accumulated value, the first vertically scale parameter, the first horizontal scaling parameter, the second vertically scale parameter, the second horizontal scaling parameter; Provide first accumulated value, second accumulated value, with the corresponding first vertically scale parameter of difference, the second vertically scale parameter; Provide the 3rd accumulated value, the 4th accumulated value, with the corresponding first horizontal scaling parameter of difference, the second horizontal scaling parameter; Each leveled time adds a horizontal default value (generally speaking being 1) with horizontal accumulated value, as horizontal accumulated value; When horizontal accumulated value more than or equal to the 3rd accumulated value, the 3rd accumulated value is added the first horizontal scaling parameter as the 3rd accumulated value; Equal the integral part of the 3rd accumulated value when horizontal accumulated value: a horizontal data of exporting corresponding horizontal accumulated value with horizontal accumulated value control line buffer storage; Arithmetic section with the 3rd accumulated value is done the first horizontal scaling computing to horizontal data; When horizontal accumulated value more than or equal to the 4th accumulated value, the 4th accumulated value is added the second horizontal scaling parameter as the 4th accumulated value; Equal the integral part of the 4th accumulated value when horizontal accumulated value: the horizontal data of exporting corresponding horizontal accumulated value with horizontal accumulated value control line buffer storage; Arithmetic section with the 4th accumulated value is done the second horizontal scaling computing to horizontal data; When horizontal accumulated value more than or equal to horizontal predetermined value (generally speaking for the input image horizontal width), vertical accumulated value is added up vertical default value (generally speaking being 1) as vertical accumulated value, and the horizontal accumulated value of setting, the 3rd accumulated value and the 4th accumulated value are initial value; When vertical accumulated value during, first accumulated value is added the first vertically scale parameter as first accumulated value more than or equal to first accumulated value; Equal the integral part of first accumulated value when vertical accumulated value: the control line buffer storage receives the scan-line data of corresponding vertical accumulated value; Arithmetic section with first accumulated value is done the first vertically scale computing to scan-line data; When vertical accumulated value during, second accumulated value is added the second vertically scale parameter as second accumulated value more than or equal to second accumulated value; Equal the integral part of second accumulated value when vertical accumulated value: the control line buffer storage receives the scan-line data of corresponding vertical accumulated value; Arithmetic section with second accumulated value is done the second vertically scale computing to this scan-line data.
The present invention shares the structure of same line buffer storage because of adopting a plurality of convergent-divergent circuit, therefore can under lower-cost situation, an image-zooming be become at least two ratios, in addition, can also reduce the degree of difficulty of circuit-board laying-out, further the generation of lessen any interference.
For above and other objects of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and be described with reference to the accompanying drawings as follows.
Description of drawings
Fig. 1 shows the circuit diagram of the image-zooming circuit of the embodiment of the invention.
Fig. 2 shows the further enforcement circuit diagram of Fig. 1 image-zooming circuit.
Fig. 3 A～Fig. 3 J shows the magnified image synoptic diagram of implementing according to the embodiment of the invention.
Fig. 4 A～Fig. 4 F shows according to what the embodiment of the invention was implemented and dwindles the image synoptic diagram.
Fig. 5 shows the further enforcement circuit diagram of Fig. 1 image-zooming circuit.
Fig. 6 shows the process flow diagram of the image scaling method of the embodiment of the invention.
The reference numeral explanation
△: come source pixel
, zero: object pixel
101: the line buffer storage
102: the first convergent-divergent circuit
103: the second convergent-divergent circuit
104: the line buffering control device
1011: the line memory buffer
1012: line buffering Read Controller
1013: line buffering writing controller
1041: the vertically scale control module
1042: the horizontal scaling control module
VVS: vertical effectively signal
LBRD: the line buffering reads finishes signal
LBWE: the line buffering writes enable signal
AA: address value adds up
LBW: line buffering write signal
HA: horizontal accumulated value
601～620: the step of the embodiment of the invention
Embodiment
Fig. 1 shows the circuit diagram of the image-zooming circuit of the embodiment of the invention.Please refer to Fig. 1, this circuit comprises line buffer storage 101, the first convergent-divergent circuit 102, the second convergent-divergent circuit 103 and line buffering control device 104.The first convergent-divergent circuit 102 couples line buffer storage 101, and the data that line buffer storage 101 is exported are made the first image-zooming interpolative operation.The second convergent-divergent circuit 103 couples line buffer storage 101, and the data that line buffer storage 101 is exported are made the second image-zooming interpolative operation.Line buffering control device 104 couples line buffer storage 101, the first convergent-divergent circuit 102 and the second convergent-divergent circuit 103, in order to the operating state according to the first convergent-divergent circuit 102 and the second convergent-divergent circuit 103, control line buffer storage 101 receives or output scanning line data.
Fig. 2 shows the further enforcement circuit of Fig. 1 image-zooming circuit.Please refer to Fig. 2, this embodiment further illustrates line buffering control device 104 more detailed enforcement circuit and line buffer storage 101 more detailed enforcement circuit in this circuit.Its center line buffering control device 104 comprises vertically scale control module 1041 and horizontal scaling control module 1042, and line buffer storage 101 comprises line memory buffer 1011, line buffering Read Controller 1012 and line buffering writing controller 1013.
Its operation for convenience of description at first, is amplified (Scaling up) for one with same picture earlier and is become the computing of two different resolutions as embodiment.Fig. 3 A～3I shows the convergent-divergent image synoptic diagram of implementing according to the embodiment of the invention, and cooperates the circuit framework of Fig. 2 to describe.Please refer to Fig. 3 A～3I, in this synoptic diagram, each △ represents one to come source pixel, and each and zero represents first object pixel and second object pixel respectively.At this hypothesis source picture is one 5 * 5 picture, and this embodiment will be enlarged into this picture of 5 * 59 * 9 picture and 17 * 17 picture.Defining the first horizontal scaling parameter at this in addition is (5-1)/(17-1)=0.25 for (5-1)/(17-1)=0.25, the first vertically scale parameter for (5-1)/(9-1)=0.5, the second vertically scale parameter for (5-1)/(9-1)=0.5, the second horizontal scaling parameter.And, vertically scale control module 1041 definition first accumulated value and second accumulated values in the online buffering control device 104, definition the 3rd accumulated value and the 4th accumulated value in the horizontal scaling control module 1042.
In this example with 5 * 5,17 * 17 and 9 * 9 picture is as an example so that explanation embodiment, those skilled in the art should know, in general application normally with VGA, SVGA, XVGA, SXVGA, the defined various resolution of WXGA or the like VESA standard, for example VGA resolution (640 * 480) will be amplified (scaling up) is SXVGA resolution (1280 * 1024), its horizontal scaling parameter just might be (640-1)/(1280-1)=0.4996, the vertically scale parameter just might be (480-1)/(1024)=0.4677, so the present invention is not as limit.
When initial, earlier above-mentioned first accumulated value, second accumulated value, the 3rd accumulated value and the 4th accumulated value are made as an initial value (for example 0), and the 1st data (in the present embodiment, the 1st data with the 2nd sweep trace are R0 and R1 △ part among Fig. 3 A) with the 2nd sweep trace have been stored in the online in advance memory buffer 1011.Vertically scale control module 1041 in the line buffering control device 104 receives line buffering that line buffering Read Controller 1012 exported earlier and reads the input image data and finish signal LBRD, vertical accumulated value is added vertical default value (1), next, first accumulated value (0) is added the first vertically scale parameter (0.5) as first accumulated value (0.5), and the arithmetic section (0) of exporting first accumulated value is given the first convergent-divergent circuit 102, simultaneously, second accumulated value (0) adds the second vertically scale parameter (0.25) as second accumulated value (0.25), and the arithmetic section (0) of sending second accumulated value gives the second convergent-divergent circuit 103, and the vertical effectively signal VVS of output.
After horizontal scaling control module 1042 receives vertical useful signal VVS, horizontal accumulated value is added horizontal default value (1), then, the 3rd accumulated value (0) is added the first horizontal scaling parameter (0.5) as the 3rd accumulated value (0.5), repeat to add up action up to the 3rd accumulated value more than or equal to horizontal accumulated value (1) and export the arithmetic section (0 of the 3rd accumulated value, 0.5), same, the 4th accumulated value (0) is added the second horizontal scaling parameter (0.25) as the 4th accumulated value (0.25), repeat to add up action up to the 4th accumulated value more than or equal to horizontal accumulated value (1) and export the arithmetic section (0 of the 4th accumulated value, 0.25,0.5,0.75), afterwards according to the integral part (0) of the 3rd accumulated value and the 4th accumulated value, export horizontal accumulated value HA to line buffering Read Controller 1012, line buffering Read Controller 1012 adds that with one of the inner setting address value AA that adds up horizontal accumulated value HA is as the address value AA that adds up, and the output address value AA that adds up makes its output △ (R0 to line memory buffer 1011, C0) pixel, △ (R0, C1) pixel, △ (R1, C0) pixel, △ (R1, C1) pixel.
Next, the first convergent-divergent circuit 102 is according to the arithmetic section (0) of first accumulated value and the arithmetic section (0 of the 3rd accumulated value, 0.5), to △ (R0, C0) pixel, △ (R0, C1) pixel, △ (R1, C0) pixel, △ (R1, C1) pixel is made interpolative operation, obtain (R0, C0) pixel and (R0, C0.5) pixel, as Fig. 3 B, its interpolative operation for example be with △ (R0, C0) value of pixel * (1-0.5)+△ (R0, C1) value of pixel * 0.5 obtains (R0, C0.5), rest of pixels knows that this operator should the rest may be inferred.
Same, the second convergent-divergent circuit 103 is according to the arithmetic section (0) of second accumulated value and the arithmetic section (0,0.25 of the 4th accumulated value, 0.5,0.75), to △ (R0, C0) pixel, △ (R0, C1) pixel, △ (R1, C0) pixel, △ (R1, C1) pixel is made interpolative operation, obtain zero (R0, C0) pixel, zero (R0, C0.25) pixel, zero (R0, C0.5) pixel and zero (R0, C0.75) pixel, as Fig. 3 C, its interpolative operation for example is with △ (R0, C0) value of pixel * (1-0.25)+△ (R0, C1) value of pixel * 0.25 obtains zero (R0, C0.25) pixel, same, rest of pixels those skilled in the art should the rest may be inferred.
After having served as a Preset Time, enough above-mentioned first and second convergent-divergent circuit 102 of above-mentioned Preset Time and 103 computings finish, the deciding means of this Preset Time for example be provided with a clock pulse signal deciding or in horizontal scaling control module 1042 inside counter with the decision, just repeat to add up action up to the 3rd accumulated value and the 4th accumulated value more than or equal to ensuing next Preset Time of horizontal accumulated value (1), horizontal scaling control module 1042 adds the first horizontal scaling parameter (0.5) as new the 3rd accumulated value (1) with the 3rd accumulated value (0.5), the 4th accumulated value (0.75) is added the first horizontal scaling parameter (0.25) as new the 4th accumulated value (1), horizontal accumulated value (1) is added horizontal default value (1) as new horizontal accumulated value (2), then export horizontal accumulated value HA to line buffering Read Controller 1012, line buffering Read Controller 1012 adds that with one of the inner setting address value AA that adds up horizontal accumulated value HA is as the address value AA that adds up, and the output address value AA that adds up makes its output △ (R0 to line memory buffer 1011, C2) pixel, △ (R1, C2) pixel, same, the first convergent-divergent circuit continues output (R0, C1) pixel and (R0, C1.5) pixel, the second convergent-divergent circuit continues output zero (R0, C1) pixel, zero (R0, C1.25) pixel, zero (R0, C1.5) pixel and zero (R0, C1.75) pixel, the rest may be inferred is all horizontal predetermined value (being generally input image horizontal width) up to horizontal scaling control module 1042 mutually because of the 3rd accumulated value and the 4th accumulated value integral part (4), as Fig. 3 D and Fig. 3 E.
This moment, the line buffering Read Controller 1012 address value AA that adds up that obtains after this horizontal accumulated value HA that adds up exceeded its default value decided at the higher level but not officially announced, line buffering Read Controller 1012 just export and enable line cushions and reads end signal LBRD to vertically scale control module 1041, and the address value AA that will add up is made as initial value (for example being 0), the 3rd accumulated value, the 4th accumulated value and horizontal accumulated value and is made as initial value (for example being 0).
Vertically scale control module 1041 receives after line buffering reads end signal LBRD, first accumulated value (being 0.5 at this moment) is added the first vertically scale parameter (0.5) as first accumulated value (1), and the arithmetic section (0.5) of exporting first accumulated value is to the first convergent-divergent circuit 102, and second accumulated value (being 0.25 at this moment) added the second vertically scale parameter (0.25) as second accumulated value (0.5), and the arithmetic section (0.25) of exporting second accumulated value is to the second convergent-divergent control circuit 103, and the vertical effectively signal VVS of output.
After horizontal scaling control module 1042 receives vertical useful signal VVS, the 3rd accumulated value and the 4th accumulated value repeat the above-mentioned arithmetic section that adds up and send first accumulated value, second accumulated value, the 3rd accumulated value, the 4th accumulated value and make it to input image article one horizontal data △ (R0 for the first convergent-divergent circuit 102 and the second convergent-divergent circuit 103, Cn), n=0～3 and input image second horizontal data △ (R1, Cn), n=0～3 pixels are made interpolative operation, are illustrated in Fig. 3 F and Fig. 3 G.
Next, the first convergent-divergent circuit 102 and the second convergent-divergent circuit 103 begin to do above-mentioned computing and have exceeded the default value decided at the higher level but not officially announced (when just having the pixel of row to finish computing) of line buffering Read Controller 1012 up to the above-mentioned address value AA that adds up, after the received lines buffering of vertically scale control module 1041 read end signal LBRD and activates (active), whether the integral part that vertically scale control module 1041 begins to judge first accumulated value (1) was greater than the integral part of second accumulated value (0.5).When the integral part of judging first accumulated value (1) during greater than the integral part of second accumulated value (0.5), first accumulated value stops to add up, and second accumulated value (0.5) is added the second vertically scale parameter (0.25) as second accumulated value (0.75), and arithmetic section (0.5) to the second convergent-divergent circuit 103 of exporting second accumulated value is made above-mentioned interpolative operation.
Repeat the above-mentioned action that adds up up to second accumulated value (1) during more than or equal to the integral part of first accumulated value (1), the pixel that this moment, the first convergent-divergent circuit 102 was gone out is kept the state as Fig. 3 H, when the second convergent-divergent circuit 103 when the arithmetic section of handling second accumulated value equals 0.75, simultaneously, when the line buffering read end signal LBRD generation, 1041 outputs of vertically scale control module and enable line buffering write enable signal LBWE.Line buffering writing controller 1013 receives that the line buffering writes enable signal LBWE, output and enable line buffering write signal LBW.Line memory buffer 1011 is received the line buffering write signal LBW that has produced, the 1st the scan-line data △ R0 that this memory buffer of erasing is stored also receives the 3rd scan-line data △ R2, and the pixel that the second convergent-divergent circuit 103 is handled out illustrates the state as Fig. 3 I.
Next, vertically scale control module 1041 continue to add up first accumulated value (being added to 1.5) and second accumulated value (being added to 1.25), and respectively the first convergent-divergent circuit 102 and the second convergent-divergent circuit 103 are sent its corresponding arithmetic section (0 and 0) so that the 2nd scan-line data △ R1 and the 3rd scan-line data △ R2 are repeated above-mentioned interpolative operation.Repeat above-mentioned action and just can simultaneously the △ picture data be zoomed into the picture data of zero ratio and the picture data of ratio respectively.
Above-mentioned for example be that picture data with the picture data that original △ picture data zoomed into zero ratio and ratio is as embodiment, next as an example with Fig. 4 A～4F, with above-mentioned identical hardware unit, will be with the picture data of the picture data that the △ picture data dwindled into zero ratio and ratio as embodiment.Present embodiment for convenience of description is with the circuit description present embodiment of Fig. 5.The basic framework of the circuit of Fig. 5 is identical with Fig. 2, yet its running is variant slightly with above-mentioned Fig. 2, below will explain with Fig. 5 and Fig. 4 A.
Please refer to Fig. 4 A, suppose that the source picture is one 16 * 16 a picture, this embodiment will be reduced into this picture of 16 * 16 11 * 11 picture and 7 * 7 picture.Defining the first horizontal scaling parameter at this in addition is (16-1)/(7-1)=2.5 for (16-1)/(7-1)=2.5, the first vertically scale parameter for (16-1)/(11-1)=1.5, the second vertically scale parameter for (16-1)/(11-1)=1.5, the second horizontal scaling parameter.And, vertically scale control module 1041 definition vertical accumulated value, first accumulated value and second accumulated values in the online buffering control device 104, definition horizontal accumulated value, the 3rd accumulated value and the 4th accumulated value in the horizontal scaling control module 1042.
When initial, earlier above-mentioned first accumulated value, second accumulated value, the 3rd accumulated value and the 4th accumulated value are made as an initial value (for example 0), and the 1st data (in the present embodiment, the 1st data with the 2nd sweep trace are R0 and R1 △ part among Fig. 4 A) with the 2nd sweep trace have been stored in the online memory buffer 1011 in advance.The line buffering that vertically scale control module 1041 in the line buffering control device 104 receives earlier reads the input image data and finishes signal LBRD, send the arithmetic section (0) of first accumulated value and give the first convergent-divergent circuit 102 and the second convergent-divergent circuit 103 with the arithmetic section (0) of second accumulated value, and the vertical effectively signal VVS of output.
After horizontal scaling control module 1042 receives vertical effectively signal VVS, send the arithmetic section (0) of the 3rd accumulated value and give the first convergent-divergent circuit 102 and the second convergent-divergent circuit 103 with the arithmetic section (0) of the 4th accumulated value, and send horizontal accumulated value HA to line buffering Read Controller 1012, line buffering Read Controller reads storer output horizontal data △ (R0 according to horizontal accumulated value HA control line buffering, C0), △ (R0, C1), △ (R1, C0), (R1 C1) gives the first convergent-divergent circuit 102 and the second convergent-divergent circuit 103 to △.The first convergent-divergent circuit 102 according to horizontal data △ (R0, C0), △ (R0, C1), △ (R1, C0), △ (R1, C1) and the arithmetic section of the first, the 3rd accumulated value make interpolative operation, calculate zero (R0, C0); The second convergent-divergent circuit 103 according to horizontal data △ (R0, C0), △ (R0, C1), △ (R1, C0), △ (R1, C1) and the arithmetic section of the second, the 4th accumulated value make interpolative operation, calculate (R0, C0).
Next, horizontal scaling control module 1042 adds up a horizontal default value (this embodiment is 1) as horizontal accumulated value HA (this moment, horizontal accumulated value HA was 1) with horizontal accumulated value; Next step, whether horizontal scaling controls 1042 determined level accumulated values (1) more than or equal to the 3rd accumulated value (0) and the 4th accumulated value (0); Horizontal scaling control 1042 judge horizontal accumulated value HA (1) more than or equal to the 3rd accumulated value (0) and the 4th accumulated value (0) after, just begin the 3rd accumulated value (0) is added that the first horizontal scaling parameter (1.5) is as the 3rd accumulated value (1.5); The 4th accumulated value (0) is added that the second horizontal scaling parameter (2.5) is as the 4th accumulated value (2.5); And export the arithmetic section (being respectively 0.5,0.5) of the 3rd, the 4th accumulated value.
At this moment, whether the integral part of horizontal scaling control module 1042 determined level accumulated values equals the integral part of the 3rd accumulated value or the 4th accumulated value.The integral part of judging horizontal accumulated value when horizontal scaling control module 1042 equals the 3rd accumulated value, this moment, horizontal scaling control module 1 042 outputed to line buffering Read Controller 1012 with horizontal accumulated value HA, and control line buffering Read Controller 1012 is according to horizontal accumulated value HA, output horizontal data △ (R0, C1), △ (R0, C2), △ (R1, C1), (R1 C2) gives the first convergent-divergent circuit 102 to △.The first convergent-divergent circuit 102 according to horizontal data △ (R0, C1), △ (R0, C2), △ (R1, C1), △ (R1, C2) and the arithmetic section of the first, the 3rd accumulated value (being respectively 0 and 0.5) make interpolative operation, calculate zero (R0, C1.5), shown in Fig. 4 B.
Next, next leveled time, horizontal scaling control module 1042 adds up a horizontal default value (1) as horizontal accumulated value HA (this moment, horizontal accumulated value HA was 2) with horizontal accumulated value (be 1 this moment); Next step, whether horizontal scaling controls 1042 determined level accumulated values (2) more than or equal to the 3rd accumulated value (1.5) and the 4th accumulated value (2.5); Horizontal scaling control 1042 judge horizontal accumulated value HA (2) more than or equal to the 3rd accumulated value (1.5) after, just begin the 3rd accumulated value (1.5) is added that the first horizontal scaling parameter (1.5) is as the 3rd accumulated value (3); And export the arithmetic section (0) of the 3rd accumulated value.
In addition, whether the integral part of horizontal scaling control module 1042 determined level accumulated values equals the integral part of the 3rd accumulated value or the 4th accumulated value.When horizontal scaling control module 1042 is judged the integral part that horizontal accumulated value (2) equals the 4th accumulated value (2.5), this moment, horizontal scaling control module 1042 outputed to line buffering Read Controller 1012 with horizontal accumulated value HA, and control line buffering Read Controller 1012 is according to horizontal accumulated value HA, output horizontal data △ (R0, C2), △ (R0, C3), △ (R1, C2), (R1 C3) gives the second convergent-divergent circuit 103 to △.The second convergent-divergent circuit 103 according to horizontal data △ (R0, C2), △ (R0, C3), △ (R1, C2), △ (R1, C3) and the arithmetic section of the second, the 4th accumulated value (being respectively 0 and 0.5) make interpolative operation, calculate (R0, C2.5), shown in Fig. 4 C.
Next, horizontal scaling control module 1042 all do aforesaid action up to horizontal accumulated value HA more than or equal to a horizontal predetermined value (at this embodiment, for example be 15, generally speaking, promptly import the last point of the horizontal width of image), this moment line buffering Read Controller 1012 just the output line buffering read end signal LBRD.Vertically scale control module 1041 receives after line buffering reads end signal LBRD, and vertical accumulated value is added that a vertical default value (for example being 1) is as vertical accumulated value; And vertical accumulated value (1) and first accumulated value, second accumulated value compared; When comparing out first accumulated value (0), just first accumulated value (0) is added that the first vertically scale parameter (1.5) is as first accumulated value (1.5) smaller or equal to vertical accumulated value (1); When comparing out second accumulated value (0), just second accumulated value (0) is added that the second vertically scale parameter (2.5) is as second accumulated value (2.5) smaller or equal to vertical accumulated value (1).
Next step, vertically scale control module 1041 begins the integral part of vertical accumulated value (1) with first accumulated value (1.5), second accumulated value (2.5) compared again; When comparing out vertical accumulated value (1) and equal the integral part of first accumulated value (1.5), vertically scale control module 1041 just exports the arithmetic section (0.5) of first accumulated value to first convergent-divergent circuit 102, and exports line buffering write signal LBW; Line buffering writing controller 1013 is according to line buffering write signal LBW, control line memory buffer 1011 received scanline data R3 (vertical bar that writes next input image in advance to line buffer-stored in the hope of effective running).Last vertically scale control module 1041 outputs one vertical useful signal VVS begins to utilize horizontal scanning line R1 and R2 with controlling level convergent-divergent control module 1042, calculate zero at each leveled time (R1.5, C0), zero (R1.5, C1.5)～zero (R1.5, C15), as Fig. 4 D.
Same, when computing is finished, when the horizontal accumulated value HA that horizontal scaling control module 1042 is exported just can be more than or equal to a horizontal predetermined value (for example being 15), when line cushions Read Controller 1012 determined level accumulated value HA more than or equal to horizontal threshold value, at first the output line buffering reads end signal LBRD, next horizontal accumulated value, the 3rd accumulated value, the 4th accumulated value is set at initial value (for example being 0).Vertically scale control module 1041 receives after line buffering reads end signal LBRD, and vertical accumulated value (1) is added that a vertical default value (1) is as vertical accumulated value (2); And vertical accumulated value (2) and first accumulated value (1.5), second accumulated value (2.5) compared; When the integral part of comparing out first accumulated value (1) less than vertical accumulated value (1), just first accumulated value (1.5) is added that the first vertically scale parameter (1.5) is as first accumulated value (3).
Next step, vertically scale control module 1041 begins the integral part of vertical accumulated value (2) with first accumulated value (3), second accumulated value (2.5) compared again; When comparing out vertical accumulated value (2) and equal the integral part of second accumulated value (2.5), vertically scale control module 1041 just exports the arithmetic section (0.5) of first accumulated value to second convergent-divergent circuit 102, and exports line buffering write signal LBW; Line buffering writing controller 1013 is according to line buffering write signal LBW, control line memory buffer 1011 received scanline data R4.Last vertically scale control module 1041 outputs one vertical useful signal VVS begins to utilize horizontal scanning line R2 and R3 with controlling level convergent-divergent control module 1042, each leveled time calculate (R2.5, C0), (R2.5, C2.5)～(R2.5, C15), as Fig. 4 E.Afterwards, repeat above-mentioned interpolative operation, just can calculate result as Fig. 4 F.
Those skilled in the art should be known in that the embodiment of the foregoing description can also do the computing of dwindling that dwindles into two different proportions of same picture as above-mentioned Fig. 4 embodiment, also or with same picture does to amplify computing simultaneously and dwindles computing.And above-mentioned computing is according to the convergent-divergent algorithm difference of (the convergent-divergent algorithm does not exceed with interpolation method), have a little difference in the operation, yet spirit of the present invention is that with same image-zooming be different ratios, and shares a line buffer storage, so the present invention is not exceeded with the foregoing description.In addition, those skilled in the art should be known in the above embodiments except in can be as described above, first calculation level calculate again vertical outside, if level is intercoursed with vertical, according to spirit of the present invention, can also equivalence enforcement, so the invention is not restricted to this.
Fig. 6 shows the image scaling method of the embodiment of the invention.The method mainly is in order to an image data, is scaled the first ratio image data and the second ratio image data, and the common lines buffer storage.Please refer to Fig. 6, at first, provide vertical accumulated value, horizontal accumulated value, the first vertically scale parameter, the first horizontal scaling parameter, the second vertically scale parameter, the second horizontal scaling parameter (step 601).Next, provide first accumulated value, second accumulated value, the 3rd accumulated value, the 4th accumulated value with the corresponding first vertically scale parameter of difference, the second vertically scale parameter, the first horizontal scaling parameter, the second horizontal scaling parameter (step 602).Each leveled time adds horizontal default value with horizontal accumulated value, as horizontal accumulated value (step 603).
Next, whether the determined level accumulated value when judging horizontal accumulated value more than or equal to three accumulated value, with three accumulated value adds first horizontal scaling parameter as three accumulated value (step 605) more than or equal to the 3rd accumulated value (step 604).Then whether the determined level accumulated value equals the integral part (step 606) of the 3rd accumulated value.When judging horizontal accumulated value and equal the integral part of the 3rd accumulated value, control the output of this line buffer storage to a horizontal data that should horizontal accumulated value with horizontal accumulated value, and horizontal data is done the first horizontal scaling computing (step 607) with the arithmetic section of the 3rd accumulated value.
In the another one flow process, whether the determined level accumulated value is more than or equal to the 4th accumulated value (step 608).When judging horizontal accumulated value, the 4th accumulated value is added the second horizontal scaling parameter as the 4th accumulated value (step 609) more than or equal to the 4th accumulated value.Next, whether the determined level accumulated value equals the integral part (step 610) of the 4th accumulated value.When judging horizontal accumulated value and equal the integral part of the 4th accumulated value, export a horizontal data of corresponding horizontal accumulated value with horizontal accumulated value control line buffer storage, and above-mentioned horizontal data is done the second horizontal scaling computing (step 611) with the arithmetic section of the 4th accumulated value.
Carrying out step 604 after the step 607, or carrying out step 608 after the step 611, whether next step, determined level accumulated value more than or equal to horizontal predetermined value, just threshold value (step 612).When being judged as when being, vertical accumulated value is added up vertical default value as vertical accumulated value, and the horizontal accumulated value of setting, the 3rd accumulated value and the 4th accumulated value are initial value (for example being 0) (step 613).Next, judge that whether vertical accumulated value is more than or equal to first accumulated value (step 614).Be judged as when being, first accumulated value is added the first vertically scale parameter as first accumulated value (step 615).Judge then whether vertical accumulated value equals the integral part (step 616) of first accumulated value.Be that the control line buffer storage receives the one scan line data of corresponding vertical accumulated value and with the arithmetic section of first accumulated value scan-line data done the first vertically scale computing (step 617) if be judged as.
On the other hand, judge that whether vertical accumulated value is more than or equal to second accumulated value (step 618).Be judged as when being, second accumulated value is added the second vertically scale parameter as second accumulated value (step 619).Judge then whether vertical accumulated value equals the integral part (step 620) of second accumulated value.Be that the control line buffer storage receives the one scan line data of corresponding vertical accumulated value and with the arithmetic section of second accumulated value scan-line data done the second vertically scale computing (step 621) if be judged as.
Carrying out step 613 after the step 617, or carrying out step 613 after the step 621, whether next step judges vertical accumulated value more than or equal to vertical predetermined value, just vertical threshold value (generally speaking being input image vertical height) (step 622).If be judged to be, promptly finish image-zooming, be not, then get back to step 603 and continue to repeat above-mentioned several steps, up to finishing image-zooming if be judged to be.
In sum, the present invention shares the structure of same line buffer storage because of adopting a plurality of convergent-divergent circuit, to reach with same picture, be scaled to the purpose of the image of different proportion, therefore can be under lower-cost situation, one image-zooming is become at least two different proportions, in addition, in an embodiment of the present invention, reduced the assembly use amount, therefore also reduce the degree of difficulty of circuit-board laying-out, the generation of further lowering electromagnetic interference (EMI).
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; those skilled in the art can do some changes and retouching under the premise without departing from the spirit and scope of the present invention, so protection scope of the present invention is as the criterion with claim of the present invention.
Claims (19)
1. an image-zooming circuit in order to same image data, is shared a line buffer storage, is scaled one first ratio image data and one second ratio image data, and this circuit comprises:
One first convergent-divergent circuit couples this line buffer storage, and the data that this line buffer storage is exported are made one first image-zooming interpolative operation;
One second convergent-divergent circuit couples this line buffer storage, and the data that this line buffer storage is exported are made one second image-zooming interpolative operation; And
One line buffering control device, couple this line buffer storage, this first convergent-divergent circuit and this second convergent-divergent circuit, in order to operating state, control this line buffer storage and receive or export one scan line data according to this first convergent-divergent circuit and this second convergent-divergent circuit.
2. image-zooming circuit as claimed in claim 1, wherein this line buffering control device comprises:
One vertically scale control module, comprise one first vertically scale parameter and one second vertically scale parameter, this vertically scale control module receives line buffering and reads end signal, output one vertical useful signal, wherein when this line buffering reads the end signal activation:
One first accumulated value is added this first vertically scale parameter as this first accumulated value, and export the arithmetic section of this first accumulated value;
One second accumulated value is added this second vertically scale parameter as this second accumulated value, and export the arithmetic section of this second accumulated value;
When the integral part of this first accumulated value integral part more than or equal to this second accumulated value, then when this line buffering reads the end signal generation, this second accumulated value adds this second vertically scale parameter as this second accumulated value, and export the arithmetic section of this second accumulated value, up to the integral part of this second accumulated value more than or equal to this first accumulated value; And
When the integral part of this second accumulated value more than or equal to this first accumulated value, and this line cushions when reading the end signal generation:
The stored i-1 bar scan-line data of this line buffer storage of erasing;
Control this line buffer storage and receive i+1 bar scan-line data;
This vertical useful signal of activation; And
One horizontal scaling control module comprises one first horizontal scaling parameter and one second horizontal scaling parameter, couples this vertically scale control module, receives this vertical useful signal, exports a horizontal accumulated value, wherein at each Preset Time:
One the 3rd accumulated value is added this first horizontal scaling parameter as the 3rd accumulated value, and export the arithmetic section of the 3rd accumulated value;
One the 4th accumulated value is added this second horizontal scaling parameter as the 4th accumulated value, and export the arithmetic section of the 4th accumulated value;
According to the integral part of the 3rd accumulated value and the 4th accumulated value, export this horizontal accumulated value to control this line buffer storage output data; And
When the integral part of the 3rd accumulated value during, then the 4th accumulated value is added this second horizontal scaling parameter as the 4th accumulated value greater than the integral part of the 4th accumulated value;
Wherein i is the natural number greater than 1.
3. image-zooming circuit as claimed in claim 2, this first convergent-divergent circuit wherein, couple this horizontal scaling control module, vertically scale control module and this line buffer storage, in order to according to the arithmetic section of this first accumulated value and the arithmetic section of the 3rd accumulated value, the data that this line buffer storage is exported are made this first image-zooming interpolative operation.
4. image-zooming circuit as claimed in claim 2, this second convergent-divergent circuit wherein, couple this horizontal scaling control module, vertically scale control module and this line buffer storage, in order to according to the arithmetic section of this second accumulated value and the arithmetic section of the 4th accumulated value, the data that this line buffer storage is exported are made this second image-zooming interpolative operation.
5. image-zooming circuit as claimed in claim 2, wherein this line buffer storage comprises:
One line buffering Read Controller, couple this vertically scale control module, receive this horizontal accumulated value, export this line buffering and read end signal and an address value that adds up, add that in order to address value that this is added up this horizontal accumulated value is as this address value that adds up, when this address value that adds up more than or equal to a horizontal threshold value, this line of activation buffering reads end signal;
One line buffering writing controller, couple this vertically scale control module, receive the line buffering that this vertically scale control module exported and write enable signal, export line buffering write signal, when this line buffering writes the enable signal activation, this line buffering write signal of activation; And
One line memory buffer, couple this line buffering Read Controller and this line buffering writing controller, receive this add up address value and this line buffering write signal, according to these stored data of address value output line memory buffer that add up, when this line buffering write signal activation, the i-1 bar scan-line data that this line memory buffer of erasing is stored also receives i+1 bar scan-line data;
Wherein when this second accumulated value of this vertically scale control module integral part more than or equal to this first accumulated value, and this line buffering is when reading the end signal activation, and this line buffering that this vertically scale control module is exported writes the enable signal activation.
6. image-zooming circuit as claimed in claim 2, wherein this initial value is 0.
7. image-zooming circuit as claimed in claim 2, when the first convergent-divergent circuit is when amplifying computing, the arithmetic section of the arithmetic section of this first accumulated value and the 3rd accumulated value is respectively the non-integer part of this first accumulated value and the non-integer part of the 3rd accumulated value, if the non-integer of this first accumulated value partly is 0, then the arithmetic section of this first accumulated value is 0, if the non-integer of the 3rd accumulated value partly is 0, then the arithmetic section of the 3rd accumulated value is 0.
8. image-zooming circuit as claimed in claim 7 is when the first convergent-divergent circuit is that this first zooming parameter and the 3rd zooming parameter are respectively less than 1 when amplifying computing.
9. image-zooming circuit as claimed in claim 2, when the second convergent-divergent circuit is when amplifying computing, the arithmetic section of the arithmetic section of this second accumulated value and the 4th accumulated value is respectively the non-integer part of this second accumulated value and the non-integer part of the 4th accumulated value, if the non-integer of this second accumulated value partly is 0, then the arithmetic section of this second accumulated value is 0, if the non-integer of the 4th accumulated value partly is 0, then the arithmetic section of the 4th accumulated value is 0.
10. image-zooming circuit as claimed in claim 9 is when the second convergent-divergent circuit is that this second zooming parameter and the 4th zooming parameter are respectively less than 1 when amplifying computing.
11. image-zooming circuit as claimed in claim 1, wherein this line buffering control device comprises:
One vertically scale control module, comprise one first accumulated value, one second accumulated value, a vertical accumulated value, one first vertically scale parameter and one second vertically scale parameter, this vertically scale control module receives line buffering and reads end signal, output one vertical useful signal and line buffering write signal
When this line buffering reads the end signal generation:
Should add a vertical default value as this vertical accumulated value by vertical accumulated value;
Export this line buffering write signal and receive one scan line data to control this line buffer storage; And
Export this vertical useful signal; And
When this vertical accumulated value during, this first accumulated value is added this first vertically scale parameter as this first accumulated value more than or equal to this first accumulated value;
When this vertical accumulated value equals the integral part of this first accumulated value, export the arithmetic section of this first accumulated value;
When this vertical accumulated value during, this second accumulated value is added this second vertically scale parameter as this second accumulated value more than or equal to this second accumulated value; And
When this vertical accumulated value equals the integral part of this second accumulated value, export the arithmetic section of this second accumulated value; And
One horizontal scaling control module, couple this vertically scale control module, comprise one first horizontal scaling parameter, one second horizontal scaling parameter, a horizontal accumulated value, one the 3rd accumulated value and one the 4th accumulated value, receive this vertical useful signal, wherein at each leveled time:
Should add a horizontal default value as this horizontal accumulated value by horizontal accumulated value;
Export this horizontal accumulated value to control this output of line buffer storage and the corresponding horizontal data of this horizontal accumulated value;
When this horizontal accumulated value more than or equal to the 3rd accumulated value, the 3rd accumulated value is added this first horizontal scaling parameter as the 3rd accumulated value;
When this horizontal accumulated value equals the integral part of the 3rd accumulated value, and export the arithmetic section of the 3rd accumulated value;
When this horizontal accumulated value more than or equal to the 4th accumulated value, the 4th accumulated value is added this second horizontal scaling parameter as the 4th accumulated value; And
When this horizontal accumulated value equals the integral part of the 4th accumulated value, export the arithmetic section of the 4th accumulated value.
12. image-zooming circuit as claimed in claim 11, wherein this line buffer storage comprises:
One line memory buffer;
One line buffering Read Controller, couple this vertically scale control module and this line memory buffer, receive this horizontal accumulated value, export this line buffering and read end signal, to export this horizontal accumulated value pairing in order to control this line memory buffer according to this horizontal accumulated value, when this horizontal accumulated value more than or equal to a horizontal threshold value, this line of activation buffering reads end signal; And
One line buffering writing controller couples this vertically scale control module, receives this vertical accumulated value that this vertically scale control module is exported, and receives this scan-line data in order to control this line memory buffer according to this vertical accumulated value.
13. image-zooming circuit as claimed in claim 11, wherein work as this horizontal accumulated value more than or equal to a horizontal end value, the horizontal scaling control module is exported a horizontal junction beam control signal and is controlled this vertically scale control module, makes the vertically scale control module control this line buffer storage and receives this scan-line data.
14. image-zooming circuit as claimed in claim 11, wherein this first, the arithmetic section of this second, the 3rd, the 4th accumulated value be respectively above-mentioned this first, the non-integer part of this second, the 3rd, the 4th accumulated value.
15. an image scaling method in order to an image data, is scaled one first ratio image data and one second ratio image data, and shares a line buffer storage, the method comprises:
One vertical accumulated value, a horizontal accumulated value, one first vertically scale parameter, one first horizontal scaling parameter, one second vertically scale parameter, one second horizontal scaling parameter are provided;
One first accumulated value, one second accumulated value are provided, with respectively to should the first vertically scale parameter, the second vertically scale parameter;
One the 3rd accumulated value, one the 4th accumulated value are provided, with respectively to should the first horizontal scaling parameter, the second horizontal scaling parameter;
Each leveled time should add a horizontal default value by horizontal accumulated value, as this horizontal accumulated value;
When this horizontal accumulated value more than or equal to the 3rd accumulated value, the 3rd accumulated value is added this first horizontal scaling parameter as the 3rd accumulated value;
Equal the integral part of the 3rd accumulated value when this horizontal accumulated value:
Control the output of this line buffer storage to a horizontal data that should horizontal accumulated value with this horizontal accumulated value; And
Arithmetic section with the 3rd accumulated value is done the first horizontal scaling computing to this horizontal data; And
When this horizontal accumulated value more than or equal to the 4th accumulated value, the 4th accumulated value is added this second horizontal scaling parameter as the 4th accumulated value;
Equal the integral part of the 4th accumulated value when this horizontal accumulated value:
Control the output of this line buffer storage to a horizontal data that should horizontal accumulated value with this horizontal accumulated value; And
Arithmetic section with the 4th accumulated value is done the second horizontal scaling computing to this horizontal data; And
When this horizontal accumulated value more than or equal to a horizontal threshold value, the vertical default value that should vertical accumulated value add up is as this vertical accumulated value, and to set this horizontal accumulated value, the 3rd accumulated value and the 4th accumulated value be an initial value; And
When this vertical accumulated value during, this first accumulated value is added this first vertically scale parameter as this first accumulated value more than or equal to this first accumulated value;
Equal the integral part of this first accumulated value when this vertical accumulated value:
Control the one scan line data that this line buffer storage receives corresponding vertical accumulated value; And
Arithmetic section with this first accumulated value is done the first vertically scale computing to this scan-line data; And
When this vertical accumulated value during, this second accumulated value is added this second vertically scale parameter as this second accumulated value more than or equal to this second accumulated value; And
Equal the integral part of this second accumulated value when this vertical accumulated value:
Control this scan-line data that this line buffer storage receives corresponding vertical accumulated value; And
Arithmetic section with this second accumulated value is done the second vertically scale computing to this scan-line data.
16. image scaling method as claimed in claim 15, wherein this initial value is 0.
17. image scaling method as claimed in claim 15, wherein this first, the arithmetic section of this second, the 3rd, the 4th accumulated value be respectively above-mentioned this first, the non-integer part of this second, the 3rd, the 4th accumulated value.
18. image scaling method as claimed in claim 15, when the first horizontal scaling computing when amplifying computing, this first horizontal scaling parameter is less than 1, when the first horizontal scaling computing when dwindling computing, this first horizontal scaling parameter is greater than 1.
19. image scaling method as claimed in claim 15, when the first vertically scale computing when amplifying computing, this first vertically scale parameter is less than 1, when the first vertically scale computing when dwindling computing, this first vertically scale parameter is greater than 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200610141594A CN100583202C (en) | 2006-09-30 | 2006-09-30 | Image zooming circuit and method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200610141594A CN100583202C (en) | 2006-09-30 | 2006-09-30 | Image zooming circuit and method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101154341A true CN101154341A (en) | 2008-04-02 |
| CN100583202C CN100583202C (en) | 2010-01-20 |
Family
ID=39255971
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200610141594A Active CN100583202C (en) | 2006-09-30 | 2006-09-30 | Image zooming circuit and method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100583202C (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101751907B (en) * | 2008-12-11 | 2013-02-13 | 辉达公司 | Variable scaling of image data for aspect ratio conversion |
| CN111369444A (en) * | 2020-03-31 | 2020-07-03 | 浙江大华技术股份有限公司 | Image scaling processing method and device |
| CN115150566A (en) * | 2022-09-01 | 2022-10-04 | 杭州雄迈集成电路技术股份有限公司 | Multi-path multi-resolution video real-time output method and system |
-
2006
- 2006-09-30 CN CN200610141594A patent/CN100583202C/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101751907B (en) * | 2008-12-11 | 2013-02-13 | 辉达公司 | Variable scaling of image data for aspect ratio conversion |
| CN111369444A (en) * | 2020-03-31 | 2020-07-03 | 浙江大华技术股份有限公司 | Image scaling processing method and device |
| CN111369444B (en) * | 2020-03-31 | 2024-02-27 | 浙江大华技术股份有限公司 | Image scaling processing method and device |
| CN115150566A (en) * | 2022-09-01 | 2022-10-04 | 杭州雄迈集成电路技术股份有限公司 | Multi-path multi-resolution video real-time output method and system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100583202C (en) | 2010-01-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6885377B2 (en) | Image data output controller using double buffering | |
| US7589745B2 (en) | Image signal processing circuit and image display apparatus | |
| JP2004302405A (en) | Liquid crystal driving device | |
| CN1941066A (en) | Multiple display device system and method for automatically setting display-mode | |
| US7667718B2 (en) | Image scaling circuit and method thereof | |
| KR20130040251A (en) | Techniques to control display activity | |
| JP4003762B2 (en) | Display controller, electronic device, and image data supply method | |
| CN105825826B (en) | Display driver | |
| CN101060607A (en) | Image zooming device and its method | |
| CN100583202C (en) | Image zooming circuit and method thereof | |
| CN101266761B (en) | Memory buffer access method and image displaying method and system | |
| US20080150920A1 (en) | Multi-display system and method for displaying video frames thereon | |
| US20060203002A1 (en) | Display controller enabling superposed display | |
| CN103794169A (en) | Display control device and data processing system | |
| US20090225095A1 (en) | Image processing circuit and electronic apparatus having the same circuit | |
| US10923081B2 (en) | Timing controller, display apparatus, and operation method thereof | |
| JP2011077970A (en) | Image processor, image display system, electronic device and image processing method | |
| TWI354973B (en) | ||
| US20060098001A1 (en) | System and method for effectively preventing image tearing artifacts in displayed image data | |
| KR20050101285A (en) | A display apparatus and method for mobile communication terminal | |
| US20070109234A1 (en) | Liquid crystal display and method for driving same | |
| US20080174601A1 (en) | Video Control for Providing Multiple Screen Resolutions Using Modified Timing Signal | |
| CN101399017B (en) | Source electrode driver with image scrolling function | |
| JP2007251723A (en) | Projection type video display apparatus | |
| JP2006011074A (en) | Display controller, electronic equipment, and image data supply method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |