CN101140779A - Error corrected device and method thereof - Google Patents
Error corrected device and method thereof Download PDFInfo
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- CN101140779A CN101140779A CNA2006101267689A CN200610126768A CN101140779A CN 101140779 A CN101140779 A CN 101140779A CN A2006101267689 A CNA2006101267689 A CN A2006101267689A CN 200610126768 A CN200610126768 A CN 200610126768A CN 101140779 A CN101140779 A CN 101140779A
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Abstract
An error correction device is provided, which comprises a decoding unit to read data from a main memory and make error detection on the data to produce a plurality of error values and the corresponding error addresses, an error buffer coupled with the decoding unit to store the said a plurality of error values and error addresses, an error sorting and ordering unit coupled with the error buffer to select a subset including a plurality of specific error values and the corresponding specific error addresses from the said error addresses, as well as an error correction unit coupled with the error sorting and ordering unit and the main memory to correct the data error according to the said specific error values and the corresponding error addresses.
Description
Technical field
The present invention relates to a kind of error correcting unit with and method, particularly relate to a kind of error correcting unit that can improve the system storage service efficiency with and method.
Background technology
In general, when reading the data of DVD disc, at first the data on the discs can be read by CD ROM reading-writing head, by the analog signal processor analog signal that read/write head produced is converted to 8-14 modulation (the Eight-to-Fourteen Modulation of digital format again, EFM) signal, after passing through EFMPLUS detuner (EFMPLUS demodulator) demodulation then, form column data, again these column data are stored in the storer at last.
See also Fig. 1, Fig. 1 is the functional block diagram of a DVD error correcting unit 100.Error correcting unit 100 includes a decoding unit 110 and an error correction unit 120.Wherein error correction unit 120 is coupled to this decoding unit 110, and decoding unit 110 and an error correction unit 120 are by the data of a bus 140 access memories 130.When the data volume of write store 130 is enough to constitute an error-correcting code block (Error Correction Code block, ECC block) time, decoding unit 110 (being generally RSPC (Reed Soloman Product-like Code decoder) code translator) is just by bus 140 reading of data from storer 130, and these data are carried out inner parity code (inner-code parity, PI) decoding, transmit misaddress and improper value to error correction unit 120 according to decode results then, error correction unit 120 just carries out computing according to improper value and misaddress, with by the data in bus 140 patch memories 130; Decoding unit 110 reads data in the storer 130 by bus 140 more then, and it is carried out outer parity sign indicating number (outer-code parity, PO) decoding, transmit misaddress and improper value to error correction unit 120 according to decode results then, revise the data in the storer 130 again; So can guarantee that just the disc data in the storer 130 is all correct, for continuous use the after the disc data.
See also Fig. 2 at this, Fig. 2 is the synoptic diagram of an ECC square 200.As shown in Figure 2, ECC square 200 is the square of one 182 bytes * 208 bytes, PI direction (horizontal direction) has 182 bytes (byte of a PI direction is referred to as a PI character code), and PO direction (vertical direction) then has 208 bytes (byte of a PO direction claim be a PO character code); Wherein PI and PO represent the correcting code of corresponding different directions respectively, and as previously mentioned, decoding unit 110 is proofreaied and correct disc data by PI and PO.
Yet, storer 130 is generally a dynamic RAM (dynamic random accessmemory, DRAM), as known in the art, DRAM130 is when access data, if when the generation storer changes the operation of row, must spend extra memory clock another row are carried out as activation (active), precharge operations such as (pre-charge); Yet in general, ECC square 200 all is to deposit (mentioned as described above column data) in regular turn in along the PI direction, for the purpose of illustrating when depositing storer 130 in, see also Fig. 3 at this, Fig. 3 is the Image Location of ECC square 200 in storer 130 shown in Figure 2.As shown in Figure 3, the data of ECC square 200 are the continuous positions that are stored in storer 130 by row; Because a PI character code has only 182 bytes, therefore a PI character code occupies two row (column width of DRAM is 1024 bytes) of DRAM130 at most simultaneously, so when utilizing PI to carry out the adjustment of data, the operation of column address switching can't often take place.But, when utilizing PO to carry out the adjustment of data, for a PO character code, need the different lines of the data polydispersion of correction at DRAM130, therefore need the column address of carrying out repeatedly to switch, proofread and correct disc data; Clearly, the lots of memory clock has been wasted in such operation, makes that the service efficiency of global storage 130 is not good.
Summary of the invention
Therefore one of purpose of the present invention be to provide a kind of error correcting unit that can improve the system storage service efficiency with and method.
A kind of error correcting unit that discloses according to the present invention, it includes: a decoding unit, be coupled to a primary memory, and be used for from this primary memory, reading data, and these data are carried out error-detecting, to produce a plurality of improper values and to a plurality of misaddresss that should a plurality of improper values; One wrong buffer is coupled to this decoding unit, is used for depositing these a plurality of improper values and this a plurality of misaddresss; One mis-classification sequencing unit is coupled to this mistake buffer, is used for selecting a subclass according to this a plurality of misaddresss, and this subclass includes a plurality of particular error values and to a plurality of particular error address that should a plurality of particular error values; And an error correction unit, be coupled to this mis-classification sequencing unit and this primary memory, be used for these stored in this primary memory data being carried out error correction according to this a plurality of particular error values and this a plurality of particular error address.
Also disclosed a kind of error correction method thereof according to the present invention, it includes: read data from a primary memory, and these data are carried out error-detecting, to produce a plurality of improper values and to a plurality of misaddresss that should a plurality of improper values; Deposit these a plurality of improper values and this a plurality of misaddresss; Select a subclass according to these a plurality of misaddresss, this subclass include a plurality of particular error values with to a plurality of particular error address that should a plurality of particular error values; And according to these a plurality of particular error values and this a plurality of particular error address these stored in this primary memory data being carried out error correction.
Description of drawings
Fig. 1 is the functional block diagram of a DVD error correcting unit.
Fig. 2 is the synoptic diagram of ECC square.
Fig. 3 is the Image Location of ECC square in storer shown in Figure 2.
Fig. 4 is the functional block diagram according to the DVD error correcting unit of one embodiment of the invention.
Fig. 5 is an error correcting unit shown in Figure 4 operational flowchart according to one embodiment of the invention.
Fig. 6 is the synoptic diagram of an embodiment of Fig. 4 mis-classification sorting unit and wrong register mode area.
The reference numeral explanation
| 100、400 | |
110、410 | Decoding unit |
| 420 | The mistake register mode area | 430 | The mis- |
| 120、440 | The |
130、450 | |
| 140、460 | Bus |
Embodiment
See also Fig. 4, Fig. 4 is the functional block diagram according to the DVD error correcting unit 400 of one embodiment of the invention.As shown in Figure 4, error correcting unit 400 includes a decoding unit 410; One wrong register mode area 420 is coupled to decoding unit 410; One mis-classification sorting unit 430 is coupled to wrong register mode area 420, and an error correction unit 440, is coupled to mis-classification sorting unit 430.In addition, decoding unit 410 and error correction unit 440 are coupled to storer 450 by bus 460, with the data in the access memory 450.Function and operation about each assembly in the error correcting unit 400 will be described in detail in the following description.
See also Fig. 5, Fig. 5 is error correcting unit 400 a shown in Figure 4 operational flowchart according to one embodiment of the invention.It includes the following step:
Step 500: decoding unit 410 reads an ECC square in storer 450, and this ECC square is carried out PI or PO decoding, to learn a plurality of improper values and to a plurality of misaddresss that should a plurality of improper values;
Step 510: mistake register mode area 420 receives and deposits these a plurality of improper values and this a plurality of misaddresss;
Step 520: mis-classification sorting unit 430 is selected a subclass according to these a plurality of misaddresss; And
Step 530: error correction unit 440 is proofreaied and correct the misdata in the storer 450 according to this subclass.
In present embodiment, at first, decoding unit 410 reads an ECC square by bus 460 in storer 450, and the ECC square carried out PI or PO decoding, because the disc data that is stored in the storer 450 may include many mistakes, thus decoding unit 410 just can utilize PI or PO decoded operation with these be stored in the storer 450, be present in the disc data wrong improper value partly with and corresponding misaddress find out (step 500).
Then, decoding unit 410 just is deposited at 420 (steps 510) in the wrong register mode area with these improper values and misaddress, after improper value that stores in the wrong register mode area 420 and misaddress arrival to a certain degree, mis-classification sorting unit 430 can carry out sort operation to the column address according to the pairing storer 450 of these misaddresss; For instance, in all misaddresss that mis-classification sorting unit 430 can solve decoding unit 410, misaddress corresponding to the same column (row) of storer 450 is divided at same subclass, and with these subclass outputs (step 520) to error correction unit 440.
At last, the misdata (step 530) in the ECC square in the script storer just can according to misaddress and the improper value that these subclass the insides are comprised, be revised in regular turn by the subclass that receives in error correction unit 440.As known in the art, error correction unit 440 is to utilize the stored misdata of misaddress in improper value and the storer 450, improper value and misdata are carried out specific functional operation (such as XOR computing), to calculate a correct data, again correct data is override errors present to the storer 450 by bus 460 afterwards, with the purpose that realizes proofreading and correct.
Because all misaddress same row of corresponding stored device 450 all in a particular subset is closed, therefore the mistake in the 440 pairs of subclass in error correction unit is carried out timing, storer 450 all need not switch the operation (just need not carry out activation and precharge operation repeatedly) of column address, have only when this particular subset close in all misaddresss all be finished, error correction unit 440 is carried out to another subclass, and storer 450 just need carry out column address blocked operation once; In other words, originally may every corrigendum mistake once, storer 450 all needs to carry out the operation that column address is switched, but, the described operation of present embodiment is collected in the subclass because being mistake with corresponding same column address, as long as storer 450 carries out the operation that a time column address is switched only when carrying out different subclass; So save the running time of storer 450 greatly, also realized promoting the purpose of memory operation efficient simultaneously.
Please note at this, for the optimization in error correcting unit 400 uses, we also can set when the certain data volume of decoding unit 410 decoding when reaching a certain size (or the quantity of the stored misaddress of wrong register mode area 420), start mis-classification sorting unit 430 so that the misaddress of wrong register mode area 420 internal reservoir is classified, in order to the running of follow-up error correction unit 440.Certainly, after can waiting until that also all misaddresss all separate out, carry out sort operation utilizing 430 pairs of all misaddresss of mis-classification sorting unit, really, such operation can guarantee that storer changes the least number of times of row, such action need mistake register mode area 420 great storage areas; In other words, under such operation, mistake register mode area 420 must possess the ability that stores all misaddresss.
For instance, suppose that the ECC square is listed as the continuous position that deposits storer 450 in PI direction one.See also Fig. 6 at this, Fig. 6 is the synoptic diagram of an embodiment of Fig. 4 mis-classification sorting unit 430 and wrong register mode area 420.As shown in Figure 6, mis-classification sorting unit 430 includes register mode area line pointer array 431, register mode area row index 432, mistake register mode area device for addressing 433, and sorting criterion determining device 434; Wherein wrong register mode area device for addressing 433 is coupled to register mode area line pointer array 431 and register mode area row index 432, is used for wrong register mode area 420 is carried out addressing, and with among operation thereafter, access is stored in the misdata in the wrong register mode area 420 smoothly.
Afterwards, in the time must carrying out the data error correcting operation of storer 450, sorting criterion determining device 430 just can go to read the misdata that is stored in wrong register mode area 420, and the misaddress according to misdata is classified it, as previously mentioned, sorting criterion determining device 430 can be exported the misdata of the same column address of correspondence continuously, carries out data correction in the storer 450 for error correction unit 440; Also or sorting criterion determining device 430 misaddress that stores in the wrong register mode area 420 can be done a relatively broad classification, for instance, sorting criterion determining device 430 can be classified wrong register mode area 420 according to the address of its corresponding stored device 450, and become several subclass, for example all gather the institute of four different lines addresses in the corresponding stored device 450 is wrong, become a subclass, then when carrying out error recovery, sorting criterion determining device 430 is again with this subclass output, with the data in the corrigendum storer 450, because the address in the subclass still has certain correlativity, that can save just therefore that storer 450 does to carry out when correction data more changes the row operation.
In the disclosure below, be, yet data of being mentioned in below disclosing and employed error correction method thereof only are one embodiment of the invention with the example explanation effect that is had of the present invention, but not restriction of the present invention.
Please note at this, in present embodiment, suppose that also PO decoding can once correct 16 mistakes at most, the mistake buffer size is for can deposit 256 improper values and misaddress, in other words, mistake register mode area 420 is enough to store 16 PO character codes (PO codeword), and the column width of storer 450 is 1024 bytes (that is storer 450 1 row can access 1024 bytes).
At first, the institute that is comprised in 16 character codes is wrong, owing to can not surpass 256 improper values and misaddress, therefore just can all be stored in the wrong register mode area 420; And in present embodiment, mis-classification sorting unit 430 can be positioned at the difference of the row of ECC square according to mistake, and per 16 row are divided into one group, are divided into 13 groups of subclass altogether.
In other words, when error correction, the misaddress that mis-classification sorting unit 430 can store from wrong register mode area 420 is in regular turn found out the mistake that belongs to each subclass, and be sent to error correction unit 440 and correct, so error correction unit 440 just can carry out error correction to the data in the storer 450 according to each subclass.
Because each gathers 16 row of corresponding ECC square, and the size of data of 16 row is 2912 bytes, cross over 4 memory columns at most, therefore in present embodiment, subclass of every corrigendum, need carry out at most only 4 external memories and change the row operation, change the row operation and the 4*13=52 external memory takes place at most in the corrigendum of finishing whole wrong register mode area 420.
Haply, the number of errors that ECC square is included can be filled with 11.35 wrong register mode areas 420 haply, therefore the storer of whole error correction changes the row operation has 52*12=624 time haply, and existing error correction operation, the 16*182=2912 external memory can take place and change the row operation in the poorest situation, hence one can see that, and the present invention has very high storer service efficiency.
Please note at this, aforesaid method not only is applicable to the error recovery of PO direction, also can make moderate progress for the PI direction, for instance, suppose that PI decoding once can correct 10 mistakes at most, and wrong register mode area 420 once to collect 5 PI character codes be a set, importing error correction unit 440 again into corrects, because the size of 5 PI character codes is 910 bytes, length less than a memory column, therefore, the error correction of finishing a set is operated to the row that change of the twice storage device that mostly occurs and operates, by that analogy, the maximum storeies that also only take place 2*42 time of error correction of finishing whole ECC square change the row operation, compared with the poorest existing row operation that may take place to change for 208*2=416 time, clearly, the present invention also can improve the service efficiency of storer.
Therefore, the present invention can at random change the size of wrong register mode area 420 and the opportunity that starts mis-classification sorting unit 430 according to its design requirement, and so corresponding variation also belongs to category of the present invention.And those skilled in the art should understand, error correcting unit 400 disclosed in the foregoing description and wherein each composition function assembly all can use special circuit (ASIC), cooperate the processor (processor) that software or firmware program code operate or the mode of said two devices mix operation to realize, so need not give unnecessary details at this.
Please note at this, in the disclosure in front, error correcting unit of the present invention with and correlation technique be to be applied to reading of DVD disc data, yet, the present invention can be applicable to any error correction relevant for data in the storer, in other words, aforesaid DVD only is a preferred embodiment of the present invention, but not restriction of the present invention.
Can learn by above-mentioned disclosure, because can collecting the misaddress of corresponding the same memory column address, described error correcting unit of embodiments of the invention and method handle together, therefore can reduce the row that change of storer (DRAM) operates, and then saved owing to change the memory clock that the row operation is wasted, realize promoting the purpose of storer service efficiency.
The above only is preferred embodiment of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (10)
1. error correcting unit, it includes:
One decoding unit is coupled to a primary memory, is used for reading data from this primary memory, and these data are carried out error-detecting, to produce a plurality of improper values and to a plurality of misaddresss that should a plurality of improper values;
One wrong buffer is coupled to this decoding unit, is used for depositing these a plurality of improper values and this a plurality of misaddresss;
One mis-classification sequencing unit is coupled to this mistake buffer, is used for selecting a subclass according to this a plurality of misaddresss, and this subclass includes a plurality of particular error values and to a plurality of particular error address that should a plurality of particular error values; And
One error correction unit is coupled to this mis-classification sequencing unit and this primary memory, is used for according to these a plurality of particular error values and this a plurality of particular error address these stored in this primary memory data being carried out error correction.
2. error correcting unit as claimed in claim 1, wherein in this subclass each misaddress to same row in should primary memory.
3. error correcting unit as claimed in claim 2, wherein this primary memory is a dynamic RAM.
4. error correcting unit as claimed in claim 1, wherein these data are a disc readback data.
5. error correcting unit as claimed in claim 4, wherein this disc readback data is read by a multifunctional digital disc.
6. error correction method thereof, it includes:
Read data from a primary memory, and these data are carried out error-detecting, to produce a plurality of improper values and a plurality of misaddresss that should a plurality of improper values;
Deposit these a plurality of improper values and this a plurality of misaddresss;
Select a subclass according to these a plurality of misaddresss, this subclass include a plurality of particular error values with to a plurality of particular error address that should a plurality of particular error values; And
According to these a plurality of particular error values and this a plurality of particular error address these stored in this primary memory data are carried out error correction.
7. error correction method thereof as claimed in claim 6, wherein in this subclass each misaddress to same row in should primary memory.
8. error correction method thereof as claimed in claim 7, wherein this primary memory is a dynamic RAM.
9. error correction method thereof as claimed in claim 6, wherein these data are a disc readback data.
10. error correction method thereof as claimed in claim 9, wherein this disc readback data is read by a multifunctional digital disc.
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| CNA2006101267689A CN101140779A (en) | 2006-09-06 | 2006-09-06 | Error corrected device and method thereof |
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| CNA2006101267689A CN101140779A (en) | 2006-09-06 | 2006-09-06 | Error corrected device and method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102543208A (en) * | 2010-12-30 | 2012-07-04 | 深圳市硅格半导体有限公司 | Method and device for quickly determining distribution of flash errors |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102543208A (en) * | 2010-12-30 | 2012-07-04 | 深圳市硅格半导体有限公司 | Method and device for quickly determining distribution of flash errors |
| CN102543208B (en) * | 2010-12-30 | 2015-01-21 | 深圳市硅格半导体有限公司 | Method and device for quickly determining distribution of flash errors |
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Open date: 20080312 |