CN101128846B - Pixel interpolating method and device - Google Patents
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Abstract
The n-tap filtering for generating interpolated pixels is converted into calculation of terms consisting of the difference and sum of the pixel values of adjoining pixels. When the difference is equal to or less than a predetermined value, the calculation related to the terms including the difference is omitted, thereby reducing the calculation amount in generating the interpolated pixels. In loop processing according to a flow chart of the pixel interpolating method, the reference pixels are accessed by one pixel per one loop processing for reading pixel values thereof, and the difference and sum of the pixel values are calculate using the adjoining pixel value already read one loop before, thereby interpolating the pixel values of consecutive pixels to be interpolated. Consequently, redundant reading of pixel values is avoided, with further beneficial effects on speedy generation of the interpolated pixels and reduction of the power consumption therein.
Description
Technical field
The present invention relates to be used for determine that the tap filtering of the pixel value of the interpolation of pixel in the digital picture handles, relate in particular to and be used for the pixel interpolating method the coding/decoding of motion picture handled by the inter-picture prediction coding.
Background technology
In high-level efficiency, the high compression of motion picture are encoded, adopt the inter-picture prediction coding that utilizes the correlativity between the picture.Inter-picture prediction coding also is used for such as MPEG-2, MPEG-4 (Part 2) and (Part 10) AVC coding standards such as (after this H.264 it abbreviate as) H.264|MPEG-4.In these coding standards, current picture is split into rectangular block of pixels, and each rectangular block of pixels comprises a plurality of pixels, and handles a plurality of pixels block by block.The inter-picture prediction coding generates the piece of motion vector and prediction: motion vector shows the piece on the current picture and is the motion between the piece on the reference picture of reference target; And the piece of prediction is the piece of process based on the motion compensation of the piece on the reference picture.Then, inter-picture prediction coding is encoded to the difference between the pixel value of the pixel of the pixel value of the pixel of the piece of prediction and the piece on the current picture.
For the accuracy of the picture by increasing the prediction that generates by above-mentioned motion compensation obtains better code efficiency, with further division, less than each component of unit (for example half-pix and 1/4th pixels) the expression motion vector of both full-pixel.In motion compensation, require the interpolation of pixel to handle from the picture of reference picture generation forecast, and its computing method are defined by every kind of coding standard.
According to H.264 (being one of coding standard), document 1 (Joint Video Team (JVT) ofISO/IEC MPEG ﹠amp; ITU-T VCEG; " Draft ITU-T Recommendation and Final DraftInternational Standard of Joint Video Specification (ITU-T Rec.H.264|ISO/IEC14496-10AVC) " is with reference to 8.4.2.2 joint) defined the method that 6 tap filtering are handled as above-mentioned pixel interpolating.
Present brief explanation 6 tap filtering.6 tap filters comprise tap coefficient 1 ,-5,20,20 ,-5,1}.The pixel value of the pixel of i position is expressed as a[i] (i: integer), in the pixel of reference picture upper edge level or perpendicular line alignment, the pixel value of the pixel of the interpolation of the individual position of following calculating (k+1/2).At first, according to equation 1, calculate the intermediate pixel value " b " of the pixel of interpolation.Then,, middle pixel value " b " is carried out standardization (normalization) and operated in saturation, and calculating pixel value " c " is the final pixel value of the pixel of interpolation according to equation 2.
(equation 1)
b＝a[k-2]-5*a[k-1]+20*a[k]+20*a[k+1]-5*a[k+2]+a[k+3]
(equation 2)
c＝Clip((b+16)/32)
Fig. 8 shows the position relation (document 1: Fig. 8-4) of the pixel (that is, such as the half-pix of both full-pixel, interpolation and the pixels such as 1/4th pixels of interpolation) of reference picture.In the figure, to arrive " U " (each by circle around) be both full-pixel to pixel " A ".It is half-pix that pixel " b ", " h ", " j ", " m ", " s " and " aa " arrive " hh " (each is centered on by square frame).Remaining pixel " a ", " c ", " d ", " e ", " f ", " g ", " i ", " k ", " n ", " p ", " q " and " r " (each is centered on by square frame) are 1/4th pixels.
In this example, can come the pixel value of calculating pixel " b " and " s " by the pixel value along the pixel of the horizontal line alignment at each place of pixel " b " and " s " is carried out above-mentioned 6 tap filtering.Can carry out 6 tap filtering by pixel value, come the pixel value of calculating pixel " h " and " m " the pixel of aliging with the perpendicular line at " m " each place along pixel " h ".Can carry out 6 tap filtering by pixel value vertically, come the pixel value of calculating pixel " j " 6 pixels " aa ", " bb ", " b ", " s ", " gg " and " hh " (it calculates by 6 tap filtering on the horizontal direction).Replacedly, order that can be by reversing filter direction and along continuous straight runs carry out 6 tap filtering to the pixel value of 6 pixels " cc ", " dd ", " h ", " m ", " ee " and " ff " (it calculates by 6 tap filtering on the vertical direction), come the pixel value of calculating pixel " j ".
Two pixel values that can be by adjacent half-pix or both full-pixel average calculated the pixel value of 1/4th pixels.For example, the pixel value by both full-pixel " G " and the pixel value of half-pix " b " average comes the pixel value of calculating pixel " a "; The pixel value by half-pix " b " and the pixel value of half-pix " h " average comes the pixel value of calculating pixel " e "; And the pixel value by half-pix " b " and the pixel value of half-pix " j " on average, come the pixel value of calculating pixel " f ".
When handling when generating the picture of prediction based on the interpolation of above-mentioned 6 tap filtering by carrying out, need a large amount of treatment capacities to calculate the pixel value of the pixel of interpolation.For example, when the pixel of interpolation is among pixel " f ", " i ", " j ", " k " and " q " any one, carry out computing for 36 the pixel value of both full-pixel nearly.Interpolation is handled the as many number of times of number that need carry out with the pixel that comprises in the piece of prediction, in addition, the piece of prediction comprises all pieces that it carried out inter-picture prediction; Therefore, motion compensation process needs a large amount of computings in motion picture encoding or decoding.
Fig. 9 is the process flow diagram of demonstration by the example of the conventional pixel interpolating method of the pixel value of the pixel of above-mentioned 6 tap filters calculating interpolation.Hereinafter, explain conventional pixel interpolating method shown in Figure 9.
When this interpolation is handled when step S0 begins,, distribute initial value with " k " to variable " m " at step S1.Herein, variable " k " is for being used for reading from the array " a " of pixel value that storage constitutes the pixel of reference picture the index (index) of the pixel value of target reference pixel.Corresponding to above-mentioned Fig. 8, for example, under the situation of the pixel value of the pixel " b " of calculating interpolation, variable " k " indication both full-pixel " J ".Variable " m " is the index of pixel position in the piece of prediction of indication interpolation.Variable " i " is used to read the index of reference point of the pixel value of reference pixel for indication.More specifically, variable " i " indication is positioned at the upper left both full-pixel of pixel of the interpolation that will at first calculate.In example shown in Figure 8, variable " i " indication both full-pixel " G ".
At step S2, read the pixel value of 5 reference pixels that begin from the reference zone edge.This is treated to the preliminary step of the pixel value of the pixel of calculating first interpolation.
At step S3, read the pixel value that is positioned at the reference pixel that variable " k " locates.
At step S4, calculate the intermediate pixel value " b " of the pixel of interpolation by equation 1.
At step S5, according to equation 2, carry out the standardization and the operated in saturation of intermediate pixel value " b ", with the pixel value " c " of the pixel of calculating interpolation.Standardization means intermediate pixel value " b " (it calculates by equation 1) divided by value " 32 ".Function C lip (x) for overrun 0 to 255 the time when variable " x ", with variable " x " inhibition (blocking) function in scope 0 to 255.
At step S6, output is at the pixel value " c " of the pixel of the interpolation of step S5 calculating.
At step S7, for next one circulation, respectively with variable " m " and variable " k " added value " 1 ".
At step S8, judge whether the number of the pixel of the interpolation that is generated has reached predetermined number " N ".When judged result is "No" (it does not reach predetermined number " N "), control turns back to step S3, and repeating step S3 is to S8.When judged result is "Yes" (it has reached predetermined number " N "), control advances to step S9, and a series of pixel interpolating processing finishes.
As mentioned above, when the circular treatment from step S3 to step S8 of execution graph 9, calculate the pixel value of the pixel of an interpolation at every turn.
Figure 10 shows the block scheme of the conventional pixel interpolating equipment that uses 6 tap filters.Based on the structure of the disclosed tap filter of document 2 (openly Japanese patent application H07-15734 number), thereby Figure 10 demonstration is configured 6 tap filters that are used for above-mentioned interpolation processing.As shown in figure 10, this routine pixel interpolating equipment comprises: register (being labeled as " R " among the figure) 1 to 6, multiplication unit (being labeled as " M " among the figure) 7 to 10, adder unit (being labeled as "+" among the figure) 11 to 12 and limiter 13.Register 1 to 6 constitutes shift register, has the input of the pixel value " a[k] " of reference pixel.
Below explain the operation of conventional pixel interpolating equipment shown in Figure 10.
In the shift register of register 1 to 6, by synchronously carrying out shifting function with displacement control signal (not shown) and transmitting the pixel value " a[k] " of the reference pixel of input step by step, in register, store the pixel value of 6 continuous reference pixels one by one.(for multiplication unit 7 and 10 is coefficient " 5 " to each pixel value of the reference pixel that multiplication unit 7 to 10 will be stored in register 2 to 5 difference predetermined coefficient to that indicated in the drawings, be coefficient " 20 " for multiplication unit 8 and 9) multiply each other, obtain each product thus.The product value addition of storage in the value of storage and the multiplication unit 7 to 10 in the value that adder unit 11 will be stored in register 1, the register 6.Adder unit 12 is added to the summation that adder unit 11 calculates with constant " 16 ".Limiter 13 carries out operated in saturation, and the pixel value " c " of the pixel of output interpolation.By progressively import the pixel value of reference pixel according to the displacement control signal, can calculate the pixel value " c " of the pixel of each continuous interpolation by aforesaid 6 tap filtering of utilizing equation 1 and equation 2.
Because with the constant of multiplier in the comultiplication, so multiplication unit 7 to 10 can be by the unit structure of execute bit translation, addition and sign change function for being scheduled to.So the multiplication unit 7 to 10 of structure than conventional multiplier little aspect the circuit scale.
Adopt as described above therein in the pixel interpolating equipment of conventional pixel interpolating method, high speed processing and power consumption for software processes reduce the existence restriction, this be because no matter the pixel value of reference pixel how, operand all is constant, and does not take measures to reduce operand by the considered pixel value.
As the method that improves speed, document 3 (openly Japanese patent application 2000-190948 number) discloses following technology: use the look-up table of having stored multiplication result, reduce computational load thus.But this method has following problem: the result as look-up table is installed has therein enlarged circuit scale.
As mentioned above, conventional pixel interpolating method and conventional pixel interpolating equipment can't be handled following problem fully.
In order to satisfy the demand of the high-quality motion picture that produces frame rate, need aspect number, increase time per unit pixel to be processed with high-definition screen and raising.But, in routine techniques, restricted for processing speed; Therefore, be difficult to improve the speed of motion compensation.
In addition, when the technology of the motion picture encoding/decoding that will follow this type of pixel interpolating to handle is used for such as portable sets such as cellular phones, increases power consumption and can cause another major issue, this is because restricted for the power supply that is used for these portable sets.
Summary of the invention
One object of the present invention is to provide pixel interpolating method and pixel interpolating equipment, and it can improve speed and minimizing power consumption wherein that pixel interpolating is handled.
A first aspect of the present invention provides a kind of pixel interpolating method that uses tap filtering, comprise: a right pixel value of neighborhood pixels that will comprise two contiguous reference pixels is added to the right one other pixel value of this neighborhood pixels, obtain thus the right pixel value of this neighborhood pixels and; The pixel value that this neighborhood pixels is right deducts from the right one other pixel value of this neighborhood pixels, obtains the right margin of image element of this neighborhood pixels thus; Whether the absolute value of judging margin of image element thus generates judged result greater than predetermined value; And carry out first multiplication, with first coefficient be multiply by pixel value and, obtain first product thus.When the absolute value of judged result indication margin of image element during greater than predetermined value, described pixel interpolating method also comprises: carry out second multiplication, so that a plurality of second coefficients be multiply by margin of image element, obtain a plurality of second products thus; And in a plurality of registers each, carry out first added/subtracted of first product and described a plurality of second products, the pixel value of interpolation of a plurality of contiguous pixels of interpolation is wanted in accumulation thus, and each arrangement in described a plurality of registers is corresponding in described a plurality of contiguous pixels of wanting interpolation each.When judged result indicates the absolute value of described difference to be equal to or less than predetermined value, described pixel interpolating method also comprises: for of the correspondence in described a plurality of registers, carry out second added/subtracted of first product, accumulate the pixel value of the interpolation of described a plurality of contiguous pixels of wanting interpolation thus.
According to this structure, when the absolute value of the right margin of image element of neighborhood pixels was equal to or less than predetermined value, pixel interpolating method provided herein can omit the processing of the second multiplication step relevant with the margin of image element of these neighborhood pixels and the processing that second product is added to register or deducts from register.Therefore, can save the required time of abridged treatment step, pixel interpolating be handled carried out with higher speed.
A second aspect of the present invention provides a first aspect of the present invention described pixel interpolating method, wherein, except that described neighborhood pixels to, also right for a plurality of neighborhood pixels, carry out addition, subtract each other, judge, first multiplication, second multiplication, first added/subtracted and second added/subtracted, obtain each in the pixel value of interpolation of described a plurality of contiguous pixels of wanting interpolation thus.
According to this structure, can obtain the pixel value of the pixel of a plurality of interpolations in the piece by a series of processing.
A third aspect of the present invention provides a first aspect of the present invention described pixel interpolating method, and wherein said predetermined value is equal to or less than the value by the lowest order definition of the binary representation of the pixel value that constitutes each right pixel of neighborhood pixels.
According to this structure, when absolute value value of equaling " 0 " of the right margin of image element of neighborhood pixels or when being less than or equal to the indicated value of least significant bit (LSB) when pixel value is represented with binary code, pixel interpolating method provided herein can omit the processing of the second multiplication step relevant with the margin of image element of these neighborhood pixels and the processing that second product is added to register or deducts from register.
A fourth aspect of the present invention provides a first aspect of the present invention described pixel interpolating method, wherein said first coefficient and described a plurality of second coefficient coefficient for constituting by 2 power value, wherein said first multiplication that carries out is shifted with pixel value with according to the exponential quantity of first coefficient; And wherein said second multiplication that carries out is shifted the exponential quantity of margin of image element according to one of correspondence in a plurality of second coefficients.
According to this structure, can carry out multiplying with the speed higher than conventional multiplier.
A fifth aspect of the present invention provides a kind of pixel interpolating method that uses tap filtering, wherein said tap filtering adopt tap coefficient 1 ,-5,20,20 ,-5,1}, and by utilizing following formula to carry out filtering based on described tap coefficient,
b[m]＝(a[k-5]-a[k-4])-4*(a[k-4]-a[k-3])+16*(a[k-3]+a[k-2])+4*(a[k-2]-a[k-1])-(a[k-1]-a[k])，
b[m+1]＝(a[k-4]-a[k-3])-4*(a[k-3]-a[k-2])+16*(a[k-2]+a[k-1])+4*(a[k-1]-a[k])-(a[k]-a[k+1])，
b[m+2]＝(a[k-3]-a[k-2])-4*(a[k-2]-a[k-1])+16*(a[k-1]+a[k])+4*(a[k]-a[k+1])-(a[k+1]-a[k+2])，
b[m+3]＝(a[k-2]-a[k-1])-4*(a[k-1]-a[k])+16*(a[k]+a[k+1])+4*(a[k+1]-a[k+2])-(a[k+2]-a[k+3])，
b[m+4]＝(a[k-1]-a[k])-4*(a[k]-a[k+1])+16*(a[k+1]+a[k+2])+4*(a[k+2]-a[k+3])-(a[k+3]-a[k+4])，
A[k wherein] for being positioned at the pixel value of the both full-pixel of k position in a plurality of reference pixels, b[m] for being positioned at the intermediate pixel value of the half-pix of wanting interpolation between (k-3) individual both full-pixel and (k-2) individual both full-pixel, in a circulation to (a[k], a[k-1]) relevant those being operated with pixel.Described pixel interpolating method may further comprise the steps: first step, import described pixel value a[k]; Second step, calculate described pixel value a[k] and the pixel value a[k-1 of the neighborhood pixels in first register, stored] difference with and, thus described difference is stored into corresponding to b[m+4] second register, and with described and join corresponding to b[m+2 after 4 moving to left] the 3rd register; Third step, whether the absolute value of judging described difference is greater than predetermined value; The 4th step is from corresponding to b[m] the 4th register deduct the value of in described second register, storing in the value of storing; The 5th step, the value that will store in described second register moves to left 2, the value after will moving to left thus is added to corresponding to b[m+1] the 5th register, and from corresponding to b[m+3] the 6th register deduct value after described the moving to left; And the 6th step, to the b[m that in described the 4th register, stores] operative norm processing and operated in saturation, to obtain the pixel value c[m of interpolation], and with described pixel value a[k] store described first register into.Wherein, only during greater than described predetermined value, just carry out described the 4th step and described the 5th step at the absolute value of described difference.
According to this structure, by by 1 ,-5,20,20 ,-5, the tap coefficient that 1} provides, the pixel interpolating that can efficiently easily meet is H.264|MPEG-4AVC handled.
A sixth aspect of the present invention provides a kind of pixel interpolating equipment that uses the tap filtering unit, wherein said tap filtering unit adopt tap coefficient 1 ,-5,20,20 ,-5,1}, and by utilizing following formula to carry out filtering based on described tap coefficient,
b[m]＝(a[k-5]-a[k-4])-4*(a[k-4]-a[k-3])+16*(a[k-3]+a[k-2])+4*(a[k-2]-a[k-1])-(a[k-1]-a[k])，
b[m+1]＝(a[k-4]-a[k-3])-4*(a[k-3]-a[k-2])+16*(a[k-2]+a[k-1])+4*(a[k-1]-a[k])-(a[k]-a[k+1])，
b[m+2]＝(a[k-3]-a[k-2])-4*(a[k-2]-a[k-1])+16*(a[k-1]+a[k])+4*(a[k]-a[k+1])-(a[k+1]-a[k+2])，
b[m+3]＝(a[k-2]-a[k-1])-4*(a[k-1]-a[k])+16*(a[k]+a[k+1])+4*(a[k+1]-a[k+2])-(a[k+2]-a[k+3])，
b[m+4]＝(a[k-1]-a[k])-4*(a[k]-a[k+1])+16*(a[k+1]+a[k+2])+4*(a[k+2]-a[k+3])-(a[k+3]-a[k+4])，
A[k wherein] for being positioned at the pixel value of the both full-pixel of k position in a plurality of reference pixels, b[m] for being positioned at the intermediate pixel value of the half-pix of wanting interpolation between (k-3) individual both full-pixel and (k-2) individual both full-pixel, in a circulation to (a[k], a[k-1]) relevant those being operated with pixel.Described pixel interpolating equipment comprises: input block, import described pixel value a[k]; Computing unit, calculate described pixel value a[k] and the pixel value a[k-1 of the neighborhood pixels in first register, stored] difference with and, thus described difference is stored into corresponding to b[m+4] second register, and with described and join corresponding to b[m+2 after 4 moving to left] the 3rd register; Second judging unit, whether the absolute value of judging described difference is greater than predetermined value; The subtraction unit is from corresponding to b[m] the 4th register deduct the value of in described second register, storing in the value of storing; Shift cells left, the value that will store in described second register moves to left 2, the value after will moving to left thus is added to corresponding to b[m+1] the 5th register, and from corresponding to b[m+3] the 6th register deduct value after described the moving to left; And output unit, to the interpolated pixel values b[m that in described the 4th register, stores] operative norm processing and operated in saturation, with the pixel value c[m of output interpolation], and with described pixel value a[k] store described first register into.Wherein, only at the absolute value of described difference during greater than described predetermined value, described subtraction unit and described shift cells left be executable operations.
According to this structure, when the absolute value of the right margin of image element of neighborhood pixels is equal to or less than predetermined value, pixel interpolating equipment provided herein can omit the multiplication process of second multiplication unit relevant with the margin of image element of these neighborhood pixels, and can omit the addition of a plurality of addition/subtraction unit or the relevant treatment of subtracting each other.Therefore, when the pixel interpolating equipment that uses according to this structure, owing to reduced operand, can realize the quick generation of the picture predicted in the motion compensation, have the effect that suppresses power consumption simultaneously.
Read following description in conjunction with the accompanying drawings, of the present invention abovely will become apparent with other purposes, feature and advantage, wherein similar Reference numeral is represented components identical.
Description of drawings
Fig. 1 is the process flow diagram of the pixel interpolating method in the embodiment of the invention 1;
Fig. 2 is for showing the descriptive diagram of the pixel interpolating method in the embodiment of the invention 1;
Fig. 3 is the block scheme of the pixel interpolating equipment in the embodiment of the invention 2;
Fig. 4 is the block scheme of the pixel interpolating equipment in the embodiment of the invention 3;
Fig. 5 is for showing the layout diagram of two packing pixel values in the embodiment of the invention 3;
Fig. 6 is the block scheme of the motion picture encoding equipment in the embodiment of the invention 4;
Fig. 7 is the block scheme of the motion picture decoding device in the embodiment of the invention 5;
Fig. 8 shows the half-pix of both full-pixel, interpolation and 1/4th locations of pixels relation of interpolation;
Fig. 9 is for showing the process flow diagram of example of conventional pixel interpolating method of pixel value of determining the pixel of interpolation by 6 tap filters;
Figure 10 is the block scheme by the conventional pixel interpolating equipment of 6 tap filters.
Embodiment
Explain embodiments of the invention below with reference to accompanying drawing.
Fig. 1 is the process flow diagram of the pixel interpolating method in the embodiment of the invention 1.Process flow diagram shown in Figure 1 is the example of the pixel interpolating method of present embodiment.
Fig. 2 is for showing the descriptive diagram of the pixel interpolating method in the embodiment of the invention 1.
At first, explain that the inventor obtains the basic design of the pixel interpolating method in the present embodiment.
According to the pixel interpolating method of present embodiment, { 1 ,-5,20,20 ,-5,6 tap filters of 1} carry out filtering to the pixel value of the pixel of reference picture, calculate the pixel value of the pixel of interpolation to have tap coefficient by utilization.
Suppose a[k] be pixel value along (k) individual both full-pixel of (k) individual position in the pixel of the level of reference picture or perpendicular line alignment, and pixel value " c " is the pixel value of the half-pix (it is positioned at (k+1/2) position between (k) individual both full-pixel and (k+1) individual both full-pixel) of wanting interpolation.Then can obtain intermediate pixel value " b " and will be worth " b " substitution equation 2 to carry out standardization and operated in saturation, calculating pixel value " c " by utilizing equation 1.
Shown in equation 3, equation 1 right term can by item (a[k-2]-a[k-1]), (a[k-1]-a[k]), (a[k+1]-a[k+2]) and (a[k+2]-a[k+3], it represents pixel value poor of each adjacent reference pixel) and ((a[k]+a[k+1]), its represent another to the pixel value of contiguous reference pixel and) and form substitute.
(equation 3)
b＝(a[k-2]-a[k-1])-4*(a[k-1]-a[k])+16*(a[k]+a[k+1])+4*(a[k+1]-a*[k+2])-(a[k+2]-a[k+3])
In addition,, the multiplication coefficient of the margin of image element of neighborhood pixels is become coefficient " 1 ", " 4 ", " 4 " and " 1 " respectively as the result who replaces with the form of equation 3, to the pixel value of neighborhood pixels and multiplication coefficient become coefficient " 16 ".As a result, coefficient can be replaced by 2 shift operations with 4 that move to left respectively for " 4 " and the multiplication of " 16 ", and this is because coefficient " 4 " and " 16 " are respectively 2 second power and bipyramid.Therefore, equation 3 is rewritten as equation 4.
(equation 4)
b＝(a[k-2]-a[k-1])-{(a[k-1]-a[k])＜＜2}+{(a[k]+a[k+1])＜＜4}+{(a[k+1]-a*[k+2])＜＜2}-(a[k+2]-a[k+3])
Wherein, operational symbol "＜＜" expression left shift operation.
In addition, can replace by 5 the shift operation of moving to right in the equation 2 divided by value " 32 ", this is because coefficient " 32 " is five powers of 2.Therefore, equation 2 is rewritten as equation 5.
(equation 5)
c＝Clip((b+16)＞＞5)
Wherein, operational symbol "＞＞" expression dextroposition computing.
As a result, can calculate the pixel value " c " of the pixel of interpolation by with intermediate value " b " (it is calculated by equation 4) substitution equation 5.
As mentioned above, when equation 1 and equation 2 being converted to equation 4 and the form of equation 5 and calculating the pixel value of pixel of interpolation, multiply by with divided by can being undertaken by single shift operation respectively of coefficient, can alleviate operand thus.
According to above-mentioned consideration, in the pixel interpolating method of present embodiment,, carry out the processing of interpolated pixel based on the form of equation 4, wherein the computing item comprises the subtracting each other and addition of pixel value of neighborhood pixels.
Hereinafter, explain the interpolating method of present embodiment with reference to figure 1 and Fig. 2.
In table shown in Figure 2, digital value is represented the coefficient of equation 3 right term, the set of the neighborhood pixels that each row indication will reference, the intermediate pixel value of the pixel of the interpolation that each row indicates to calculate.
Row under the pixel value of the pixel of the interpolation that will calculate carry out the calculating of pixel value of the pixel of interpolation.At first, for the coefficient " 16 " in the table, calculate this coefficient with belong to this coefficient with the pixel value of the neighborhood pixels of delegation and product.For each coefficient " 1 ", " 4 ", " 4 " and " 1 ", calculate the product of each coefficient and the margin of image element of the neighborhood pixels of the same delegation that belongs to each coefficient except coefficient " 16 ".Then, by pressing column direction, calculate the intermediate pixel value " b " of the pixel of interpolation with these product additions.
Provide for intermediate pixel value b[m+3 herein] an example.Referring to table, from the top end of to, at intermediate pixel value b[m+3] row in, at first in the calculating of coefficient " 1 ", the value of providing " a[k-2]-a[k-1] "; In the calculating of coefficient " 4 ", the value of adding " 4* (a[k-1]-a[k]) "; In the calculating of coefficient " 16 ", the value of adding " 16* (a[k]+a[k+1]) "; In the calculating of coefficient " 4 ", the value of adding " 4* (a[k+1]-a[k+2]) "; In the calculating of coefficient " 1 ", the value of adding " (a[k+2]-a[k+3]) ".The result who more than calculate to obtain is identical with equation 3.
In the process flow diagram of the pixel interpolating method of present embodiment shown in Figure 1, this flow processing has the loop structure that a series of processing from step S13 to step S24 constitute.Once circulating of this processing corresponding to processing to the delegation of table shown in Figure 2.
For example, in handling Fig. 2 table by dotted line center on capable the time (the wherein pixel value a[k-1 of position " k-1 " pixel of locating] the pixel value a[k of the pixel located with position " k "] the formation neighborhood pixels to), carry out following calculating: the pixel value a[k of the pixel that read-out position " k " is located]; According to pixel value a[k] the pixel value a[k-1 of the pixel located with position " k-1 "] (pixel value a[k-1] be read out), calculate poor (a[k-1]-a[k]); Should differ from from middle pixel value b[m] deduct; To be added to intermediate pixel value b[m+1 for this differs from four times of big values]; Will be for being added to intermediate pixel value b[m+2] with (a[k-1]+a[k]) 16 times of big values; To differ from four times of big values from middle pixel value b[m+3 for this] deduct; And this difference is added to intermediate pixel value b[m+4].
With reference to figure 1 above-mentioned processing is described in more detail.
At step S10 shown in Figure 1, pixel interpolating is handled beginning.
At step S11, for variable " k " and variable " m " are provided with initial value.
At step S12, carry out the processing before the circular treatment, handle as the beginning.
At step S13, the pixel value a[k of the pixel that read-out position " k " is located].Herein, the pixel value a[k-1 of the pixel that the position " k-1 " that close position " k " is located is located] be read out in formerly the circular treatment, and store this value.Replacedly, current when being treated to first circular treatment, pixel value a[k-1] be read out in having handled at the beginning of step S12, and store this value.
At step S14, with pixel value a[k-1] with pixel value a[k] and move to left 4 (are equal to are this and 16 times of big values), be added to intermediate pixel value b[m+2 then].This processing corresponding to the processing of the line correlation of the coefficient that in table shown in Figure 2, centers on " 16 " with dotted line.
At step S15, calculating pixel value a[k-1] and pixel value a[k] between poor (a[k-1]-a[k]), and replace intermediate pixel value b[m+4 with it].This processing corresponding to the processing of the line correlation of the coefficient that in table shown in Figure 2, centers on " 1 " with dotted line.
At step S16, judge neighborhood pixels pixel value difference absolute value (| a[k-1]-a[k] |, promptly | b[m+4] |) whether be equal to or less than particular value " b0 ".
When the judged result of step S16 is "Yes" (described absolute value is equal to or less than particular value), skips steps S17 is to S20, and control moves on to step S21.When judged result is "No" (described absolute value surpasses particular value), control moves on to step S17.
At step S17, with poor ((a[k-1]-a[k]), the i.e. b[m+4]) of the pixel value of neighborhood pixels from middle pixel value b[m] deduct.Determine the intermediate pixel value b[m of the pixel of interpolation thus].This processing corresponding to the processing of the line correlation of the coefficient that in table shown in Figure 2, centers on " 1 " with dotted line.
At step S18, the difference of the pixel value of neighborhood pixels is moved to left 2 (are equal to for this differ from four times of big values), and store in the register " r ".
At step S19, the value of register " r " is added to intermediate pixel value b[m+1].This processing corresponding to the processing of the line correlation of the coefficient that in table shown in Figure 2, centers on " 4 " with dotted line.
At step S20, with the value of register " r " from middle pixel value b[m+3] deduct.This processing corresponding to the processing of the line correlation of the coefficient that in table shown in Figure 2, centers on " 4 " with dotted line.
By above-mentioned processing, carry out the processing that belongs to the row that in table shown in Figure 2, centers on dotted line from step S13 to S20.
At step S21, carry out intermediate pixel value b[m] standardization and operated in saturation, to obtain pixel value c[m].
At step S22, output pixel value c[m].
At step S23, variable " k " and variable " m " are increased by 1 respectively, be used for next circulation.
At step S24, judge and whether finished the circular treatment sequence.When judged result is "No" (circular treatment is not finished), control turns back to step S13, and repeats the circular treatment from step S13 to step S14.When judged result is "Yes" (circular treatment is finished), control moves on to step S25.
At step S25, carry out uncompleted processing and handle as ending.Then, at step S26, finish pixel interpolating and handle sequence.
As mentioned above, in the pixel interpolating disposal route of present embodiment, when the absolute value of the difference of the pixel value of neighborhood pixels was equal to or less than predetermined value, the processing from step S17 to S20 of skipping Fig. 1 was not to carry out the computing with the item of this difference correlation.As a result, reduce pixel interpolating and handled required operand.Therefore, can accelerate pixel interpolating handles.In addition, the minimizing expectation of operand can cause the required reduction in power consumption of computing.
Predetermined value " b0 " is set to for example equal the value of binary code least significant bit (LSB), and the pixel value of pixel to be processed is represented by this binary code.Replacedly, predetermined value " b0 " is set near zero value, the perhaps value of noise level.
More simply, can suppose predetermined value b0=0.Then, can judge whether poor (a[k-1]-a[k]) equals zero at step S16.
When the pixel interpolating disposal route of present embodiment was used for motion picture encoding, expectation can clearly show the above-mentioned validity of skipping processing.This is the feature owing to motion picture encoding, wherein removes the high fdrequency component of picture under low bit rate, produces thus to have the many to neighborhood pixels of zero margin of image element.
In addition, pixel interpolating disposal route according to present embodiment, pixel value for the pixel of calculating interpolation, handle set below in a circular treatment, carrying out: the pixel value of reading a pixel, calculate this pixel and a neighborhood pixels pixel value difference with and, and about this difference with and computing.By repeating this circular treatment, calculate the pixel value of the pixel of continuous interpolation efficiently, and need not carry out the calculating of unnecessary repetition.Therefore, all must calculation equation 3 when with the pixel value of the pixel of each calculating interpolation or 4 routine techniques when comparing, realizing that aspect the fast processing of pixel interpolating, the pixel interpolating disposal route of present embodiment is very efficient and useful, this is because avoided the calculating of unnecessary repetition.
, should pay special attention to the following fact herein: can not obtain the validity of the pixel interpolating disposal route of present embodiment by simply equation 1 being converted to the form of equation 3 or equation 4; But when having only pixel interpolating Processing Structure when the pixel interpolating method of carrying out present embodiment according to the process flow diagram of Fig. 1, could obtain this validity.
In addition, equation 3 every coefficients are 2 power value, can replace by shifting processing thus and carry out each multiplication, shown in equation 4.Be further noted that: this fact helps the pixel interpolating disposal route of present embodiment to improve processing speed.
In addition, process flow diagram shown in Figure 1 is just realized example of the present invention.Therefore, order of control structure and treatment step or the like is not limited to situation shown in Figure 1, and can suitably change them according to the processing based on equation 3 or equation 4.
Fig. 3 is the block scheme of the pixel interpolating equipment in the embodiment of the invention 2.Pixel interpolating method of the present invention described in the actual execution of the pixel interpolating equipment of the present embodiment embodiment of the invention 1.
As shown in Figure 3, the pixel interpolating equipment of present embodiment comprises: register 11 to 16, totalizer 21 to 27, shift unit 31 to 33, selector switch 41 to 43, comparer 51, limiter 61 and constant unit 71 and 72.In Fig. 3, with register be written as symbol " R ", totalizer is that symbol "+", shift unit are that symbol " BS ", selector switch are that symbol " SEL ", comparer are symbol " C ".
Hereinafter, explain the operation of the pixel interpolating equipment of present embodiment.
In Fig. 3, when the input data, register 11 to 16 is controlled by the control signal (not shown).From a plurality of reference pixels, with control signal synchronously, the pixel value a[k of the pixel that position " k " located] input register 11.According to the order of reference pixel array, in the pixel value input register 11 of each control signal cycle pixel value ground with reference pixel.In other words, input pixel value a[k-5 in the following order], a[k-4], a[k-3], a[k-2] ....Therefore, in register 11 and register 12, store the pixel value of neighborhood pixels respectively.Totalizer 21 is calculated pixel value poor of neighborhood pixels, and totalizer 22 calculate neighborhood pixels pixel value and (totalizer 21 act as subtracter.For totalizer 23 and totalizer 26 too).
Below explain wherein in the specific period of control signal pixel value a[k+3] be stored in the situation in the register 11.
In this cycle, storage pixel value a[k+3 in register 11 and register 12 respectively] and a[k+2].Poor (a[k+2]-a[k+3]) of the pixel value of totalizer 21 output neighborhood pixels.The pixel value of totalizer 22 output neighborhood pixels and (a[k+2]+a[k+3]).
Comparer 51 relatively the absolute value of the difference of the pixel value of totalizer 21 outputs (| a[k+2]-a[k+3] |) with the constant " b0 " that in constant unit 71, is provided with, and whether the absolute value of this difference of output indication is equal to or less than the signal of constant " b0 ".When the signal of comparer 51 output indicates the absolute value of this difference to surpass constant " b0 ", selector switch 41,42 and each selection totalizer 23,25 of 43 and each output of 26.
Shift unit 31 moves to left the difference of the pixel value of totalizer 21 outputs two (promptly multiply by 4), and the output result.Shift unit 32 with the pixel value of totalizer 22 output and move to left four (promptly multiply by 16) and output result.
In register 13 poor (a[k+1]-a[k+2]) of the pixel value of the neighborhood pixels of storage before the one-period.By deducting in the value of the output of shift unit 31 being stored, determine the value of equation 6 from register 13 by totalizer 23.The value of selector switch 41 output equatioies 6.
(equation 6)
a[k+1]-a[k+2]-4*(a[k+2]-a[k+3])
The output of the totalizer 23 in register 14 before the storage one-period or the value of equation 7.
(equation 7)
a[k]-a[k+1]-4*(a[k+1]-a[k+2])
By by totalizer 24 with the value of storage in the register 14 and the output addition of shift unit 32, determine the value of equation 8.
(equation 8)
a[k]-a[k+1]-4*(a[k+1]-a[k+2])+16*(a[k+2]+a[k+3])
The output of the totalizer 24 in register 15 before the storage one-period or the value of equation 9.
(equation 9)
a[k-1]-a[k]-4*(a[k]-a[k+1])+16*(a[k+1]+a[k+2])
By by totalizer 25 with the value of storage in the register 15 and the output addition of shift unit 31, determine the value of equation 10.Value by selector switch 42 output equatioies 10.
(equation 10)
a[k-1]-a[k]-4*(a[k]-a[k+1])+16*(a[k+1]+a[k+2])+4*(a[k+2]-a[k+3])
The output of the selector switch 42 in register 16 before the storage one-period or the value of equation 11.
(equation 11)
a[k-2]-a[k-1]-4*(a[k-1]-a[k])+16*(a[k]+a[k+1])+4*(a[k+1]-a[k+2])
By deducting in the value of the difference of the pixel value of totalizer 21 output being stored, determine the value of equation 12 from register 16 by totalizer 26.The value of determined equation 12 equals the right term of equation 3.Then, from this value of determining of selector switch 43 output, as the intermediate pixel value b[m of the pixel of interpolation].
(equation 12)
a[k-2]-a[k-1]-4*(a[k-1]-a[k])+16*(a[k]+a[k+1])+4*(a[k+1]-a[k+2])-(a[k+2]-a[k+3])
The constant " 16 " that totalizer 27 will be provided with in constant unit 72 is added to the intermediate pixel value of selector switch 43 outputs.Shift unit 33 moves right the result 5 (being equal to divided by 32).The result of 61 pairs of displacements of limiter carries out operated in saturation.Afterwards, obtain the pixel value c[m of the pixel of interpolation] (value of equation 5)
In above-mentioned processing sequence, when the absolute value of the difference of the pixel value of the signal indication neighborhood pixels of comparer 51 output is equal to or less than constant " b0 ", selector switch 41,42, with 43 respectively mask registers 13,15 and 16 outputs, and totalizer 23,25,26 and shift unit 31 do not carry out computing.
As mentioned above, when the absolute value of the difference of the pixel value of neighborhood pixels was equal to or less than predetermined value (being constant " b0 "), totalizer 23,25,26 and shift unit 31 did not carry out computing; Therefore, can reduce for the necessary power consumption of the computing of these arithmetical unit.
In addition, being converted to the form of equation 3 by 6 tap filtering that will be used for the pixel value interpolation, changing item of equation 3, is coefficient " 4 " and " 16 " of 2 power value to have.Thus, can carry out two sections multiplyings respectively only by 2 lt position devices and 4 lt position devices.In addition, in the standardization of the intermediate pixel value of the pixel of interpolation, the denominator of division is the constant " 32 " for 2 power value; Can pass through 5 gt position devices, carry out division arithmetic.Because can carry out multiplying and division arithmetic in the pixel interpolating equipment of present embodiment by shift unit as mentioned above, so can reduce the circuit scale of this pixel interpolating equipment.
Fig. 4 is the block scheme of the pixel interpolating equipment in the embodiment of the invention 3.The pixel interpolating equipment of present embodiment can single treatment has the picture data of 16 bit architectures, wherein will have two pixel values packings of 8 bit architectures.
Basically, overlap the pixel interpolating equipment and omit its public part, construct the pixel interpolating equipment of present embodiment by two of the parallel arranged embodiment of the invention 2 shown in Figure 3.In other words, the pixel interpolating equipment of present embodiment comprises: top, and it determines the pixel value of pixel of the interpolation of odd-numbered; The lower part, it determines the pixel value of pixel of the interpolation of even-numbered; And other public parts.Top comprises: register 11,14a, 16a, totalizer 21a to 27a, shift unit 31a to 33a, selector switch 41a is to 43a, comparer 51a, limiter 61a and constant unit 72a.The lower part comprises: register 13b and 15b, totalizer 21b to 27b, shift unit 31b to 33b, selector switch 41b is to 43b, comparer 51b, limiter 61b and constant unit 72b.Public part comprises constant unit 71.
In addition, in Fig. 4, register is written as symbol " R ", totalizer is written as symbol "+", shift unit and is written as that symbol " BS ", selector switch are written as symbol " SEL ", comparer is written as symbol " C ".
Fig. 5 is for showing the layout diagram of two packing pixel values in the embodiment of the invention 3.View data with 16 bit architectures shown in Figure 5 comprises the pixel value " a_even " of the pixel of even-numbered in its most-significant byte, comprise the pixel value " a_odd " of the pixel of odd-numbered in its least-significant byte.The arrangement of two packing pixel values may be different from the arrangement of Fig. 5.
Summarize the operation of the pixel interpolating equipment of present embodiments hereinafter with reference to figure 4.
With pixel value a[2k] (it is the high-order pixel data of 16 pixel datas shown in Figure 5) be input to entry terminal 91a.With pixel value a[2k+1] (it is the low level pixel data of 16 pixel datas) be input to entry terminal 91b.Pixel value c[2m+1 with the pixel of the interpolation of odd-numbered] output to outlet terminal 99a.Pixel value c[2m with the pixel of the interpolation of even-numbered] output to outlet terminal 99b.
In the pixel interpolating equipment of present embodiment, each control signal cycle input one section 16 bit image data (two pixel values of wherein having packed).In other words, for each cycle, according to pixel value a[2k-3], a[2k-1], a[2k+1], a[2k+3] ... order, the pixel value of odd-numbered is input to entry terminal 91a.For each cycle, according to pixel value a[2k-2], a[2k], a[2k+2], a[2k+4] ... order, the image value of even-numbered is input to entry terminal 91b.
Below explain wherein in the specific period of control signal pixel value a[2k+2] be input to entry terminal 91b, with pixel value a[2k+3] be input to entry terminal 91a and the pixel value a[2k+1 before the storage one-period in register 11] situation.
On this cycle, totalizer 21a calculates poor (a[2k+1]-a[2k+2]) of the pixel value of neighborhood pixels.Totalizer 22a calculate neighborhood pixels pixel value and (a[2k+1]+a[2k+2]).Totalizer 21b calculates poor (a[2k+2]-a[2k+3]) of the pixel value of neighborhood pixels.Totalizer 22b calculate neighborhood pixels pixel value and (a[2k+2]+a[2k+3]).
Be located at shift unit, totalizer, register and limiter on the stage after totalizer 21a, 21b, 22a and the 22b and carry out corresponding unit operation much at one with the pixel interpolating equipment of embodiments of the invention 2.Therefore, omit further describing of its operation.
As the result of above-mentioned processing, the value of selector switch 43a output equation 13 is as the intermediate pixel value b[2m+1 of the pixel of the interpolation of odd-numbered].The value of selector switch 43b output equation 14 is as the intermediate pixel value b[2m of the pixel of the interpolation of even-numbered].
(equation 13)
b＝(a[2k-3]-a[2k-2])-4*(a[2k-2]-a[2k-1])+16*(a[2k-1]+a[2k])+4*(a[2k]-a[2k+1])-(a[2k+1]-a[2k+2])
(equation 14)
b＝(a[2k-2]-a[2k-1])-4*(a[2k-1]-a[2k])+16*(a[2k]+a[2k+1])+4*(a[2k+1]-a[2k+2])-(a[2k+2]-a[2k+3])
For from the intermediate pixel value of the equation 13 of selector switch 43a output and from the intermediate pixel value of the equation 14 of selector switch 43b output, carry out standardization and operated in saturation according to equation 5.Finally, with the pixel value c[2m+1 of the pixel of the interpolation of odd-numbered] output to outlet terminal 99a.Pixel value c[2m with the pixel of the interpolation of even-numbered] output to outlet terminal 99b.
In above-mentioned processing sequence, when the margin of image element absolute value of the signal indication neighborhood pixels of comparer 51a output during greater than constant " b0 ", selector switch 41b selects the output of totalizer 23b, and selector switch 42b selects the output of totalizer 25b, and selector switch 43a selects the output of totalizer 26a.When the absolute value of the difference of the pixel value of the signal indication neighborhood pixels of comparer 51b output during greater than constant " b0 ", selector switch 41a selects the output of totalizer 23a, and selector switch 42a selects the output of totalizer 25a, and selector switch 43b selects the output of totalizer 26b.
On the other hand, when the absolute value of the difference of the pixel value of the signal indication neighborhood pixels of comparer 51a output is equal to or less than constant " b0 ", the output of selector switch 41b mask register 13b, the output of selector switch 42b mask register 15b, the output of selector switch 43a mask register 16a.Shift unit 31a, totalizer 23b, totalizer 25b and totalizer 25a do not carry out computing.
When the absolute value of the difference of the pixel value of the signal indication neighborhood pixels of comparer 51b output is equal to or less than constant " b0 ", selector switch 41a selects the output of totalizer 21a, selector switch 42a selects the output of totalizer 24a, and selector switch 43b selects the output of selector switch 42b.Shift unit 31b, totalizer 23a, totalizer 25a and totalizer 26b do not carry out computing.
As mentioned above, when the margin of image element absolute value of neighborhood pixels is equal to or less than predetermined value (being constant " b0 "), do not carry out computing about the arithmetic element of poor computing; Therefore, can reduce for the necessary power consumption of the computing of these arithmetical unit.
Inevitable clear from above explanation: the pixel interpolating equipment of present embodiment can obtain the resulting feature of pixel interpolating equipment of the embodiment of the invention 2 equally.
In addition, if the pixel interpolating equipment of present embodiment is expanded to the quadruple parallel organization from current double parallel organization, then realize the pixel interpolating equipment of expansion easily, it can import the pixel data with 32 bit architectures, the four section 8 bit architecture pixel value of wherein having packed, and the pixel interpolating that can once carry out the pixel of four interpolations is handled.
In the above embodiments 1 to embodiment 3, coding standard ground has provided explanation by the pixel of 6 tap filters generation interpolation according to meeting H.264.But the invention is not restricted to the H.264 pixel of coding standard generation interpolation of basis, but can be used for handling pixel and the motion compensation that generates interpolation according to the tap filtering of other types.In these are used, can obtain above-mentioned effect equally.
Fig. 6 is the block scheme of the motion picture encoding equipment in the embodiment of the invention 4.The motion picture encoding equipment 100 of present embodiment shown in Figure 6 comprises: wave filter (in-loop filter) 160, frame buffer 170 and motion compensator 180 in subtracter 110, orthogonal transformation/quantifying unit 120, variable length code unit 130, re-quantization/inverse orthogonal transformation unit 140, totalizer 150, the circulation.Motion compensator 180 comprises the picture maker 181 and pixel interpolating unit 182 of prediction.
Fig. 6 shows the part of processing block of the motion picture encoding equipment 100 of present embodiment; Fig. 6 only shows the processing block about the inter-picture prediction coding, but has got rid of the processing block about the intra-frame prediction coding.
Below explain the operation of the motion picture encoding equipment 100 of present embodiment.
Handle by subtracter 110 from the raw frames of entry terminal 101 inputs, with the difference of calculating with the picture of the prediction of motion compensator 180 outputs.Difference or the surplus calculated are outputed to orthogonal transformation/quantifying unit 120.
The surplus of 120 pairs of subtracters of orthogonal transformation/quantifying unit 110 output is carried out orthogonal transformation (for example discrete cosine transform), and quantizes the coefficient of the conversion that obtained, obtains coefficient that quantize, conversion thus.
Coefficient quantification, conversion of 130 pairs of orthogonal transformation/quantifying unit in variable length code unit 120 output carries out variable length code, thus the result of output encoder as the picture data of coding to outlet terminal 109.
Simultaneously, re-quantization/inverse orthogonal transformation unit coefficient 140 pairs of quantifications, conversion carries out re-quantization/inverse orthogonal transformation, obtains the surplus of recovering thus.Totalizer 150 is added to the picture of the prediction of motion compensator 180 outputs with the surplus of recovering, and recovers the picture of reconstruct thus.
Remove block noise by wave filter 160 in the circulation from the picture of reconstruct, and be stored in the frame buffer 170 as decoded pictures.
In the motion picture encoding equipment 180 of present embodiment, from to the input raw frames carry out variable length code to the processing of the picture data of output encoder, pixel interpolating in processing in the motion compensator 180, especially the pixel interpolating unit 182 is handled the bigger number percent that has occupied entire process.Therefore, use the pixel interpolating equipment of the embodiment of the invention 2 or embodiment 3 to make it to realize the processing of high speed pixel interpolating, and therefore motion compensator 180 can be to carry out motion compensation process at a high speed for pixel interpolating unit 182.As a result, can provide can be with the motion picture encoding equipment 100 of high speed processing.In addition, so the motion picture encoding equipment 100 that is equipped with has the lower feature of power consumption, and this is because the formation of pixel interpolating unit 182 has been avoided unnecessary computing.
The motion picture encoding equipment 100 of present embodiment can encode efficiently the input raw frames be to meet the H.264 picture data of the variable length code of standard.
The motion picture encoding equipment 100 of present embodiment is not limited to meet the H.264 variable length code of coding standard.Handle by the tap filtering of utilizing other types, motion picture encoding equipment 100 can be widely used in the variable length code according to other coding standards.
Fig. 7 is the block scheme of the motion picture decoding device in the embodiment of the invention 5.In Fig. 7, for the element function components identical of Fig. 6, provide identical symbol, explain to omit.
The motion picture decoding device 200 of present embodiment shown in Figure 7 comprises: wave filter 160, frame buffer 170 and motion compensator 180 in length-changeable decoding unit 210, re-quantization/inverse orthogonal transformation unit 140, totalizer 150, the circulation.Motion compensator 180 comprises predictive picture maker 181 and pixel interpolating unit 182.
Fig. 7 shows the part of processing block of the motion picture decoding device 200 of present embodiment; Fig. 7 only shows about inter-picture prediction process of decoding piece, but has got rid of about intra-frame prediction process of decoding piece.
Below explain the operation of the motion picture decoding device 200 of present embodiment.
The picture data that is fed to the variable length code of entry terminal 201 is decoded as coefficient quantification, conversion by length-changeable decoding unit 210, and outputs to re-quantization/inverse orthogonal transformation unit 140.
Coefficient quantification, conversion of 140 pairs of length-changeable decoding unit of re-quantization/inverse orthogonal transformation unit, 210 decodings carries out re-quantization/inverse orthogonal transformation, obtains surplus thus.
Remove block noise by wave filter 160 in the circulation from the picture of reconstruct, and be stored in the frame buffer 170 temporarily as decoded pictures.Then, decoded pictures is outputed to outlet terminal 209.
In the motion picture decoding device 200 of present embodiment, in the processing of the picture of the picture data of the variable length code of decoding input and output decoder, pixel interpolating in processing in the motion compensator 180, especially the pixel interpolating unit 182 is handled the bigger number percent that has occupied entire process.Therefore, use the pixel interpolating equipment of the embodiment of the invention 2 or embodiment 3 to make it to realize the processing of high speed pixel interpolating, and therefore motion compensator 180 can be to carry out motion compensation process at a high speed for pixel interpolating unit 182.As a result, can provide can be with the motion picture decoding device 200 of high speed processing.In addition, so the motion picture decoding device 200 that is equipped with has the lower feature of power consumption, and this is because the formation of pixel interpolating unit 182 has been avoided unnecessary computing.
The motion picture decoding device 200 of present embodiment can be decoded efficiently and be met the H.264 picture data of the variable length code of standard.
The motion picture decoding device 200 of present embodiment is not limited to meet the H.264 length-changeable decoding of coding standard.Handle by the tap filtering of utilizing other types, motion picture decoding device 200 can be widely used in other picture datas of meeting other coding standards codings length-changeable decoding.
According to the present invention, can provide and realize that wherein power consumption reduces and processing acceleration both pixel interpolating method and equipment.So the pixel interpolating equipment that is equipped with can be used for motion compensation or the size amplification of picture or the purposes such as pixel generation in the size minimizing such as the predictive coding of motion picture.
The preferred embodiments of the present invention have been described with reference to the drawings, be appreciated that and the invention is not restricted to these accurate embodiment, and under the prerequisite of scope of the present invention that does not break away from additional claim qualification and spirit, those skilled in the art can carry out various variations and modification.
Industrial applicibility
Can be used for motion picture treatment facility according to pixel interpolating method of the present invention, the cellular phone of built-in camera for example, it requires the high speed processing to the motion picture, and association area.
Claims (5)
1. pixel interpolating method that uses tap filtering, wherein said tap filtering adopt tap coefficient 1 ,-5,20,20 ,-5,1}, and by utilizing following formula to carry out filtering based on described tap coefficient,
b[m]＝(a[k-5]-a[k-4])-4*(a[k-4]-a[k-3])+16*(a[k-3]+a[k-2])+4*(a[k-2]-a[k-1])-(a[k-1]-a[k])，
b[m+1]＝(a[k-4]-a[k-3])-4*(a[k-3]-a[k-2])+16*(a[k-2]+a[k-1])+4*(a[k-1]-a[k])-(a[k]-a[k+1])，
b[m+2]＝(a[k-3]-a[k-2])-4*(a[k-2]-a[k-1])+16*(a[k-1]+a[k])+4*(a[k]-a[k+1])-(a[k+1]-a[k+2])，
b[m+3]＝(a[k-2]-a[k-1])-4*(a[k-1]-a[k])+16*(a[k]+a[k+1])+4*(a[k+1]-a[k+2])-(a[k+2]-a[k+3])，
b[m+4]＝(a[k-1]-a[k])-4*(a[k]-a[k+1])+16*(a[k+1]+a[k+2])+4*(a[k+2]-a[k+3])-(a[k+3]-a[k+4])，
A[k wherein] for being positioned at the pixel value of the both full-pixel of k position in a plurality of reference pixels, b[m] for being positioned at the intermediate pixel value of the half-pix of wanting interpolation between (k-3) individual both full-pixel and (k-2) individual both full-pixel, in a circulation to pixel to (a[k], a[k-1]) relevant those operate, and described pixel interpolating method may further comprise the steps:
First step is imported described pixel value a[k];
Second step, calculate described pixel value a[k] and the pixel value a[k-1 of the neighborhood pixels in first register, stored] difference with and, thus described difference is stored into corresponding to b[m+4] second register, and with described and join corresponding to b[m+2 after 4 moving to left] the 3rd register;
Third step, whether the absolute value of judging described difference is greater than predetermined value;
The 4th step is from corresponding to b[m] the 4th register deduct the value of in described second register, storing in the value of storing;
The 5th step, the value that will store in described second register moves to left 2, the value after will moving to left thus is added to corresponding to b[m+1] the 5th register, and from corresponding to b[m+3] the 6th register deduct value after described the moving to left; And
The 6th step is to the b[m that stores in described the 4th register] operative norm processing and operated in saturation, to obtain the pixel value c[m of interpolation], and with described pixel value a[k] store described first register into;
Wherein, only during greater than described predetermined value, just carry out described the 4th step and described the 5th step at the absolute value of described difference.
2. pixel interpolating method as claimed in claim 1 wherein repeats described first step to the six steps for continuous input pixel.
3. pixel interpolating method as claimed in claim 1, wherein said predetermined value is equal to or less than by described pixel value a[k] and the pixel value a[k-1 of described neighborhood pixels] the value of lowest order definition of binary representation of each pixel value.
4. pixel interpolating method as claimed in claim 1, wherein said predetermined value is equal to or less than by described pixel value a[k] the value of lowest order definition of binary representation.
5. pixel interpolating equipment that uses the tap filtering unit, wherein said tap filtering unit adopt tap coefficient 1 ,-5,20,20 ,-5,1}, and by utilizing following formula to carry out filtering based on described tap coefficient,
b[m]＝(a[k-5]-a[k-4])-4*(a[k-4]-a[k-3])+16*(a[k-3]+a[k-2])+4*(a[k-2]-a[k-1])-(a[k-1]-a[k])，
b[m+1]＝(a[k-4]-a[k-3])-4*(a[k-3]-a[k-2])+16*(a[k-2]+a[k-1])+4*(a[k-1]-a[k])-(a[k]-a[k+1])，
b[m+2]＝(a[k-3]-a[k-2])-4*(a[k-2]-a[k-1])+16*(a[k-1]+a[k])+4*(a[k]-a[k+1])-(a[k+1]-a[k+2])，
b[m+3]＝(a[k-2]-a[k-1])-4*(a[k-1]-a[k])+16*(a[k]+a[k+1])+4*(a[k+1]-a[k+2])-(a[k+2]-a[k+3])，
b[m+4]＝(a[k-1]-a[k])-4*(a[k]-a[k+1])+16*(a[k+1]+a[k+2])+4*(a[k+2]-a[k+3])-(a[k+3]-a[k+4])，
A[k wherein] for being positioned at the pixel value of the both full-pixel of k position in a plurality of reference pixels, b[m] for being positioned at the intermediate pixel value of the half-pix of wanting interpolation between (k-3) individual both full-pixel and (k-2) individual both full-pixel, in a circulation to pixel to (a[k], a[k-1]) relevant those operate, and described pixel interpolating equipment comprises:
Input block is imported described pixel value a[k];
Computing unit, calculate described pixel value a[k] and the pixel value a[k-1 of the neighborhood pixels in first register, stored] difference with and, thus described difference is stored into corresponding to b[m+4] second register, and with described and join corresponding to b[m+2 after 4 moving to left] the 3rd register;
Second judging unit, whether the absolute value of judging described difference is greater than predetermined value;
The subtraction unit is from corresponding to b[m] the 4th register deduct the value of in described second register, storing in the value of storing;
Shift cells left, the value that will store in described second register moves to left 2, the value after will moving to left thus is added to corresponding to b[m+1] the 5th register, and from corresponding to b[m+3] the 6th register deduct value after described the moving to left; And
Output unit is to the interpolated pixel values b[m that stores in described the 4th register] operative norm processing and operated in saturation, with the pixel value c[m of output interpolation], and with described pixel value a[k] store described first register into;
Wherein, only at the absolute value of described difference during greater than described predetermined value, described subtraction unit and described shift cells left be executable operations.
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| JP2005050421 | 2005-02-25 | ||
| PCT/JP2006/303363 WO2006090811A2 (en) | 2005-02-25 | 2006-02-17 | Pixel interpolating method and device |
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| CN109460205B (en) * | 2018-11-06 | 2021-09-10 | 沈阳天眼智云信息科技有限公司 | Data curve generation and display method and system |
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| CA2491679A1 (en) * | 2002-07-09 | 2004-01-15 | Nokia Corporation | Method and system for selecting interpolation filter type in video coding |
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| Kyeounsoo Kimt，Peter A. Beerel.A High-Performance Low-Power AsynchronousMatrix-VectorMultiplier For Discrete Cosine Transform.AP-ASIC ＇99, The first IEEE ASIA Pacific Conference on Seoul, South Korea 23-25 AUG 1999.1999,第135-138页. * |
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| WO2006090811A2 (en) | 2006-08-31 |
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