CN101123510B - Method, switch and switching chip for port separation of switch - Google Patents

Method, switch and switching chip for port separation of switch Download PDF

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Publication number
CN101123510B
CN101123510B CN2007101186563A CN200710118656A CN101123510B CN 101123510 B CN101123510 B CN 101123510B CN 2007101186563 A CN2007101186563 A CN 2007101186563A CN 200710118656 A CN200710118656 A CN 200710118656A CN 101123510 B CN101123510 B CN 101123510B
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port
exchange chip
chip
switch
ports
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CN101123510A (en
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何苑凌
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Global Innovation Polymerization LLC
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ZTE Corp
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Abstract

The present invention discloses a method realizing the isolation of switch ports, which includes three steps. Firstly, a plurality of ports of a switch chip are respectively assigned as security ports and isolation ports; secondly, all of the isolation ports of the switch chip are configured as link aggregation ports; and finally, the flow balancing mechanism of the link aggregation ports is closed to ensure that the two-layer retransmission is carried out according to a normal mechanism. Accordingly, the present invention provides a switch and a switch chip that realize port isolation. The present invention not only realizes the good effect of port isolation but also enables the switch to have a greater scope in selecting a switch chip; by using a low-end switch chip, the present invention can still realize port isolation, thus the investment and cost needed to purchase a high-end switch chip is saved, and furthermore the practicability and stability of products is increased.

Description

Realize method, switch and exchange chip that switch ports themselves is isolated
Technical field
The present invention relates to the Ethernet switch field, relate in particular to a kind of method, switch and exchange chip of realizing that switch ports themselves is isolated.
Background technology
Ethernet switch is one of nucleus equipment of Ethernet, and it has been applied in sub-district and the enterprise more and more widely.Along with developing rapidly of network size and being on the increase of number of users, also more and more higher to the requirement of network security management.For user-isolated (terminal), traditional way is to distribute a VLAN (Virtual Local Area Network to each user, VLAN) with relevant default vlan ID (VLAN sign), by VLAN with the user from keeping apart as the data link layer of the OSI network configuration second layer, can prevent that like this other users from carrying out the monitoring and the attack of malice.But, because the number of VLAN is extremely limited, have only 4096, when number of users was a lot of, this partition method had taken lot of V LAN resource, had caused the limitation of extensibility aspect.
Therefore, another new user isolation technology has occurred, Here it is virtual port isolation technology.Under this mechanism, all of the port of switching equipment can be under same VLAN, and still having only can mutual communication between the designated port.The virtual port isolation technology can guarantee that each port among the same VLAN can not communicate by letter each other, realizes communication but can pass specific secure port.Even the user among the same like this VLAN, the influence that also can not be broadcasted each other.
The exchange chip support that the realization of above-mentioned port isolation needs switch to use generally needs high-end exchange chip, and this exchange chip should have the function that the port isolation attribute is set, and following implementation method is generally arranged:
1, specifying this port is isolated port or secure port.
2, when VLAN is set, whole VLAN is arranged to isolated vlan, and specifies secure port, and other ports all are isolated ports.
3, exchange chip all has a form to each port, the port that appointment can be communicated by letter, and all isolate mutually between other ports.
If exchange chip does not possess above-mentioned functions, then can't realize port isolation.Because the port isolation of exchange chip is not the indispensable function that VLAN standard agreement 802.3AD requires, so exchange chip of some producer, particularly the low side chip is not realized this function, and this has caused suitable difficulty for the safety management strategy of whole switch system.
In summary, have now realizing that the technology that switch ports themselves is isolated obviously exists inconvenience and defective on reality is used, so be necessary to be improved.
Summary of the invention
At above-mentioned defective, the object of the present invention is to provide a kind of method, switch and exchange chip of realizing that switch ports themselves is isolated, it not only can realize good port isolation effect, and makes switch on the use exchange chip bigger choice arranged.
To achieve these goals, the invention provides a kind of method that realizes that switch ports themselves is isolated, described switch includes exchange chip, and this method comprises the steps:
A, the plurality of ports of exchange chip is appointed as secure port and isolated port respectively;
B, all isolated ports of exchange chip all are set to link polymerization terminal port;
C, close the flow equalization mechanism of described link polymerization terminal port, carry out according to normal mechanism to guarantee two layers of forwarding.
The method according to this invention is used the exchange chip pile system in the described switch, described steps A also comprises according to the port attribute of exchange chip determines the exchange chip attribute;
Further comprise after the described step C:
D, the related chipset with VLAN of the related chipset of each exchange chip in the exchange chip pile system is set;
The isolation features mapping table of E, modification exchange chip pile system.
The method according to this invention, determine that according to port attribute the step of exchange chip attribute further comprises in the described steps A:
If all of the port all is an isolated port on the exchange chip, this exchange chip is defined as isolating chip; If all of the port all is a secure port on the exchange chip, then this exchange chip is defined as aggregator; If existing isolated port has secure port again on the exchange chip, then this exchange chip is defined as aggregator.
The method according to this invention, described step D further comprises:
To the step that is provided with of the related chipset of exchange chip, on described aggregator, the chip identification of all exchange chips in the exchange chip pile system is write in the related chipset; On described isolating chip, only the chip identification with aggregator writes in the related chipset;
To the step that is provided with of the related chipset of VLAN, on the described aggregator, the chip identification of all exchange chips in the exchange chip pile system is write in the related chipset of VLAN; On described isolating chip, only the chip identification with aggregator writes in the related chipset of VLAN.
The method according to this invention also comprises after the described step C:
Open all secure ports and the inundation of isolated port and the mechanism of forwarding broadcast packet in the exchange chip.
The method according to this invention guarantees among the described step C that two layers of forwarding are meant according to normal mechanism, make each isolated port of exchange chip only transmit the packet that destination interface is a port according to two-layer retransmitting table.
The present invention also provides a kind of switch of realizing port isolation; described switch includes exchange chip; the plurality of ports of described exchange chip is designated as secure port and isolated port respectively; and all isolated ports all are arranged to link polymerization terminal port; close the flow equalization mechanism of this link polymerization terminal port simultaneously, carry out according to normal mechanism to guarantee two layers of forwarding.
According to switch of the present invention, use the exchange chip pile system in the described switch, this switch is determined the exchange chip attribute according to port attribute, and the related chipset of the chip associated group that each exchange chip in the exchange chip pile system is set, and the isolation features mapping table of revising the exchange chip pile system with VLAN.
According to switch of the present invention, described exchange chip is opened the inundation of all secure ports and isolated port and is transmitted the mechanism of broadcast packet.
The present invention realizes port isolation by the indispensable function of exchange chip, particularly be that the plurality of ports of exchange chip is appointed as secure port and isolated port respectively, and all isolated ports all are set to link polymerization terminal port, the link aggregation function of the exchange chip indispensability that requires by the 802.3AD standard agreement realizes port isolation.Whereby, the present invention has not only realized good port isolation effect, and make switch on the use exchange chip, bigger choice arranged, it utilizes the low side exchange chip can realize port isolation, buy required input of high-end exchange chip and cost thereby saved, and then improved the practicality and the stability of product.
Description of drawings
Fig. 1 is the structural representation of the switch of realization port isolation provided by the invention;
Fig. 2 is the method flow diagram that realization switch ports themselves provided by the invention is isolated;
Fig. 3 realizes the method flow diagram that switch ports themselves is isolated in one embodiment of the invention;
The network structure that Fig. 4 is in another embodiment of the present invention to be adopted.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
802.3AD standard agreement requires exchange chip must have the link aggregation function, this link aggregation function is meant a logic port of two or more physical port bindings becoming, thereby can carry out equilibrium to flow, the flow that crucial is between these two physical ports is isolated mutually, and and be intercommunication between other ports.
Basic thought of the present invention is exactly; on the low side exchange chip, can utilize described link aggregation function; all isolated ports on the exchange chip all are set to link polymerization terminal port; make between these ports and isolate mutually; close flow equalization mechanism simultaneously, still carry out according to normal mechanism to guarantee two layers of forwarding.
The invention provides a kind of switch of realizing port isolation, as shown in Figure 1, described switch 1 is the Ethernet switch that is used for two layers of exchange, includes an exchange chip 10 at least.This exchange chip 10 can be the exchange chip of low side, and it not only has common function of exchange, and has the link aggregation function of 802.3AD protocol requirement.Exchange chip 10 be connected with plurality of ports 101~10n, it is designated as secure port and isolated port respectively, in the present embodiment port one 01 is set to secure port, and port one 02~10n is set to isolated port.And all isolated port 102~10n are arranged to link polymerization terminal port, close the flow equalization mechanism of this link polymerization terminal port simultaneously, carry out according to normal mechanism to guarantee two layers of forwarding.Can not communicate with one another between described isolated port 102~10n, but can pass through secure port 101 communications.Secure port shown in Fig. 1 and isolated port are a kind of example design, obviously also can secure port be set to a plurality of.
Switch of the present invention can also use the exchange chip pile system, and the co-operation that just the polylith exchange chip combined is so that provide port as much as possible in limited space.In this organization plan, then also need to determine the exchange chip attribute:, this exchange chip is defined as isolating chip if all of the port all is an isolated port on the exchange chip according to the port attribute of exchange chip; If all of the port all is a secure port on the exchange chip, then this exchange chip is defined as aggregator; If existing isolated port has secure port again on the exchange chip, then this exchange chip is defined as aggregator.
When realizing the port isolation function of exchange chip pile system, mainly be that the related chipset with VLAN of related chipset and the common method to set up of exchange chip had any different.For related chipset setting, aggregator is according to the common method configuration that does not realize port isolation, and the chip id of all exchange chips in the system is write in the related chipset; On isolating chip, only the chip id with aggregator writes in the related chipset.For the related chipset setting of VLAN, in aggregator,, the chip id of all exchange chips in the system is write in the related chipset of VLAN also according to the common method configuration that does not realize port isolation; On isolating chip, only the chip id with aggregator writes in the related chipset of VLAN.
Next, the exchange chip pile system also needs to revise isolation features mapping table, the relevant configuration of promptly preserving exchange chip.
In this way, isolating chip is only thought and is had aggregator in the exchange chip pile system, other exchange chips do not exist, so all packets are transmitted and all can be occurred between aggregator and the isolating chip or between the aggregator, and all data flow between the isolating chip all are under an embargo.For the isolated port on the aggregator, some special purposes are generally arranged, do not wish to interact between the cascaded switches simultaneously such as other switches of cascade.
Correspondingly; the present invention also provides a kind of exchange chip that is used to realize the switch ports themselves isolation; as shown in Figure 1; the plurality of ports of described exchange chip is designated as secure port 101 and isolated port 102~10n respectively; and all isolated port 102~10n are set to link polymerization terminal port; close the flow equalization mechanism of this link polymerization terminal port 102~10n simultaneously, carry out according to normal mechanism to guarantee two layers of forwarding.
Fig. 2 shows the method flow that the present invention realizes that switch ports themselves is isolated, and described switch includes exchange chip, and this method comprises the steps:
Step S201 is appointed as secure port and isolated port respectively with the plurality of ports of exchange chip.Exchange chip determines that good which port is a secure port in this step, and determines which is an isolated port, can not communicate with one another between the isolated port, but can pass through the secure port communication.
Step S202 is set to link polymerization terminal port with all isolated ports of exchange chip.Because the flow between the link polymerization terminal port is isolated mutually, it is equivalent to the function of isolated port.
Step S203; close the flow equalization mechanism of link polymerization terminal port; carry out according to normal mechanism to guarantee two layers of forwarding; even each isolated port of exchange chip is only transmitted the packet that destination interface is a port according to two-layer retransmitting table, thereby the user is kept apart from the data link layer of the OSI network configuration second layer.
Fig. 3 shows and realizes the method flow that switch ports themselves is isolated in one embodiment of the invention, uses the exchange chip pile system in the switch of this embodiment, comprises that step is as follows:
Step S301 is appointed as secure port and isolated port respectively with the plurality of ports of the exchange chip in the exchange chip pile system.Also comprise according to the port attribute of exchange chip in this step and determine the exchange chip attribute,, then this exchange chip is defined as isolating chip if all of the port all is an isolated port on the exchange chip; If all of the port all is a secure port on the exchange chip, then this exchange chip is defined as aggregator; If existing isolated port has secure port again on the exchange chip, then this exchange chip is defined as aggregator.
Step S302 is set to link polymerization terminal port with all isolated ports of exchange chip.
Step S303 closes the flow equalization mechanism of link polymerization terminal port, carries out according to normal mechanism to guarantee two layers of forwarding.
Step S304 opens all secure ports and the inundation of isolated port and the mechanism of forwarding broadcast packet in the exchange chip, and this step can determine whether to carry out with configuration according to specific circumstances.
Step S305 is provided with the related chipset with VLAN of chip associated group of each exchange chip in the exchange chip pile system.This step further comprises:
To the step that is provided with of related chipset, the chip id with all exchange chips in the system on aggregator writes in the related chipset; A chip id with aggregator writes in the related chipset on isolating chip.
To the step that is provided with of the related chipset of VLAN, the chip id with all exchange chips in the system on the described aggregator writes in the related chipset of VLAN; A chip id with aggregator writes in the related chipset of VLAN on isolating chip.
Step S306, the isolation features mapping table of modification exchange chip pile system, the relevant configuration of promptly preserving exchange chip.
The ethernet network structure that Fig. 4 shows in another embodiment of the present invention to be adopted comprises switch A~E, and described switch A, B, C have used the low side exchange chip to realize the port isolation technology.Wherein the port a1 of switch A is set to secure port as the upper united mouth, be connected in the Ethernet, and the port a2~a6 of switch A is set to isolated port.The port b1 of switch b is set to secure port and links to each other with the port a5 of switch A, and three isolated port b2~b4 of switch b connect user terminal, and the user terminal among this embodiment is a computer.Equally, the port a6 that the port c1 of switch C is set to secure port and switch A links to each other, and three isolated port c2~c4 of switch C connect user terminal.Be not difficult thus to draw:
1) three isolated port a2~a4 being connected with user terminal of switch A isolate mutually, but can with secure port a1 intercommunication, so can be connected in the Ethernet by secure port a1.
2) three of switch b isolated port b2~b4 can not communication between mutually, but can with secure port b1 intercommunication, and the port a5 on the switch A can with secure port a1 intercommunication, so port b2~b4 can be by transceive data between cascade and the Ethernet.Three isolated port c2~c4 of switch C also are same reasons.
3) because connect between port a2~a4, the port b2~b4 of user terminal and these nine ports of port c2~c4 all can not communication, thus also can't communication between the user terminal of different switches among the figure, realized isolation fully between the user with this.
In sum, the present invention realizes port isolation by the indispensable function of exchange chip, particularly be that the plurality of ports of exchange chip is appointed as secure port and isolated port respectively, and all isolated ports all are set to link polymerization terminal port, the link aggregation function of the exchange chip indispensability that requires by VLAN standard agreement 802.3AD realizes port isolation.Whereby, the present invention has not only realized good port isolation effect, and make switch on the use exchange chip, bigger choice arranged, it utilizes the low side exchange chip can realize port isolation, buy required input of high-end exchange chip and cost thereby saved, and then improved the practicality and the stability of product.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.

Claims (7)

1. method that realizes that switch ports themselves is isolated, described switch includes exchange chip, it is characterized in that, and this method comprises the steps:
A, the plurality of ports of exchange chip is appointed as secure port and isolated port respectively;
B, all isolated ports of exchange chip all are set to link polymerization terminal port;
C, close the flow equalization mechanism of described link polymerization terminal port, carry out according to normal mechanism to guarantee two layers of forwarding;
Use the exchange chip pile system in the described switch, described steps A also comprises according to the port attribute of exchange chip determines the exchange chip attribute;
Further comprise after the described step C:
D, the related chipset with VLAN of the related chipset of each exchange chip in the exchange chip pile system is set;
The isolation features mapping table of E, modification exchange chip pile system.
2. method according to claim 1 is characterized in that, determines that according to port attribute the step of exchange chip attribute further comprises in the described steps A:
If all of the port all is an isolated port on the exchange chip, this exchange chip is defined as isolating chip; If all of the port all is a secure port on the exchange chip, then this exchange chip is defined as aggregator; If existing isolated port has secure port again on the exchange chip, then this exchange chip is defined as aggregator.
3. method according to claim 2 is characterized in that, described step D further comprises:
To the step that is provided with of the related chipset of exchange chip, on described aggregator, the chip identification of all exchange chips in the exchange chip pile system is write in the related chipset; On described isolating chip, only the chip identification with aggregator writes in the related chipset;
To the step that is provided with of the related chipset of VLAN, on the described aggregator, the chip identification of all exchange chips in the exchange chip pile system is write in the related chipset of VLAN; On described isolating chip, only the chip identification with aggregator writes in the related chipset of VLAN.
4. method according to claim 1 is characterized in that, also comprises after the described step C: open all secure ports and the inundation of isolated port and the mechanism of forwarding broadcast packet in the exchange chip.
5. method according to claim 1 is characterized in that, guarantees among the described step C that two layers of forwarding are meant according to normal mechanism, makes each isolated port of exchange chip only transmit the packet that destination interface is a port according to two-layer retransmitting table.
6. the switch of a realization such as each method of claim 1~5, described switch includes exchange chip, it is characterized in that, the plurality of ports of described exchange chip is designated as secure port and isolated port respectively, and all isolated ports all are arranged to link polymerization terminal port, close the flow equalization mechanism of this link polymerization terminal port simultaneously, carry out according to normal mechanism to guarantee two layers of forwarding;
Use the exchange chip pile system in the described switch, this switch is determined the exchange chip attribute according to port attribute, and the related chipset with VLAN of the related chipset of each exchange chip in the exchange chip pile system is set, and the isolation features mapping table of modification exchange chip pile system.
7. switch according to claim 6 is characterized in that, described exchange chip is opened the inundation of all secure ports and isolated port and transmitted the mechanism of broadcast packet.
CN2007101186563A 2007-07-11 2007-07-11 Method, switch and switching chip for port separation of switch Expired - Fee Related CN101123510B (en)

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Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102316031A (en) * 2011-09-05 2012-01-11 西安和利时系统工程有限公司 Switching system
CN103780510B (en) * 2012-10-19 2020-03-17 中兴通讯股份有限公司 Method and device for negotiating flow path in link aggregation group
CN103780511B (en) * 2012-10-19 2018-09-28 中兴通讯股份有限公司 The machinery of consultation of flow path and device in link aggregation group
CN103780630B (en) * 2014-02-18 2018-07-10 迈普通信技术股份有限公司 Virtual LAN port separation method and system
CN105187323B (en) * 2015-09-29 2018-11-16 盛科网络(苏州)有限公司 Realize the device and method of multistage flow load sharing
CN105681150A (en) * 2016-03-07 2016-06-15 中车株洲电力机车研究所有限公司 Method for isolating broadcast storm from wind electric field network
CN108111429A (en) * 2017-12-21 2018-06-01 湖南恒茂高科股份有限公司 It is a kind of to detect and solve the method and system of local network attack
CN110266831A (en) * 2019-06-19 2019-09-20 厦门四信通信科技有限公司 IP Camera address configuration method, device, system and the storage medium of video recorder
CN110708305B (en) * 2019-09-27 2022-04-15 国家计算机网络与信息安全管理中心 Network isolation equipment and method
CN111181866B (en) * 2019-12-21 2023-06-30 武汉迈威通信股份有限公司 Port aggregation method and system based on port isolation
CN113726572B (en) * 2021-08-31 2022-10-11 中国工商银行股份有限公司 Method, system, equipment and storage medium for automatically modifying switch port

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1464693A (en) * 2002-06-06 2003-12-31 华为技术有限公司 Method for controlling port interactive access of Ethernet switch chip
CN1885810A (en) * 2006-06-13 2006-12-27 杭州华为三康技术有限公司 Equipment topology structure forming method in stack system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1464693A (en) * 2002-06-06 2003-12-31 华为技术有限公司 Method for controlling port interactive access of Ethernet switch chip
CN1885810A (en) * 2006-06-13 2006-12-27 杭州华为三康技术有限公司 Equipment topology structure forming method in stack system

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
同上.
赵刚 .PVLAN在智能小区接入网络中的应用.安庆师范学院学报(自然科学版)
赵刚,PVLAN在智能小区接入网络中的应用.安庆师范学院学报(自然科学版),第12卷, 第2期.2006,第12卷,(第2期),69-71. *

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