CN101123221A - Making method for surface media of CMOS image sensor - Google Patents
Making method for surface media of CMOS image sensor Download PDFInfo
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- CN101123221A CN101123221A CNA2006100300162A CN200610030016A CN101123221A CN 101123221 A CN101123221 A CN 101123221A CN A2006100300162 A CNA2006100300162 A CN A2006100300162A CN 200610030016 A CN200610030016 A CN 200610030016A CN 101123221 A CN101123221 A CN 101123221A
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Abstract
A manufacturing method for complementary metal oxide semi-conductor image senser surface medium layer comprises: an active area in the underlayer is divided into a sensitization area and a non-sensitization area; a first medium layer is formed on the surface of the active area; a photoresist layer which is made into a design is formed on the first medium layer; the first medium layer on the surface of the non-sensitization area is corroded; a second medium layer is formed on the surface of the active area.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of cmos image sensor making method for surface media.
Background technology
At present, (charge coupled device CCD) is main practicability solid-state image sensing device to charge coupled device, and it has, and the noise of reading is low, dynamic range big, the response sensitivity advantages of higher.But it has the complementary metal oxide semiconductors (CMOS) (ComplementaryMetal-Oxide-Semiconductor that is difficult to main flow simultaneously, CMOS) technology is integrated in the shortcoming among the same chip, and promptly the imageing sensor based on CCD is difficult to realize that monolithic is integrated.And cmos image sensor (CMOSImage sensor CIS) owing to adopted identical CMOS technology, can be integrated in pel array and The peripheral support circuit with on the chip piece.Compare with CCD, CIS has that volume is little, in light weight, low in energy consumption, programming is convenient, be easy to advantages such as control and average unit cost are low.
Dark current (Dark Current) is one of difficult problem of facing of CIS technology.Dark current results from the electron-hole pair that thermal excitation produces.For semiconductor device, as long as its temperature is not the Kelvin absolute zero, in the dynamic equilibrium that the electron-hole pair of device inside just will be in generation, moves and bury in oblivion.Temperature is high more, and the speed that electron-hole pair produces and moves is just fast more, and dark current is big more.It has been generally acknowledged that, dark current is the magnitude of current that photodiode discharged when not having incident light, its dark current of desirable image sensor should be zero, but, actual state is that the photodiode in each pixel has served as electric capacity simultaneously again, when capacitor discharged electric charge at leisure, even without incident light, the voltage of dark current also can be suitable with the output voltage of low-light level incident light.Therefore, these the time we still can see part " image " from display, this all is because institute's charges accumulated discharges and to cause from dark current under most of situation.Thus, how to optimize the photodiode manufacture craft and become the matter of utmost importance that those skilled in the art face with the dark current that reduces CIS.
Publication number provides a kind of CIS manufacture method that reduces dark current in the U.S. Patent application of " 2002/0024067 ", the method adopts general photo etched mask and ion implantation technology to carry out actual CIS production, by forming isolated photosensitive area to hinder the generation of dark current in the CIS.Figure 1A～1E is the CIS structure cutaway view that has isolated photosensitive area in the prior art, and as shown in the figure, described CIS manufacture method comprises:
At first, shown in Figure 1A, on P type substrate 10, form isolated area 20;
Subsequently, shown in Figure 1B, etched substrate obtains isolation channel 30, and this isolation channel is positioned at photosensitive area and isolated area boundary and this isolation channel and surrounds photosensitive area;
Then, shown in Fig. 1 C, form P type doped region 40 at substrate that exposes and isolation channel surface;
Then, shown in Fig. 1 D, in isolation channel, be full of dielectric 50;
At last, shown in Fig. 1 E, in photosensitive area, form N type doped region 60, and the N type doped region degree of depth is less than the isolation channel degree of depth; P type substrate 10 constitutes photodiode in this P type doped region 40, N type doped region 60 and the photosensitive area.
The method is by making isolation channel at photodiode and isolation region, and in groove, be full of dielectric, simultaneously between the relative isolation channel wall surface of photodiode, form reciprocal form structure with two, to guarantee the isolation between the photodiode, reach the release that hinders electric current between photodiode, and then reduce the purpose of the dark current of CIS.
But, the method is just after forming photodiode, by hindering the release of electric current between photodiode, reach the purpose of the dark current that reduces CIS, and reckon without in the photodiode forming process owing to of the influence of technologies such as ion injection to the CIS dark current.Actual production is found, still there is significantly dark current in the CIS that utilizes the method to make, common generation reason with this dark current ascribes the ion implantation technology that adopts in the CIS manufacture process to and causes CIS photosensitive area surface damage, it is the photodiode surface damage, this damage influence CIS photosensitive area crystal structure, then influence the speed that electron-hole pair produces and moves in the photosensitive area, thereby increased the dark current of CIS.Thus, be badly in need of a kind of CIS manufacture method that reduces the photosensitive area surface damage.
Summary of the invention
The invention provides a kind of CIS making method for surface media, the CIS with this surface media has less dark current.
A kind of cmos image sensor making method for surface media provided by the invention comprises:
The substrate active area is divided into photosensitive area and non-photosensitive area;
Form first dielectric layer in surfaces of active regions;
On first dielectric layer, form the photoresist layer of patterning;
The non-photosensitive area of etching surface first dielectric layer;
Remove the photoresist layer;
Form second dielectric layer in surfaces of active regions.
Described first dielectric layer obtains by oxidation growth or chemical vapour deposition (CVD); The described first dielectric layer material is silicon dioxide (SiO
2), a kind of or its combination in the silicon oxynitride (SiON); The described first thickness of dielectric layers value is 5nm～40nm; Described second dielectric layer obtains by oxidation growth or chemical vapour deposition (CVD); The described second dielectric layer material is silicon dioxide (SiO
2), a kind of or its combination in the silicon oxynitride (SiON); The described second thickness of dielectric layers value is 5nm～20nm.
A kind of cmos image sensor making method for surface media provided by the invention comprises:
The substrate active area is divided into photosensitive area and non-photosensitive area;
Form dielectric layer in surfaces of active regions;
On dielectric layer, form the photoresist layer of patterning;
The non-photosensitive area surface portion of etching dielectric layer;
Remove the photoresist layer.
Described dielectric layer obtains by oxidation growth or chemical vapour deposition (CVD); Described dielectric layer material is silicon dioxide (SiO
2), a kind of or its combination in the silicon oxynitride (SiON); After the etching, it is 5nm～40nm that described photosensitive area surface media and non-photosensitive area surface media have thickness difference.
Compared with prior art, the present invention has the following advantages:
1. by dividing photosensitive area and non-photosensitive area, then to the surface media of photosensitive area and non-photosensitive area deposition different-thickness, make photosensitive area surface dielectric layer thickness be higher than non-photosensitive area surface dielectric layer thickness, thicker photosensitive area surface media has reduced the possibility that causes the photosensitive area surface damage, and then has reduced the generation of dark current in the CIS.
2. in the inventive method, for forming the heat treatment step that thicker photosensitive area surface media increases, before injecting, ion carries out, promptly before device forms, finish, can guarantee that this heat treatment step can not impact the cmos device performance to reducing the heat treatment step that the CIS dark current increases.
Description of drawings
Figure 1A～1E is the CIS structure cutaway view that has isolated photosensitive area in the prior art;
Fig. 2 A～2E is the CIS surface media manufacturing process schematic diagram of explanation the inventive method first embodiment;
Fig. 3 A～3D is the CIS surface media manufacturing process schematic diagram of explanation the inventive method second embodiment;
Wherein: same structure is represented with same label;
10: substrate; 11: the substrate active area;
12: non-photosensitive area; 13: photosensitive area;
20: isolated area; 30: isolation channel;
40:P type doped region; 50: dielectric;
60:N type doped region; 70: the first dielectric layers;
80: the second dielectric layers; 90: the photoresist layer.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.
Adopt the inventive method, the flow process that forms the CIS surface media is: at first, the substrate active area is divided into photosensitive area and non-photosensitive area; Then, form dielectric layer at substrate surface with certain thickness value; At last, utilize sedimentation or the method for anti-carving to handle described dielectric layer, form the dielectric layer that photosensitive area surface dielectric layer thickness is higher than non-photosensitive area surface dielectric layer thickness.
Fig. 2 A～2E is the CIS surface media manufacturing process schematic diagram of explanation the inventive method first embodiment, and as shown in the figure, as the embodiment of the inventive method, the concrete steps that form the CIS surface media are:
At first, shown in Fig. 2 A, substrate active area 11 is divided into non-photosensitive area 12 and photosensitive area 13.
The concrete mode of described subregion is determined according to product requirement; Described photosensitive area is in order to making sensor devices in the CIS, as photodiode etc.
The special selection that partitioned mode shown in Fig. 2 A is made for ease of continuing the subsequent step explanation should be as the qualification to the inventive method practical range.
Then, shown in Fig. 2 B, form first dielectric layer 70 on substrate active area 11 surfaces, described first dielectric layer covers non-photosensitive area 12 and photosensitive area 13.
The thickness of described first dielectric layer 70 is determined according to product requirement and process conditions; As the embodiment of the inventive method, described first dielectric layer, 70 one-tenth-value thickness 1/10s are 5nm～40nm.
The described first dielectric layer material is silicon dioxide (SiO
2), silicon oxynitride (SiON) etc.; Described first dielectric layer obtains by chemical vapour deposition technique or oxidation growth method; Described oxidation growth method forms surface media for utilizing reacting gas and substrate surface materials generation chemical reaction; Described reacting gas comprises oxygen (O
2), nitrogen (N
2) in a kind of or its combination; Described combination comprise above-mentioned gas combination and with the combination of buffer gas, described buffer gas comprises argon gas (Ar), helium (He) etc.
Again, shown in Fig. 2 C, forming the photoresist layer 90 of patterning on substrate active area 11 surfaces, is that mask is removed non-photosensitive area 12 surperficial first dielectric layers with it.
Subsequently, shown in Fig. 2 D, the non-photosensitive area of etching surface first dielectric layer 70, and remove the photoresist layer.
Described lithographic method can be selected the plasma etching method for use; After the etching, the non-photosensitive area surface first thickness of dielectric layers value is zero or approaches zero any thickness value; As the embodiment of the inventive method, described one-tenth-value thickness 1/10 is that zero non-photosensitive area surface first dielectric layer is an example after the selective etching, continues the explanation of subsequent step.
Really; the described non-photosensitive area surface first thickness of dielectric layers value be chosen as the special selection of being convenient to continue the subsequent step explanation and making; should be as qualification to the inventive method practical range; the rational change that those skilled in the art make this does not influence the enforcement of the inventive method, and should be included in protection scope of the present invention.
At last, shown in Fig. 2 E, form second dielectric layer 80 on substrate active area 11 surfaces, described second dielectric layer covers non-photosensitive area 12 and photosensitive area 13.
Described second dielectric layer, 80 thickness are determined according to product requirement and process conditions; As the embodiment of the inventive method, described second dielectric layer, 80 one-tenth-value thickness 1/10s are 5nm～20nm.The described second dielectric layer material is silicon dioxide (SiO
2), silicon oxynitride (SiON) etc.; Described second dielectric layer utilizes oxidation growth or chemical vapour deposition technique to obtain.
Described photosensitive area 13 surface media one-tenth-value thickness 1/10s are first dielectric layer, 70 one-tenth-value thickness 1/10s and second dielectric layer, 80 one-tenth-value thickness 1/10 sums; Described non-photosensitive area 12 surface media one-tenth-value thickness 1/10s are second dielectric layer, 80 one-tenth-value thickness 1/10s.
Really, when the described first dielectric layer material and the second dielectric layer material are identical or different, all do not influence the enforcement of the inventive method, can be jointly as first embodiment of the inventive method.
Fig. 3 A～3D is the CIS surface media manufacturing process schematic diagram of explanation the inventive method second embodiment, and as shown in the figure, as the embodiment of the inventive method, the concrete steps that form the CIS surface media are:
At first, as shown in Figure 3A, substrate active area 11 is divided into non-photosensitive area 12 and photosensitive area 13.
The concrete mode of described subregion is determined according to product requirement; Described photosensitive area is in order to make sensor devices in the CIS, as photodiode.
The special selection that partitioned mode shown in Fig. 3 A is made for ease of continuing the subsequent step explanation should be as the qualification to the inventive method practical range.
Then, shown in Fig. 3 B, form first dielectric layer 70 on substrate active area 11 surfaces, described first dielectric layer covers described non-photosensitive area 12 and photosensitive area 13.
Described first dielectric layer, 70 thickness are determined according to product requirement and process conditions.Described first dielectric layer, 70 one-tenth-value thickness 1/10s are the required photosensitive area surface first thickness of dielectric layers value.
The described first dielectric layer material is silicon dioxide (SiO
2), silicon oxynitride (SiON) etc.; Described first dielectric layer obtains by chemical vapour deposition technique or oxidation growth method; Described oxidation growth method forms surperficial first dielectric layer for utilizing reacting gas and substrate surface materials generation chemical reaction; Described reacting gas comprises oxygen (O
2), nitrogen (N
2) in a kind of or its combination; Described combination comprise above-mentioned gas combination and with the combination of buffer gas, described buffer gas comprises argon gas (Ar), helium (He) etc.
Then, shown in Fig. 3 C,, be that mask is removed non-photosensitive area surface portion first dielectric layer with it at the photoresist layer 90 of substrate surfaces of active regions formation patterning.
At last, shown in Fig. 3 D, the non-photosensitive area of etching surface first dielectric layer makes non-photosensitive area surface first thickness of dielectric layers less than photosensitive area surface first thickness of dielectric layers, and removes the photoresist layer.
Described non-photosensitive area surface first thickness of dielectric layers is determined according to product requirement and process conditions; As the embodiment of the inventive method, described second one-tenth-value thickness 1/10 is 5nm～20nm.The difference of described photosensitive area surface first thickness of dielectric layers and non-photosensitive area surface first thickness of dielectric layers is 5nm～40nm.
Adopt the inventive method, by dividing photosensitive area and non-photosensitive area, then to the surface media of photosensitive area and non-photosensitive area deposition different-thickness, make photosensitive area surface dielectric layer thickness be higher than non-photosensitive area surface dielectric layer thickness, thicker photosensitive area surface media has reduced the possibility that causes the photosensitive area surface damage, and then has reduced the generation of dark current in the CIS; In the inventive method, for forming the heat treatment step that thicker photosensitive area surface media increases, before ion injects, carry out, promptly before device forms, finish, can guarantee that this heat treatment step can not impact the cmos device performance to reducing the heat treatment step that the CIS dark current increases.
Though the present invention with preferred embodiment openly as above; but it is not to be used for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (11)
1. a cmos image sensor making method for surface media is characterized in that, comprising:
The substrate active area is divided into photosensitive area and non-photosensitive area;
Form first dielectric layer in surfaces of active regions;
On first dielectric layer, form the photoresist layer of patterning;
The non-photosensitive area of etching surface first dielectric layer;
Remove the photoresist layer;
Form second dielectric layer in surfaces of active regions.
2. method according to claim 1 is characterized in that: described first dielectric layer obtains by oxidation growth or chemical vapour deposition (CVD).
3. method according to claim 2 is characterized in that: the described first dielectric layer material is silicon dioxide (SiO
2), a kind of or its combination in the silicon oxynitride (SiON).
4. method according to claim 3 is characterized in that: the described first thickness of dielectric layers value is 5nm～40nm.
5. method according to claim 1 is characterized in that: described second dielectric layer obtains by oxidation growth or chemical vapour deposition (CVD).
6. method according to claim 5 is characterized in that: the described second dielectric layer material is silicon dioxide (SiO
2), a kind of or its combination in the silicon oxynitride (SiON).
7. method according to claim 6 is characterized in that: the described second thickness of dielectric layers value is 5nm～20nm.
8. a cmos image sensor making method for surface media is characterized in that, comprising:
The substrate active area is divided into photosensitive area and non-photosensitive area;
Form dielectric layer in surfaces of active regions;
On dielectric layer, form the photoresist layer of patterning;
The non-photosensitive area surface portion of etching dielectric layer;
Remove the photoresist layer.
9. method according to claim 8 is characterized in that: described dielectric layer obtains by oxidation growth or chemical vapour deposition (CVD).
10. method according to claim 9 is characterized in that: described dielectric layer material is silicon dioxide (SiO
2), a kind of or its combination in the silicon oxynitride (SiON).
11. method according to claim 8 is characterized in that: after the etching, it is 5nm～40nm that described photosensitive area surface media and non-photosensitive area surface media have thickness difference.
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| CNB2006100300162A CN100459105C (en) | 2006-08-11 | 2006-08-11 | Making method for surface media of CMOS image sensor |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102569326A (en) * | 2012-03-07 | 2012-07-11 | 格科微电子（上海）有限公司 | Image sensor and production method thereof |
| CN105702574A (en) * | 2016-01-29 | 2016-06-22 | 中国电子科技集团公司第四十四研究所 | An On-chip integrated device gate medium manufacturing method |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100390822B1 (en) * | 1999-12-28 | 2003-07-10 | 주식회사 하이닉스반도체 | Method for reducing dark current in image sensor |
| US6329233B1 (en) * | 2000-06-23 | 2001-12-11 | United Microelectronics Corp. | Method of manufacturing photodiode CMOS image sensor |
| KR100562667B1 (en) * | 2000-08-31 | 2006-03-20 | 매그나칩 반도체 유한회사 | Image sensor and method for fabricating the same |
| US7095066B2 (en) * | 2004-01-08 | 2006-08-22 | Eastman Kodak Company | Process for making a CMOS image sensor |
| KR100731064B1 (en) * | 2005-12-28 | 2007-06-22 | 동부일렉트로닉스 주식회사 | Method for manufacturing of cmos image sensor |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102569326A (en) * | 2012-03-07 | 2012-07-11 | 格科微电子（上海）有限公司 | Image sensor and production method thereof |
| CN105702574A (en) * | 2016-01-29 | 2016-06-22 | 中国电子科技集团公司第四十四研究所 | An On-chip integrated device gate medium manufacturing method |
| CN105702574B (en) * | 2016-01-29 | 2019-05-17 | 中国电子科技集团公司第四十四研究所 | On piece integrated device gate medium production method |
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Effective date of registration: 20111115 Address after: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Co-patentee after: Semiconductor Manufacturing International (Beijing) Corporation Patentee after: Semiconductor Manufacturing International (Shanghai) Corporation Address before: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Patentee before: Semiconductor Manufacturing International (Shanghai) Corporation |