CN101114621A - Integrated circuit package structure and anti-warp substrates - Google Patents
Integrated circuit package structure and anti-warp substrates Download PDFInfo
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- CN101114621A CN101114621A CN 200610103271 CN200610103271A CN101114621A CN 101114621 A CN101114621 A CN 101114621A CN 200610103271 CN200610103271 CN 200610103271 CN 200610103271 A CN200610103271 A CN 200610103271A CN 101114621 A CN101114621 A CN 101114621A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/4824—Connecting between the body and an opposite side of the item with respect to the body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The invention relates to the sealing structure for an integrated circuit and an anti-warping base plate of the structure. The sealing structure for the integrated circuit mainly comprises a base plate with a slot bore, a wafer, a covering colloid, at least one reinforcing colloid and a plurality of externally positioned terminals, the invention is characterized in that the young modulus of the reinforcing colloid is larger than that of the covering colloid while the curing shrinkage rate of the reinforcing colloid is smaller than that of the covering colloid, the covering colloid is formed on one surface of the base plate and at least covers part of the wafer while the reinforcing colloid protrudes from the other surface of the base plate and is connected with the external connection terminals on the same surface and is formed in the slot bore in order to touch with the wafer. Therefore, the reinforcing colloid is formed in a hidden place in the slot bore in order to increase the thickness of the reinforcing colloid and improve combination of the reinforcing colloid with the base plate, thus improving the anti-warping function of the sealing structure.
Description
Technical field
The present invention relates to a kind of integrated circuit encapsulation technology, particularly relate to a kind of IC circuit packing structure and the anti-warp substrates thereof that can promote anti-warpage ability.
Background technology
In traditional various integrated circuit encapsulation technology, the problem of warpage (warpage) more or less all can be arranged with encapsulating products in encapsulation procedure when the surface engagement.
Seeing also shown in Figure 1ly, is the schematic cross-section that existing known IC circuit packing structure dissects along the minor axis center line.The IC circuit packing structure 100 of this window type ball grid array encapsulation kenel is to carry a wafer 120 with a substrate 110 with slotted eye 111, and it can utilize sticking brilliant material 122 these wafers 120 of adhesion.And, can utilize a plurality of bonding wires 150 to electrically connect the weld pad 121 of these wafers 120 to this substrate 110 by an adhesive body 130 these wafers 120 of coating.In addition, a plurality of external terminals 140 as soldered ball are the belows that are arranged at this substrate 110, engage for outer surface.
Seeing also shown in Figure 2ly, is the existing end face schematic diagram of known IC circuit packing structure before encapsulation.This slotted eye 111 of this substrate 110 is to be formed at a center line 113 of this substrate 110 and to be longer than this wafer 120, the two ends of this slotted eye 111 prolong circulation end 111A and exceed this wafer 120, so this adhesive body 130 cast gate 112 and be formed at the upper surface of this substrate 110 on when pressing mold, more can prolong the lower surface (bottom 131 as shown in Figure 1) that circulation end 111A is formed at this substrate 110, to seal those bonding wires 150 by two ends.Because this adhesive body 130 and its underpart 131 are same encapsulating material, do not have the function of reinforcement.
Seeing also shown in Figure 3ly, is the schematic cross-section that existing known IC circuit packing structure dissects along the major axis center line.Processing procedure behind pressing mold is subjected to the cure shrinkage influence of adhesive body 130, and overall package structure 100 promptly has warping phenomenon, and is special obvious especially in its angularity of hatching line direction of this center line 113.
TaiWan, China patent announcement No. 531859 " combination of electronic packing body " discloses a kind of IC circuit packing structure; one adhesive body (being protective) has two positions of different materials, to reduce the caused bodily form warpage of variations in temperature (being the thermal cycling test of surface engagement).Wherein, two positions of adhesive body all are formed at a substrate (being carrier) and go up and interconnect, and solidified formings can't form in same pressing mold step, so can't solve the warpage issues that the colloid cure shrinkage causes in encapsulation procedure individually.In addition, second position of adhesive body is to be overlapping in first position, and whole IC circuit packing structure has the phenomenon of thickening.
TaiWan, China patent I242850 number " chip package structure " discloses another kind of IC circuit packing structure, goes up to form at a substrate (being support plate) to be provided with an internal layer adhesive body, a fin and an outer adhesive body.Fin covers this internal layer adhesive body, this skin adhesive body be formed at this fin around, wherein, the modulus of this skin adhesive body is higher than the modulus of this internal layer adhesive body, the reinforcing function of this skin adhesive body only is the variation adjustment of modulus.This fin is that the whole coating wafers of a necessary member and palpus are to separate this internal layer adhesive body and this skin adhesive body.In addition, the technological means that does not disclose that this skin adhesive body can be pre-formed or form simultaneously with this internal layer adhesive body, internal layer adhesive body and outer adhesive body all have the warpage issues that cure shrinkage causes in encapsulation procedure.
TaiWan, China patent I231578 number " can prevent the encapsulating structure and the manufacture method thereof of warpage " discloses another kind of IC circuit packing structure, one strenthening member is around on the peripheral region that is fixed in this pairing base lower surface in wafer setting area, and coats this strenthening member with a reinforcing adhesive body.Because the thickness of this reinforcing adhesive body is that lower surface by this substrate is to its maximum rising height, be subject to thickness, shape and the material of this reinforcing adhesive body, this reinforces own reinforcing function of adhesive body and not obvious, thus must false mat one metal or the strenthening member of plastic cement material can reach the effect of preventing warpage in the encapsulation procedure.Yet this strenthening member is the certain area of lower surface that occupies substrate for an add ons again, when the space that is provided with that can influence its external terminal in cellar area, when can influence cutting efficiency outside cellar area.
This shows that above-mentioned existing integrated circuits packaging structure obviously still has inconvenience and defective, and demands urgently further being improved in structure and use.In order to solve the problem of above-mentioned existence, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, but do not see always that for a long time suitable design finished by development, and common product does not have appropriate structure to address the above problem, this obviously is the problem that the anxious desire of relevant dealer solves.Therefore how to found a kind of IC circuit packing structure of new structure, real one of the current important research and development problem that belongs to, also becoming the current industry utmost point needs improved target.
Because the defective that above-mentioned existing integrated circuits packaging structure exists, the inventor is based on being engaged in this type of product design manufacturing abundant for many years practical experience and professional knowledge, and the utilization of cooperation scientific principle, actively studied innovation, in the hope of founding a kind of IC circuit packing structure of new structure, can improve general existing integrated circuits packaging structure, make it have more practicality.Through constantly research, design, and, create the present invention who has practical value finally through after studying sample and improvement repeatedly.
Summary of the invention
Main purpose of the present invention is, overcome the defective that the existing integrated circuits packaging structure exists, and provide a kind of IC circuit packing structure of new structure, technical problem to be solved is that to make its cure shrinkage that utilizes a reinforced type adhesive body to have young's modulus (Young ' s modulus) greater than known covering adhesive body and this reinforced type adhesive body be cure shrinkage less than this covering adhesive body, all can promote anti-warpage performance with the encapsulating products to the different directions warpage; And this reinforced type adhesive body is to be strip, contacts to this wafer via the slotted eye of a substrate and protrudes under this substrate, can reach to strengthen structural strength promoting anti-warpage performance in encapsulation procedure under limited package thickness, thereby be suitable for practicality more.
Of the present invention time a purpose is that a kind of IC circuit packing structure of new structure is provided, and technical problem to be solved is to make its section shape that utilizes the reinforced type adhesive body, can effectively strengthen structural strength, thereby be suitable for practicality more.
Another object of the present invention is to, a kind of IC circuit packing structure of new structure is provided, technical problem to be solved is to make its slotted eye length of utilizing substrate to separate the reinforced type adhesive body and to cover adhesive body, pressing mold forms and can union dyeing when can make the different materials adhesive body, thereby is suitable for practicality more.
Another purpose of the present invention is, a kind of IC circuit packing structure of new structure is provided, technical problem to be solved is to make its change in size of utilizing wafer to separate the reinforced type adhesive body and to cover adhesive body, pressing mold forms and can union dyeing when can make the different materials adhesive body, thereby be suitable for practicality more, and have the value on the industry.
A further object of the present invention is, a kind of IC circuit packing structure of new structure is provided, technical problem to be solved is to make its shaped design of utilizing sticking brilliant material, separates the reinforced type adhesive body and covers adhesive body, and pressing mold forms and can union dyeing when can make the different materials adhesive body.
An also purpose of the present invention is, a kind of IC circuit packing structure of new structure is provided, and technical problem to be solved is to make its cast gate that utilizes substrate design, can help the formation of reinforced type adhesive body.
A further object of the present invention is, a kind of IC circuit packing structure of new structure is provided, and technical problem to be solved is to make it can prevent opening circuit of in thermal cycle test bonding wire.
A present invention also purpose is, a kind of IC circuit packing structure and anti-warp substrates thereof are provided, and technical problem to be solved is to make it except applying to the window type ball grid array encapsulation, more can apply to IC products such as chip package.
The object of the invention to solve the technical problems realizes by the following technical solutions.According to a kind of IC circuit packing structure that the present invention proposes, it comprises: a substrate, and it has a upper surface, a lower surface and at least one slotted eye; One wafer, it is arranged on this upper surface of this substrate, and makes an active surface part of this wafer be revealed in this slotted eye; One covers adhesive body, and it is formed on this upper surface of this substrate and coats the side of this wafer at least; At least one reinforced type adhesive body, the young's modulus of this reinforced type adhesive body is that the cure shrinkage greater than the young's modulus of this covering adhesive body and this reinforced type adhesive body is the cure shrinkage less than this covering adhesive body, and this reinforced type adhesive body is to be strip, and it is to be formed in this slotted eye and this lower surface that contact to this active surface of this wafer appears the surface and protrudes in this substrate; And a plurality of external terminals, it is arranged at this lower surface of this substrate.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
Aforesaid IC circuit packing structure, wherein said reinforced type adhesive body are to have an inverted T-shaped section.
Aforesaid IC circuit packing structure, wherein said reinforced type adhesive body is to have a double T-section.
Aforesaid IC circuit packing structure, the young's modulus of wherein said reinforced type adhesive body is between 20～50GPa, the cure shrinkage of this reinforced type adhesive body is between 0.01～0.1%.
Aforesaid IC circuit packing structure, wherein said substrate are that one major axis center line, this slotted eye are arranged is a longer sides length that is formed on this major axis center line and is shorter than this wafer in definition.
Aforesaid IC circuit packing structure, this active surface area coverage of wherein said wafer be not less than this substrate this upper surface 70 percent so that this IC circuit packing structure becomes a wafer size packaging structure (CSP).
Aforesaid IC circuit packing structure, this upper surface of wherein said substrate are to be formed with a plurality of cast gates of going up, and this lower surface of this substrate is to be formed with a submarine gate, this submarine gate be with those on cast gate be not connected.
Aforesaid IC circuit packing structure, wherein said on those cast gate be the both sides that symmetry is scattered in this submarine gate.
Aforesaid IC circuit packing structure, wherein said covering adhesive body and this reinforced type adhesive body are to form by module array sphere grid array encapsulation (Mold-Array-Package BGA) mode, make this substrate then not have pouring gate structure after cutting.
Aforesaid IC circuit packing structure, it includes a plurality of bonding wires in addition, and it is to electrically connect this wafer and this substrate by this slotted eye, and is sealed by this reinforced type adhesive body.
Aforesaid IC circuit packing structure, it includes the sticking brilliant material of a Window-type in addition, and it is in conjunction with this active surface of this wafer and this upper surface of this substrate, and separates this covering adhesive body and this reinforced type adhesive body.
The object of the invention to solve the technical problems also realizes by the following technical solutions.A kind of anti-warp substrates that is used for IC circuit packing structure according to the present invention's proposition, this substrate has a upper surface, a lower surface and at least one slotted eye and is combined with at least one reinforced type adhesive body, this reinforced type adhesive body is for strip and is embedded in this slotted eye, the young's modulus of this reinforced type adhesive body is between 20～50GPa, and the cure shrinkage of this reinforced type adhesive body is between 0.01～0.1%.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
The aforesaid anti-warp substrates that is used for IC circuit packing structure, wherein said reinforced type adhesive body are to have an inverted T-shaped section.
The aforesaid anti-warp substrates that is used for IC circuit packing structure, wherein said reinforced type adhesive body is to have a double T-section.
The aforesaid anti-warp substrates that is used for IC circuit packing structure, wherein said substrate are that one major axis center line, this slotted eye are arranged is a longer sides length that is formed on this major axis center line and is shorter than this wafer in definition.
The object of the invention to solve the technical problems also realizes in addition by the following technical solutions.According to a kind of IC circuit packing structure that the present invention proposes, it comprises: a substrate, and it has a upper surface, a lower surface and at least one slotted eye; One wafer, it is arranged on this upper surface of this substrate; At least one rigid beam, it has a belly and a head, and this belly is to be narrower than this head and to be embedded in this slotted eye, and this head is this lower surface that exposes to this substrate; And a plurality of external terminals, it is arranged at this lower surface of this substrate.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
Aforesaid IC circuit packing structure, the thickness of wherein said rigid beam are the thickness that is not less than this substrate.
Aforesaid IC circuit packing structure, the young's modulus of wherein said rigid beam are the young's moduluses greater than this substrate.
Aforesaid IC circuit packing structure, wherein said rigid beam are to have a double T-section.
Aforesaid IC circuit packing structure, the young's modulus of wherein said rigid beam is between 20～50GPa.
Aforesaid IC circuit packing structure, wherein said substrate are that one major axis center line, this rigid beam are arranged is to be parallel to this major axis center line in definition.
Aforesaid IC circuit packing structure, wherein said wafer are that chip bonding is in this substrate.
The present invention compared with prior art has tangible advantage and beneficial effect.By above technical scheme as can be known, major technique of the present invention thes contents are as follows:
In order to achieve the above object, the invention provides a kind of IC circuit packing structure, comprise that mainly a substrate, a wafer, cover adhesive body, at least one reinforced type adhesive body and a plurality of external terminal.This substrate is to have a upper surface, a lower surface and at least one slotted eye.This wafer is to be arranged on this upper surface of this substrate, and makes an active surface part of this wafer be revealed in this slotted eye.This covering adhesive body is the side that is formed on this upper surface of this substrate and coats this wafer at least.This reinforced type adhesive body is to be strip, and this reinforced type adhesive body is to be formed in this slotted eye and contact to this active surface of this wafer appears the surface and protrude in this lower surface of this substrate.Those external terminals are these lower surfaces that are arranged at this substrate.Wherein, the young's modulus of this reinforced type adhesive body is that the cure shrinkage greater than the young's modulus of this covering adhesive body and this reinforced type adhesive body is the cure shrinkage less than this covering adhesive body, to promote anti-warpage performance.
In addition, in order to achieve the above object, the present invention provides a kind of IC circuit packing structure of different encapsulation kenels and the anti-warp substrates that is used for this packaging structure in addition.
By technique scheme, IC circuit packing structure of the present invention and anti-warp substrates thereof have following advantage at least:
1, the IC circuit packing structure of the present invention cure shrinkage that utilizes a reinforced type adhesive body to have young's modulus (Young ' s modulus) greater than known covering adhesive body and this reinforced type adhesive body is the cure shrinkage less than this covering adhesive body, all can promote anti-warpage performance with the encapsulating products to the different directions warpage; And this reinforced type adhesive body is to be strip, contacts to this wafer via the slotted eye of a substrate and protrudes under this substrate, can reach to strengthen structural strength promoting anti-warpage performance in encapsulation procedure under limited package thickness, thereby be suitable for practicality more.
2, IC circuit packing structure of the present invention utilizes the section shape of reinforced type adhesive body, can effectively strengthen structural strength, thereby is suitable for practicality more.
3, IC circuit packing structure of the present invention, the slotted eye length of utilizing substrate to be separating the reinforced type adhesive body and to cover adhesive body, and pressing mold forms and can union dyeing when can make the different materials adhesive body, thereby is suitable for practicality more.
4, IC circuit packing structure of the present invention, the change in size of utilizing wafer is to separate the reinforced type adhesive body and to cover adhesive body, pressing mold forms and can union dyeing when can make the different materials adhesive body, thereby is suitable for practicality more, and has the value on the industry.
5, IC circuit packing structure of the present invention utilizes the shaped design of sticking brilliant material, separates the reinforced type adhesive body and covers adhesive body, and pressing mold forms and can union dyeing when can make the different materials adhesive body.
6, IC circuit packing structure of the present invention utilizes the cast gate design of substrate, can help the formation of reinforced type adhesive body.
7, IC circuit packing structure of the present invention can prevent opening circuit of in thermal cycle test bonding wire.
8, IC circuit packing structure of the present invention and anti-warp substrates thereof except applying to the window type ball grid array encapsulation, more can apply to IC products such as chip package, have the extensive value on the industry.
In sum, the invention relates to a kind of IC circuit packing structure, mainly include substrate, the wafer, with slotted eye and cover adhesive body, at least one reinforced type adhesive body and a plurality of external terminal.The young's modulus of this reinforced type adhesive body is that the cure shrinkage greater than the young's modulus of this covering adhesive body and this reinforced type adhesive body is the cure shrinkage less than this covering adhesive body.This covering adhesive body is that go up and local at least this wafer that coats on a surface that is formed at this substrate.This reinforced type adhesive body is another surface that protrudes in this substrate, and it is and the same surface of those external terminals, and be formed in this slotted eye and contact to this wafer.So the hiding position that this reinforced type adhesive body is formed in this slotted eye is to increase the thickness of this reinforced type adhesive body and combining of substrate, the anti-warpage effect that can promote this packaging structure.It has above-mentioned plurality of advantages and practical value, no matter bigger improvement is all arranged on product structure or function, be a significant progress in technology, and produced handy and practical effect, and the outstanding effect that has enhancement than the existing integrated circuits packaging structure, thereby being suitable for practicality more, and having the extensive value of industry, really is a new and innovative, progressive, practical new design.
Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of specification, and for above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, below especially exemplified by preferred embodiment, and conjunction with figs., be described in detail as follows.
Description of drawings
Fig. 1 is the schematic cross-section that existing known IC circuit packing structure dissects along the minor axis center line.
Fig. 2 is the existing end face schematic diagram of known IC circuit packing structure before encapsulation.
Fig. 3 is the schematic cross-section that existing known IC circuit packing structure dissects along the major axis center line.
Fig. 4 is according to the present invention's first specific embodiment, the schematic cross-section that a kind of IC circuit packing structure dissects along the minor axis center line.
Fig. 5 is according to the present invention's first specific embodiment, the end face schematic diagram of this IC circuit packing structure before encapsulation.
Fig. 6 is according to the present invention's first specific embodiment, the schematic bottom view of this IC circuit packing structure before encapsulation.
Fig. 7 is according to the present invention's first specific embodiment, the shape schematic diagram of the sticking brilliant material of this IC circuit packing structure.
Fig. 8 is according to the present invention's first specific embodiment, the schematic cross-section that this IC circuit packing structure dissects along the major axis center line.
Fig. 9 is according to the present invention's second specific embodiment, the schematic cross-section that a kind of IC circuit packing structure dissects along the minor axis center line.
Figure 10 is according to the present invention's second specific embodiment, the schematic perspective view that this IC circuit packing structure dissects along the minor axis center line.
Figure 11 is according to the present invention's the 3rd specific embodiment, a kind of schematic cross-section of anti-warp substrates of IC circuit packing structure.
Figure 12 is according to the present invention's the 3rd specific embodiment, the schematic bottom view of the anti-warp substrates of this IC circuit packing structure.
Figure 13 is according to the present invention's the 3rd specific embodiment, the schematic cross-section of this IC circuit packing structure.
100: IC circuit packing structure 110: substrate
111: slotted eye 111A: prolong the circulation end
112: go up cast gate 113: the major axis center line
120: wafer 121: weld pad
122: glutinous brilliant material 130: adhesive body
131: bottom 140: external terminal
150: bonding wire 200: IC circuit packing structure
210: substrate 211: upper surface
212: lower surface 213: slotted eye
214: major axis center line 215: go up cast gate
216: the submarine gate 220: wafer
221: active surface 222: the back side
223: side 224: weld pad
230: cover adhesive body 240: the reinforced type adhesive body
250: external terminal 260: Window-type sticks brilliant material
261: sealing opening 270: bonding wire
300: IC circuit packing structure 310: substrate
311: upper surface 312: lower surface
313: slotted eye 320: wafer
321: active surface 322: the back side
323: side 324: weld pad
330: cover adhesive body 340: the reinforced type adhesive body
350: external terminal 360: Window-type sticks brilliant material
370: bonding wire 400: IC circuit packing structure
410: substrate 411: upper surface
412: lower surface 413: slotted eye
414: slotted eye 415: the projection connection pad
416: ball pad 420: wafer
421: projection 430: rigid beam
431: belly 432: head
440: external terminal 450: adhesive body
Embodiment
Reach technological means and the effect that predetermined goal of the invention is taked for further setting forth the present invention, below in conjunction with accompanying drawing and preferred embodiment, to its embodiment of IC circuit packing structure, structure, feature and the effect thereof that foundation the present invention proposes, describe in detail as after.
See also Fig. 4 to shown in Figure 8, relate to first specific embodiment of the present invention, it has disclosed a kind of IC circuit packing structure.This IC circuit packing structure 200 is to can be window type ball grid array encapsulation (Window BGA package), comprises that mainly a substrate 210, a wafer 220, cover adhesive body 230, at least one reinforced type adhesive body 240 and a plurality of external terminal 250.
This substrate 210 is as the IC support plate and have the circuit pattern of electrical transmission, and this substrate 210 is to be a printed circuit board (PCB) or pliability circuit film usually.This substrate 210 is to have a upper surface 211, a lower surface 212 and at least one slotted eye 213, this upper surface 211 is as sticking crystal face, this lower surface 212 is the surface engagement faces that are electrically connected as externally, and this slotted eye 213 is to run through this upper surface 211 also to be long and narrow with this lower surface 212.As Fig. 5 and shown in Figure 6, in one embodiment, this substrate 210 is generally rectangular, this substrate 210 is that definition has a major axis center line 214, this slotted eye 213 is to be formed on this major axis center line 214 (or being parallel to this major axis center line 214) and for shortening design, make this slotted eye 213 be shorter than a longer sides length of this wafer 220, therefore, be arranged at when this wafer 220 on this upper surface 211 of this substrate 210, this wafer 220 is to hide whole slotted eye 213, can avoid the union dyeing (being detailed later) of this covering adhesive body 230 and this reinforced type adhesive body 240; Under the utilization of another embodiment, the size that can strengthen the size of this wafer 220 or dwindle this substrate 210, active surface 221 area coverages that make this wafer 220 be can be not less than this substrate 210 this upper surface 211 70 percent, so that this IC circuit packing structure 200 becomes a wafer 220 size packaging structures (CSP), also can reach the purpose that this wafer 220 hides whole slotted eye 213.
As Fig. 4, Fig. 5, Fig. 6 and shown in Figure 8, this wafer 220, have an active surface 221, an opposing backside surface 222 and a plurality of side 223 between this active surface 221 and this back side 222, wherein various integrated circuit component (not drawing among the figure) is to be formed at this active surface 221 with a plurality of weld pads 224.Again as shown in Figure 4, make that by the sticking brilliant material 260 of a Window-type this wafer 220 is to be arranged on this upper surface 211 of this substrate 210, the glutinous brilliant material 260 of this Window-type can be the B rank glue-line of biadhesive film (as the PI adhesive tape) or printing formation, with in conjunction with the active surface 221 of this wafer 220 and this upper surface 211 of this substrate 210, and make these active surface 221 parts of this wafer 220 be revealed in this slotted eye 213 (as shown in Figure 6).In the present embodiment, those weld pads 224 also are revealed in this slotted eye 213.Wherein, as shown in Figure 7, the glutinous brilliant material 260 of this Window-type is to have a sealing opening 261, and rough alignment is in this slotted eye 213, to separate this covering adhesive body 230 and this reinforced type adhesive body 240.
Shown in the 4th and 8 figure, this covers adhesive body 230, is those sides 223 that are formed on this upper surface 211 of this substrate 210 and coat this wafer 220 at least.In the present embodiment, this covering adhesive body 230 more coats the back side 222 of this wafer 220.Can utilize compression molding techniques to form this covering adhesive body 230.As shown in Figure 5, this upper surface 211 of this substrate 210 can form and be provided with a plurality of cast gates 215 (upper gate) of going up, and covers the injection of adhesive body 230 for this.Though cast gate 215 is illustrated in this substrate 210 inside as shown in Figure 5 on those, yet according to encapsulation form difference, cast gate 215 also can be formed at outside this substrate 210 on those.
Shown in the 4th and 8 figure, this reinforced type adhesive body 240, be to be strip, and this reinforced type adhesive body 240 is to be formed in this slotted eye 213 and contact to this active surface 221 of this wafer 220 appears the surface and protrude in this lower surface 212 of this substrate 210, so the thickness of this reinforced type adhesive body 240 is by this active surface 221 of this wafer 220 protuberate that exposes to this reinforced type adhesive body 240.And, the young's modulus of this reinforced type adhesive body 240 (Young ' s modulus) is the young's modulus greater than this covering adhesive body 230, and the cure shrinkage of this reinforced type adhesive body 240 is the cure shrinkages less than this covering adhesive body 230, has the function of anti-warpage so this reinforced type adhesive body 240 utilizes its thickness and material behavior.Therefore, compared to existing known girth member or the reinforcing colloid that only is pasted on substrate 210 lower surfaces 212, under limited total packaging height condition, the thickness of this reinforced type adhesive body 240 can be greater than the thickness of this substrate 210, and this reinforced type adhesive body 240 has the big bonded area to this substrate 210, obviously has the anti-warpage of this substrate 210 is promoted effect (as shown in Figure 8).
In addition, those external terminals 250 are these lower surfaces 212 that are arranged at this substrate 210.Those external terminals 250 are to can be soldered ball, tin cream or other externally electrical joint element.
In the present embodiment, the young's modulus of this reinforced type adhesive body 240 is between 20～50GPa, and the cure shrinkage of this reinforced type adhesive body 240 is between 0.01～0.1%.The young's modulus of traditional adhesive body and covering adhesive body 230 of the present invention then is about 10～25GPa, and its cure shrinkage is between 0.1～0.2%.Young's modulus (Young ' s modulus) is for the ratio of normal stress and forward strain, can produce the forward strain when material bears normal stress.Under the normal stress of a fixed value, the big more represented young's modulus of forward strain value is more little.For example, the young's modulus of rubber is about 0.01～0.1GPa, and the young's modulus of diamond is about more than the 1000GPa.Because the young's modulus of reinforced type adhesive body 240 of the present invention is (between 20～50GPa) young's moduluses greater than traditional adhesive body and covering adhesive body 230 of the present invention, be horizontally set with the lower surface 212 that protrudes in this substrate 210 again, therefore have the effect of rigid beam.More particularly, the young's modulus of this reinforced type adhesive body 240 is can be between 25～30GPa, and it is the rigidity near strong concrete, helps to promote the reliability of this IC circuit packing structure 200 thermal cycling test behind upper plate.
In order to illustrate that this reinforced type adhesive body 240 is for specifically implementing, further specify in the present embodiment, this covering adhesive body 230 is epoxy mould closure material (the Epoxy Molding Compound that can be different proportionings with this reinforced type adhesive body 240, EMC), and pressing mold forms simultaneously, can reduce fabrication steps.As shown in Figure 6, this lower surface 212 of this substrate 210 is to form to be provided with a submarine gate 216 (lowergate), for the injection of this reinforced type adhesive body 240.Yet according to encapsulation form difference, this submarine gate 216 also can be formed at outside this substrate 210.Wherein, this submarine gate 216 should not be connected with cast gate on those 215.Please consult shown in Figure 5 again, cast gate 215 can symmetrical be scattered in the both sides of this submarine gate 216 on those, utilize on those cast gate 215 and this submarine gate 216 in quantity and locational variation, reach two kinds of different colloids of consumption difference and material and have consistent mould stream filling speed, can in same pressing mold processing procedure, inject this covering adhesive body 230 and this reinforced type adhesive body 240 simultaneously, not have union dyeing and fill out discontented problem.
As shown in Figure 4, preferably, this IC circuit packing structure 200 includes a plurality of bonding wires 270 in addition, and it is to refer to being connected of this substrate 210 by those weld pads 224 that this slotted eye 213 electrically connects this wafer 220, and is sealed by this reinforced type adhesive body 240.Utilize this reinforced type adhesive body 240 can further prevent opening circuit of in thermal cycle test those bonding wires 270.
Please consult shown in Figure 4ly again, preferably, this reinforced type adhesive body 240 is to have an inverted T-shaped section, utilizes the shape of this reinforced type adhesive body 240 can make this reinforced type adhesive body 240 have the enhancement effect of anti-warpage.
See also Fig. 9 and shown in Figure 10, Fig. 9 is according to the present invention's second specific embodiment, and the schematic cross-section that a kind of IC circuit packing structure dissects along the minor axis center line, Figure 10 are the schematic perspective views that dissects along the minor axis center line.In the second embodiment of the present invention, disclosed another kind of IC circuit packing structure 300, comprise that mainly a substrate 310, a wafer 320, cover adhesive body 330, at least one reinforced type adhesive body 340 and a plurality of external terminal 350.
This reinforced type adhesive body 340 can have a double T-section, has the enhancement effect of anti-warpage.In addition, substrate 310, wafer 320, covering adhesive body 330, external terminal 350 and bonding wire 370 are roughly the same with the element of first embodiment.
This substrate 310 has a upper surface 311, a lower surface 312 and at least one slotted eye 313.Can make this wafer 320 by the sticking brilliant material 360 of a Window-type is to be arranged on this upper surface 311 of this substrate 310, and makes an active surface 321 parts of this wafer 320 be revealed in this slotted eye 313.
Those bonding wires 370 are to refer to (not drawing among the figure) by the weld pad that this slotted eye 313 electrically connects this wafer 320 with being connected of this substrate 310.
This covers adhesive body 330, is the side 323 that is formed on this upper surface 311 of this substrate 310 and coats this wafer 320.
This reinforced type adhesive body 340 is to be strip, and this reinforced type adhesive body 340 is to be formed in this slotted eye 313 and contact to this active surface 321 of this wafer 320 appears the surface and protrude in this lower surface 312 of this substrate 310.
Those external terminals 350 are these lower surfaces 312 that are arranged at this substrate 310.And the young's modulus of this reinforced type adhesive body 340 is the young's moduluses greater than this covering adhesive body 330, and the cure shrinkage of this reinforced type adhesive body 340 is the cure shrinkages less than this covering adhesive body 330.Yet this covering adhesive body 330 is not need to cover the back side 322 of this wafer 320 according to the product design difference; The projecting height of this reinforced type adhesive body 340 can need not exceed those external terminals 350, promptly has the thickness that is not less than this substrate 310, and cooperates the shape of its double T-section, can bring into play optimal anti-warpage and promote effect.
In addition, in the present embodiment, this covering adhesive body 330 is to form by module array sphere grid array encapsulation (Mold-Array-Package BGA) mode with this reinforced type adhesive body 340, promptly go up the garbage area (outside the cellular zone of substrate) that the submarine gate is located at a substrate strip, the covering adhesive body 330 of adjacent packaging structure 300 is that one connects before cutting when pressing mold, and the two ends of the reinforced type adhesive body 340 of adjacent packaging structure 300 also are that one connects before cutting, so this substrate 310 does not then have pouring gate structure after cutting.
See also Figure 11 and shown in Figure 12, Figure 11 is that a kind of schematic cross-section of anti-warp substrates of IC circuit packing structure, Figure 12 are schematic bottom view according to the present invention's the 3rd specific embodiment.In the third embodiment of the present invention, disclose IC circuit packing structure that a kind of different encapsulation kenels are arranged and the anti-warp substrates that is used for this packaging structure.A kind of anti-warp substrates 410 can be combined with at least one rigid beam 430 earlier before encapsulation, this substrate 410 has a upper surface 411, a lower surface 412 and at least one slotted eye 413,414.In the present embodiment, slotted eye 413 that is positioned at these substrate 410 central authorities and two slotted eyes 414 that are positioned at these substrate 410 sides are arranged, this upper surface 411 is to be formed with plurality of bump connection pad 415, this lower surface 412 is to be formed with a plurality of ball pads 416, and makes those projection connection pads 415 be electrically connected to corresponding ball pad 416 by the internal wiring structure of this substrate 410.In the present embodiment, this substrate 410 can be a flexible base plate.
Those rigid beams 430 are for strip and be embedded in those slotted eyes 413,414, and the young's modulus of those rigid beams 430 is between 20～50GPa.And the material of those rigid beams 430 can with the identical or rigid material of other different materials of material of the reinforced type adhesive body of the foregoing description, when those rigid beams 430 are to be a kind of reinforced type adhesive body, then the cure shrinkage of those rigid beams 430 should be between 0.01～0.1%.Each rigid beam 430 is to have a belly 431 and an at least one head 432, and this belly 431 is to be narrower than this head 432 and to be embedded in the corresponding slotted eye 413, and this head 432 is these lower surfaces 412 that expose to this substrate 410.In the present embodiment, each rigid beam 430 is to have a double T-section, has two heads up and down so as rail, to rabbet this substrate 410.Usually the thickness of each rigid beam 430 is to be not less than this substrate 410.The young's modulus of those rigid beams 430 is preferable with the young's modulus greater than this substrate 410 again.As shown in figure 12, this substrate 410 be definition one major axis center line, the rigid beam 430 at central slotted eye 413 places are arranged is to be formed on this major axis center line, the rigid beam 430 at both sides slotted eye 414 places is to be parallel to this major axis center line.Therefore, utilize those rigid beams 430 can promote the anti-warpage effect of these substrate 410 longer sides of opposing to warpage.
See also shown in Figure 13, this anti-warp substrates 410 is the IC circuit packing structures 400 that can apply to the flip chip type attitude, one wafer 420 is that chip bonding is on this upper surface 411 of this substrate 410, utilize reflow, hot pressing, ultrasonic waves bonding, NCP (non-conductive adhesive) to engage or Flip Chip such as anisotropic conductive joint, make the plurality of bump 421 of this wafer 420 be electrically connected to those projection connection pads 415 of this substrate 410.And can utilize adhesive body 450 to seal those projections 415 just like underfill, NCP, ACF etc.In addition, a plurality of external terminals 440 as soldered ball are those ball pads 416 that can be engaged in this substrate 410.Therefore, utilize the higher young's modulus and the interlocking shape of those rigid beams, have the enhancement effect of the anti-warpage of these substrate 410 longer sides.
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the technology contents that can utilize above-mentioned announcement is made a little change or is modified to the equivalent embodiment of equivalent variations, in every case be the content that does not break away from technical solution of the present invention, according to technical spirit of the present invention to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solution of the present invention.
Claims (22)
1. IC circuit packing structure is characterized in that it comprises:
One substrate, it has a upper surface, a lower surface and at least one slotted eye;
One wafer, it is arranged on this upper surface of this substrate, and makes an active surface part of this wafer be revealed in this slotted eye;
One covers adhesive body, and it is formed on this upper surface of this substrate and coats the side of this wafer at least;
At least one reinforced type adhesive body, the young's modulus of this reinforced type adhesive body is that the cure shrinkage greater than the young's modulus of this covering adhesive body and this reinforced type adhesive body is the cure shrinkage less than this covering adhesive body, and this reinforced type adhesive body is to be strip, and it is to be formed in this slotted eye and this lower surface that contact to this active surface of this wafer appears the surface and protrudes in this substrate; And
A plurality of external terminals, it is arranged at this lower surface of this substrate.
2. IC circuit packing structure according to claim 1 is characterized in that wherein said reinforced type adhesive body is to have an inverted T-shaped section.
3. IC circuit packing structure according to claim 1 is characterized in that wherein said reinforced type adhesive body is to have a double T-section.
4. IC circuit packing structure according to claim 1, the young's modulus that it is characterized in that wherein said reinforced type adhesive body is between 20～50GPa, the cure shrinkage of this reinforced type adhesive body is between 0.01～0.1%.
5. IC circuit packing structure according to claim 1 is characterized in that wherein said substrate is that one major axis center line, this slotted eye are arranged is a longer sides length that is formed on this major axis center line and is shorter than this wafer in definition.
6. IC circuit packing structure according to claim 1, this active surface area coverage that it is characterized in that wherein said wafer be not less than this substrate this upper surface 70 percent so that this IC circuit packing structure becomes a wafer size packaging structure (CSP).
7. IC circuit packing structure according to claim 1, this upper surface that it is characterized in that wherein said substrate is to be formed with a plurality of cast gates of going up, and this lower surface of this substrate is to be formed with a submarine gate, this submarine gate be with those on cast gate be not connected.
8. IC circuit packing structure according to claim 7, it is characterized in that wherein said on those cast gate be the both sides that symmetry is scattered in this submarine gate.
9. IC circuit packing structure according to claim 1, it is characterized in that wherein said covering adhesive body and this reinforced type adhesive body are to form by module array sphere grid array encapsulation (Mold-Array-Package BGA) mode, make this substrate then not have pouring gate structure after cutting.
10. IC circuit packing structure according to claim 1 is characterized in that it includes a plurality of bonding wires in addition, and it is to electrically connect this wafer and this substrate by this slotted eye, and is sealed by this reinforced type adhesive body.
11. IC circuit packing structure according to claim 1 is characterized in that it includes the sticking brilliant material of a Window-type in addition, it is in conjunction with this active surface of this wafer and this upper surface of this substrate, and separates this covering adhesive body and this reinforced type adhesive body.
12. anti-warp substrates that is used for IC circuit packing structure, it is characterized in that this substrate has a upper surface, a lower surface and at least one slotted eye and is combined with at least one reinforced type adhesive body, this reinforced type adhesive body is for strip and is embedded in this slotted eye, the young's modulus of this reinforced type adhesive body is between 20～50GPa, and the cure shrinkage of this reinforced type adhesive body is between 0.01～0.1%.
13. the anti-warp substrates that is used for IC circuit packing structure according to claim 12 is characterized in that wherein said reinforced type adhesive body is to have an inverted T-shaped section.
14. the anti-warp substrates that is used for IC circuit packing structure according to claim 12 is characterized in that wherein said reinforced type adhesive body is to have a double T-section.
15. the anti-warp substrates that is used for IC circuit packing structure according to claim 12 is characterized in that wherein said substrate is that one major axis center line, this slotted eye are arranged is a longer sides length that is formed on this major axis center line and is shorter than this wafer in definition.
16. an IC circuit packing structure is characterized in that it comprises:
One substrate, it has a upper surface, a lower surface and at least one slotted eye;
One wafer, it is arranged on this upper surface of this substrate;
At least one rigid beam, it has a belly and a head, and this belly is to be narrower than this head and to be embedded in this slotted eye, and this head is this lower surface that exposes to this substrate; And
A plurality of external terminals, it is arranged at this lower surface of this substrate.
17. IC circuit packing structure according to claim 16, the thickness that it is characterized in that wherein said rigid beam are the thickness that is not less than this substrate.
18. IC circuit packing structure according to claim 16, the young's modulus that it is characterized in that wherein said rigid beam are the young's moduluses greater than this substrate.
19. IC circuit packing structure according to claim 16 is characterized in that wherein said rigid beam is to have a double T-section.
20. IC circuit packing structure according to claim 16, the young's modulus that it is characterized in that wherein said rigid beam is between 20～50GPa.
21. IC circuit packing structure according to claim 16 is characterized in that wherein said substrate is that one major axis center line, this rigid beam are arranged is to be parallel to this major axis center line in definition.
22. IC circuit packing structure according to claim 16 is characterized in that wherein said wafer is that chip bonding is in this substrate.
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| CN 200610103271 CN100578765C (en) | 2006-07-24 | 2006-07-24 | Integrated circuit package structure |
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| CN 200610103271 CN100578765C (en) | 2006-07-24 | 2006-07-24 | Integrated circuit package structure |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103747620A (en) * | 2013-12-31 | 2014-04-23 | 苏州米达思精密电子有限公司 | Preparation method of local binderless reinforce panel |
| CN109192660A (en) * | 2018-09-12 | 2019-01-11 | 三星半导体(中国)研究开发有限公司 | Flexible package part |
| CN114675478A (en) * | 2020-12-24 | 2022-06-28 | 中强光电股份有限公司 | Wavelength conversion module and projector |
| CN114675480A (en) * | 2020-12-24 | 2022-06-28 | 中强光电股份有限公司 | Wavelength conversion module and projector |
-
2006
- 2006-07-24 CN CN 200610103271 patent/CN100578765C/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103747620A (en) * | 2013-12-31 | 2014-04-23 | 苏州米达思精密电子有限公司 | Preparation method of local binderless reinforce panel |
| CN103747620B (en) * | 2013-12-31 | 2018-09-11 | 苏州中拓专利运营管理有限公司 | A kind of preparation method of reinforcing chip of the part without glue |
| CN109192660A (en) * | 2018-09-12 | 2019-01-11 | 三星半导体(中国)研究开发有限公司 | Flexible package part |
| CN114675478A (en) * | 2020-12-24 | 2022-06-28 | 中强光电股份有限公司 | Wavelength conversion module and projector |
| CN114675480A (en) * | 2020-12-24 | 2022-06-28 | 中强光电股份有限公司 | Wavelength conversion module and projector |
| US11714344B2 (en) | 2020-12-24 | 2023-08-01 | Coretronic Corporation | Wavelength conversion module and projector |
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|---|---|
| CN100578765C (en) | 2010-01-06 |
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