CN101102122B - A frequency deviation estimation device and its method - Google Patents

Abstract

The invention is concerned with the estimating equipment of the frequency deviation and the method. It includes that obtain two time slot of the training sequence data from the receiving data; the conjugation of one of the training sequence transposes to the other ones product; and calculate the frequency deviation by the product. It improves the precision for estimating the TD-SCDMA terminal frequency deviation.

Description

A kind of frequency deviation estimation device and method

Technical field

The invention belongs to the mobile communication technology field, particularly relate to a kind of frequency deviation estimation device and method that is used for TD SDMA (TD-SCDMA) terminal.

Background technology

In wireless communication system, there is certain frequency departure all the time between carrier frequency and the local crystal oscillator.Have only as far as possible to estimate this frequency departure accurately, just can carry out frequency departure adjustment/compensation, reach the frequency departure that receiver can be accepted, thereby carry out data demodulates.The accuracy of frequency offset estimating will directly have influence on demodulation performance, and especially the demodulation influence to the signal (for example 16QAM, 64QAM) of high order modulation is bigger.So how can estimate this frequency departure fast and effectively, fast and accurately frequency departure is adjusted then, be the key component that is directly connected to communication speed and quality in the moving communicating field.

Current, as to use in TD-SCDMA system frequency deviation estimating method mainly contains following two kinds:

1, utilize descending synchronous code (SYNC-DL) to carry out frequency offset estimating: because the SYNC-DL code length has only 64 chips (chips), the phase difference that frequency deviation produces is less, thereby can only realize the rough estimate of frequency deviation, estimated accuracy＜10 ³Hz.

2, the signal that utilizes joint-detection to demodulate carries out frequency offset estimating: because data are positioned at the two ends of training sequence (Midamble) sign indicating number, data break is greater than 144chips, owing to the phase difference that frequency deviation is introduced is apparent in view, thereby can obtain high estimation accuracy＜10 ²Hz.But this method need be carried out joint-detection, and then carries out frequency offset estimating.When if joint-detection is exclusively used in frequency offset estimating, expense can be very big.And, the demand the when estimated accuracy of this method still can not satisfy high order modulation fully.

Summary of the invention

Technical problem to be solved by this invention provides a kind of frequency deviation estimation device and method, to improve the precision of frequency offset estimating in the TD-SCDMA terminal, reduces the operand of frequency offset estimating.

For solving the problems of the technologies described above, it is as follows to the invention provides technical scheme:

A kind of frequency deviation estimating method is used for the TD-SCDMA terminal, comprising:

From frame data that receive, obtain the training sequence data of two time slots;

Amassing of the conjugate transpose of a training sequence in two training sequences that calculating is obtained and another one training sequence;

Long-pending calculated rate deviation according to described training sequence.

Preferably, described two time slots are two full time slots that same downlink business takies.

Preferably, described two time slots are two non-full time slots that same downlink business takies, and described downlink business takies the identical code channel of these two non-full time slots, and other code channel is empty.

Preferably, from the training sequence segment data of described two time slots, extract back 128 chip data respectively as corresponding training sequence data.

Preferably, adopt following formula calculated rate deviation:

$v=\frac{1}{2\mathrm{\πkN}{T}_c}\·\mathrm{phase}\left(C\right),$ Wherein, v is a frequency departure, and k is the distance of two time slots, and N is the number of chips of a time slot, T _cBe chip period, C is the long-pending of described training sequence, and phase (C) is the phase place of C.

A kind of frequency deviation estimation device is used for the TD-SCDMA terminal, comprising:

At least one data pick-up device is used for from frame data that receive, and obtains the training sequence data of two time slots and outputs to bit correlator;

A pair of bit correlator is used for calculating the conjugate transpose of a training sequence and the amassing of another one training sequence of two training sequences that obtain, and outputs to the frequency offset calculation device;

One frequency offset calculation device is used for the long-pending calculated rate deviation according to described training sequence.

Preferably, comprise two data withdrawal devices, be respectively applied for from frame data that receive, obtain the training sequence data of a time slot and output to bit correlator.

Preferably, described data pick-up device is further used for extracting back 128 chip data respectively as corresponding training sequence data from the training sequence segment data of described two time slots.

Preferably, the frequency offset calculation device adopts following formula calculated rate deviation:

$v=\frac{1}{2\mathrm{\πkN}{T}_c}\·\mathrm{phase}\left(C\right),$ Wherein, v is a frequency departure, and k is the distance of two time slots, and N is the number of chips of a time slot, T _cBe chip period, C is the long-pending of described training sequence, and phase (C) is the phase place of C.

Compared with prior art, the invention has the beneficial effects as follows:

The present invention utilizes the Midamble sign indicating number of two downlink business time slots to carry out frequency offset estimating, because data break is big, thereby can reach very high estimated accuracy 10 ¹Hz; Owing to do not need to carry out joint-detection, thereby its operand frequency deviation estimating method after the joint-detection.

Like this, by the accuracy of raising frequency offset estimating, thereby can improve demodulation performance, especially the demodulation performance under the high order modulation.

Description of drawings

Fig. 1 is the frequency deviation estimating method flow chart of preferred embodiment of the present invention;

Fig. 2 is the frequency deviation estimation device structure chart of preferred embodiment of the present invention.

Embodiment

For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with the accompanying drawings and the specific embodiments, describe the present invention in detail with the example that is applied as of the present invention in the TD-SCDMA terminal.

The present invention utilizes the Midamble reception data of two downlink business time slots to carry out frequency offset estimating, and be applicable to: a user (UE) takes the business of two or more time slots simultaneously; Perhaps a user's downlink business takies the identical code channel of two non-full time slots, and other code channel is empty situation.

Basic principle is as follows:

When not having frequency deviation, the Midamble data that receive can be expressed as:

R＝GH+n (1)

Wherein, R is that Midamble receives data, and G is the transition matrix that basic Midamble sign indicating number constitutes, and H is a channel impulse response, and n is a white noise.

Here,

R＝[r ₁，r ₂，…，r ₁₂₈] ^H

$G=\left[\begin{array}{ccccc}{m}_1& m_{128}& m_{127}& \·\·\·& m_2\\ m_2& m_1& m_{128}& \·\·\·& m_3\\ m_3& m_2& m_1& \·\·\·& m_4\\ \·& \·& \·& \·& \·\\ \·& \·& \·& \·& \·\\ \·& \·& \·& \·& \·\\ m_{128}& m_{127}& m_{126}& \·\·\·& m_1\end{array}\right]$

H＝[h ₁，h ₂，…，h ₁₂₈] ^H

n＝[n ₁，n ₂，…，n ₁₂₈] ^H

Ignore The noise, formula (1) can be reduced to

R＝GH (2)

When not having frequency deviation, the Midamble of two full time slots of a user receives data and equates; Take the identical code channel of two non-full time slots for a user's downlink business, and other code channel is empty situation, the Midamble of these two non-full time slots receives data and also equates.

Received signal when existing frequency departure to be v is expressed as respectively so:

R1＝ФR(3)

$R2=e^{j2\mathrm{\πkN}{T}_{c}v}\·\mathrm{\ΦR}---\left(4\right)$

Here, Ф=diag[exp (j2 π vT _c.1), exp (j2 π vT _c2) ..., exp (j2 π vT _c.127), exp (j2 π vT _c128)], T _cBe chip period, N is the number of chips of a time slot, and in the TD-SCDMA system, N=864, k are the distance of two time slots, for example, when two time slots are adjacent, k=1.

Can obtain by formula (3) and formula (4):

$C={R1}^{H}R2$

$={\left(\mathrm{\ΦR}\right)}^H\·e^{j2\mathrm{\πkN}{T}_{c}v}\·\mathrm{\ΦR}---\left(5\right)$

$=e^{j2\mathrm{\πkN}{T}_{c}v}\·\left|\right|R\left|\right|$

Thus, can be in the hope of frequency deviation:

$v=\frac{1}{2\mathrm{\πkN}{T}_c}\·\mathrm{phase}\left(C\right)---\left(6\right)$

Wherein, phase (C) is the phase place of C.

Based on above analysis, please refer to Fig. 1, the frequency deviation estimating method of preferred embodiment of the present invention comprises the steps:

Step 101, from frame data that receive, obtain the training sequence data of two time slots;

In this step, from the Midamble segment data that receives, extract the training sequence data that back 128chips data are used as corresponding time slot, be designated as respectively:

R1＝[r1 ₁，r1 ₂，...，r1 ₁₂₈]′(7)

R2＝[r2 ₁，r2 ₂，...，r2 ₁₂₈]′(8)

Amassing of step 102, the conjugate transpose that calculates a training sequence in described two training sequences and another one training sequence;

C＝R1 ^HR2 (9)

Step 103, according to the long-pending calculated rate deviation of described training sequence.

In this step, adopt following formula calculated rate deviation:

$v=\frac{1}{2\mathrm{\πkN}{T}_c}\·\mathrm{phase}\left(C\right)---\left(10\right)$

Please refer to Fig. 2, the frequency deviation estimation device of preferred embodiment of the present invention comprises: data pick-up device, to bit correlator and frequency offset calculation device.

Two data withdrawal devices have been shown among Fig. 2, be respectively applied for from frame data that receive, obtains the training sequence data of a time slot and output to, but the present invention is not limited to this bit correlator, also can adopt a data withdrawal device finish two time slots training sequence obtain operation.

Particularly, the data pick-up device extracts back 128chips data respectively as corresponding training sequence data from the Midamble segment data of described two time slots.In addition, two time slots that provide among the figure are adjacent, but the present invention also is not limited thereto, and utilize two non-conterminous time slots can finish frequency offset estimating too.

Bit correlator is calculated the conjugate transpose of a training sequence in described two training sequences and amassing of another one training sequence, and output to the frequency offset calculation device.

The frequency offset calculation device is according to the long-pending calculated rate deviation of described training sequence, and particularly, the frequency offset calculation device adopts formula (6) to come the calculated rate deviation.

For frequency deviation estimation device among the present invention and method, UE of minimum needs accounts for two descending business time-slots simultaneously, but be not limited to only account for two downlink business time slots, when surpassing two descending business time-slots, can obtain frequency deviation value respectively in twos, last again by the average frequency offset estimating value that gets to the end.

Should be noted that at last, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not breaking away from the spiritual scope of technical solution of the present invention, it all should be encompassed in the middle of the claim scope of the present invention.

Claims (5)

1. a frequency deviation estimating method is used for TD SDMA TD-SCDMA terminal, it is characterized in that, comprising:

From frame data that receive, obtain the training sequence data of two time slots, wherein, described two time slots are two full time slots that same downlink business takies, perhaps, described two time slots are two non-full time slots that same downlink business takies, and described downlink business takies the identical code channel of these two non-full time slots, and other code channel is empty;

Amassing of the conjugate transpose of a training sequence in two training sequences that calculating is obtained and another one training sequence;

According to the long-pending calculated rate deviation of described training sequence, wherein, specifically adopt following formula calculated rate deviation:

$v=\frac{1}{2\mathrm{\πk}{\mathrm{NT}}_c}\·\mathrm{phase}\left(C\right),$ Wherein, v is a frequency departure, and k is the distance of two time slots, and N is the number of chips of a time slot, T _cBe chip period, C is the long-pending of described training sequence, and phase (C) is the phase place of C.

2. frequency deviation estimating method as claimed in claim 1 is characterized in that:

From the training sequence segment data of described two time slots, extract back 128 chip data respectively as corresponding training sequence data.

3. a frequency deviation estimation device is used for the TD-SCDMA terminal, it is characterized in that, comprising:

At least one data pick-up device, be used for from frame data that receive, obtain the training sequence data of two time slots and output to bit correlator, wherein, described two time slots are two full time slots that same downlink business takies, and perhaps, described two time slots are two non-full time slots that same downlink business takies, described downlink business takies the identical code channel of these two non-full time slots, and other code channel is empty;

A pair of bit correlator is used for calculating the conjugate transpose of a training sequence and the amassing of another one training sequence of two training sequences that obtain, and outputs to the frequency offset calculation device;

One frequency offset calculation device is used for the long-pending calculated rate deviation according to described training sequence, wherein, specifically adopts following formula calculated rate deviation:

$v=\frac{1}{2\mathrm{\πk}{\mathrm{NT}}_c}\·\mathrm{phase}\left(C\right),$ Wherein, v is a frequency departure, and k is the distance of two time slots, and N is the number of chips of a time slot, T _cBe chip period, C is the long-pending of described training sequence, and phase (C) is the phase place of C.

4. frequency deviation estimation device as claimed in claim 3 is characterized in that:

Comprise two data withdrawal devices, be respectively applied for from frame data that receive, obtain the training sequence data of a time slot and output to bit correlator.

5. frequency deviation estimation device as claimed in claim 3 is characterized in that:

Described data pick-up device is further used for extracting back 128 chip data respectively as corresponding training sequence data from the training sequence segment data of described two time slots.

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