CN101101734A - Output buffer suitable for gray scale regulation voltage source - Google Patents
Output buffer suitable for gray scale regulation voltage source Download PDFInfo
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- CN101101734A CN101101734A CNA2006101013606A CN200610101360A CN101101734A CN 101101734 A CN101101734 A CN 101101734A CN A2006101013606 A CNA2006101013606 A CN A2006101013606A CN 200610101360 A CN200610101360 A CN 200610101360A CN 101101734 A CN101101734 A CN 101101734A
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- amplifier
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- output buffer
- gray scale
- voltage source
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Abstract
This buffer is applied in the grayness regulation voltage supply (GRVS) of plane displayer, e.g. LCD. GRVS is used as a norm voltage during converting digital data into corresponding grayness regulation voltage. This output buffer consists of the difference amplifier (DA), the power amplifier (PA) and the feedback net (FN). Here, the positive input end of DA connects to GRVS while the negative input end of DA to the second end of FN. The output end of DA connects to the input end of PA. The output end of PA connects to the first end of FN. As a buffered voltage of GRVS, the output of PA is used as a norm voltage.
Description
Technical field
The present invention is relevant for a kind of output buffer, and is particularly to the output buffer of a kind of gray scale adjustment (gray-scale) voltage source, is applicable to for example flat-panel screens of LCD.
Background technology
At present in Thin Film Transistor-LCD (TFT-LCD), the gray scale regulation voltage source of DC/DC circuit generally is designed to directly continue to gray scale regulation voltage (be commonly called as and be contrast voltage or gray scale voltage), the reference voltage when wherein gray scale regulation voltage source is corresponding gray scale regulation voltage with digital data conversion.Because pixel (pixel) must adopt for example type of drive of some counter-rotating (dot inversion), so the voltage of gray scale regulation voltage source output can have a temporal variations because of the load on the display panel between picture (frame) and picture.
So, generally need utilize the blank time (blanking time) between picture and the picture to make the voltage of gray scale regulation voltage source output reply stable state.Yet, when the blank time between picture and the picture provides the voltage of gray scale regulation voltage source output to return back to stable state inadequately, the temporal variations of this voltage just may impact the picture before and after it, makes the picture that shows that the situation of luminance nonuniformity be arranged.
Fig. 1 is the oscillogram of voltage between picture and picture of gray scale regulation voltage source output, and wherein horizontal ordinate unit is every lattice 100 microseconds (100us/DIV), and ordinate is every lattice 200 millivolts (200mV/DIV).Please refer to Fig. 1, horizontal-drive signal H
SynAt blank time T
BlankOne train of impulses is arranged before, and this train of impulses have a plurality of pulses.Wherein, a certain pulse represents that promptly a certain sweep trace activated, and sends into gray scale regulation voltage with the corresponding data of sweep trace via data line, is shown so a train of impulses is promptly represented a picture.
With LCD, if having 8 bit data drivers and liquid crystal drive voltage (being reference voltage) is 4V, then because of having 256 (=2
8) individual gray scale adjustment, so each gray scale regulation voltage differs about 15mV at interval.At this moment, because the pixel drive mode causes the about 100mV of temporal variations (being block 103) of gray scale regulation voltage source VDDA output voltage.This temporal variations may be because blank time T
BlankToo short (perhaps return back to required time of stable state oversize) so that have influence on last several data lines (the being block 101) gray scale regulation voltage of data accordingly in the previous picture, has influence on the most former the data lines (being block 102) in the back picture even.
Summary of the invention
Purpose of the present invention is just providing a kind of output buffer of gray scale regulation voltage source, be applicable to for example flat-panel screens of LCD, produce temporal variations in order to the voltage that improves gray scale regulation voltage source output between picture and picture because of the load on the display panel, and then improve the quality of picture.
The present invention proposes a kind of output buffer, is applicable to for example gray scale regulation voltage source of the flat-panel screens of LCD, the reference voltage when wherein gray scale regulation voltage source provides digital data conversion is corresponding gray scale regulation voltage.This output buffer comprises differential amplifier, power amplifier and feedback network, wherein the positive input terminal of differential amplifier is coupled to gray scale regulation voltage source, the negative input end of differential amplifier is coupled to second end of feedback network, the output terminal of differential amplifier is coupled to the input end of power amplifier, and the output terminal of power amplifier is coupled to first end of feedback network and the voltage of gray scale regulation voltage source of output after buffering as reference voltage.In one embodiment, differential amplifier is an operational amplifier, and power amplifier is class-b amplifier or class B push-pull formula (push-pull) amplifier, and feedback network is the resistor and the capacitor of a lead or coupled in parallel.
In one embodiment, class B push-pull formula amplifier comprises first transistor npn npn and second transistor npn npn, wherein first end of first transistor npn npn is coupled to first voltage source, second end of first transistor npn npn is coupled to first end of second transistor npn npn and the output terminal of class B push-pull formula amplifier, the control end of first transistor npn npn is coupled to the control end and the class B push-pull formula amplifier input terminal of second transistor npn npn, and second end of second transistor npn npn is coupled to second voltage source.Here, first type and second transistor npn npn can be respectively NPN and PNP bipolar transistor (BJT), also can be respectively N type and P-type mos field effect transistor (MOSFET).
The voltage that the present invention utilizes negative feedback to improve gray scale regulation voltage source output between picture and picture produces temporal variations because of the load on the display panel, and then improves the quality of picture.
For above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. is described in detail below.
Description of drawings
Fig. 1 is the oscillogram of voltage between picture and picture of gray scale regulation voltage source output.
Fig. 2 is the calcspar according to the gray scale regulation voltage source output buffer shown in one embodiment of the invention.
Fig. 3 adopts or does not adopt the output simulation drawing of output buffer shown in Figure 2 for gray scale regulation voltage source.
Embodiment
For the purpose of the convenient explanation of embodiment, following differential amplifier is example with the operational amplifier, power amplifier is an example with class B push-pull formula amplifier (abbreviation push-pull amplifier), feedback network is an example with the resistor and the capacitor of coupled in parallel, and first type and second transistor npn npn are example with NPN and PNP bipolar transistor respectively.
Fig. 2 is the calcspar according to the output buffer of the gray scale regulation voltage source shown in one embodiment of the invention.Please refer to Fig. 2, output buffer 200 comprises operational amplifier 210, push-pull amplifier 220 and feedback network 230.
Wherein, the positive input terminal I1P of operational amplifier 210 is coupled to gray scale regulation voltage source VDDA, the negative input end I1M of operational amplifier 210 is coupled to the second end N2 of feedback network 230, and the output terminal O1 of operational amplifier 210 is coupled to the input end I2 of push-pull amplifier 220.Reference voltage when here, gray scale regulation voltage source VDDA provides in flat-panel screens (such as LCD) digital data conversion is corresponding gray scale regulation voltage.In addition, the output terminal O2 of push-pull amplifier 220 is coupled to the first end N1 of feedback network 230, and the voltage Vout of the gray scale regulation voltage source VDDA of output after buffering is as reference voltage.
Push-pull amplifier 220 comprises NPN transistor Q1 and PNP transistor Q2, wherein first end of NPN transistor Q1 (being collector) is coupled to the first voltage source V DD, second end of NPN transistor Q1 (being emitter) is coupled to first end (being emitter) of PNP transistor Q2 and the output terminal O2 of push-pull amplifier 220, the control end of NPN transistor Q1 (being base stage) is coupled to the control end (being base stage) of PNP transistor Q2 and the input end I2 of push-pull amplifier 220, and second end of PNP transistor Q2 (being collector) is coupled to the second voltage source GND.Feedback network 230 comprises that resistor R and capacitor C coupled in parallel are between the first end N1 and the second end N2.
Fig. 3 adopts or does not adopt the output simulation drawing of output buffer 200 shown in Figure 2 for gray scale regulation voltage source, wherein this simulation drawing is simulated at initial, middle and last several sweep traces of picture, so three sampling spots are arranged.Please refer to Fig. 3, the employed parameter of this analog result is as follows: the voltage of gray scale regulation voltage source VDDA is 9.2V, reference voltage V out is 4V, the frequency of vertical synchronizing signal is 60 hertz (Hz), the frequency of horizontal-drive signal is 64kHz, and output load is 200 microfarads (uF), and wherein reference voltage V out is that 4V suitably adjusts the first voltage source V DD and the second voltage source GND to get.
In addition and since picture by the black gray scale regulation voltage of representative to representing white gray scale regulation voltage to differ about 1.4 units, and reference voltage V out is 4V, so per 1 unit of the ordinate of Fig. 3 represents the voltage of 3V approximately.For the gray scale regulation voltage source that does not adopt output buffer, all about 0.04 unit of the voltage difference of the voltage difference of its 1st and the 2nd sampling spot and the 2nd and the 3rd sampling spot (being 120mV).And the gray scale regulation voltage source of employing output buffer, all about 0.018 unit of the voltage difference of the voltage difference of its 1st and the 2nd sampling spot and the 2nd and the 3rd sampling spot (being 50mV).Perhaps, can find out intuitively also that by Fig. 3 the output voltage of the gray scale regulation voltage source that adopts output buffer is stable comparatively gently, improve the temporal variations that causes the output voltage of gray scale regulation voltage source because of the pixel driving mode.
In sum, the voltage that the negative feedback framework that the present invention utilizes differential amplifier, power amplifier and feedback network to constitute improves gray scale regulation voltage source output between picture and picture produces temporal variations because of the load on the display panel, and then improves the quality of picture.
Though the present invention discloses as above with preferred embodiment; right its is not in order to qualification the present invention, any those of ordinary skills, without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is when with being as the criterion that claim was defined.
Claims (10)
1. output buffer is applicable to that a gray scale regulation voltage source of a flat-panel screens, wherein said gray scale regulation voltage source provide the reference voltage when digital data conversion is corresponding gray scale regulation voltage, and described output buffer comprises:
One differential amplifier comprises that a positive input terminal is coupled to described gray scale regulation voltage source, a negative input end and an output terminal;
One power amplifier comprises that an input end is coupled to the voltage of the described output terminal of described differential amplifier and the gray scale regulation voltage source of output terminal output after buffering as described reference voltage; And
One feedback network comprises that one first end is coupled to the described output terminal of described power amplifier and the described negative input end that one second end is coupled to described differential amplifier.
2. output buffer as claimed in claim 1 is characterized in that, described flat-panel screens is a LCD.
3. output buffer as claimed in claim 1 is characterized in that, described differential amplifier is an operational amplifier.
4. output buffer as claimed in claim 1 is characterized in that, described power amplifier is a class-b amplifier.
5. output buffer as claimed in claim 4 is characterized in that, described power amplifier is a class B push-pull formula amplifier.
6. output buffer as claimed in claim 5 is characterized in that, described class B push-pull formula amplifier comprises:
One first transistor npn npn comprises that one first end is coupled to one first voltage source, one second end is coupled to the described output terminal of described class B push-pull formula amplifier and the described input end that a control end is coupled to described class B push-pull formula amplifier;
One second transistor npn npn comprises that described input end, one second end that one first end is coupled to described second end of described first transistor npn npn and described class B push-pull formula amplifier are coupled to the described input end that one second voltage source and a control end are coupled to described class B push-pull formula amplifier.
7. output buffer as claimed in claim 6 is characterized in that, described first transistor npn npn is the NPN bipolar transistor, and described second transistor npn npn is the PNP bipolar transistor.
8. output buffer as claimed in claim 6 is characterized in that, described first transistor npn npn is a N type metal oxide semiconductor field effect transistor, and described second transistor npn npn is the P-type mos field effect transistor.
9. output buffer as claimed in claim 1 is characterized in that, described feedback network is a lead.
10. output buffer as claimed in claim 1 is characterized in that, described feedback network is a resistor and a capacitor coupled in parallel between the described negative input end of the described output terminal of described power amplifier and described differential amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2006101013606A CN101101734A (en) | 2006-07-04 | 2006-07-04 | Output buffer suitable for gray scale regulation voltage source |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2006101013606A CN101101734A (en) | 2006-07-04 | 2006-07-04 | Output buffer suitable for gray scale regulation voltage source |
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| Publication Number | Publication Date |
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| CN101101734A true CN101101734A (en) | 2008-01-09 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNA2006101013606A Pending CN101101734A (en) | 2006-07-04 | 2006-07-04 | Output buffer suitable for gray scale regulation voltage source |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101996552A (en) * | 2009-08-05 | 2011-03-30 | 奇景光电股份有限公司 | Output buffering circuit, amplifier device and display device |
-
2006
- 2006-07-04 CN CNA2006101013606A patent/CN101101734A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101996552A (en) * | 2009-08-05 | 2011-03-30 | 奇景光电股份有限公司 | Output buffering circuit, amplifier device and display device |
| CN101996552B (en) * | 2009-08-05 | 2012-11-21 | 奇景光电股份有限公司 | Output buffering circuit, amplifier device and display device |
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