CN101079967B - Solid-state imaging device, method for producing same, and camera - Google Patents

Solid-state imaging device, method for producing same, and camera Download PDF

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CN101079967B
CN101079967B CN2007101282503A CN200710128250A CN101079967B CN 101079967 B CN101079967 B CN 101079967B CN 2007101282503 A CN2007101282503 A CN 2007101282503A CN 200710128250 A CN200710128250 A CN 200710128250A CN 101079967 B CN101079967 B CN 101079967B
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film
substrate
image pickup
pickup device
solid state
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CN101079967A (en
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丸山康
山口哲司
安藤崇志
桧山晋
大岸裕子
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Sony Corp
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Sony Corp
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Priority claimed from JP2007025807A external-priority patent/JP4992446B2/en
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Priority to CN201210551421.4A priority patent/CN103050501B/en
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Abstract

The present invention provides a solid-state imaging device includes a substrate having a first surface and a second surface, light being incident on the second surface side; a wiring layer disposed on the first surface side; a photodetector formed in the substrate and including a first region of a first conductivity type; a transfer gate disposed on the first surface of the substrate and adjacent to the photodetector, the transfer gate transferring a signal charge accumulated in the photodetector; and at least one control gate disposed on the first surface of the substrate and superposed on the photodetector, the control gate controlling the potential of the photodetector in the vicinity of the first surface.

Description

Solid state image pickup device and manufacture method thereof and video camera
Technical field
The video camera (camera) that the present invention relates to solid state image pickup device, makes the method for this device and comprise this solid state image pickup device.
Background technology
Knownly for example in charge coupled device (CCD) imageing sensor and complementary metal oxide semiconductors (CMOS) (CMOS) imageing sensor, playing the effect in the source of dark current (dark current) as crystal defect and each interfacial state at the interface between the dielectric film on photoreceiver and the photoreceiver in the photodiode (photodiode) of photoreceiver (photoreceiver) at solid state image pickup device.In order to suppress owing to interfacial state produces dark current, use embedded (buried) photoelectric diode structure effectively.Built-in photodiode comprises for the n type semiconductor region and the shallow p-type semiconductor region (hole accumulation region) that suppress dark current, the p-type semiconductor region has high impurity concentration and is arranged on the surface of n type semiconductor region, namely is arranged on the near interface between n type semiconductor region and the dielectric film.The method of making built-in photodiode generally includes B ion or the BF that injects as p-type impurity 2Ion; And anneal to form the p-type semiconductor region at the n type semiconductor region that constitutes photodiode and the near interface between the dielectric film.
Yet, injecting by known ion under the situation that forms built-in photodiode, up to 700 ℃ or the heat treatment under the higher temperature be necessary for the activation of impurity.Therefore, at 400 ℃ or more in the low temperature process of low temperature, be difficult to inject by ion and form the p-type semiconductor region.In addition, consider the inhibition of impurity diffusion, by ion inject and high temperature under the activation of the long duration method of annealing to form the p-type semiconductor region do not expect.
In cmos image sensor, each pixel comprises photodiode and various transistor, such as reading transistor (read transistor), reset transistor (reset transistor) and amplifier transistor (amplifying transistor).Signal with the photodiode opto-electronic conversion is handled with transistor.Each pixel is coated with the wiring layer that comprises a plurality of metal lead wires (lead) sublayer.Wiring layer is coated with lens on colour filter and the chip (on-chip lens), and colour filter determines to be incident on the light wavelength on the photodiode, and lens are focused at light on the photodiode on the chip.
In cmos image sensor, the lead-in wire on the pixel stops light unfriendly, thus desensitization.When the light from the lead-in wire reflection is incident on the neighbor, cause color contamination (color mixture) etc.Therefore, the open No.2003-31785 of Japanese Unexamined Patent Application discloses a kind of back side illuminaton solid state image pickup device, its opto-electronic conversion is from the light of the back surface incident that comprises photodiode and various transistorized silicon substrates, and silicon substrate has by polishing the thickness that its back side reduces.As mentioned above, photodiode comprises that this p-type semiconductor region has high impurity concentration for the shallow p-type semiconductor region (hole accumulation region) that suppresses dark current.Shine overleaf in the solid state image pickup device, hole accumulation region is arranged on each place of the front and back of substrate.
Yet ion injects the formation that has limited the shallow p-type semiconductor region with high impurity concentration.Therefore, in order to suppress dark current, the p-type semiconductor region has been deepened in the further increase of the impurity concentration in the p-type semiconductor region.Dark p-type semiconductor region can reduce the reading capability of transfer gate (transfer gate), because the pn of photodiode knot is away from transfer gate.
Summary of the invention
Consider the problems referred to above, expectation provides a kind of and can suppress because the solid state image pickup device of the dark current that causes of interfacial state, the video camera of making the method for this device and comprising this solid state image pickup device at least.
Solid state image pickup device comprises according to an embodiment of the invention: have the substrate of first surface and second surface, light is incident on this second surface side; Be arranged on the wiring layer of this first surface side; Be formed in this substrate and comprise the photoelectric detector (photodetector) in first district of first conduction type; Be arranged on the first surface of this substrate and the transfer gate adjacent with this photoelectric detector, this transfer gate is transmitted in the signal charge that accumulates in the photoelectric detector; And be arranged on the first surface of this substrate and be stacked at least one control grid on this photoelectric detector, this control grid is controlled near the electromotive force of this photoelectric detector of this first surface.
Make the method for solid state image pickup device according to an embodiment of the invention, this solid state image pickup device comprises the substrate with first surface and second surface, be arranged on the wiring layer of this first surface side, light is incident on this second surface side, and the method comprising the steps of: the photoelectric detector that forms first district that comprises first conduction type in this substrate; Be formed on location on the first surface of this substrate and the transfer gate adjacent with this photoelectric detector; And be formed on the location on the first surface of this substrate and be stacked in control grid on this photoelectric detector.
Video camera comprises according to an embodiment of the invention: solid state image pickup device, and this solid state image pickup device has substrate, and this substrate has first surface and second surface, and light is incident on this second surface side, and the wiring layer that is arranged on this first surface side; Incident light is directed to the optical system of second surface side; And the signal processing circuit of handling the output signal of this solid state image pickup device; Wherein this solid state image pickup device also comprises the photoelectric detector that is arranged in this substrate and comprises first district of first conduction type, be arranged on the first surface of this substrate and the transfer gate adjacent with this photoelectric detector, this transfer gate is transmitted in the signal charge that accumulates in this photoelectric detector; And be arranged on the first surface of this substrate and be stacked in control grid on this photoelectric detector, this control grid is controlled near the electromotive force of this photoelectric detector this first surface.
According to one embodiment of the invention, this control grid can be controlled near the electromotive force of this photoelectric detector of this first surface, therefore suppresses the generation of dark current.In addition, signal charge is accumulated in first district of first conduction type and near the first surface of photoelectric detector, has therefore improved the ability that transfer gate reads signal charge.
Solid state image pickup device comprises the nesa coating of the optical receiving surface top that is arranged on photoelectric detector according to an embodiment of the invention; And being arranged on dielectric film between optical receiving surface and the nesa coating, this dielectric film has 50nm or littler thickness.
Solid state image pickup device comprises the nesa coating of the optical receiving surface top that is arranged on photoelectric detector according to an embodiment of the invention; And be arranged on stacked film between optical receiving surface and the nesa coating, and this stacked film comprises the sub-film of at least two classes, wherein the sub-film that contacts with optical receiving surface is the sub-film of Si oxide with 50nm or littler thickness.
The method of making solid state image pickup device according to an embodiment of the invention comprises step: the optical receiving surface of the photoelectric detector in being formed at substrate forms dielectric film, this photoelectric detector comprises first district of first conduction type, and this dielectric film has 50nm or littler thickness; And form nesa coating at this dielectric film.
The method of making solid state image pickup device according to an embodiment of the invention comprises step: the optical receiving surface at the photoelectric detector in first district with first conduction type forms stacked dielectric film, this photoelectric detector is formed in the substrate, this stacked dielectric film comprises the sub-film of at least two classes and comprises the sub-film of the Si oxide that contacts with this optical receiving surface that the sub-film of this Si oxide has 50nm or littler thickness; And form nesa coating at this stacked dielectric film.
Video camera comprises according to an embodiment of the invention: the optical system that incident light is directed to the photoelectric detector of solid state image pickup device; And the signal processing circuit of handling the output signal of solid state image pickup device; Wherein this solid state image pickup device comprises the nesa coating of the optical receiving surface top that is arranged on this photoelectric detector, and is arranged on the dielectric film between this optical receiving surface and this nesa coating, and this dielectric film has 50nm or littler thickness.
Video camera comprises the optical system that incident light is directed to the photoelectric detector of solid state image pickup device according to an embodiment of the invention; And the signal processing circuit of handling the output signal of this solid state image pickup device; Wherein this solid state image pickup device comprises the nesa coating of the optical receiving surface top that is arranged on this photoelectric detector, and be arranged on stacked film between this optical receiving surface and this nesa coating, this stacked film comprises the sub-film of at least two classes, and wherein the sub-film that contacts with optical receiving surface is the sub-film of Si oxide with 50nm or littler thickness.
According to one embodiment of the invention, this nesa coating can be controlled the electromotive force of the optical receiving surface of photoelectric detector, thereby suppresses the generation of dark current.In addition, be set to 50nm or littler because be arranged on the thickness of the dielectric film between this optical receiving surface and this nesa coating, dielectric film and nesa coating be combined to form anti-reflective film.Replacedly, in the situation of stacked dielectric film, the thickness of the sub-film of Si oxide that contacts with optical receiving surface is set to 50nm or littler, dielectric film and nesa coating be combined to form anti-reflective film.The gained anti-reflective film has improved the absorption coefficient of light in the photoelectric detector, thereby improves sensitivity.
Solid state image pickup device comprises on the optical receiving surface that is arranged on photoelectric detector and has the film of negative fixed charge according to an embodiment of the invention.Preferably, the film with negative fixed charge is the dielectric film of at least part of crystallization.
Video camera comprises the optical system that incident light is directed to the photoelectric detector of solid state image pickup device according to an embodiment of the invention; And the signal processing circuit of handling the output signal of solid state image pickup device; Wherein this solid state image pickup device comprises on the optical receiving surface that is arranged on this photoelectric detector and has the film of negative fixed charge.
According to one embodiment of the invention, described film is arranged on the optical receiving surface of photoelectric detector and has negative fixed charge, thereby forms hole accumulation state on the surface of photoelectric detector, and suppresses because the generation of the dark current that interfacial state causes.
Description of drawings
Fig. 1 is the schematic block diagram of the solid state image pickup device of first to the 6th embodiment according to the present invention;
Fig. 2 is the schematic circuit diagram of the unit picture element of pixel portion;
Fig. 3 is the constructed profile of solid state image pickup device;
Fig. 4 is the part sectioned view according to the substrate of the solid state image pickup device of first embodiment;
Fig. 5 is the table that illustrates according to the bias voltage example in the operation of the solid state image pickup device of first embodiment;
Each is profile for Fig. 6 A and 6B, and the example according to the manufacturing process of the solid state image pickup device of first embodiment is shown;
Each is profile for Fig. 7 A and 7B, and the example according to the manufacturing process of the solid state image pickup device of first embodiment is shown;
Each is profile for Fig. 8 A-8C, and another example according to the manufacturing process of the solid state image pickup device of first embodiment is shown;
Each is profile for Fig. 9 A-9C, and another example according to the manufacturing process of the solid state image pickup device of first embodiment is shown;
Figure 10 illustrates the signal structure of video camera;
Figure 11 is the part sectioned view according to the substrate of the solid state image pickup device of second embodiment;
Figure 12 is table, illustrates according to the bias voltage example in the operation of the solid state image pickup device of second embodiment;
Figure 13 is the part sectioned view according to the substrate of the solid state image pickup device of the 3rd embodiment;
Figure 14 is the part sectioned view according to the substrate of the solid state image pickup device of the 4th embodiment;
Figure 15 is curve chart, and the absorption coefficient according to blue light and green glow in the photodiode of the solid state image pickup device of the 4th embodiment is shown, and absorption coefficient is determined by simulation;
Figure 16 is intensity, and the absorption coefficient that has the light of 450nm wavelength in the photodiode according to the solid state image pickup device of the 4th embodiment is shown;
Figure 17 is intensity, and the absorption coefficient that has the light of 550nm wavelength in the photodiode according to the solid state image pickup device of the 4th embodiment is shown;
Figure 18 is curve chart, and the absorption coefficient according to blue light and green glow in the photodiode of the solid state image pickup device of the 4th embodiment is shown, and the fixed thickness of silicon oxide film is to 20nm, the varied in thickness of nesa coating (ITO film);
Figure 19 is curve chart, and the absorption coefficient according to blue light and green glow in the photodiode of the solid state image pickup device of the 4th embodiment is shown, and the fixed thickness of silicon oxide film is to 160nm, the varied in thickness of ITO film;
Figure 20 is the part sectioned view according to the substrate of the solid state image pickup device of the 5th embodiment;
Each is artwork (1) for Figure 21 A-21D, manufacturing is shown according to the method for the solid state image pickup device of the 4th embodiment;
Each is artwork (2) for Figure 22 E-22G, manufacturing is shown according to the method for the solid state image pickup device of the 4th embodiment;
Each is artwork (1) for Figure 23 A-23D, manufacturing is shown according to the method for the solid state image pickup device of the 5th embodiment;
Each is artwork (2) for Figure 24 E-24G, manufacturing is shown according to the method for the solid state image pickup device of the 5th embodiment;
Figure 25 is the part sectioned view according to the substrate of the solid state image pickup device of the 6th embodiment;
Figure 26 is curve chart, and the absorption coefficient according to light in the indigo plant of the solid state image pickup device that comprises hafnium oxide film of the 6th embodiment and the green photodiode is shown;
Each is the TEM photo that is with or without heat treated hafnium oxide film for Figure 27 A and 27B;
Figure 28 is curve chart, and the flat band voltage Vfb of the mos capacitance device that comprises hafnium oxide film and the correlation of heat treatment time are shown;
Figure 29 is curve chart, and the flat band voltage Vfb of the mos capacitance device that comprises hafnium oxide film and the correlation of heat treatment temperature are shown;
Each is artwork (1) for Figure 30 A-30C, manufacturing is shown according to the method for the solid state image pickup device of the 6th embodiment;
Each is artwork (2) for Figure 31 D and 31E, manufacturing is shown according to the method for the solid state image pickup device of the 6th embodiment; And
Each is artwork (3) for Figure 32 F and 32G, manufacturing is shown according to the method for the solid state image pickup device of the 6th embodiment.
Embodiment
Embodiments of the invention are described with reference to the accompanying drawings.
Fig. 1 is the schematic block diagram of solid state image pickup device according to an embodiment of the invention.
Solid state image pickup device comprises pixel portion 11 and peripheral circuit, and pixel portion 11 is arranged on the identical Semiconductor substrate with peripheral circuit.In this embodiment, peripheral circuit comprise vertical selection circuit 12, sampling keep correlated double sampling (S/H CDS) circuit 13, level select circuit 14, timing sequencer (timing generator, TG) 15, automatic gain control (AGC) circuit 16, A/D converter circuit 17 and digital amplifier 18.
Pixel portion 11 comprises many unit picture elements of arranging with matrix, and is as described below.Addressed line etc. are extended along the row of pixel.Holding wires etc. extend along the row of pixel.
The vertical circuit 12 of selecting is to be basic Continuous Selection pixel line by line.Vertical selection circuit 12 connects one with row and classifies basic read pixel signal as, and by vertical signal line picture element signal is sent to S/H CDS circuit 13.S/H CDS circuit 13 carries out the signal of the picture element signal that reads from the row of pixel to be handled, such as CDS.
Level selects circuit 14 to read the picture element signal that is stored in the S/H CDS circuit 13 continuously, then picture element signal is outputed to agc circuit 16.Agc circuit 16 amplifies the signal of selecting circuit 14 to carry from level with predetermined gain, then the gained signal is outputed to A/D converter circuit 17.
A/D converter circuit 17 becomes digital signal with analog signal conversion, then signal is outputed to digital amplifier 18.Digital amplifier 18 suitably amplifies the digital signal of carrying from A/D converter circuit 17, then from pad (pad) (terminal (terminal)) output signal.
Vertical selection circuit 12, S/H CDS circuit 13, level select the operation of circuit 14, agc circuit 16, A/D converter circuit 17 and digital amplifier 18 based on the various clock signals of carrying from timing sequencer 15.
Fig. 2 is the schematic circuit diagram of the example of the unit picture element in the pixel portion 11.
Unit picture element for example comprises the photodiode 21 as light electric transducer.Unit picture element also comprises four transistors, i.e. transfering transistor 22, amplifier transistor 23, addressing (address) transistor 24 and (reset) transistor 25 that resets are as the active element of every single photodiode 21.
Photodiode 21 becomes the electric charge corresponding with light quantity (be electronics in this situation) with the incident light opto-electronic conversion.Transfering transistor 22 is connected in photodiode 21 and floats between diffusion (FD) district.To drive signal by drive wire 26 sends to grid (transfer gate) and causes electric transmission by photodiode 21 opto-electronic conversion to floating diffusion region.
Floating diffusion region is connected to the grid of amplifier transistor 23.Amplifier transistor 23 connects vertical signal line 27 through address transistor 24, and outer constant-current source constitutes source follower (source follower) with being arranged on pixel portion.Address signal sends to the grid of address transistor 24 by drive wire 28.When address transistor 24 conductings, amplifier transistor 23 amplifies the electromotive force of floating diffusion region, and exports the voltage corresponding with this electromotive force to vertical signal line 27.Send to S/H CDS circuit 13 from the voltage of each pixel output by vertical signal line 27.
Reset transistor 25 is connected between power supply Vdd and the floating diffusion region.The grid that reset signal is sent to reset transistor 25 by drive wire 29 resets to the electromotive force of floating diffusion region the electromotive force of power supply Vdd.Transistorized these operations with capable pixel of arranging are carried out simultaneously, because connect with the grid of capable transfering transistor 22, address transistor 24 and the reset transistor of arranging 25.
Fig. 3 is the constructed profile of pixel portion and the peripheral circuit part of solid state image pickup device.Receive light according to the solid state image pickup device of this embodiment from the first surface side opposed second surface side joint that is positioned at wiring layer 38.
Substrate 30 is n type silicon substrates and corresponding to substrate according to an embodiment of the invention for example.Substrate 30 comprises a plurality of photoelectric detectors 31, its each component unit pixel.Each photoelectric detector 31 is corresponding to photodiode shown in Figure 2 21.Each photoelectric detector 31 is formed by the knot of the pn in the substrate 30.Substrate 30 forms by the thickness that reduces silicon wafer in a mode, and light is incident on the substrate dorsal part like this.The thickness of substrate 30 depends on the type of solid state image pickup device.In the situation of solid state image pickup device for visible light, substrate 30 has the thickness of 2-6 μ m.Be used near infrared situation at solid state image pickup device, substrate 30 has the thickness of 6-10 μ m.
Photomask 33 be arranged on the second surface side (dorsal part and light incident side) of substrate 30 and the dielectric film 32 that constituted by Si oxide on.Photomask 33 has the opening 33a that is positioned on each photoelectric detector 31.The photomask 33 capped diaphragms 34 that constitute with silicon nitride.
Diaphragm 34 is capped with colour filter 35, its only transmission have the light of predetermined wavelength.The lenticule 36 that incident light is focused on each photoelectric detector 31 is arranged on the colour filter 35.
First surface side at substrate 30 forms various transistors.The pixel portion of substrate 30 comprises transistor 22-25 shown in Figure 2 (not shown among Fig. 3).The peripheral circuit portion branch of substrate 30 comprises p trap and n trap (not shown).These traps comprise cmos circuit.
The wiring layer 38 that comprises a plurality of metal lead wires sublayer is arranged on the first surface (front) of substrate 30.Support substrate 39 is arranged on the wiring layer 38, and the adhesive layer (not shown) is arranged on therebetween.Support substrate 39 is set to increase the intensity of substrate 30.Support substrate 39 for example is silicon substrate.
Fig. 4 is the part sectioned view of the pixel portion of substrate 30.
In each photoelectric detector 31 of substrate 30, form n type electric charge accumulating region 41 (first conductivity type regions).For the close first surface side of the part that makes stored charge, thereby preferably form electric charge accumulating region 41 impurity concentrations along with more increasing near the first surface side in a mode.In addition, in order to introduce incident light effectively, electric charge accumulating region 41 can form by this way, and namely the area of electric charge accumulating region 41 is along with more increasing near the second surface side.
Electric charge accumulating region 41 is surrounded by P trap 42 in substrate 30.Form shallow P type hole accumulation region 43 (second conductivity type regions) in the second surface side of substrate 30 and the whole surface of pixel portion.First surface side and each photoelectric detector 31 at substrate 30 form shallow P type hole accumulation region 44 (second conductivity type regions). Hole accumulation region 43 and 44 is respectively formed at first and second face side of electric charge accumulating region 41, thereby constitutes each photoelectric detector 31 that built-in photodiode forms.
First surface side at substrate 30 forms the element isolating insulating film 40 that is made of Si oxide.First surface side at substrate 30 forms n type floating diffusion region 45.Between floating diffusion region 45 and electric charge accumulating region 41, form p-type district 46 so that floating diffusion region 45 and electric charge accumulating region 41 electricity are separated.
The transfer gate 51 of transfering transistor 22 is formed on the first surface of substrate 30, and the gate insulating film (not shown) is arranged at therebetween.Transfer gate 51 is positioned at adjacent with photoelectric detector 31 and is formed on above the p type island region 46.Transfer gate 51 for example is made of polysilicon.
Control grid 52 is formed on the first surface of substrate 30, and the gate insulating film (not shown) is arranged at therebetween.Control grid 52 is stacked on the whole surface of photoelectric detector 31.Control grid 52 for example is made of polysilicon.Consider machinability and resistance, preferably control grid 52 and have the thickness suitable with the thickness of transfer gate 51.The dielectric film 32 that light is incident on the second surface side and therefore is not arranged on the first surface side of photoelectric detector 31 blocks.
The transfering transistor 22 in pixel, transistor is that amplifier transistor 23, address transistor 24 and reset transistor 25 shown in Figure 2 is formed on the p trap 42 of the first surface side that is formed at substrate 30.
Below with reference to the operation of Figure 4 and 5 description according to the solid state image pickup device of this embodiment.Fig. 5 is table, and bias voltage (bias) example of the operating period of solid state image pickup device is shown.
In charge integration period, light is along the arrow indicated direction incident shown in the figure, then by photoelectric detector (photodiode) 31 opto-electronic conversion to produce the signal charge in response to the amount of incident light.Signal charge in electric charge accumulating region 41, drift about and near the electric charge accumulating region hole accumulation region 44 41 in the accumulation.In charge integration period, apply the cut-off state that negative voltage causes transfering transistor 22 to transfer gate 51.Apply negative voltage to control grid 52 and cause near the accumulation of the hole interface of substrate 30 (first surface), thereby reduce dark current.
The negative voltage that is applied to control grid 52 changes in response to the thickness of the impurity concentration below the control grid 52 and oxidation film of grid.For example, have 1 * 10 by the formation of 0.25 μ m generation technology 16/ cm 3The situation of hole accumulation region 44 of p-type impurity concentration, the voltage application of pact-1V can suppress the generation of dark current fully.
In read operation, apply the conducting state that positive voltage causes transfering transistor 22 to transfer gate 51.The signal charge of accumulation is transferred to floating diffusion region 45 in photoelectric detector 31.Positive voltage for example equals supply voltage (3.3V or 2.7V).
In read operation, (for example-1V) impose on control grid 52 basically with identical negative voltage in the accumulation.Replacedly, in read operation, the positive voltage of pact+1V can impose on control grid 52.In this case, the signal charge of accumulation is near the first surface side, thus the ability of reading of raising transfer gate 51.Reading the required time cycle far is shorter than the accumulation cycle.Therefore, low owing to applying the dark current that positive voltage causes to control grid 52.
The electromotive force of floating diffusion region 45 changes according to the amount of the signal charge of transmission.The electromotive force of floating diffusion region 45 is exaggerated by amplifier transistor 23.Voltage in response to this electromotive force outputs to vertical signal line 27 (referring to Fig. 2).
In reset operation, apply the voltage that positive voltage makes floating diffusion region 45 to the grid of reset transistor 25 and reset to supply voltage Vdd.In this case, negative voltage imposes on transfer gate 51, causes the cut-off state of transfering transistor 22.In addition, negative voltage imposes on control grid 52.
Repeat above-mentioned accumulation operation, read operation and reset operation.
The method of making solid state image pickup device is described below.In this embodiment, will the illustrative methods that form transfer gate 51 and control grid 52 simultaneously be described.
As shown in Figure 6A, form element isolating insulating film 40 by shallow-trench isolation (STI) at substrate 30.Then, inject formation n type electric charge accumulating region 41, p trap 42, p-type hole accumulation region 44 and p-type district 46 by ion.The formation order in described zone without limits.
Shown in Fig. 6 B, form the gate insulating film 60 that is constituted by Si oxide by thermal oxidation at substrate 30.Subsequently, form the electrode layer 50 that is constituted by polysilicon by chemical vapor deposition (CVD) at gate insulating film 60.The electrode layer that is made of polysilicon has the thickness of 100nm to 300nm.Impurity is introduced in the polysilicon during film forms.
Shown in Fig. 7 A, use Etching mask etched electrodes layer 50 to form transfer gate 51 and control grid 52.At this moment, form other transistorized grid (referring to Fig. 2) simultaneously.
Shown in Fig. 7 B, at depositing silicon oxide or silicon nitride on the whole surface to fill the gap between transfer gates 51 and the control grid 52 with dielectric film 61.
Thus, transfer gate 51 and control grid 52 have been formed.Describe with reference to Fig. 3 below and form grid technology afterwards.Stressing complex at the first surface of substrate 30 becomes dielectric film and lead-in wire to form wiring layer 38.Then, support substrate 39 is attached to wiring layer 38.
Dorsal part by chemico-mechanical polishing (CMP) polished substrate 30 is to reduce the thickness of substrate 30.Carry out ion injection and the annealing of activation then with second surface formation p-type hole accumulation region 43 (referring to the Fig. 4) at substrate 30.Preferably, the temperature when activating annealing is no more than temperature upper limit, because activate annealing after forming wiring layer.In order to meet the demands, preferred employing does not have the laser annealing of thermal impact to wiring layer.
Form the dielectric film 32 that is constituted by Si oxide by CVD at substrate 30.Photomask 33 forms and is patterned on the dielectric film 32.Form the diaphragm 34 that is constituted by silicon nitride by CVD at photomask 33.Then, form colour filter 35 and lenticule 36.
Therefore, made backside illuminated type solid state image pickup device according to this embodiment.
Each is another illustrative methods of transfer gate 51 and the control grid 52 of individual layer to describe formation with reference to Fig. 8 and 9.In Fig. 8 and 9, omit the structure of substrate.
Form element isolating insulating film 40 by shallow-trench isolation (STI) at substrate 30 in the same manner as described above.Then, inject to form n type electric charge accumulating region 41, p trap 42, p-type hole accumulation region 44 and p-type district 46 (referring to Fig. 6 A) by ion.The formation order in described zone without limits.
Shown in Fig. 8 A, form the gate insulating film 60 that is constituted by Si oxide by thermal oxidation at substrate 30.Subsequently, form the electrode layer 50 that is constituted by polysilicon by chemical vapor deposition (CVD) at gate insulating film 60.The electrode layer that is made of polysilicon has the thickness of 100nm to 300nm.Impurity is introduced in the polysilicon during film forms.Subsequently, the hard mask 62 that comprises silicon oxide film 62a and silicon nitride film 62b by CVD depositing silicon oxidation film 62a and silicon nitride film 62b on electrode layer 50 with formation.
Shown in Fig. 8 B, the opening that the hard mask 62 of Etching mask composition that forms with photoetching has width W 1 with formation in hard mask 62.The minimum value of width W 1 depends on the restriction of photoetching resolution.
Shown in Fig. 8 C, the sidewall of the opening in hard mask 62 forms side wall insulating film 63.The whole surface of the inner surface by the opening in comprising hard mask 62 is with CVD depositing silicon oxidation film and eat-back this silicon oxide film and form side wall insulating film 63.The formation of side wall insulating film 63 causes having the opening of the width W 2 littler than the width W 1 that depends on the photoetching resolution restriction.
Shown in Fig. 9 A, with hard mask 62 and side wall insulating film 63 dry ecthing electrode layers 50 to form transfer gate 51 and control grid 52.The width in the gap between transfer gate 51 and the control grid 52 equals width W 2 substantially.As required, the 30 experience ions of the part substrate under the gap inject.
Shown in Fig. 9 B, on the whole surface in transfer gate 51, control grid 52 and gap, form silicon oxide film 64a and silicon nitride film 64b in succession to finish inserted insulation film 64 by CVD.
Shown in Fig. 9 C, thereby the inserted insulation film 64 that is formed on the hard mask 62 is etched back the inserted insulation film 64 that only stays in the gap that is formed between transfer gate 51 and the control grid 52.
Step subsequently is with top identical.In this embodiment, described to form transfer gate 51 that each is individual layer and the method for control grid 52 as example, but be not limited thereto.For example, after forming control grid 52, form silicon oxide film by oxidation on the surface of control grid 52, can form transfer gate 51 then.For the election, transfer gate 51 can be pre-formed, after the sidewall of transfer gate 51 forms silicon oxide film, control grid 52 can be formed by oxidation.When being pre-formed transfer gate 51, can form hole accumulation region 44 as the mask that is used for the ion injection with transfer gate 51.
Figure 10 is the schematic block diagram that comprises the video camera of solid state image pickup device.
Video camera 100 comprises above-mentioned solid state image pickup device 101, optical system 102 and signal processing circuit 103.Video camera according to the embodiment of the invention can be the camara module that comprises solid state image pickup device 101, optical system 102 and signal processing circuit 103.
Optical system 102 will focus on the imaging region of solid state image pickup device 101 from the light (incident light) of target.Incident light is converted to the signal charge corresponding with incident light quantity in the photoelectric detector 31 of solid state image pickup device 101.Signal charge accumulates predetermined period of time in photoelectric detector 31.
Signal processing circuit 103 carries out handling and output image signal from the signal of the output signal of solid state image pickup device 101 supplies.
Solid state image pickup device according to this embodiment be will describe below, the method for this solid state image pickup device and the advantage of this video camera made.
In the solid state image pickup device according to this embodiment, control grid 52 is arranged on the first surface of substrate 30 and is stacked on the photoelectric detector 31.Apply negative voltage to control grid 52 and cause the hole near the first surface of substrate 30, to accumulate, thereby reduce dark current.
Therefore, even when hole accumulation region 44 has low p-type impurity concentration, also can suppress dark current.Therefore, the pn of photoelectric detector 31 knot can be near the first surface side, thereby improves the ability of reading of transfer gate 51.The amount of the signal charge that can read can increase, thereby has improved dynamic range.
In the past, in order to suppress dark current, can need the p-type impurity concentration in the hole accumulation region 44 is increased to about 1 * 10 18/ cm 3In this embodiment, the p-type impurity concentration in the hole accumulation region 44 can be reduced to about 1 * 10 16/ cm 3In order further to reduce the impurity concentration in the hole accumulation region 44, can increase the negative voltage that is applied to control grid 52.
According to the method for the solid state image pickup device of making above-described embodiment, can make the solid state image pickup device that comprises transfer gate 51 and control grid 52.Especially, when forming transfer gate 51 and control grid 52 simultaneously, the number of manufacture steps of the enough less increases of energy is made solid state image pickup device.
Video camera comprises above-mentioned solid state image pickup device.Therefore, can make the video camera with low-dark current and wide dynamic range.
Second embodiment
Figure 11 is the part sectioned view according to the pixel portion of the substrate 30 of the solid state image pickup device of second embodiment.Represent the no longer description of redundance with identical Reference numeral with components identical among first embodiment.
Two control grids, namely the first control grid 52-1 and the second control grid 52-2 are formed on the first surface of substrate 30, and the gate insulating film (not shown) is arranged on therebetween.The first control grid 52-1 is between transfer gate 51 and the second control grid 52-2.The first and second control grid 52-1 and 52-2 are stacked on the photoelectric detector 31.The first and second control grid 52-1 and 52-2 for example are made of polysilicon.Consider machinability and resistance, each of the first and second control grid 52-1 and 52-2 preferably has the thickness suitable with the thickness of transfer gate 51.Therefore the first and second control grid 52-1 and 52-2 that light is incident on the second surface side and is not positioned at the first surface side stop.In addition, three or more control grids can be positioned on the photoelectric detector 31.
Above-mentioned solid state image pickup device is made in the same manner as in the first embodiment.For example, transfer gate 51 and the first and second control grid 52-1 and 52-2 can form in the same manner as in the first embodiment simultaneously.For the election, after forming the first control grid 52-1, form silicon oxide film by oxidation on the surface of the first control grid 52-1, transfer gate 51 and the second control grid 52-2 can be formed on the both sides of the first control grid 52-1 then.
Below with reference to Figure 11 and 12 operations of describing according to the solid state image pickup device of this embodiment.Figure 12 be the table, illustrate solid state image pickup device operating period bias voltage example.
In charge integration period, light is along the incident of the indicated direction of arrow shown in the figure, then by photoelectric detector (photodiode) thus 31 produced signal charge in response to incident light quantity by opto-electronic conversion.Signal charge drifts about in electric charge accumulating region 41 and is accumulated near the hole accumulation region 44 the electric charge accumulating region 41.In charge integration period, apply the cut-off state that negative voltage causes transfering transistor 22 to transfer gate 51.Apply negative voltage to first and second control grid 52-1 and the 52-2 and cause near the accumulation of hole the interface of substrate 30 (first surface), thus the minimizing dark current.
The negative voltage that imposes on first and second control grid 52-1 and 52-2 changes in response to the thickness of the impurity concentration below the control grid 52 and oxidation film of grid.For example, have 1 * 10 by the formation of 0.25 μ m generation technology 16/ cm 3The situation of hole accumulation region 44 of p-type impurity concentration under, the voltage that applies pact-1V can fully suppress the generation of dark current.Signal charge is accumulated near the hole accumulation region 44 the electric charge accumulating region 41.
In read operation (reading 1), positive voltage (is for example made an appointment with+1V) is applied on the first control grid 52-1.Therefore, based on the principle identical with CCD, the signal charge in the electric charge accumulating region 41 accumulates in the first control grid 52-1 below.
Positive voltage is applied to transfer gate 51.Negative voltage is applied to the first control grid 52-1 (referring to reading 2), causes the conducting state of transfering transistor 22.The signal charge that accumulates in below the first control grid 52-1 is transferred to floating diffusion region 45.The positive voltage that is applied to transfer gate 51 for example equals supply voltage (3.3V or 2.7V).Apply negative voltage to the first control grid 52-1 and cause the electric field along continuous straight runs to be applied to substrate 30, thereby signal charge is transferred to floating diffusion region 45 effectively.
The electromotive force of floating diffusion region 45 changes according to the amount of the signal charge of transmission.The electromotive force of floating diffusion region 45 is exaggerated by amplifier transistor 23.Voltage in response to this electromotive force outputs to vertical signal line 27 (referring to Fig. 2).
In reset operation, apply the voltage that positive voltage makes floating diffusion region 45 to the grid of reset transistor 25 and reset to supply voltage Vdd.In this case, negative voltage is applied to transfer gate 51, causes the cut-off state of transfering transistor 22.In addition, negative voltage is applied to first and second control grid 52-1 and the 52-2.
Repeat above-mentioned accumulation operation, read operation and reset operation.
In this embodiment, form a plurality of first and second control grid 52-1 and 52-2 at photoelectric detector 31.The sequential turn-on of first and second control grid 52-1 and 52-2/by the electric field that causes producing along continuous straight runs, thereby transmission charge effectively.
In the past, from the position of effectively reading of electric charge, when level in substrate 30 produces electric field, can need to change the impurity concentration of along continuous straight runs in the electric charge accumulating region 41.In this situation, the regional potential energy well low in the impurity concentration of electric charge accumulating region 41 is more shallow, thereby has reduced the quantity of electric charge and the dynamic range of accumulation.In this embodiment, the concentration gradient that does not need along continuous straight runs; Therefore, do not observe reducing of dynamic range.This embodiment is effective especially for the solid state image pickup device that comprises big pixel.
According to the method for making solid state image pickup device, can make the solid state image pickup device that comprises transfer gate 51 and the first and second control grid 52-1 and 52-2.Especially, when forming transfer gate 51 and the first and second control grid 52-1 and 52-2 simultaneously, can make this solid state image pickup device with the number of manufacture steps of less increase.
Video camera comprises above-mentioned solid state image pickup device.Therefore, can make the video camera with low dark current and wide dynamic range.
The 3rd embodiment
Figure 13 is the part sectioned view according to the pixel portion of the substrate 30 of the solid state image pickup device of the 3rd embodiment.Represent the no longer description of redundance with identical Reference numeral with components identical among first embodiment.
Control grid 52 is formed on the first surface of substrate 30, and the gate insulating film (not shown) is arranged at therebetween.In this embodiment, control grid 52 part crossover photoelectric detectors 31.Hole accumulation region 44 is not formed under the control grid 52.That is, form the zone of the then only positioning control grid 52 of transfer gate 51 and only locate the zone of hole accumulation region 44.For the election, hole accumulation region 44 can be formed on the whole surface of photoelectric detector 31.In addition, control grid 52 and hole accumulation region 44 can be arranged on the contrary.
With with first embodiment in identical mode make above-mentioned solid state image pickup device.For example, can use with first embodiment in identical mode form transfer gate 51 and control grid 52 simultaneously.For the election, after forming control grid 52, form silicon oxide film by oxidation on the surface of control grid 52, can form transfer gate 51 then.For the election, form transfer gate 51, and by oxidation after the sidewall of transfer gate 51 forms silicon oxide film, can form control grid 52.Can before forming transfer gate 51 and control grid 52, form hole accumulation region 44.For the election, use transfer gate 51 and control grid 52 as mask, hole accumulation region 44 can be injected by ion and form.
Below with reference to the operation of Figure 13 description according to the solid state image pickup device of this embodiment.Among the bias voltage example of solid state image pickup device operating period and first embodiment identical (referring to Fig. 5).
In charge integration period, light is along the incident of the indicated direction of arrow shown in the figure, and then by photoelectric detector (photodiode) thus 31 produced signal charge in response to incident light quantity by opto-electronic conversion.Signal charge drifts about in electric charge accumulating region 41 and is accumulated in the first surface side of electric charge accumulating region 41.In charge integration period, apply the cut-off state that negative voltage causes transfering transistor 22 to transfer gate 51.Negative voltage is applied to control grid 52.Because hole accumulation region 44 and control grid 52, the hole is accumulated near the first surface of photoelectric detector 31, thereby reduces dark current.
In read operation, apply the conducting state that positive voltage causes transfering transistor 22 to transfer gate 51.The signal charge that is accumulated in the photoelectric detector 31 is transferred to floating diffusion region 45.Positive voltage for example equals supply voltage (3.3V or 2.7V).
In read operation, negative voltage identical during with accumulation (for example-1V) is applied to control grid 52 substantially.For the election, in read operation, the positive voltage of pact+1V can be applied to control grid 52.In this case, signal charge is near the first surface side, thereby improved the ability of reading of transfer gate 51.Reading the required time cycle far is shorter than the accumulation cycle.Therefore, lower owing to applying the dark current that positive voltage causes to control grid 52.
The electromotive force of floating diffusion region 45 changes according to the signal charge amount of transmission.The electromotive force of floating diffusion region 45 is exaggerated by amplifier transistor 23.Voltage in response to this electromotive force outputs to vertical signal line 27 (referring to Fig. 2).
In reset operation, apply the voltage that positive voltage makes floating diffusion region 45 to the grid of reset transistor 25 and reset to supply voltage Vdd.In this case, negative voltage is applied to transfer gate 51, causes the cut-off state of transfering transistor 22.In addition, negative voltage is applied to control grid 52.
Repeat above-mentioned accumulation operation, read operation and reset operation.
According to the solid state image pickup device of this embodiment, even when control grid 52 part crossover photoelectric detectors 31, also can realize with first embodiment in identical effect, namely can reduce dark current and ability is read in raising.In addition, by control grid 52 is set, can only in part photoelectric detector 31, form hole accumulation region 44.
When hole accumulation region 44 only was formed in the part photoelectric detector 31, hole accumulation region 44 can be injected by ion as mask with transfer gate 51 and control grid 52 and form with self-aligned manner.Can form hole accumulation region 44 on the whole surface of photoelectric detector 31.
Video camera comprises above-mentioned solid state image pickup device.Therefore, can make the video camera with low-dark current and wide dynamic range.
According to above-mentioned first to the 3rd embodiment, can make solid state image pickup device and the video camera of the ability of reading with low-dark current and improvement.
The 4th embodiment
Figure 14 is the part sectioned view according to the pixel portion of the solid state image pickup device of the 4th embodiment.Represent the no longer description of redundance with identical Reference numeral with components identical among first embodiment.
Solid state image pickup device according to this embodiment is included in formation as the nesa coating 74 on the optical receiving surface of the photoelectric detector 31 of the photodiode of optical-electrical converter, namely on the optical receiving surface in the zone of first conduction type (n type electric charge accumulating region) 41, individual layer dielectric film 71 is arranged on therebetween.Solid state image pickup device is constructed by this way and is made negative voltage be applied to nesa coating 74.Nesa coating 74 plays the effect of control grid, the electromotive force of its control optical receiving surface.Nesa coating 74 is capped with planarization film 76, and dielectric film for example silicon oxide film 75 is arranged on therebetween.Planarization film 76 is capped with colour filter 35.Colour filter 35 is capped with lenticule on the chip 36.Nesa coating 74 is connected to lead-in wire 77 (also playing photomask) by silicon oxide film 75.Lead-in wire 77 extends to peripheral circuit part 82 from imaging moiety 81 (corresponding to pixel portion 11).
In this embodiment, the thickness d 1 of the dielectric film 71 below the nesa coating 74, namely the thickness d 1 of silicon oxide film among this embodiment is arranged on 50nm or littler, thereby this structure with nesa coating 74 advantageously has the good absorption coefficient of light in photodiode.Preferably, be that the thickness d 1 of the silicon oxide film of dielectric film 71 is set in 50nm or littler, the thickness d 1 that is adapted to silicon oxide film is optimized the thickness d 2 of nesa coating 74.Dielectric film 71 can be silicon oxynitride film and silicon oxide film.
Are the oxidation films that contain indium and tin at nesa coating 74, be under the situation of indium tin oxide (ITO) film, the anti-reflective film that formation is made of nesa coating (ITO film) 74 and dielectric film (silicon oxide film) 71, because nesa coating (ITO film) 74 has about 2.0 refractive index, dielectric film (silicon oxide film) 71 has about 1.45 refractive index.Nesa coating 74 can be that the oxidation film that comprises zinc is Zinc oxide film and ITO film.
The thickness d 1 of dielectric film 71 can be 50nm or littler, in the scope of 1.0nm to 50nm, and preferred 30nm or littler, more preferably 15nm to 30nm.When optimizing silicon oxide film (thickness d 1) and ITO film (thickness d 2), dielectric film 71 improved transmissivity than minimal thickness d1, thereby cause the more high sensitivity of solid state image pickup device.The thickness that surpasses 50nm increases reflecting component.Thickness less than 1.0nm reduces insulation property.
According to the 4th embodiment, nesa coating 74 is formed on the optical receiving surface of the photoelectric detector 31 that constitutes photodiode, and the dielectric film 71 with single layer structure is arranged at therebetween.Apply negative voltage to nesa coating 74 and cause hole accumulation state on the photodiode surface.In other words, the hole is accumulated on the surface of photodiode, thereby suppresses because the dark current component that interfacial state causes.In addition, the thickness d 1 of dielectric film 71 that is lower than the refractive index of nesa coating 74 when refractive index is set in 50nm or more hour, dielectric film 71 is arranged under the nesa coating 74, forms the anti-reflective film that nesa coating 74 and dielectric film 71 constitute.Therefore, even when nesa coating 74 is set, sensitivity does not reduce.Therefore, according to this embodiment, can make and have low-dark current and highly sensitive solid state image pickup device.
In the mode identical with built-in photodiode, form nesa coating by the surface at photodiode, dielectric film is arranged at therebetween, and apply negative electricity and be pressed onto nesa coating with in the surface of photodiode formation hole accumulation attitude, can suppress the dark current that causes owing to the interface.Yet, in this structure shortcoming is arranged.The formation of nesa coating has increased the number of plies that is stacked on the photodiode, thereby has increased from the reflecting component of the boundary reflection between the top layer, has perhaps increased the absorption of nesa coating such as the light of shorter wavelength in the ITO film.Although can reduce dark current, owing to these optical defects are understood desensitization.
On the contrary, according to this embodiment, individual layer dielectric film 71 below the nesa coating 74 for example thickness d 1 of silicon oxide film or silicon oxynitride film is set at 50nm or littler, be adapted to thickness d 1 then and optimize the thickness d 2 of nesa coating 74, thereby reach balance between the improvement of the inhibition of dark current at the interface and sensitivity.
Particularly, the thickness setting of the dielectric film 71 (being silicon oxide film in this embodiment) below the nesa coating 74 is at 50nm or more hour, the advantage of the absorption coefficient of light in the photodiode is confirmed with reference to Figure 15-19.
Apparatus structure as shown in figure 14 is described below, is included in the nesa coating (ITO film) 74 on the dielectric film (silicon oxide film) 71.Figure 15 is curve chart, and the absorption coefficient of light in the photodiode is shown, and absorption coefficient is by determining as the simulation of parameter with the thickness d 2 of nesa coating (ITO) 74 and the thickness d 1 of dielectric film (silicon oxide film) 71.
In Figure 15, the degree of depth of photodiode adopts 4 μ m.Trunnion axis is represented the absorption coefficient of 450nm light in the photodiode, the absorption coefficient of blue light.The longitudinal axis is represented the absorption coefficient of 550nm light in the photodiode, the absorption coefficient of green glow.Two kinds of absorption coefficients are all drawn." Ox " shown in the picture in picture example means the thickness of the silicon oxide film that is arranged on the dielectric film below the nesa coating (ITO film) 74.Be relevant to the thickness of the silicon oxide film of representing with curve (fine rule) among the figure, the thickness of ITO film changes to 100nm with the stride of 10nm from 0nm.The thickness that the curve of the term in the legend " no ITO " means silicon oxide film changes to 200nm from 0nm separately and does not form data under the situation of ITO film.
The last film that is arranged on the nesa coating (ITO film) is fixed.The dielectric film (silicon oxide film) 75 that is arranged on the nesa coating (ITO film) 74 adopts 100nm thickness.Planarization film 76 adopts by the material that comprises silicon (Si), oxygen (O) and carbon (C) and constitutes, and has 1.5 refractive index, and has the thickness of 1 μ m.Colour filter 35 adopts and constitutes by having about refractive index materials of 1.6 to 1.7.
Figure 15 illustrates the thickness d 1 that is adapted to be arranged on the dielectric film (silicon oxide film) under the nesa coating (ITO film) 74, and the existence of the optimal thickness d2 of ITO film is to realize the balance between blue light and the green absorption coefficients.Even this curve chart confirms when setting best ITO thickness, the absorption maximum coefficient of blue light and green glow depends on the thickness d 1 that is arranged on the silicon oxide film below the ITO film.The absorption coefficient of light preferably is present in the frame that solid line represents (each the scope of absorption coefficient of blue light and green glow is about 73% or bigger in the photodiode) in the photodiode.More preferably, the absorption coefficient of blue light and green glow each be 80% or bigger.Do not have the structure of ITO film to compare with having silicon oxide film, in the structure with ITO film, can require to be arranged on silicon oxide film at least below the ITO film and have 50nm or littler thickness d 1 to keep the advantage of the absorption coefficient of light in the photodiode.Thereby the ITO film preferably has 30nm or littler thickness comprises that the structure of ITO film compares with the structure that does not comprise the ITO film and have advantage aspect the absorption coefficient of light in photodiode.
Figure 16 and 17 each be intensity, the absorption coefficient of blue light and green glow in the photodiode is shown, be arranged on the thickness d 1 of the silicon oxide film below the ITO film and the thickness d 2 of ITO film and change.Figure 16 illustrates the absorption coefficient of the blue light that has the 450nm wavelength in the photodiode.Figure 17 illustrates the absorption coefficient of the green glow that has the 550nm wavelength in the photodiode.Figure 16 and 17 shows, in order to increase the absorption coefficient of blue light and green glow, the less thickness d 1 that is arranged on the silicon oxide film below the ITO film is preferred.In Figure 16 and 17, white region 84 and 85 is best regions.
In addition, Figure 18 is curve chart, and the absorption coefficient of blue light and green glow in the photodiode is shown, and the thickness d 1 that is arranged on the silicon oxide film below the ITO film is 20nm.Figure 19 is curve chart, and the absorption coefficient of blue light and green glow in the photodiode is shown, and the thickness d 1 that is arranged on the silicon oxide film below the ITO film is 160nm.When the thickness d 1 of silicon oxide film shown in Figure 19 was 160nm, the blue peak of the thickness d 2 of ITO film was different with the green peak of thickness d 2.That is, the absorption coefficient of blue light and green glow does not have balance well.On the other hand, as shown in figure 18, when the thickness d of silicon oxide film 1 hour, realize the balance between the absorption coefficient of blue lights and green glow by the thickness d 2 of optimizing the ITO film.
According to this embodiment of the invention, comprise that the video camera according to the solid state image pickup device of the 4th embodiment can have low dark current and the sensitivity of improvement.
In the 4th embodiment, the silicon oxide film of single layer structure or silicon oxynitride film form the dielectric film 71 below the nesa coating 74.Replacedly, the stacked film that comprises the sub-film of at least two classes can form dielectric film.The embodiment of this situation is described below.
The 5th embodiment
Figure 20 is the part sectioned view according to the pixel portion of the solid state image pickup device of the 5th embodiment.In addition, in this embodiment, solid state image pickup device is rear surface irradiation type.Represent the no longer description of redundance with identical Reference numeral with the first embodiment components identical.
Be included in the nesa coating 74 on the optical receiving surface of photoelectric detector 31 according to the solid state image pickup device of this embodiment, namely on the optical receiving surface in the zone of first conduction type (n type electric charge accumulating region) 41, insulation film stacked 83 is arranged on therebetween, the photodiode that photoelectric detector 31 constitutes as optical-electrical converter.In this embodiment, insulation film stacked 83 has double-layer structure, comprises insulator film 72 (Si oxide (SiO down 2) sub-film) and last insulator film 73 (the sub-film of silicon nitride (SiN)).Solid state image pickup device disposes in the mode that negative voltage is applied on the nesa coating 74.Answering of 74 control of nesa coating grid, the electromotive force of its control optical receiving surface.Following insulator film (silicon oxide film) 72 form the contact photoelectric detector optical receiving surface.Nesa coating 74 is capped with planarization film 76, and dielectric film for example silicon oxide film 75 is arranged on therebetween.Planarization film 76 is capped with colour filter 35.Colour filter 35 is capped with lenticule on the chip 36.Nesa coating 74 passes silicon oxide film 75 and is connected to lead-in wire 77 (also playing photomask).Lead-in wire 77 extends to peripheral circuit part 82 from imaging moiety 81 (corresponding to pixel portion 11).
In two insulator films 72 and 73, last insulator film 73 (the sub-film of silicon nitride) has about 2.0 refractive index.Nesa coating 74 has about 2.0 refractive index such as the ITO film.Therefore, last insulator film has and the essentially identical optical properties of nesa coating.Therefore, in fact nesa coating (ITO film) 74 thickness d 2 is regarded as having the gross thickness of nesa coating (ITO film) 74 and the last insulator film (the sub-film of silicon nitride) 73 of basic identical refractive index.Hafnium oxide (HfO with about 2.0 refractive indexes 2) sub-film can be used as insulator film 73 and replace the sub-film of silicon nitride.
In this embodiment, the thickness d 1 of the following insulator film (the sub-film of Si oxide) 72 below the nesa coating 74 is set at 50nm or littler, as the 4th embodiment.Preferably, the thickness d 1 of following insulator film (the sub-film of Si oxide) 72 is set at 50nm or littler, and the thickness d 1 that is adapted to insulator film (the sub-film of Si oxide) is optimized electrically conducting transparent effective film d2.The sub-film of silicon oxynitride can be used as down, and insulator film 72 replaces the sub-film of Si oxide.Zinc oxide film is the same nesa coating 74 that can be used as with the ITO film also.
When last insulator film 73 is hafnium oxide (HfO 2Sub-film) time, the thickness d 1 of following insulator film (the sub-film of Si oxide) 72 can be reduced to about 0.5nm.Therefore, thickness d 1 can be 50nm or littler, in the scope of 1.0nm-50nm, and preferred 30nm or littler, more preferably 15nm-30nm.
When for according to comprising of this embodiment stacked dielectric film 83 structure measurement data shown in Figure 15 the time, the thickness d 2 of ITO film is by the gross thickness of the last insulator film 73 that is considered as ITO film 74 effectively and is made of silicon nitride or hafnium oxide.Therefore, in the 5th embodiment, also observe the trend identical with Figure 15.
According to the 5th embodiment, nesa coating 74 is formed on the optical receiving surface of the photoelectric detector 31 that constitutes photodiode, stacked dielectric film 83 is arranged on therebetween, and stacked dielectric film 83 comprises the following insulator film 72 that is made of Si oxide, as the 4th embodiment.Apply the lip-deep hole accumulation state that negative voltage causes photodiode to nesa coating 74.In other words, accumulate the hole on the surface of photodiode, thereby suppress because the dark current component that interfacial state causes.In addition, the thickness d 1 of the sub-film of Si oxide below nesa coating 74 is set under 50nm or the littler situation, even when using nesa coating 74, and can desensitization yet.Therefore, can make and have low-dark current and highly sensitive solid state image pickup device.
According to this embodiment of the invention, comprise that the video camera according to the solid state image pickup device of the 5th embodiment can have low dark current and the sensitivity of improvement.
Figure 21 A-22G illustrates manufacturing according to the embodiment of the method for the solid state image pickup device of the 4th embodiment.Each is constructed profile for Figure 21 A-22G, and imaging moiety 81 and peripheral circuit part 82 are shown.
Shown in Figure 21 A, the nesa coating 74 that has the individual layer dielectric film 71 of predetermined thickness and have a predetermined thickness is layered in the back side of substrate 30, substrate 30 is included in the pixel with photodiode and wiring layer and the predetermined peripheral circuit in peripheral circuit part 82 in the imaging moiety 81, and dielectric film 71 and nesa coating 74 are arranged on the whole surface of photodiode and peripheral circuit side.Dielectric film 71 preferably has little thickness.
In this embodiment, consider withstand voltage and absorption coefficient, form the dielectric film (silicon oxide film) 71 with single layer structure and 15nm thickness.Form the ITO film as nesa coating 74 with 50nm thickness at dielectric film (silicon oxide film) 71.Silicon oxide film as dielectric film 71 can be by for example using SiH 4And O 2Form as the plasma enhanced CVD of source gas or with the plasma enhanced CVD of tetraethoxysilane (TEOS).ITO film as nesa coating 74 can form by sputter with the ITO target.In this case, the thickness d 1 that can need to be adapted to down dielectric film (silicon oxide film) 71 is optimized the thickness d 2 of nesa coating (ITO film) 74.As mentioned above, the thickness d 1 of dielectric film (silicon oxide film) is 15nm.Therefore, the thickness of nesa coating (ITO film) 74 is adapted to thickness d 1 and is optimized for 50nm.Certainly, when the thickness d 1 of silicon oxide film changed, the thickness d 2 of ITO film also was adapted to thickness d 1 and changes.
Shown in Figure 21 B, etching ITO film 74 optionally, thus stay ITO film 74 in the part of expectation, that is, only on the imaging moiety 81 that forms pixel.
Shown in Figure 21 C, form the dielectric film (silicon oxide film) 75 with predetermined thickness on the whole surface of nesa coating (ITO film) 74 and peripheral circuit part 82 sides.In this embodiment, form the dielectric film (silicon oxide film) 75 with about 150nm thickness by plasma enhanced CVD.
Shown in Figure 21 D, in dielectric film (silicon oxide film) 75, be formed for applying the contact hole 86 that bias voltage is given the lead-in wire of nesa coating (ITO film) 74.
Shown in Figure 22 E, formed the metal film 77a of photomask and lead-in wire effect on the whole surface that comprises contact hole 86.Metal film 77a can have sandwich construction.Sandwich construction can be the Al/TiN/Ti structure, and the superiors are made of Al.
Shown in Figure 22 F, composition metal film 77a is to form the lead-in wire 77 that extends and play the photomask effect towards peripheral circuit part 82.
Shown in Figure 22 G, form the planarization film 76 with predetermined thickness on whole surface.In this embodiment, mainly the insulating material of being made up of silicon (Si), oxygen (O) and carbon (C) applies by this way, and namely the gained film has the thickness of about 1 μ m, and the gained film is annealed to form planarization film 76 then.Form colour filter 35 at planarization film 76.In addition, be formed for lenticule 36 on the chip of gathered light thereon.Thereby, made the target solid state image pickup device according to the 4th embodiment.
Figure 23 A-24G illustrates manufacturing according to the embodiment of the method for the solid state image pickup device of the 5th embodiment.Each is constructed profile for Figure 23 A-24G, and imaging moiety 81 and peripheral circuit part 82 are shown.
Shown in Figure 23 A, the stacked nesa coating 74 that has the stacked dielectric film 83 of predetermined thickness and have predetermined thickness at the back side of substrate 30, substrate 30 is included in the pixel with photodiode and wiring layer and the predetermined peripheral circuit in peripheral circuit part 82 in the imaging moiety 81, and stacked insulating barrier 83 and nesa coating 74 are arranged on the whole surface of photodiode and peripheral circuit side.
In this embodiment, form the sub-film conduct of the Si oxide with about 15nm thickness insulator film 72 down.Form thereon to form stacked dielectric film 83 as the sub-film of the silicon nitride of last insulator film 73.In addition, the ITO film as nesa coating 74 forms thereon.As the sub-film of Si oxide of insulator film 72 can be by for example using SiH down 4And O 2Form as the plasma enhanced CVD of source gas or with the plasma enhanced CVD of tetraethoxysilane (TEOS).Can be by using SiH as the sub-film of the silicon nitride of last insulator film 73 4And NH 3Perhaps use SiH 4And N 2Plasma enhanced CVD as gas source forms.ITO film as nesa coating 74 can form by the sputter with the ITO target.The thickness that the gross thickness d2 of last insulator film (the sub-film of silicon nitride) 73 and nesa coating (ITO film) 74 can need to be adapted to down insulator film (the sub-film of Si oxide) 72 is optimized.Following insulator film (the sub-film of Si oxide) 72 preferably has little thickness.In this case, following insulator film (the sub-film of Si oxide) 72 has the thickness of about 15nm.Be adapted to down the thickness of insulator film 72, the thickness optimization of last insulator film (the sub-film of silicon nitride) 73 is about 30nm, and nesa coating (ITO film) is optimized for about 20nm.Certainly, when the thickness d 1 of insulator film (the sub-film of Si oxide) 72 changed, the thickness of last insulator film (the sub-film of silicon nitride) 73 and nesa coating (ITO film) also changed.
Shown in Figure 23 B, optionally etching nesa coating (ITO film) 74 is to stay ITO film 74 in the expectation part, namely only on the imaging moiety 81 that forms pixel.
Shown in Figure 23 C, form the dielectric film (silicon oxide film) 75 with predetermined thickness on the whole surface of nesa coating (ITO film) 74 and peripheral circuit part 82 sides.In this embodiment, form the dielectric film (silicon oxide film) 75 with about 150nm thickness by plasma enhanced CVD.
Shown in Figure 23 D, in dielectric film (silicon oxide film) 75, be formed for applying the contact hole 86 that bias voltage is given the lead-in wire of nesa coating (ITO film) 74.
Shown in Figure 24 E, formed the metal film 77a of photomask and lead-in wire effect on the whole surface that comprises contact hole 86.Metal film 77a can have sandwich construction.Sandwich construction can be the Al/TiN/Ti structure, and the superiors are made of A1.
Shown in Figure 24 F, composition metal film 77a is to form the lead-in wire 77 that extends and play the photomask effect towards peripheral circuit part 82.
Shown in Figure 24 G, form the planarization film 76 with predetermined thickness on whole surface.In this embodiment, mainly the insulating material that is made of silicon (Si), oxygen (O) and carbon (C) applies by this way, and namely the gained film has the thickness of about 1 μ m, and the gained film is annealed to form planarization film 76 then.Form colour filter 35 at planarization film 76.In addition, form thereon for lenticule on the chip of gathered light 36.Thereby, made the target solid state image pickup device according to the 5th embodiment.
According to the method for the solid state image pickup device of making this embodiment, can make and realize the dark current that causes owing to interfacial state and the well balanced back side illuminaton CMOS solid state image pickup device between the high sensitivity.
In the 6th embodiment, can use such structure, wherein Figure 14 and 20 each shown in solid state image pickup device comprise that also for the p-type semiconductor region (hole accumulation region) that suppresses dark current, the p-type semiconductor region is formed on the optical receiving surface of the n type semiconductor region that constitutes photodiode.The combination of built-in photodiode has reduced to impose on the negative voltage of nesa coating, and has reduced the impurity concentration in the p-type semiconductor region of interface, thereby obtains to suppress as in the known technology the effect of dark current.
In addition, the 4th, the 5th or the 6th embodiment can make up with first, second or the 3rd embodiment.
In the 4th, the 5th and the 6th embodiment, provide the rear surface irradiation type cmos image sensor.Replacedly, can provide front illuminated type cmos image sensor.In addition, can also provide ccd image sensor.
As mentioned above, according to the 4th, the 5th and the 6th embodiment, can make the well balanced video camera between the sensitivity that realizes low-dark current and improvement.
The 6th embodiment
Solid state image pickup device according to sixth embodiment of the invention is described below.
Figure 25 is the part sectioned view according to the pixel portion of the solid state image pickup device of the 6th embodiment.In this embodiment, solid state image pickup device also is rear surface irradiation type.Represent the no longer description of redundance with identical Reference numeral with the first embodiment components identical.
Solid state image pickup device according to this embodiment comprises the film with predetermined thickness d3 and negative fixed charge, the dielectric film 92 of at least part of crystallization for example, this film is arranged on the optical receiving surface (being the second surface side of substrate) of photoelectric detector 31, photoelectric detector 31 has constituted the photodiode of optical-electrical converter effect, in other words, this film is arranged on the optical receiving surface of first conductivity regions (n type electric charge accumulating region) 41.The dielectric film 92 of at least part of crystallization is the dielectric film that the oxide by the element that is selected from hafnium, zirconium, aluminium, tantalum, titanium, yttrium, lanthanide series etc. constitutes.The dielectric film 92 of at least part of crystallization has the zone of at least part of crystallization in dielectric film.
The dielectric film 92 of at least part of crystallization can have the thickness of 3nm-100nm.At the thickness less than 3nm, this film is not easy to crystallization.From practical point of view, the upper limit of thickness can be about 100nm.Do not need bigger thickness.Consider optical property such as transmissivity, the thickness of tens nanometer is preferable.
The dielectric film 93 that forming at the interface between the optical receiving surface of the dielectric film 92 of crystallization and photoelectric detector 31 has predetermined thickness d3 (being silicon oxide film in this embodiment).As the hafnium oxide film of the dielectric film 92 of crystallization at predetermined temperature experience recrystallization annealing temperature in film, to produce negative electrical charge.The electricity that the dielectric film 92 of the crystallization of gained has the electromotive force of the optical receiving surface of controlling photoelectric detector 31 causes the control function.
The dielectric film 92 of crystallization is capped with planarization film 95, and the dielectric film 94 with predetermined thickness is arranged on therebetween such as silicon oxide film.Planarization film 95 is capped with colour filter 35.Colour filter 35 is capped with lenticule on the chip 36.Photomask 97 is arranged in the peripheral circuit part 82 adjacent with imaging moiety 81 (corresponding to pixel portion 11) on dielectric film (Si oxide) 94.
The dielectric film 92 of crystallization for example hafnium oxide film has about 2.0 refractive index.The dielectric film (silicon oxide film) 94 that is arranged on the dielectric film 92 of crystallization has about 1.45 refractive index.Therefore, form dielectric film (hafnium oxide film) 92 of crystallization and the anti-reflective film that dielectric film (silicon oxide film) 94 constitutes.
According to the solid state image pickup device of the 6th embodiment, form the film with negative fixed charge at the optical receiving surface of photoelectric detector 31, the dielectric film 92 of for example at least part of crystallization, thus cause lip-deep hole accumulation state at photodiode.This can suppress because the dark current component that interfacial state causes.In addition, hole accumulation state can be created on the surface of photodiode, and does not have the known ion that is used to form hole accumulation layer to inject or annealing, although perhaps be low dosage, has therefore suppressed because the dark current that interfacial state causes.In addition, the film by the having negative fixed charge for example dielectric film (silicon oxide film) 94 on the dielectric film 92 of the dielectric film 92 of crystallization (for example hafnium oxide film) and crystallization constitutes anti-reflective films, has realized low by electric current and high sensitivity thus.
According to embodiments of the invention, comprise that the video camera according to the solid state image pickup device of the 6th embodiment can have the sensitivity of low-dark current and improvement.
This embodiment is described below in further detail.Above-mentioned photodiode, namely have the built-in photodiode structure of second area (p-type electric charge accumulating region) of second conduction type of the face side of the first area (n type electric charge accumulating region) that is arranged on first conduction type, suppressed to generate the dark current that (carrier generation) caused because of interfacial state by charge carrier by form hole accumulation region near interface.When hole accumulation state can not be injected formation by ion, the hole accumulation state of near surface does not form by the distribution of the impurity profile in the photodiode (profile) (dopant profile distribution), but forms by the fixed charge in the upper strata of photodiode.The film that contacts with photoelectric detector preferably has lower interface state density, because dark current is reduced.That is, need to form the film that has the low interface density of states and in film, have negative fixed charge.
The hafnium oxide that deposits by ald is suitable for having the low interface density of states and have the material of the film of negative fixed charge in film as formation.
In low-power consumption LSI, in order to realize low-leakage current, recently after deliberation each have the hafnium oxide film of several nano thickness.In addition, the crystallization of known hafnium oxide has increased leakage current.Usually, has the hafnium oxide film of several nano thickness greatly about 500 ℃ of crystallizations for gate insulating film and each.Therefore, in order to improve thermal endurance, adopt by Si being incorporated into the method that improves crystallization temperature in the hafnium oxide.Yet, being not used in gate insulating film at hafnium oxide film, and being formed in the situation on the photodiode surface of imageing sensor, leakage current characteristic does not have problems.
In order to obtain the low-reflection film structure, as shown in figure 26, hafnium oxide (HfO 2) film preferably has the thickness of about 50nm.Figure 26 is curve chart, and the correlation of absorption coefficient and the thickness of photoelectric diode structure is shown, and photoelectric diode structure has Si oxide (SiO 2) film, hafnium oxide (HfO 2) film, Si oxide (SiO 2) film and colour filter, it is formed on the photodiode in proper order, and the thickness of hafnium oxide film changes to 100nm with the stride of 10nm from 10nm.The longitudinal axis is represented the absorption coefficient (%) of light in the green photodiode.Trunnion axis is represented the absorption coefficient (%) of light in the blue light electric diode.At about 50nm thickness, the absorption coefficient of light is 90% or bigger in the blue light electric diode, and the absorption coefficient of light is 80% or bigger in the green photodiode.
As mentioned above, find that the thick hafnium oxide film that is not used in known MOS-LSI in the past has low crystallization temperature, in about 300 ℃ of beginning crystallizations.Each is the TEM photo that is with or without at 16 hours hafnium oxide film of 320 ℃ of heat treatment for Figure 27 A and 27B.Figure 27 A is the TEM photo that does not have the hafnium oxide film of thermal oxidation.Figure 27 B is the TEM photo of the hafnium oxide film after the thermal oxidation.In each of Figure 27 A and 27B, silicon oxide film 202, hafnium oxide film 203 and as silicon oxide film 204 sequential cascades of diaphragm on silicon substrate 201.Figure 27 B shows that hafnium oxide film 203 is crystallization fully after heat treatment.In the heat treated hafnium oxide film 203 of the not experience shown in Figure 27 A, crystallization is limited in the regional area of film.
Figure 28 is illustrated in the attribute by fixed charge in the hafnium oxide film during the heat treatment crystallization.Figure 29 illustrates and comprises having the thick hafnium oxide (HfO of 10nm 2) film and Si oxide (SiO 2) the C-V characteristic of mos capacitance device of stacked film of film, stacked film plays gate insulating film.Figure 28 illustrates the measurement result of the flat band voltage Vfb of mos capacitance device, and heat treatment temperature is fixed on 320 ℃, and heat treatment time changes.Figure 28 shows that flat band voltage Vfb prolongs along with heat treatment time and is offset towards high voltage.That is, this result shows the increase of negative charge amount in hafnium oxide film.
Similarly, Figure 29 illustrates the attribute of the flat band voltage Vfb of mos capacitance device, and heat treatment time was fixed on one hour, and heat treatment temperature changes.In this case, the result shows flat band voltage Vfb along with the heat treatment temperature increase and moves towards high voltage.That is, this result shows the increase of negative charge amount in the hafnium oxide film.
Use for example has the thick hafnium oxide film of 50nm thickness can realize low catoptric arrangement, and can reduce crystallization temperature to increase the amount of negative electrical charge in the dielectric film.Therefore, hafnium oxide film is suitable for solid state image pickup device.As mentioned above, the hafnium oxide film of finding to have 10nm or bigger thickness 400 ℃ or more the heat treatment of low temperature cause the formation of crystallization hafnium oxide film.In addition, find namely along with crystallization is carried out, in hafnium oxide film, to form negative electrical charge along with heat treatment time or heat treatment temperature increase.For the known applications that is used for MOS-LSI and gate insulating film, be disadvantageous characteristic because a large amount of negative electrical charges that crystallization causes and leakage current increase.Yet in this embodiment, hafnium oxide film is significantly effectively for the accumulation in hole on the surface of the photodiode of solid state image pickup device.By at 400 ℃ or the low temperature process under the low temperature more, the use of hafnium oxide film causes the formation of hole accumulation state on the surface of photodiode, thereby suppresses dark current.
In this embodiment, hafnium oxide film has been described.Replacedly, the dielectric film that is made of the oxide of the element of selected among zirconium, aluminium, tantalum, titanium, yttrium, lanthanide series etc. also can form negative fixed charge in film.Form the formation that one of these oxide insulating films cause hole accumulation state on the photodiode surface at optical receiving surface, thereby suppress dark current.
Figure 30 A-32G illustrates manufacturing according to the embodiment of the method for the solid state image pickup device of the 6th embodiment.Each is constructed profile for Figure 30 A-32G, and imaging moiety 81 and peripheral circuit part 82 are shown.
A plurality of pixels are formed in the imaging moiety 81 of the Semiconductor substrate 30 shown in Figure 30 A with two-dimensional array.Logical circuits etc. are formed in the peripheral circuit part 82.
Shown in Figure 30 B, on the whole surface of imaging moiety 81 and peripheral circuit part 82, form hafnium oxide film 92 by ALD.Hafnium oxide film 92 has about 2.0 refractive index.Therefore, the suitable adjustment of film thickness causes the acquisition of anti-reflection effect.Preferably, form the hafnium oxide film 92 with 50nm-60nm thickness.In addition, when forming hafnium oxide film 92 by ALD, be the surface of photodiode and the silicon oxide film 93 that the formation at the interface between the hafnium oxide film 92 has about 1nm thickness on the surface of substrate 30.
Shown in Figure 30 C, hafnium oxide film 92 experience recrystallization annealing temperatures are to form negative fixed charge in hafnium oxide film.
Shown in Figure 30 D, silicon oxide film 94 and then photomask 97 be formed on the hafnium oxide film 92.By forming silicon oxide film 94, hafnium oxide film 92 does not directly contact photomask 97, reacts owing to it contacts with photomask 97 thereby suppressed hafnium oxide film 92.In addition, during etching photomask 97, silicon oxide film 94 can prevent the surperficial etched of hafnium oxide film 92.Photomask 97 preferably is made of the tungsten with desirable light shielding ability (W).
Shown in Figure 31 E, photomask 97 is selectively removed, and makes imaging moiety 81 be covered with photomask 97 by part, and makes that peripheral circuit part 82 is covered fully with photomask 97.The photomask of handling 97 forms shading region in photodiode.The blackness level of image (black level) is determined by the output of photodiode.In addition, photomask 97 has suppressed owing to be incident on the performance change that the light on the peripheral circuit part 82 causes.
Shown in Figure 32 F, form planarization film 95 with smooth because the protuberance that photomask 97 causes.
Shown in Figure 32 G, on planarization film 95, form colour filter 35 in imaging moiety 81 sides.In addition, lenticule 36 forms thereon on the chip of gathered light.Thereby, made the target solid state image pickup device according to the 6th embodiment.
The invention is not restricted to the description of embodiment.
For example, the value of describing in an embodiment and material are as example.The invention is not restricted to this.
In addition, can carry out various modifications and not depart from scope of the present invention.
It will be appreciated by the skilled addressee that in the scope of appended claims and equivalent thereof, can produce various modifications, combination, sub-portfolio and replacement according to design needs and other factors.
The present invention comprises the relevant theme of submitting to Japan Patent office with March 17 in 2006 of Japanese patent application JP2006-048173, quotes its full content as a reference at this.

Claims (4)

1. the solid state image pickup device of a back side illuminaton type comprises:
Substrate has first surface and second surface, and light is incident on this second surface side;
Wiring layer is arranged on this first surface side;
Photoelectric detector is formed in this substrate and comprises first district of first conduction type;
Transfer gate is arranged on this first surface of this substrate and contiguous this photoelectric detector, and this transfer gate transmission is accumulated in the signal charge in this photoelectric detector; And
At least one controls grid, is arranged on this first surface of this substrate and is stacked on this photoelectric detector, and this control grid is controlled near the electromotive force of this photoelectric detector this first surface;
Wherein, described at least one control grid comprises a plurality of control grids, and these a plurality of control grids are relevant to single photoelectric detector setting.
2. solid state image pickup device as claimed in claim 1, wherein this photoelectric detector comprises second district of second conduction type, this second district is arranged on this first surface side or this second surface side at least.
3. method of making the solid state image pickup device of back side illuminaton type, this solid state image pickup device comprises the substrate with first surface and second surface, and wiring layer is arranged on this first surface side, and light is incident on this second surface side, and the method comprising the steps of:
In substrate, form the photoelectric detector in first district that comprises first conduction type;
Be formed on location on this first surface of this substrate and the transfer gate of contiguous this photoelectric detector; And
Be formed on the location on this first surface of this substrate and be stacked in control grid on this photoelectric detector;
Wherein said control grid comprises a plurality of control grids, and these a plurality of control grids are relevant to single photoelectric detector setting.
4. video camera comprises:
The solid state image pickup device of back side illuminaton type comprises
Substrate has first surface and second surface, and light is incident on this second surface side; And
Wiring layer is arranged on this first surface side;
Optical system guides incident light to described second surface side; And
Signal processing circuit is handled the output signal of this solid state image pickup device;
Wherein this solid state image pickup device also comprises
Photoelectric detector is arranged in this substrate and comprises first district of first conduction type,
Transfer gate is arranged on this first surface of this substrate and contiguous this photoelectric detector, and this transfer gate transmission is accumulated in the signal charge in this photoelectric detector; And
The control grid is arranged on this first surface of this substrate and is stacked on this photoelectric detector, and this control grid is controlled near the electromotive force of this photoelectric detector of this first surface;
Wherein said at least one control grid comprises a plurality of control grids, and these a plurality of control grids are relevant to single photoelectric detector setting.
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