CN101078994A

CN101078994A - Compiler apparatus, compiler method, and compiler program

Info

Publication number: CN101078994A
Application number: CN 200710107338
Authority: CN
Inventors: 田中旭; 畑野文博; 山名智寻; 峰尾昌明
Original assignee: Matsushita Electric Industrial Co Ltd
Current assignee: Panasonic Holdings Corp
Priority date: 2006-05-26
Filing date: 2007-05-25
Publication date: 2007-11-28

Abstract

A high-sped block is formed by generating and connecting a new basic block (contains an intermediate code obtained by performing variable replacing processing to a path replacement target variable of the intermediate code on a hot path of an original partial program and contains a branching intermediate code where a branching instruction on the hot path is converted so as to execute the hot path), and a basic block with an intermediate code for restoring value of path guarantee variable among the path replacement target variables to a value of an original variable. When an execution result of a conditional branching intermediate code is true, the speeding up of the original program is achieved through executing the basic block, and performing dependency analysis and dependency generation between the intermediate codes in the high-speed block and scheduling of the instructions.

Description

Compiler apparatus, compiler method and compiler program

Technical field

The present invention relates to compiler apparatus, compiler method and compiler program.More specifically, the present invention relates to be used for aspect execution speed, realizing the technology of the compiling that process is optimized.

Background technology

Carry out to optimize to be commonly used to improve and be loaded into the performance that computer system is used to handle the program of mass data with the compiler apparatus that reduces program execution time.

In compiler apparatus, the instruction scheduling that is used to rearrange instruction order is used to improve executing efficiency, thereby is optimized.Further, in the process that is optimized, compiler apparatus is the fundamental block unit by control flow analysis with procedure division, and wherein said control flow analysis is primarily focused on the directive statement at program branches point place and the directive statement at branch target place.Fundamental block is a string directive statement, wherein according to the execution command of the order from basic build directive statement to the tail directive statement, and does not comprise branch and converge in the directive statement string.But, can comprise branch statement in the ending of fundamental block.

In fundamental block, there is not branch and converges, so carry out instruction scheduling according to each piece simply.But optimization effect just is confined to the local optimum of each fundamental block.Therefore, need come the target zone of extended instruction scheduling by the expansion fundamental block.

As publish at Ikuo Nakata work, Asakura company limited described in the 358-381 page or leaf of " structure of compiler and optimization (the Structure and Optimization of Compiler) " that published in 2004 like that, have such situation: in comprising the program of a plurality of branches, know execution route (hereinafter being called " hot path ") in advance with high execution frequency.In this case, usually the method known to is that the fundamental block of hot path expanded in directive statement on the mobile hot path, thereby improves the execution efficient of hot path.

With reference now to the situation of program shown in Fig. 5 A and Fig. 5 B, the method for fundamental block on the expansion hot path is described.Fig. 5 A shows a part of program, and Fig. 5 B shows the interlude statement of compiler internal processes.Interlude is made of a string intermediate code such as S1 and S2.Further, Fig. 5 B also shows the control flow graph for example, and this control flow graph illustrates control stream with solid arrow.Directive statement in the program is expressed as the intermediate code in the compiler.The control flow graph is a digraph, and wherein fundamental block B1-B7 is connected with the directed edge that converges by indication branch.Further, will describe this example with following hypothesis, the execution route that promptly passes through dotted line HP last fundamental block B1, B2, B3, B4, B5 and B7 successively is a hot path.

Be described referring now to the program shown in Fig. 6.In this program, as shown in Figure 7, the intermediate code S8 that considers fundamental block B4 is moved to fundamental block B2 and carries out the situation of the transformation from fundamental block B3 to fundamental block B4, is inserted into fundamental block B3 as the intermediate code S81 of the copy of intermediate code S8.According to this operation, can expand the fundamental block B2 on the hot path HP, also keep the consistance of program simultaneously.

But, as shown in Figure 8, be judged as under the situation not with the branch instruction S9 of so inferior order-disorder transition and fundamental block B4 at fundamental block B1, B2, B4, when the intermediate code S10 of fundamental block B5 is moved to fundamental block B2, in fact the variable a of the intermediate code S12 of fundamental block B6 must quote the variable a of the intermediate code S1 of fundamental block B1, quotes the variable a that shifts back intermediate code S10 but it becomes.So can not keep the consistance of program.

As mentioned above, when crossing by mobile intermediate code when afterbody comprises the fundamental block of branch instruction and do not keep original program to the dependence of data, the mobile of intermediate code is restricted.So can not expand fundamental block.

Summary of the invention

Therefore, fundamental purpose of the present invention is to propose a kind of compiler apparatus, and it can be converted to program can expand fundamental block on specific execution route, also keep the consistance of program.

(1) compiler apparatus according to the present invention is the compiler apparatus that a kind of source program that is used for comprising branch instruction is converted to target program, and described target program is a string object code.This device comprises:

Execution route designated equipment, the first execution route code generator, assurance code generator, partial code maker, the first branch code maker, first dependency parser and parallelization equipment, wherein:

Described execution route designated equipment comprises a plurality of execution route middle finger order execution route that comprised the part strings of commands of branch instruction from the centre, and the described part strings of commands constitutes described source program;

The described first execution route code generator generates the first execution route code, by will be on the execution route specified by described execution route designated equipment that define and variable that need appear at the porch of described appointment execution route replace with another variable and obtain this first execution route code;

Described assurance code generator generates the assurance code that is used for described another variable is reverted to original variable, and described another variable is replaced and also need to appear at the exit of described appointment execution route by the described first execution route code generator;

Described partial code maker generates and the corresponding partial code of the described part strings of commands;

When the branch condition that is used to carry out described appointment execution route is false, the described first branch code maker is according to the condition of conditional branch instructions on the described appointment execution route, generate first branch code in the described conditional branch instructions on described appointment execution route, it is branched off into the starting point of described partial code;

Described first dependency parser is calculated dependence according to the analysis that the dependence between the instruction on the described appointment execution route is carried out, increase described assurance code and and described appointment execution route on the corresponding described branch code of described conditional branch instructions between dependence, thereby make and carry out after the described conditional branch instructions of described assurance code on described appointment execution route, and increase the dependence between the instruction in order to avoid generate unusual; With

Described parallelization equipment rearranges the instruction on the described appointment execution route according to the described dependence between the described instruction that is increased by described first dependency parser.

Above-mentioned structure of the present invention is to be used to be provided with rely in order to avoid generate any unusual embodiment.In this structure, the execution route designated equipment comprises therein specifies so-called hot path in the part strings of commands of branch instruction.The first execution route code generator generates the execution route code, and in described execution route code, the path is replaced target variable (need appear at the porch of specifying execution route and specify the variable that defines on the execution route) and is replaced by another variable.Further, guarantee that the variable that code generator will generate after will replacing in advance returns to the needed assurance code of original variable.The partial code maker generates and the middle corresponding partial code of the part strings of commands that comprises branch instruction.The first branch code maker generates branch code, wherein branch target is branched off into the partial code starting point, thereby at first adjust to the condition of not carrying out under the situation of specifying execution route, obtain in the middle of execution route, not comprise the structure of branch then with respect to carrying out the conditional branch instructions of specifying execution route.Carry out these with by when branch condition is set up, realizing high speed processing, and be branched off into the processing of not using the high speed piece, thereby when branch condition is false, keep consistance with conventional order by the processing of carrying out in the high speed piece (execution route).First dependency parser finds specifies the dependence between the instruction on the execution route, and by this way it is adjusted, and guarantees that promptly code occurs lately than conditional branch instructions in order to avoid generate any unusual.Parallelization equipment is rearranged instruction on the execution route according to the relation between the instruction that is obtained.

According to this structure, can expand the fundamental block of specifying on the execution route, and expansion is to the target zone of the performed scheduling of described instruction.Therefore, can more effectively realize optimizing.Further, so constitute this structure, make that the directive statement on the execution route is preferentially carried out, and do not have branch to be comprised in the middle of the execution route.Therefore, when the execution probability of execution route is higher than the execution probability of other execution route, can improve the execution speed of execution route.

(2) have such embodiment in above-mentioned compiler apparatus (1), wherein compiler apparatus is used as the circulation in the described source program as single instruction, and described device further comprises the cycling element treatment facility, wherein

Described cycling element treatment facility is described execution route designated equipment, the described first execution route code generator, described assurance code generator, the described first branch code maker, described first dependency parser and described parallelization equipment from described round-robin innermost loop towards outer loop start.

By the cycling element treating apparatus is provided, can expand the specified scope of execution route repeatedly to the skin circulation from innermost loop.Therefore, can in wider scope, improve program implementation speed.

(3) in above-mentioned compiler apparatus (1), there is such embodiment, wherein compiler apparatus further comprises first execution route conversion judgment device, wherein said first execution route conversion judgment device judges according to the execution probability of described appointment execution route whether the described program after carrying out described parallelization equipment is taken as described object code.

If the program after carrying out parallelization equipment is at all be taken as if having time object code, and, can expect that the processing time can prolong regardless of the lower situation of execution probability of appointment execution route.Therefore, provide above-mentioned execution route conversion judgment device.Execution route conversion judgment device is used as object code by carrying out parallelization equipment program afterwards, has shortened the processing time.In contrast, when the execution probability of specifying execution route was equal to or less than predetermined value, execution route conversion judgment device was used as source program as object code, and does not carry out parallelization equipment.Therefore further shortened the processing time.

(4) also there is such embodiment in above-mentioned compiler apparatus (1), and wherein this compiler apparatus further comprises second execution route conversion judgment device, wherein said second execution route conversion judgment device:

According to the execution probability of described appointment execution route and the execution time of described partial code, calculate the average execution time of described partial code;

According to described execution probability and after carrying out described parallelization equipment execution time of described the above object code of appointment execution route, the average execution time of calculating described appointment execution route;

According to the comparison between the described average execution time of described average execution time of described partial code and described appointment execution route, judge whether the described program after carrying out described parallelization equipment is taken as described object code string.

Judging whether that the program after carrying out parallelization equipment is used as object code or whether source program be used as object code and when not carrying out parallelization equipment that only using the judgement relevant with the execution probability of appointment execution route may may be not enough aspect the accuracy in shortening processing time.Its reason is because the processing time has different dimensions each other with probability.Therefore, provide second execution route conversion judgment device, be used for the comparison of execution time aspect.This execution route conversion judgment device is calculated average execution time of specifying on the execution route and the average execution time in the partial code respectively.Then, when the average execution time on the execution route behind the execution parallelization equipment was shorter than the average execution time of partial code, the program that execution route conversion judgment device is carried out behind the parallelization equipment was set to object code.The result is to shorten the processing time more reliably.

(5) also there is such embodiment in above-mentioned compiler apparatus (1), comprises further that wherein home position is provided with the instruction code maker and second dependency parser, wherein:

When described appointment execution route the term of execution generate when unusual, described reentry point is provided with the instruction code that the increase of instruction code maker is used to stipulate the home position on the described appointment execution route; With

Described second dependency parser is according to the analysis to the dependence between the instruction on the described appointment execution route, increase described assurance code and and described appointment execution route on the corresponding described branch code of described conditional branch instructions between dependence, carry out thereby make after the described conditional branch instructions of described assurance code on described appointment execution route; With

Described second dependency parser does not increase by described first dependency parser and increases between described instruction to avoid generating those unusual dependences.

This structure is by home position being set and the structure that is used for not generating unusual dependence is not set at abnormal time.The improvement example of present embodiment is described in the back with reference to this structure.

If the generation divisor of zero will generate unusual in processor or operating system.Further, when variable f is a pointer variable in the C language, and when having indirect referencing to variable f, keep at this variable can generating unusual in processor or the operating system under the situation of storage address of load address not or disable access.At this problem, provide above-mentioned reentry point that instruction code maker and dependency parser are set.That is, the reentry point at abnormal conditions is set, thereby, also can continue program implementation contradictorily even make and in the instruction of being carried out indefinitely, generate under the unusual situation.The result is, even specifies and may produce unusual instruction on the execution route and also can be without restriction move specifying on the execution route.Therefore, can promote the executed in parallel of instructing, thereby improve execution speed.

(6) also there is such embodiment in above-mentioned compiler apparatus (5), wherein this compiler apparatus comprises that further the processing routine of interrupting the rise time place increases device, wherein when generation is unusual, the processing routine at place of described interruption rise time increases device to described object code increase by one processing routine, and this processing routine is used to return the described home position by described instruction code appointment.This structure is handled by using exception routine (on the software) to carry out when generation is unusual, thereby continues this program implementation.Can be at this structure with reference to the improvement example 1 of the embodiment that describes later.By adopting said structure, can avoid because the obstacle to carrying out at a high speed on the appointment execution route of dependence generation can may generate unusual instruction on the mobile without restriction appointment execution route on the appointment execution route.Therefore, can further promote the executed in parallel of instructing, thereby improve execution speed.

(7) also there is such embodiment in above-mentioned compiler apparatus (6), wherein compiler apparatus further comprises the 3rd execution route conversion judgment device, wherein said the 3rd execution route conversion judgment device generates unusual probability according to the execution probability of described appointment execution route with after carrying out described parallelization equipment on described execution route, judge whether the described program after carrying out described parallelization equipment is taken as described object code.

If construct compiler apparatus like this, increase is specified and is generated unusual probability on the execution route as the basis of judging.Therefore, compare, can more specifically shorten the processing time according to the change of environment with not considering the situation that generates unusual probability.

(8) also there is such embodiment in above-mentioned compiler apparatus (7), and wherein compiler apparatus further comprises the 4th execution route conversion judgment device, wherein said the 4th execution route conversion judgment device:

According to generating the unusual described probability and the execution time of described partial code, the average execution time of calculating described partial code on the described execution probability of described appointment execution route, the described appointment execution route;

According to the described execution probability of described appointment execution route, generate described unusual described probability, after carrying out described parallelization equipment described the above object code of execution route execution time and increase execution time of object code described in the described processing routine that equipment increased by the processing routine at described generation place's break period, calculate the average execution time of described processing routine and average execution time of described appointment execution route after the described parallelization equipment of execution;

According to described average execution time of described processing routine and the comparison between described average execution time of described execution route after carrying out described parallelization equipment, judge whether described program is taken as described object code after the described parallelization equipment of execution.

If construct compiler apparatus like this, carry out to judge not only based on average execution time of partial code or based on execution route and average execution time of handling routine, also based on the comparisons of two average execution time.Select any chance then in this way, thereby shorten the processing time more reliably.

(9) also there is such embodiment in above-mentioned compiler apparatus 8, and wherein compiler apparatus further comprises the second execution route code generator, wherein:

When the variable that the described second run time version maker is cited on described appointment execution route often keeps particular value, described variable is replaced with the value that keeps by described variable, and during the value after the value that described variable kept is different from described replacement, generation is inserted the second execution route code that conditional branch instructions obtains by the head at described appointment execution route, and condition is set to be branched off into the outside of described appointment execution route in described conditional branch instructions; With

After the described second execution route code generator started, described compiler apparatus carried out the redundancy elimination optimization about steady state value.

If make up compiler apparatus like this, when the value of variable maintenance deviates from particular value, can shorten the processing time more reliably.

(10) also there is such embodiment in above-mentioned compiler apparatus (9), wherein compiler apparatus further comprises the 5th execution route conversion judgment device, wherein said the 5th execution route conversion judgment device judges whether to carry out the described second execution route code generator according to the described execution probability of described appointment execution route and the probability of the described variable maintenance particular value on the described appointment execution route.

If make up compiler apparatus like this, just considered to specify the probability of variable maintenance particular value on the execution route.Therefore, compare, can more specifically shorten the processing time according to the change of environment with the situation of not considering this probability.

(11) also there is such embodiment in above-mentioned compiler apparatus (10), and wherein compiler apparatus further comprises the 6th execution route conversion judgment device, wherein said the 6th execution route conversion judgment device:

According to the described variable on the described execution probability of described appointment execution route, the described appointment execution route keep the probability of particular value and after carrying out described parallelization equipment execution time of described the above object code of execution route, the average execution time of calculating described execution route after the described parallelization equipment of execution; With

According to described average execution time of described partial code and the comparison between described average execution time of described execution route after carrying out described parallelization equipment, judge whether described program is taken as described object code after the described parallelization equipment of execution.

If make up compiler apparatus like this, carry out to judge not only based on average execution time of partial code or based on execution route on variable have relevant average execution time of execution route of probability of particular value, also based on the comparisons of two average execution time.Select any chance then in this way, thereby shorten the processing time more reliably.

(12) also there is such embodiment in above-mentioned compiler apparatus 11, and wherein compiler apparatus further comprises the 3rd execution route code generator and the second branch code maker, wherein:

When the variable that described the 3rd execution route code generator is cited on described appointment execution route often keeps particular value, copy the instruction on the described appointment execution route, then the variable that often has particular value on the execution route that is copied is replaced with the value that keeps by described variable, and during the value after the value that variable kept that is cited on described appointment execution route is different from described replacement, generation is inserted the 3rd execution route code that conditional branch instructions obtains by the head at described appointment execution route, and condition is set to be branched off into the outside of described appointment execution route in described conditional branch instructions; With

When the condition of conditional branch instructions on the execution route that is copied is not recognized as conditional branch instructions in the described appointment execution route, the described second branch code maker generates second branch code, and this second branch code is branched off into the starting point of the described appointment execution route code in the above conditional branch instructions of execution route that is copied.

If construct compiler apparatus like this,, carry out control and also being converted to another high speed piece that speed is enhanced than partial code even the particular value after specifying the value that variable kept that is cited on the execution route and replacing is not simultaneously.Therefore, can shorten the processing time more reliably.

(13) also there is such embodiment in above-mentioned compiler apparatus (12), and wherein compiler apparatus further comprises the 7th execution route conversion judgment device, wherein said the 7th execution route conversion judgment device:

According to the described probability of the described variable maintenance particular value on the described appointment execution route or according to the described execution time of described appointment execution route and the described probability of the described variable maintenance particular value on the wherein said appointment execution route, the average execution time of the described program after the computed improved; With

The described average execution time of improving the back program according to being calculated, judge whether to carry out described the 3rd execution route code generator and the described second branch code maker.

If construct compiler apparatus like this, judge definite any chance of selecting by carrying out based on the average execution time of the program after improving, the described average execution time is to calculate from the probability that keeps particular value or from the probability and the execution probability of specifying execution route.Therefore can shorten the processing time more reliably.

(14) further, compiler apparatus according to the present invention is the compiler apparatus that a kind of source program that is used for comprising branch instruction is converted to target program, and target program is a string object code, and this device comprises:

Execution route designated equipment, execution route code generator, assurance code generator, partial code maker, branch code maker, dependency parser and parallelization equipment, wherein:

Described execution route designated equipment comprises a plurality of execution route middle finger order execution route that comprise the part strings of commands of branch instruction from the centre, and the described part strings of commands constitutes described source program;

Described run time version maker generates the execution route code, by will be on by the specified execution route of described execution route designated equipment that define and variable that need appear at the porch of described appointment execution route replace with another variable and obtain this execution route code;

Described assurance code generator generates the assurance code that is used for described another variable is reverted to original variable, and described another variable is replaced and also need to appear at the exit of described appointment execution route by described execution route code generator;

When the branch condition of carrying out described appointment execution route is false, described branch code maker is according to the condition of the conditional branch instructions on the described appointment execution route, generate a branch code, thereby make the branch target of described the above conditional branch instructions of appointment execution route become the branch target under the invalid situation of described branch condition in the described partial code;

The analysis that described dependency parser basis is carried out the dependence between the instruction on the described appointment execution route comes the dependence between the computations, and increase the instruction be present in the fundamental block and the dependence between the described conditional branch instructions, can not be thereby make by from the fundamental block that appears at described a plurality of controls interflow, and the instruction in described appointment execution route, skip at first the described conditional branch instructions found and transfer processing along the terminal point direction of described execution route, described dependency parser also increases the dependence between described instruction and the described conditional branch instructions, can not be by never appearing in the described fundamental block thereby make, and the described instruction in described appointment execution route is skipped described conditional branch instructions and transfer processing; With

Described parallelization equipment rearranges the instruction in the described appointment execution route according to the described dependence between the described instruction that is increased by described dependency parser.

If construct compiler apparatus like this, when the branch condition of carrying out the appointment execution route was false, execution route was branched in the middle of the partial code.Therefore, even, compare, can improve execution speed with the situation that begins to carry out from the partial code starting point carrying out under the invalid situation of branch condition of specifying execution route.

(15) also there is such embodiment in above-mentioned compiler apparatus (14), and wherein compiler apparatus further comprises converging the defining variable replacement equipment and converging defining variable and guarantees code generator, wherein:

Constituting described source program and middle comprising in the part strings of commands of branch instruction, when the variable that defines in the fundamental block that exists in a plurality of controls interflow, the described defining variable replacement equipment that converges replaces with another variable with the defining point and the invocation point of described variable; With

The described defining variable that converges guarantees that code generator generates one in the exit of the described part strings of commands and guarantees code, be used for described another variable is reverted to original variable, described another variable is by the described exit of converging the replacement of defining variable replacement equipment and need appearing at the described part strings of commands.

If construct compiler apparatus like this, the instruction that occurs in the fundamental block at a plurality of controls interflow in the part strings of commands can be moved on the appointment execution route without restriction.Therefore, can further promote the executed in parallel of instructing, thereby improve execution speed.

(16) also there is such embodiment in above-mentioned compiler apparatus (15), wherein compiler apparatus further comprises first execution route conversion judgment device, wherein said first execution route conversion judgment device judges according to the described execution probability of described appointment execution route whether the described program after carrying out described parallelization equipment is taken as described object code.

If construct compiler apparatus like this, as the situation of isostructure (3),, can shorten the processing time as object code by being chosen in the program of carrying out after the parallelization equipment when the execution probability of specifying execution route during greater than threshold value.In contrast, when the execution probability of the command path of appointment is equal to or less than threshold value, also can be by selecting source program as object code and do not carry out parallelization equipment, thus shorten the processing time.

(17) also there is such embodiment in above-mentioned compiler apparatus (16), and wherein compiler apparatus further comprises second execution route conversion judgment device, wherein said second execution route conversion judgment device:

According to the described execution probability of described appointment execution route and after carrying out described parallelization equipment the execution time of object code described in the described execution route, the average execution time of calculating described execution route after the described parallelization equipment of execution;

According to described average execution time of described partial code with carry out comparison between described average execution time of described execution route after the described parallelization equipment, judge whether the described program after carrying out described parallelization equipment is taken as described object code string.

If construct compiler apparatus like this, situation as the structure of (4), when the average execution time on the execution route behind the execution parallelization equipment is shorter than the average execution time of partial code, as object code, can shorten the processing time more reliably by the program behind the selection execution parallelization equipment.

(18) further, compiler apparatus according to the present invention is the device that a kind of source program that is used for comprising branch instruction is converted to target program, and target program is a string object code.This device comprises:

Execution route designated equipment, the first execution route code generator, first guarantee code generator, the second execution route code generator, converge the defining variable replacement equipment, converge defining variable guarantees that code generator, the 3rd execution route code generator, second guarantee code generator, partial code maker, the first branch code maker, the second branch code maker, the 3rd branch code maker, dependency parser and parallelization equipment; Wherein

Described execution route designated equipment comprises a plurality of execution route middle finger order execution route the part strings of commands of branch instruction from the centre, the described part strings of commands constitutes described source program;

The described first run time version maker generates the first execution route code, this first execution route code be with by the corresponding object code of the whole strings of commands on the execution route of described execution route designated equipment appointment, and replace with first another variable by the variable that needs is appeared at described appointment execution route porch and on the execution route specified, define and obtain the described first execution route code by described execution route designated equipment;

Described first guarantees that code generator generates the first assurance code that is used for described first another variable is reverted to original variable, and described first another variable need appear at the exit of described appointment execution route;

The described second execution route code generator is when guaranteeing that by the described first execution route code generator with by described first the variable of being quoted in the code string that code generator generated often keeps particular value, copy described code string, and will often keep the described variable of described particular value to replace with the value that keeps by described variable in the code string that be copied, and during the value after the value that variable kept that is cited in described code string is different from described replacement, generation is inserted the second execution route code that conditional branch instructions obtains by the head at described code string, and condition is set up the outside that is branched off into described appointment execution route in described conditional branch instructions;

When this variable that defines in the fundamental block that exists in a plurality of controls interflow in the described part strings of commands, the described defining variable replacement equipment that converges replaces with second another variable with the defining point and the invocation point of variable;

The described defining variable that converges guarantees that code generator generates the variable assurance code that is used for described second another variable is reverted to original variable in the exit of the described part strings of commands, and described second another variable need appear at the described exit of the described part strings of commands;

Described the 3rd run time version maker generates the 3rd execution route code, the 3rd execution route code be with carry out described converge the defining variable replacement equipment and described converge defining variable guarantee code generator after by the described execution route of described execution route designated equipment appointment on the corresponding object code of the whole strings of commands, and the porch by needs being appeared at described appointment execution route and the variable that defines on described appointment execution route replace with the 3rd another variable and obtain;

Described second guarantees that code generator generates the second assurance code that is used for the described the 3rd another variable is replaced with original variable, and the described the 3rd another variable need appear at the exit of described appointment execution route;

Described partial code maker generates and is carrying out described defining variable replacement equipment and the described described part strings of commands corresponding partial code of defining variable after guaranteeing code generator that converge of converging;

When the described branch condition of carrying out described appointment execution route is false, the described first branch code maker is according to the condition of the conditional branch instructions in described the 3rd execution route code, generate first branch code, thereby make the branch target of the described conditional branch instructions in described the 3rd execution route code become the branch target under the invalid situation of described branch condition in described partial code;

When the branch condition of carrying out described appointment execution route is false, the described second branch code maker generates second branch code of the starting point that is branched off into described the 3rd execution route code according to the condition of the conditional branch instructions in the described first execution route code in the described branch instruction in the described first execution route code;

When the branch condition of carrying out described appointment execution route is false, described the 3rd branch code maker generates the 3rd branch code of the starting point that is branched off into the described first execution route code according to the condition of the conditional branch instructions in the described second execution route code in the described branch instruction in the described second execution route code;

Described dependency parser basis is to the described analysis of being undertaken by the dependence between the described instruction in each code string of the described first execution route code generator, the described first assurance code generator, the described second execution route code generator, described the 3rd execution route code generator and the described second assurance code generator generation, the dependence between the computations; With

Described parallelization equipment rearranges the described instruction on the described appointment execution route according to the described dependence between the described instruction of being calculated by described dependency parser.

This is corresponding to the combination of a plurality of above-mentioned technology contents, thereby makes it possible to shorten the processing time in the mode of near ideal.

(19) compiler method according to the present invention is corresponding to above-mentioned compiler apparatus (1).This is the compiler method that a kind of source program that is used for comprising branch instruction is converted to target program, and target program is a string object code, and this method comprises the following steps:

The execution route given step is used for comprising from the centre a plurality of execution route middle finger order execution route of the part strings of commands of branch instruction, and the described part strings of commands constitutes described source program;

First run time version generates step, be used for by will be on the specified execution route of described execution route given step that define and variable that need appear at the porch of described appointment execution route replace with another variable and generate the first execution route code;

Guarantee that code generates step, be used to generate and be used for described another variable is reverted to the assurance code of original variable, described another variable generates the exit that is replaced and also needs to appear at described appointment execution route in the step at the described first execution route code;

Partial code generates step, is used for generating and the corresponding partial code of the described part strings of commands;

First branch code generates step, be used for when the branch condition that is used to carry out described appointment execution route is false, condition according to conditional branch instructions on the described appointment execution route generates first branch code, and it is branched off into the starting point of partial code described in the described conditional branch instructions on the described appointment execution route;

The first dependency analysis step, be used for calculating dependence according to the analysis that the dependence between the instruction on the described appointment execution route is carried out, increase described assurance code and and described appointment execution route on the corresponding described branch code of described conditional branch instructions between dependence, thereby make and carry out after the described conditional branch instructions of described assurance code on described appointment execution route, thereby and increase dependence between the described instruction make do not generate unusual; With

The parallelization step is used for rearranging the described instruction on the described appointment execution route according to the described dependence between the described instruction that is increased by the described first dependency analysis step.

(20) also there is such embodiment in above-mentioned compiler method (19), and wherein this method further comprises:

Reentry point is provided with instruction code and generates step, be used for described appointment execution route the term of execution generate when unusual, increase the instruction code that is used to stipulate the reentry point on the described appointment execution route; With

The second dependency analysis step, be used for according to analysis the dependence between the instruction on the described appointment execution route, increase described assurance code and and described appointment execution route on the corresponding described branch code of described conditional branch instructions between dependence, thereby carry out after making the described conditional branch instructions of described assurance code on described appointment execution route, wherein

Have such embodiment, the promptly described second dependency analysis step does not increase by the described first dependency analysis step and increases between described instruction to avoid generating those unusual dependences.This is corresponding to the compiler apparatus of above-mentioned (5).

(21) also there is such embodiment in above-mentioned compiler method (20), wherein this method comprises that further the processing routine of interrupting generation place increases step, be used for when generation is unusual, increase by one to described object code and handle routine, this processing routine is used to return the described reentry point by described instruction code appointment.This is corresponding to the compiler apparatus of above-mentioned (6).

(22) further, compiler method according to the present invention is the method that a kind of source program that is used for comprising branch instruction is converted to target program, and target program is a string object code, and this method may further comprise the steps:

First run time version generates step, be used to generate the first execution route code, this first execution route code be with by the corresponding object code of the whole strings of commands on the execution route of described execution route step given step appointment, and replace with first another variable by the variable that needs is appeared at described appointment execution route porch and on the described execution route specified, define and obtain the described first execution route code by described execution route step given step;

First guarantees that code generates step, is used to generate be used for that described first another variable is reverted to first of original variable and guarantee code, and described first another variable need appear at the exit of described appointment execution route;

The second execution route code generates step when guaranteeing that by described first execution route code generation step with by described first the variable of being quoted in the code generation code string that step generated often keeps particular value, copy described code string, and will often keep the described variable of described particular value to replace with the value that keeps by described variable in the code string that be copied, and during the value after the value that variable kept that is cited in described code string is different from described replacement, generation is inserted the second execution route code that conditional branch instructions obtains by the head at described code string, and condition is set up the outside that is branched off into described appointment execution route in described conditional branch instructions;

Converge the defining variable replacement step, be used for when the described part strings of commands exists in this variable that defines in the fundamental block at a plurality of controls interflow, the defining point and the invocation point of variable replaced with second another variable;

Converge defining variable and guarantee that code generates step, be used for appearing at second another variable in the described exit of the described part strings of commands, generate the variable that is used for described second another variable is reverted to original variable and guarantee code at needs;

The 3rd run time version generates step, be used to generate the 3rd execution route code, the 3rd execution route code is and describedly converges the defining variable replacement step and the described defining variable that converges guarantees that code generates the corresponding object code of the whole strings of commands on the described appointment execution route after the step carrying out, and the porch by needs being appeared at described appointment execution route and the variable that defines on described appointment execution route replace with the 3rd another variable and obtain;

Second guarantees that code generates step, is used to generate be used for that the described the 3rd another variable is replaced with second of original variable and guarantee code, and the described the 3rd another variable need appear at the exit of described appointment execution route;

Partial code generates step, is used to generate and describedly converges the defining variable replacement step and the described defining variable that converges guarantees the described part strings of commands corresponding partial code of code after generating step carrying out;

First branch code generates step, be used for when the branch condition of carrying out described appointment execution route is false, condition according to the conditional branch instructions in described the 3rd execution route code, generate first branch code, thereby make the branch target of the described conditional branch instructions in described the 3rd execution route become the branch target under the invalid situation of described branch condition in described partial code;

Second branch code generates step, be used for when the branch condition of carrying out described appointment execution route is false, according to the condition of the conditional branch instructions in the described first execution route code, generate second branch code of the starting point that is branched off into described the 3rd execution route code in the described branch instruction in the described first execution route code;

The 3rd branch code generates step, be used for when the branch condition of carrying out described appointment execution route is false, according to the condition of the conditional branch instructions in the described second execution route code, generate the 3rd branch code of the starting point that is branched off into the described first execution route code in the described branch instruction in the described second execution route code;

The dependency analysis step, be used for according to generating step, described first by the described first execution route code and guarantee that code generates step, the described second execution route code and generates step, described the 3rd execution route code and generate step and described second and guarantee that code generates the analysis that the dependence between the described instruction of each code string that step generates is carried out, the dependence between the computations described; With

The parallelization step is used for rearranging the described instruction on the described appointment execution route according to the described dependence between the described instruction of being calculated by described dependency analysis step.This is corresponding to the compiler apparatus of above-mentioned (18).

(23) compiler program according to the present invention is corresponding to the compiler method of above-mentioned (19).It is the compiler program that a kind of source program that is used for comprising branch instruction is converted to target program, and target program is a string object code.This method allows computing machine to carry out the following step:

First run time version generates step, be used for by will be on the execution route specified by described execution route given step that define and variable that need appear at the porch of described appointment execution route replace with another variable and generate the first execution route code;

Guarantee that code generates step, be used to generate and be used for described another variable is reverted to the assurance code of original variable that described another variable is generated the exit that described appointment execution route was replaced and also needed to appear to step by the described first execution route code;

The first dependency analysis step, be used for calculating dependence according to the analysis that the dependence between the described instruction on the described appointment execution route is carried out, increase described assurance code and and described appointment execution route on the corresponding described branch code of described conditional branch instructions between dependence, thereby make described assurance code after the described conditional branch instructions of described appointment execution route, carry out, thereby and increase dependence between the instruction make do not generate unusual; With

The parallelization step is used for rearranging the described instruction on the described appointment execution route according to the described dependence between the described instruction that the described first dependency analysis step increases.

(24) also have such embodiment in the above-mentioned compiler program (23), wherein this program further comprises the following steps of being carried out by computing machine:

The described second dependency analysis step does not increase by the described first dependency analysis step and increases between described instruction to avoid generating those unusual dependences.This is corresponding to the compiler method of above-mentioned (20).

(25) also there is such embodiment in above-mentioned compiler program (24), wherein this program further comprises the following steps of being carried out by computing machine: the processing routine of interrupting generation place increases step, be used for when generation is unusual, increase by one to described object code and handle routine, this processing routine is used to return the described reentry point by described instruction code appointment.This is corresponding to the compiler method of above-mentioned (21).

(26) further, compiler program according to the present invention is the method that a kind of source program that is used for comprising branch instruction is converted to target program, and target program is a string object code.This method allows computing machine to carry out following steps:

First run time version generates step, be used to generate the first execution route code, this first execution route code be with by the corresponding object code of the whole strings of commands on the execution route of described execution route given step appointment, and replace with first another variable by the variable that needs is appeared at described appointment execution route porch and on the described execution route specified, define and obtain the described first execution route code by described execution route given step;

The second execution route code generates step, be used for when often keeping particular value by described first execution route code generation step with by the variable that the described first assurance code generation code string that step generated is quoted, copy described code string, to often keep the described variable of described particular value to replace with the value that keeps by described variable in the code string that be copied then, and during the value after the value that variable kept that is cited in described code string is different from described replacement, generation is inserted the second execution route code that conditional branch instructions obtains by the head at described code string, and condition is set up the outside that is branched off into described appointment execution route in described conditional branch instructions;

Converge defining variable and guarantee that code generates step, be used for appearing at described second another variable in described part strings of commands exit, generate the exit that is used in the described part strings of commands variable that described second another variable reverts to original variable is guaranteed code at needs;

First branch code generates step, when the branch condition of carrying out described appointment execution route is false, described first branch code generates the condition of step according to the conditional branch instructions in described the 3rd execution route code, generate first branch code, thereby make the branch target of the described conditional branch instructions on described the 3rd execution route code become the branch target under the invalid situation of described branch condition in described partial code;

The dependency analysis step, be used for according to guaranteeing that to generate step, described first by the described first execution route code code generates step, the described second execution route code and generates step, described the 3rd execution route code and generate step and described second and guarantee that code generates the analysis that the dependence between the described instruction of each code string that step generates is carried out, the dependence between the computations; With

The parallelization step is used for rearranging the described instruction on the described appointment execution route according to the described dependence between the described instruction of being calculated by described dependency analysis step.This is corresponding to the compiler method of above-mentioned (21).

Further, can have the interpreter function that is used for carrying out in proper order source program according to compiler apparatus of the present invention, and can comprise path extraction equipment, its information by using the interpreter function to collect execution route in the parallel instruction string, and extract the execution route of carrying out with high-frequency, wherein the execution route designated equipment is specified the execution route that is extracted by extraction equipment.Further, compiler apparatus can comprise value extraction equipment, it is collected in the information of the value that variable was kept that is cited on the execution route of carrying out with high-frequency by using the interpreter function, and extract the value that occurs with high-frequency, and the variable that is extracted and this value can be used in the execution route code generator.

If construct compiler apparatus like this, can obtain about more precise information with about the more precise information of the value that keeps by variable from interpreter with high execution route of carrying out frequency, these information are the operator scheme when carrying out more.Therefore, with appointment by the user or use the specific experience value and compare, can improve execution speed to the situation that compiler provides information.

According to the present invention, because expanded the fundamental block of specifying on the execution route, and enlarged the scope of regulation goal, so can more effectively realize optimizing.Further, construct such structure, the feasible preferential directive statement of carrying out on the execution route, and do not comprise branch in the middle of the execution route.Therefore, when the execution probability of this execution route is higher than the execution probability of other execution route, can improve the execution speed of execution route.

Further, can on hot path, move unfetteredly, can therefore can further promote the executed in parallel of instructing owing to may generate unusual instruction on the hot path.The result is to improve execution speed.

Further, because the variable on the execution route can be replaced by steady state value, increased and carried out the chance that steady state value is propagated optimization.Therefore, can further improve execution speed.

In addition, when the branch condition of carrying out the appointment execution route was false, execution route was branched in the middle of the partial code.Therefore, even, compare, also can improve execution speed with the situation that begins to carry out from the partial code starting point carrying out under the invalid situation of branch condition of specifying execution route.

Further, can obtain about more precise information with high execution route of carrying out frequency with about the more precise information of the value that kept by variable from interpreter, these are the operator scheme when carrying out more.Therefore, compare to the situation that compiler provides information, can improve execution speed with appointment or use specific experience value by the user.

Can change the program that comprises a plurality of execution routes according to compiler apparatus of the present invention, compiler method and compiler program, thereby improve the execution speed of the execution route of carrying out with high-frequency.Therefore, can use compiler apparatus of the present invention, compiler method and compiler program by the message handler that is loaded into digital home's electrical equipment etc.

Description of drawings

Other purpose of the present invention and advantage will become clear owing to following description to preferred embodiment and claims.After implementing the present invention, those skilled in the art just will appreciate that also there are many other advantages in the present invention.

Fig. 1 is the functional pie graph according to the compiler apparatus of the embodiment of the invention;

Fig. 2 is the operational flowchart according to the compiler apparatus of the embodiment of the invention;

Fig. 3 is the flow process of the variable information computing undertaken by the variable information calculating section;

Fig. 4 replaces the flow process of handling by the variable that execution route intermediate code generating portion is carried out;

Fig. 5 A and Fig. 5 B are the synoptic diagram that is used to describe according to the compiler apparatus operation of the embodiment of the invention;

Fig. 6 is the synoptic diagram that is used for describing conventional art and problem thereof;

Fig. 7 is the synoptic diagram that is used for describing conventional art and problem thereof;

Fig. 8 is the synoptic diagram that is used for describing conventional art and problem thereof;

Fig. 9 A-Fig. 9 C illustrates the variable information that calculated by variable information calculating part branch and the structure of the variable pairing that generated by execution route intermediate code generating portion and generate the synoptic diagram of historical content example;

Figure 10 is the synoptic diagram that is used for describing according to the operation of the compiler apparatus of the embodiment of the invention;

Figure 11 is the synoptic diagram that is used for describing according to the operation of the compiler apparatus of the embodiment of the invention;

Figure 12 is the synoptic diagram of the dependency analysis information that partly generated by the intermediate code dependency analysis;

Figure 13 is the synoptic diagram that is partly carried out the execution route intermediate code of instruction scheduling by the intermediate code parallelization;

Figure 14 is the synoptic diagram that is used for describing the operation of the compiler apparatus that improves example 1 according to the present invention;

Figure 15 is according to the synoptic diagram that improves the dependency analysis information that example 1 partly generates by the intermediate code dependency analysis;

Figure 16 illustrates according to improving example 1 partly to be carried out the synoptic diagram of the execution route intermediate code of instruction scheduling by the intermediate code parallelization;

Figure 17 is the synoptic diagram that illustrates when generating when unusual according to the operation of the target program that improves example 1;

Figure 18 is the synoptic diagram that is used for describing according to the operation of the compiler apparatus that improves example 2;

Figure 19 is according to the synoptic diagram that improves the dependency analysis information that example 2 partly generates by the intermediate code dependency analysis;

Figure 20 is partly carried out the synoptic diagram of the execution route intermediate code of instruction scheduling according to improving example 2 by the intermediate code parallelization;

Figure 21 is the synoptic diagram that is used for describing according to the operation of the compiler apparatus that improves example 3;

Figure 22 is partly carried out the synoptic diagram of the execution route intermediate code of instruction scheduling according to improving example 3 by the intermediate code parallelization;

Figure 23 is the functional form pie graph according to the compiler apparatus that improves example 4;

Figure 24 is the operational flowchart according to the compiler apparatus that improves example 4;

Figure 25 A and Figure 25 B are the synoptic diagram that is used for describing according to the operation of the compiler apparatus that improves example 4;

Figure 26 is the synoptic diagram that is used for describing according to the operation of the compiler apparatus that improves example 4;

Figure 27 A-Figure 27 C illustrates according to improving example 4 by the variable information of variable information calculating part branch calculating and the structure and the synoptic diagram that generates the historical content example that matches that is matched by the variable that execution route intermediate code generating portion generates;

Figure 28 is the synoptic diagram that is used for describing according to the operation of the compiler apparatus that improves example 4;

Figure 29 is the synoptic diagram that is used for describing according to the operation of the compiler apparatus that improves example 4;

Figure 30 is according to the synoptic diagram that improves the dependency analysis information that example 4 partly generates by the intermediate code dependency analysis;

Figure 31 is partly carried out the synoptic diagram of the execution route intermediate code of instruction scheduling according to improving example 4 by the intermediate code parallelization;

Figure 32 is the synoptic diagram that is used for describing according to the operation of the compiler apparatus that improves example 4;

Figure 33 is the synoptic diagram that is used for describing according to the operation of the compiler apparatus of the embodiment of the invention;

Figure 34 is the synoptic diagram that is used for describing according to the operation of the compiler apparatus of the embodiment of the invention;

Figure 35 is the synoptic diagram that is used for describing according to the operation of the compiler apparatus of the embodiment of the invention;

Figure 36 A-Figure 36 C is the synoptic diagram that is used for describing the operation of the compiler apparatus that improves example according to the present invention.

Embodiment

Hereinafter, the preferred embodiments of the present invention are described with reference to the accompanying drawings.

＜embodiment 〉

A kind of according to compiler apparatus of the present invention: as to read source program; Carry out speech/phrase analysis, program is decomposed into speech/phrase string; Carry out grammatical analysis, thereby according to the syntax tree in speech/phrase string establishment programming language; Create the interlude of being write as with intermediate code based on the syntax tree that grammatical analysis is created in device inside; Carry out optimization process at interlude such as instruction scheduling; And after the distribution of variable being carried out such as resources such as registers, interlude is converted to the execution format program.

(structure)

Fig. 1 is the integrally-built functional block diagram that illustrates according to the compiler apparatus A of the embodiment of the invention.Compiler apparatus A comprises parsing unit 1, optimizes unit 2, resource allocation unit 3 and run time version generation unit 4.Particularly, compiler apparatus A is the computer system by using microprocessor, ROM (ROM (read-only memory)), RAM (random access memory), hard disc apparatus etc. to realize.ROM or hard disc apparatus storage computation machine program.The function of each several part can realize when the microprocessor computer program in the compiler apparatus shown in Figure 1.Further, by using RAM and hard disc apparatus, can store and exchange message between each several part.

The function of each several part is described hereinafter.Parsing unit 1 is read source program F1, carries out grammatical analysis with the control structure among the identification source program F1, produces the interlude as the intermediate code string, and it is stored among the compiler apparatus A.Explain mesne control structure by service condition branch intermediate code, branch's intermediate code and label intermediate code, thereby make it become control structure with the control structure equivalence of source program F1.The conditional branching intermediate code is by judging that intermediate code (for example t1 of S202＜=0 among Figure 11) and branch's intermediate code (for example goto S1 of S203 among Figure 11) constitute, described judgement intermediate code shows the judgement to condition, and the intermediate code indication of described branch is to the branch target under the genuine situation of being judged as of condition.

Optimizing unit 2 constitutes by comprising programming switching unit 2A and intermediate code parts scheduler 2B.Optimize the interlude that generates in the 2 pairs of parsing units 1 in unit and carry out control flow analysis and data-flow analysis, and export analysis result to will be described later programming switching unit 2A.Carry out control flow analysis by analyzing mesne control stream, thereby interlude is divided into fundamental block.Carry out data-flow analysis, have period, defining point and an invocation point with situational variables.

The following describes and how to determine about the definition of variable and quote.When the value of variable in the middle code was updated, this was stated as " variable is defined " in this intermediate code, and this intermediate code is called as the defining point of variable.Further, when the value of variable in the middle code was used, this was stated as " variable is cited " in this intermediate code, and this intermediate code is taken as the invocation point of this variable usually.

Below programming switching unit 2A will be described.Programming switching unit 2A comprises variable information calculating section 2a, execution route intermediate code generating portion 2b, judges intermediate code generating portion 2c, guarantees intermediate code generating portion 2d, the intermediate code generating portion 2e of branch.

When from the outside during to device input hot path information F2, programming switching unit 2A is stored in the inside of programming switching unit 2A with it, and the subroutine that comprises hot path HP (label of execution route) is carried out the program conversion.

Here, user's input is used to refer to the information of the predetermined execution route of user, as hot path F2.In explanation, comprise that the subroutine program of hot path is called subprogram, and subprogram comprises the starting point of shared hot path HP and a plurality of execution routes of terminal point to embodiment.In addition, in the explanation to embodiment, the intermediate code corresponding with subprogram ganged up and often is taken as part intermediate code string.

Variable information calculating section 2a is according to having information and definition information from what optimize that analysis result that unit 2 sends calculates variable each fundamental block, and replace target variable X3 and guarantee variable X 4 (for example, referring to Fig. 9 B) (referring to the step n14 among Fig. 2) according to exist information and definition information and hot path information F2 calculating path input variable X1, path output variable X2, the path that are calculated.Further, variable information calculating section 2a replaces target variable X3 with the path that calculates and sends to execution route intermediate code generating portion 2b, and the path is guaranteed that variable X 4 sends to assurance intermediate code generating portion 2d.

Variable exists the information indication to be present in the variable (hereinafter referred to as " having information IN ") of porch and is present in the variable (hereinafter referred to as " having information OUT ") in exit, described inlet is that described outlet is the terminal point of each fundamental block by the starting point of each fundamental block of control flow analysis generation.Having information IN is at the porch of fundamental block or the variable that is cited earlier and afterwards is defined after the inlet, is at the exit of fundamental block or the variable that is cited earlier and afterwards is defined after the outlet and there is information OUT.Further, variable-definition information (hereinafter referred to as definition information D EF) is indicated the variable that is defined in each piece.For the existence of variable, it with above-mentioned non-patent literature 2 in describe exist identical.

Path input variable X1 is the variable that exists in the porch of hot path HP, and its indication is as having an information IN in the fundamental block of hot path HP starting point.Path output variable X2 is the variable that exists in hot path HP exit, and its indication is as having an information OUT in the fundamental block of hot path HP terminal point.

The path replace target variable X3 indicated be to be path input variable X1 and the variable that on hot path HP, defines.The path guarantee variable X 4 indicated be to be that the path is replaced target variable X3 and is the variable of path output variable X2.

Execution route intermediate code generating portion (the first execution route code generator) 2b reads hot path information F2 that is stored among the programming switching unit 2A and the interlude that is stored among the compiler apparatus A.Then, for the intermediate code string on the mesne hot path HP, execution route intermediate code generating portion 2b generates execution route intermediate code string, the identifier of wherein replacing target variable X3 from the path that variable information computing unit part 2a sends is replaced, execution route intermediate code generating portion 2b and the execution route intermediate code string that is generated sent to judge intermediate code generating portion 2c (referring to the step n15 among Fig. 2 and Fig. 4).

The replacement of the path being replaced the identifier of target variable X3 is described now.The identifier that execution route intermediate code generating portion 2b replaces target variable X3 with the path replaces with the not identifier in the variable famous-brand clock, and the relevant information such as identifier with variable have been shown in described variable famous-brand clock.Execution route intermediate code generating portion 2b generates the variable pairing, and stores the variable pairing that is generated into programming switching unit 2A, and described variable pairing is replaced target variable X3 as just the path of variable alternative and replaced.The variable famous-brand clock is such table, wherein collect and relevant informations such as identifier that is engraved in the variable of stating in the program when the speech/phrase analysis and type, and this table is stored among the compiler apparatus A.For the replacement that the identifier of target variable X3 is replaced in the path, can be with reference to the t1-t3 among Figure 10.Further, at the pairing of replacing the back variable, can be with reference to the step n48 among Fig. 9 C and Fig. 4.

Judge that intermediate code generating portion (partial code maker) 2c is provided with the judgement intermediate code in the conditional branching intermediate code that comprises from the execution route intermediate code string that execution route intermediate code generating portion 2b sends, thereby not carry out hot path HP is condition, and the execution route intermediate code string of being changed is stored in the inside of programming switching unit 2A.In addition, with condition setting when not carrying out hot path HP, can be with reference to S202 shown in Figure 11, S203 transformation to B1.

Guarantee that intermediate code generating portion (assurance code generator) 2d guarantees variable X 4 according to the path that sends from variable information calculating section 2a, generate and guarantee the intermediate code string, it is to be used for the path is guaranteed that the identifier of variable reverts to the intermediate code string of original identifier.Guaranteeing then that code generating portion 2d is arranged as it is right after after execution route intermediate code string, and is stored to the inside (referring to the S301 among Figure 11) of programming switching unit 2A.Here, the intermediate code string that is made of execution route intermediate code string and assurance intermediate code string is called high speed piece (referring to the H1 among Figure 11).High speed piece H1 is characterised in that, even there is the middle branch towards high speed piece outside from high speed piece H1 in the conditional branching intermediate code, does not also exist towards the branch of high speed piece H11 inside.

The conditional branching intermediate code that comprises in the execution route intermediate code string of branch's intermediate code generating portion (the first branch code maker) 2e read routine converting member 2A.The condition of the judgement intermediate code in the conditional branching intermediate code is a true time, branch's intermediate code of the intermediate code generating portion 2e of branch condition intermediate code is set to be branched off into branch's intermediate code of part intermediate code starting point, meanwhile, execution route intermediate code string is stored into the inside of programming switching unit 2A.Further, the part intermediate code string of being stored among branch's intermediate code generating portion 2e compiler apparatus A is set to subroutine.That is, after the terminal point of part intermediate code string, be branched off into branch's intermediate code of intermediate code immediately, be inserted into the terminal point of part intermediate code string.Further, the high speed piece H11 that the intermediate code generating portion 2e of branch will be stored in programming switching unit 2A inside arranges the position between following 2, promptly intermediate code that the part intermediate code strings a little to be closelyed follow in the near future point and immediately following the intermediate code of the part intermediate code terminal point point before soon.Then, the part intermediate code (part intermediate code string) that will handle by this way of branch's intermediate code generating portion 2e stores the inside of compiler apparatus 2A into.Program structure as shown in figure 11 can be used as the reference here.For to the branch of part intermediate code starting point, can be with reference to jumping to S1 (goto S1) in the program structure shown in Figure 11.Further, can be about inserting branch's intermediate code with reference to the S151 in the program structure of Figure 11, described branch intermediate code is branched off into part intermediate code string terminal point intermediate code in the near future.

Next intermediate code scheduler 2B will be described.Intermediate code scheduler 2B reads the interlude that is stored among the compiler apparatus A, and carries out dependency analysis by intermediate code dependency analysis part 2f, so that determine the execution order between the intermediate code instruction.Further, intermediate code scheduler 2B utilizes the mesne intermediate code of intermediate code parallelization part 2g rearrangement, thereby makes it can executed in parallel.Can be at dependency analysis with reference to Figure 12.Further, about the rearrangement of intermediate code, can be with reference to change from the high speed piece H1 of Figure 11 to the high speed piece H1 of Figure 13.

Specifically, intermediate code dependency analysis part 2f and intermediate code parallelization part 2g will be described in the present invention to the processing of high speed piece H1 at this.Other parts adopt with non-patent literature 1 in the identical method of method put down in writing.

Intermediate code dependency analysis part (first dependency parser) 2f analyzes the dependence between the intermediate code in the intermediate code string in the high speed piece, and will send to intermediate code parallelization part 2g as the dependency analysis information of analysis result.In the present invention, according to above-mentioned analysis etc. the generation that concrete dependence between the intermediate code is expressed as dependence is set.Although concerning the routine operation person, intermediate code dependency analysis part 2f generates and identical dependence described in the non-patent literature 1, and it produces special the dependence to a part of intermediate code.Will be described below this point.

At first, intermediate code dependency analysis part 2f generates from the branch condition intermediate code to the dependence that guarantees intermediate code, thereby makes and carry out the branch condition intermediate code among the high speed piece H1 before the assurance intermediate code in carrying out high speed piece H1.To this, can be with reference to Figure 12, wherein S202 and S203 are placed in the position higher than S301.

Secondly, intermediate code dependency analysis part 2f specifies the unusual intermediate code that generates, and it is to cause unusual intermediate code, and intermediate code dependency analysis part 2f also specifies as the unusual generation variable that generates unusual reason.Further, intermediate code dependency analysis part 2f judges that whether the intermediate code of judging be used for that specified by reference unusual generation variable judges carrying out before generating intermediate code unusual.Judge when it and to judge intermediate code unusual when carrying out before generating intermediate code, intermediate code dependency analysis part 2f generates from judging the dependence of intermediate code to unusual generation intermediate code, so that keep execution order.To this, can be with reference to Figure 12, wherein S203 is placed in the position that is higher than S102.Further, cause meaning unusually the state (that is, unusual) that generation can not be handled, because divisor f is 0 when the substitution statement (substitute sentence) of S102 was carried out (zero except that) before S203.

Intermediate code parallelization part (parallelization equipment) 2g dispatches intermediate code string the high speed piece H1 according to the dependency analysis information of sending from middle code dependency analysis part 2f, thereby carries out parallelization (referring to Figure 13).At this,, can use the tabulation scheduling method described in the non-patent literature 1 about dispatching method.

The whole intermediate code that generates when reading and when generating run time version by intermediate code, resource allocation unit 3 will be distributed to each variable such as hardware resources such as RSs according to the information that exists of variable in the whole intermediate code.The whole intermediate code that run time version generation unit 4 is distributed to resource converts the run time version of machine language to, and these run time versions is outputed to the outside of compiler apparatus.

＜data 〉

Will describe according to employed data among the compiler apparatus A of present embodiment.In the result shown in Fig. 9 A, variable information calculating section 2a calculates IN12, OUT14 according to each fundamental block in the flow graph of control shown in Fig. 5 B and exists information, DEF13 as definition information as variable.In the result shown in Fig. 9 B, variable information calculating section 2a calculates path input variable X1, path output variable X2, path replacement target variable X3 and path according to result calculated shown in Fig. 9 A and guarantees variable X 4.Fig. 9 C illustrates the generation history of variable pairing, generates described variable pairing by in each fundamental block of the flow graph of control shown in Fig. 5 B variable being replaced with path replacement target variable X3 by execution route intermediate code generating portion 2b.Control flow graph shown in Figure 10 illustrates the execution route that regenerates according to processing, the intermediate code in described processing on the hot path HP of execution route intermediate code generating portion 2b copy Fig. 5 B, and the intermediate code that is copied is carried out variable replace processing.

＜operation 〉

Next operations flows shown in Figure 2 will be described, and with the emphasis that is operating as 2 inside, optimization unit of characteristic of the present invention.At first, when input source program F1, parsing unit 1 carries out grammatical analysis, generating interlude, and is stored to the inside (step n11) of compiler apparatus A.

Then, after the input that receives hot path information F2 (Fig. 1), programming switching unit 2A is stored in its inside (step n12) with hot path information F2.

After step n12, optimize unit 2 and read interlude, the interlude of being read is carried out control flow analysis and data-flow analysis, and analysis result is sent to variable information calculating section 2a.Variable information calculating section 2a is according to optimizing the analysis result that unit 2 obtains, and (IN is OUT) with definition information (DEF) (step n13) for the information that exists of variable in each fundamental block of calculating section program.

Then, there is information (IN in variable information computing unit 2a according to what calculate in step n13, OUT), define the hot path information F2 that imports among information D EF and the step n12, the path input variable X1 of calculating section intermediate code string, path output variable X2, path replacement target variable X3 and assurance variable X 4.Variable information calculating section 2a replaces target variable X3 with the path and sends to execution route intermediate code generating portion 2b, and the path is guaranteed that variable X 4 sends to assurance intermediate code generating portion 2d (step n14).

After step n14, execution route intermediate code generating portion 2b reads hot path information F2 and part intermediate code string, and the copy with the part intermediate code string of being read in the corresponding inter-burst of hot path HP.Further, execution route intermediate code generating portion 2b copies path replacement target variable X3 in the intermediate code string by replacing identifier generates execution route intermediate code string, and the execution route intermediate code string that is generated is sent to judgement intermediate code generating portion 2c (step n15).Further, can be to this with reference to the program among Figure 10.The replacement that the identifier of target variable X3 is replaced in the path meets c → t1, c → t2 and d → t3.

Then, after receiving execution route intermediate code string, judge to be included in judgement intermediate code in the conditional branching intermediate code in the execution route intermediate code string by intermediate code generating portion 2c to be set to not carry out hot path be condition, and store set judgement intermediate code into programming switching unit 2A inside (step n16).

Judgement intermediate code in the conditional branching intermediate code is following corresponding to program among Figure 10.

S32：IF(t1＞0)goto?S4

S92：IF(f＞0)goto?S10

" be provided with judge intermediate code for be condition not carry out hot path " is following corresponding to program among Figure 11.

S202：IF(t1＜＝0)goto?S1

S203：IF(f＜＝0)goto?S1

At this, be from the beginning S1 that hangs down the part intermediate code string of the subroutine that flows thereby the logic of Rule of judgment is inverted target.The result is, when the Rule of judgment after the logic inversion becomes when sure, do not carry out hot path.

Then, guarantee that intermediate code generating portion 2d generates assurance intermediate code string, the path that is used to recover from variable information calculating section 2a receives guarantees variable X 4, and is stored to the inside of programming switching unit 2A.Further, guarantee that intermediate code generating portion 2d will guarantee that intermediate code is arranged in execution route intermediate code string afterwards with structure high speed piece, and be stored to programming switching unit 2A inside (step n17).This is corresponding to be arranged in the program high speed piece H1 (S301:c=t2) that fundamental block B104 makes up Figure 11 afterwards by the fundamental block B103 that will be generated after generating fundamental block B103.

After step n17, the intermediate code generation unit 2e of branch reads out in the conditional branching intermediate code in the execution route intermediate code string of storing in the step 16.Then, the branch's intermediate code in the intermediate code generation unit 2e of the branch conditional branching intermediate code is set to begin to carry out from branch's intermediate code starting point, and the conditional branching intermediate code that will be provided with like this stores the inside of programming switching unit 2A into.Further, the intermediate code generation unit 2e of branch part intermediate code is set to subroutine, and the result is stored into the inside (step n18) of compiler apparatus A.

In the program of Figure 11, this is corresponding to the intermediate code S1 that corresponding branch intermediate code among conditional branching intermediate code S202 and the intermediate code S203 of branch is branched off into as the piece B1 of subprogram starting point.Execution route intermediate code string is corresponding to the string in Figure 11 left side, and subroutine part intermediate code is corresponding to the string on Figure 11 right side.

After step n18,2 pairs of unit of optimization are stored in the interlude of compiler apparatus A inside and handle to eliminate redundancy.Optimize unit 2 and will be performed the inside (step n19) that the interlude of eliminating redundant processing stores compiler apparatus A into.Eliminate redundant handle with above-mentioned non-patent literature in describe the same, and its example comprises the processing of to operate in rain and carrying out in order to eliminate.

After step n19, intermediate code dependency analysis part 2f carries out dependency analysis (referring to Figure 12) to the intermediate code in the interlude that is stored in compiler apparatus A inside, and will send to intermediate code parallelization part 2g as the dependency analysis information of its analysis result.Intermediate code dependency analysis part 2f carries out dependency analysis (step n20) to high speed piece H1 especially when considering above-mentioned unusual generation intermediate code.

After step n20, intermediate code parallelization part 2g carries out parallelization according to the dependency analysis information that receives from middle code dependency analysis part 2f to the interlude that is stored in compiler apparatus A inside.

＜variable information computing 〉

Then the variable information computing is described with reference to Fig. 3.This is corresponding to step n13 among Fig. 2 and n14.In step n13, optimize the 2 pairs of part intermediate codes in unit and carry out control flow analysis and data-flow analysis.Then, in step n32, variable information calculating section 2a is according to the result of control flow analysis and data-flow analysis, and (IN is OUT) with definition information (DEF) for the information that exists of variable in the calculating section program.

Subsequently, that is calculated in step n32 exists in the middle of the information IN, and variable information calculating section 2a will be defined as path input variable X1 as the information IN that exists of the fundamental block of hot path starting point; That is calculated in step n32 exists in the middle of the information OUT, and variable information calculating section 2a will be defined as path output variable X2 (step n33) as the information OUT that exists of the fundamental block of hot path terminal point.

After step n33, variable information calculating section 2a will and also be defined as the path as the variable of path input variable X1 as definition information D EF on the hot path and replace target variable X3 (step n34).

Subsequently, variable information calculating section 2a will replace target variable X3 and also be defined as the path as the variable of path output variable X2 and guarantee variable X 4 as determined path in step n34, and the path is guaranteed that variable X 4 and path replace target variable X3 and send to execution route intermediate code generating portion 2b (step n35).

＜variable is replaced and is handled 〉

Receiving after the data of target variable X3 are replaced in the path that variable information calculating section 2a sends, execution route intermediate code generating portion 2b reads part intermediate code and hot path information F2, the corresponding intermediate code of hot path HP of copy and part intermediate code, and target variable X3 is replaced in the path of copy intermediate code carry out variable replacement processing repeatedly.By carrying out above-mentioned processing, execution route intermediate code generating portion 2b generation pass is replaced target variable X3 and is replaced the pairing (hereinafter referred to as " variable pairing ") of handling variable after the replacement that obtains by variable.This is corresponding to the step n15 among Fig. 2.

Describe the variable that is undertaken by execution route intermediate code generating portion 2b with reference to Fig. 4 below and replace processing.Intermediate code performance variable replacement processing (step n41) repeatedly to copy.Judge that then the path replaces target variable X3 whether be cited (step n42) in intermediate code.When judging the path replace target variable X3 and be not cited in step n42, flow process advances to step n45.

When in step n42, judging it and be cited, judge that the path replaces target variable X3 and whether be comprised in the variable pairing that has produced (step n43).Replace target variable X3 and do not have when involved when judge the path in step n43, flow process advances to step n45.

When judging it when involved in step n43, the identifier that target variable X3 is replaced in the path that is cited in directive statement is replaced by the variable (step n44) that comprises in the described pairing, and flow process advances to step n45 then.

Carrying out above-mentioned processing (step n42-step n44) afterwards, judging whether path replacement target variable X3 is defined (step n45) in intermediate code.When judging it be not defined in step n45, flow process withdraws from circulation n41-n49.When in step n45, judging it and be defined, judge that the path replaces target variable X3 and whether be comprised in the existing variable pairing (step n46).When in step n46, judging it when involved, eliminate the path and replace target variable X3 (step n47), flow process advances to step n48 then.Do not have when involved when judge it in step n46, flow process advances to step n48, and execution in step n47 not.

In step n48, determine to be replaced by the variable that target variable X3 is replaced in defined path, after this, defined path is replaced target variable X3 and is replaced by determined variable.Then, produce the pairing that the path is replaced target variable X3 and replaced the back variable again.After having carried out above-mentioned processing, flow process withdraws from circulation n41-n49.

＜operation example 〉

The concrete example of the operating process shown in Fig. 2 then will be described with reference to Fig. 5, Fig. 9-Figure 12, thus among the exemplary plot 5A as the situation of the subprogram of a source program F1 part.Suppose that at this intermediate code in this example expresses with the intermediate code that approaches source program F1.

In step n11,1 pair of subprogram of parsing unit is carried out grammatical analysis with the generating portion intermediate code, and is stored to the inside of compiler apparatus A.Then, in step n12, programming switching unit 2A is after the input that receives hot path information F2, store hot path information F2 the inside of programming switching unit 2A into, the path HP that transmits according to fundamental block B1, B2, B4, B5, the order of B7 of control flow graph in F2 is used as hot path (referring to Fig. 5)

In step n13, optimize unit 2 and carry out control flow analysis and data-flow analysis, and having information IN, have information OUT among the fundamental block B1-B7 (Fig. 9) of variable information calculating section 2a calculation control flow graph (referring to Fig. 5 B), definition information D EF.For example, the information IN that exists of fundamental block B1 (referring to Fig. 5 B) is included in variable among the IN12 of piece B1 of Fig. 9 A, and the same information OUT that exists is included in variable among the OUT14 of piece B1 among Fig. 9 A.Further, the definition information in the same fundamental block is included in the variable among the DEF13 of fundamental block B1 among Fig. 9 A.

Then, in step n14, variable information calculating section 2a is according to the hot path information F2 that has information and definition information and import in step n12 shown in Fig. 9 A, and target variable X3 is replaced in calculating path input variable X1, path output variable X2, path and the path guarantees variable X 4.

Path input variable X1 is the variable that is present in the porch of hot path HP, promptly fundamental block B1 have an information IN (referring to Fig. 5 B), it is included in the variable among the IN2 of piece B1 shown in Fig. 9 A.Path output variable X2 is the variable that is present in the exit of hot path HP, promptly fundamental block B7 have an information OUT (referring to Fig. 5 B), it is included in the variable among the OUT14 of piece B7 shown in Fig. 9 A.The path is replaced target variable X3 and is comprised the variable (referring to Fig. 9 A) that is comprised among the DEF13 among fundamental block B1, B2 on path input variable X1 and the hot path, B4, B5, the B7.The path guarantees that variable X 4 is included in the variable among path output variable X2 and the path replacement target variable X3.

In this example, the variable that comprises among the DEF13 shown in Fig. 9 A for a, c, d, f, x}, path input variable X1 be b, c, d, e, g, z, w, y}, thereby make that { c, the productive set of d} (productset) become path replacement target variable X3.Further, path output variable X2 be a, c, e, f, z, w, x, y}, thereby make that { c} is that the path guarantees variable X 4.Variable information calculating section 2a replaces target variable X3 with the path of being calculated and sends to execution route intermediate code generating portion 2b, and the path of being calculated is guaranteed that variable X 4 sends to assurance intermediate code generating portion 2d.

Then, in step n15, execution route intermediate code generating portion 2b reads part intermediate code and hot path information F2, the intermediate code S1-S15 on the hot path HP of copy Fig. 5, and generate the new fundamental block B12-B152 that comprises the intermediate code that copies.Then, target variable X3 is replaced in the path of copy intermediate code carry out variable replacement processing, to generate the variable pairing.Figure 10 shows by the copy intermediate code being carried out variable and replaces processing and newly-generated execution route.

At this, replace the operation of handling (Fig. 4), fundamental block B12 and B22 that example is shown in Figure 10 with describing variable.At first, before variable replace to be handled, be included among the fundamental block B12 the intermediate code that comprised among the intermediate code that copies and the fundamental block B1 shown in Fig. 5 B identical.Among the intermediate code S12 that in fundamental block B12, is copied, path replacement target variable X3 (=(the step n42 of Fig. 4: be) c) is cited.Yet, do not have the pairing of variable c.That is the pairing of variable c is denied (pairing generates in step n48) not in this dot generation thereby be judged as in step n43.Therefore, the execution route intermediate code generating portion 2b variable c that misaligns a code S12 carries out variable and replaces and handle.

Further, path replacement target variable X3 is not defined as " c " among the intermediate code S12, but is defined as " a ", thereby is judged as in step n45 not.Therefore, check the variable of the intermediate code S22 that the next one is copied now.Execution route intermediate code generating portion 2b judges in intermediate code S22 and to have defined the path replace target variable X3 (=c) (being among the step n45), and the pairing (among the step n43 of Fig. 4 not) that does not have variable c before replacing variable.According to above-mentioned judged result, execution route intermediate code generating portion 2b replaces with the identifier of variable c the t1 that does not use at definitional part in variable famous-brand clock and variable pairing, so that regenerate variable pairing (c, t1) (step n48).

Then, because in intermediate code S32, do not exist the path to replace quoting and defining of target variable,, do not replace processing and do not carry out variable so execution route intermediate code generating portion 2b notices the perform statement S42 of next fundamental block B22.The pairing of the replacement variable of the row of B12 generates the generation state that history 50 shows pairing after fundamental block B12 being carried out variable replacement processing in Fig. 9 C.

Subsequently, because path input variable X1 (=c) be cited (being among the step n42) and the directive statement S42 before replacing variable in have the pairing (c of variable c, t1), so execution route intermediate code generating portion 2b replaces with t1 at invocation point with the identifier of variable c.Then, judge the path replace target variable X3 (=c) in intermediate code S42, be defined (being among the step n45) and have the pairing (c of variable c, t1) afterwards, execution route intermediate code generating portion 2b eliminates the pairing (c that has variable c, t1), at the defining point place identifier of variable c being replaced with then not have the t2 that uses in variable famous-brand clock and variable pairing, match (c, t2) (step n48) so that regenerate variable.

In this example, Fig. 9 c shows the history 50 of the variable pairing that is produced when performance variable replace to be handled intermediate code S152 until fundamental block B72 repeatedly at execution route intermediate code generating portion 2b.

Execution route intermediate code generating portion 2b is with the variable pairing (c of the piece B72 shown in Fig. 9 C, t2) and (d, t3) send to assurance intermediate code generating portion 2d, and will send to judgement intermediate code generating portion 2c at the intermediate code S12-S152 in the execution route intermediate code shown in Figure 10.

Then, in step n16, the logic of conditional branching intermediate code S32 (if of Figure 10 (t1＞0) goto S4) in the intermediate code that judgement intermediate code generating portion 2c counter-rotating is received and the Rule of judgment of conditional branching intermediate code S92 (if of Figure 10 (f＞0) goto S10) is so that be set to satisfy the condition of not carrying out hot path HP with conditional branching intermediate code S202 (if of Figure 11 (t1＜=0) goto S1) and conditional branching intermediate code S203 (if of Figure 11 (f＜=0) goto S1).Generate fundamental block B104 thus.The fundamental block B104 that judgement intermediate code generating portion 2c will generate by this way stores the inside of programming switching unit 2A into.

Subsequently, in step n17, guarantee that intermediate code generating portion 2d is according to variable pairing (c, t2) and from the path that variable information calculating section 2a sends guarantee variable X 4{c}, generate the code S301 that guarantees intermediate code, wherein identifier t2 is returned to the identifier of indieating variable c, and generates the fundamental block B103 (Figure 11) that comprises intermediate code S301.Further, guarantee that intermediate code generating portion 2d is arranged in fundamental block B103 after the fundamental block B104 among the adjacent programming switching unit 2A.High speed piece H1 constitutes (H1 of Figure 11) by fundamental block B104 and fundamental block B103.

Then, in step n18, the intermediate code generating portion 2e of branch reads fundamental block B104, and the branch's intermediate code of each is set to be branched off into the branch's intermediate code as the intermediate code S1 of the piece B1 of subprogram starting point among conditional branching intermediate code S202 and the S03.Branch's intermediate code generating portion 2e stores set branch's intermediate code into the inside of programming switching unit 2A then.

Further, the intermediate code generating portion 2e of branch generates the intermediate code S151 of branch that is branched off into intermediate code 16 from the intermediate code S15 of part intermediate code, the intermediate code S151 of branch that is generated is arranged as immediately following after directive statement S15 (referring to the S151 among Figure 11), and is stored to the inside of compiler apparatus A.Further, the intermediate code generating portion 2e of branch is arranged into fundamental block B104 immediately following after the intermediate code S0 as in the program of Figure 11, and with fundamental block S103 be arranged into intermediate code S16 soon before.

In step n19, the interlude of optimizing among the 2 couples of Figure 11 in unit carries out redundancy elimination processing then.The processing of step n19 is not a key character of the present invention, so ignore the explanation to it.Explanation hypothesis Figure 11 self hereinafter carries out this step interlude afterwards.

Then in step n20, intermediate code dependency analysis part 2f carries out dependency analysis among Figure 12 to the high speed piece H1 among Figure 11.Intermediate code dependency analysis part 2f generates from branch condition intermediate code S202 and branch condition intermediate code S203 to the dependence that guarantees intermediate code S301, so that branch condition intermediate code S202 and branch condition intermediate code S203 carry out before the intermediate code S301 guaranteeing.Further, in Figure 12, intermediate code dependency analysis part 2f specifies and causes unusual unusual generation intermediate code S102 and generate variable f unusually as generating unusual reason (not allowing denominator is zero division), and generate from judging the dependence of intermediate code S203, so that before unusual generation intermediate code S102, carry out with the corresponding judgement intermediate code of unusual generation variable f S203 to unusual generation intermediate code S102.

The unusual situation that generates will be described now.If intermediate code S102 carried out before judging intermediate code S203, and the value of variable f is zero, will generate zero so and remove in intermediate code S102.Therefore, in processor or operating system, generate unusually.In addition also has following unusual example.That is there is such situation in hypothesis now, and wherein variable f is the pointer variable in the C language, carries out indirect referencing by intermediate code S102 to causing variable f.At this moment, similarly, if intermediate code S102 carried out before judging intermediate code S203, and variable f keeps the storage address of unloaded address or disable access, also can take place unusual in processor and operating system.

In following step n21, as shown in figure 13, intermediate code parallelization part 2g dispatches with according to the dependency analysis information of being sent by intermediate code dependency analysis part 2f (referring to Figure 12) and parallelization intermediate code string.By giving priority to the degree of depth of dependence shown in Figure 12, Figure 13 shows the program of having used the tabulation dispatching method.Symbol " // " expression directive statement is following closely carried out concurrently.

＜improve example 1〉(acceptable unusual generation: referring to Figure 14-Figure 17)

In the above-described embodiments, intermediate code dependency analysis part 2f generates the dependence from judgement intermediate code S203 to unusual generation intermediate code S102 among Figure 12, thus not feasible can the generation unusually improperly.Yet, in improving example 1, do not generate such dependence.That is execution route intermediate code generating portion 2b regenerates the intermediate code S401 shown in the program among Figure 14, after this, generates the dependence from middle code S401 to unusual generation intermediate code S102 shown in Figure 15.

That is execution route intermediate code generating portion 2b is inserted into variable and code on the head of the execution route intermediate code string of following generation.

-generating reentry point maintenance variable, this variable is to be used for keeping the special variable of return address when interruption routine is returned.

-generating and return the use intermediate code, it is to be used for storing the return address into intermediate code (reentry point is provided with the instruction code maker) that reentry point keeps variable.

Further, intermediate code dependency analysis part 2f operates, make and the not dependence between judgement intermediate code relevant and unusual generating code generate from returning and use the dependence (second dependency parser) of intermediate code then to unusual generation intermediate code with above-mentioned unusual generation variable.

Hereinafter, with reference to Figure 14-Figure 17 above-mentioned processing is described in more detail.At first, in step n15, the reentry point shown in the intermediate code S401 is kept variable R A among execution route intermediate code generating portion 2b generation Figure 14, will be used for storing reentry point address S1 into variable R A return then and use intermediate code S401 to be inserted into the head of execution route intermediate code string.

Then, in step n20, intermediate code dependency analysis part 2f generates from returning and uses the dependence of intermediate code S401 to unusual generation intermediate code S102.At this moment, as shown in figure 15, intermediate code dependency analysis part 2f does not generate the judgement intermediate code S203 relevant with above-mentioned unusual generation variable and generates dependence between the intermediate code S102 unusually.

Figure 16 shows resulting result when middle code parallelization part 2g dispatches by use dependency analysis information as shown in figure 15.In the drawings, make the unusual intermediate code S102 that generates before judging intermediate code S203, carry out by dispatching.

Figure 17 illustrates when generating when unusual the sketch of executable operations in system among the intermediate code S102 unusual the generation.At first, except a series of interruptions, judge the type of interrupting.Then, in computer system (generating the processing routine totalizer of using when interrupting), prepare the interruption routine that will be branched to the address that is kept in the reentry point maintenance variable in advance.Then, when generation is unusual in unusual generation intermediate code S102, control is converted to interrupt handling program (referring to the dotted line A1 among Figure 17) by processor or operating system, and processing is branched off into the address S1 (referring to the dotted line A2 among Figure 17) that is kept the reentry point maintenance variable R A from interrupt handling program.Resource allocation unit 3 keeps variable to be distributed in the memory element reentry point, for example specific memory device or specific register.

In the situation of as shown in figure 16 above-mentioned high speed piece H2, compare with as shown in figure 13 high speed piece H1, there is not the quantitative variation of execution in step, on performance, there is not special improvement yet.Yet, on the whole, in high speed piece H1, may produce under the following situation realizing the obstacle of faster execution.

-to generate unusual possibility lower.

-generate from judging the dependence of intermediate code S203 to unusual generation intermediate code S102, judge that wherein intermediate code S203 is that the program from Figure 12 etc. generates.

With respect to these inconvenience, in this improvement example, can remove the dependence itself that may be called the obstacle of carrying out at a high speed.Therefore, can realize the faster execution of high speed piece.

＜improvement example 2〉(steady state value is propagated and is improved 1)

In the above-described embodiments, as hot path information F2 (referring to Fig. 1), except the information of those demonstrations by the predetermined execution route of user, the user can also input variable keep information, and it is the information of being quoted by among the hot path HP that variable kept.The value of variable is the value that is very likely kept by variable in the variable maintenance information.

By utilizing the variable among the hot path F2 to keep information, the intermediate code generating portion 2e of branch replaces with the invocation point of variable among the high speed piece H3 by the variable maintenance value that information kept.Further, when the value that keeps by variable become with variable maintenance information in the value kept not simultaneously, the intermediate code generating portion 2e of branch can be in the head formation condition branch intermediate code (being called steady state value Rule of judgment branch intermediate code) (the second execution route code generator) of the execution route intermediate code string that will begin from part intermediate code starting point.

Describe above-mentioned processing situation in detail with reference to Figure 18-Figure 20 hereinafter.Figure 18 show when the variable b value in the variable maintenance information among the hot path information F2 for " 5 " variable e value when " 8 ", the result of the processing of being undertaken by the intermediate code generating portion 2e of branch.In Figure 18, the invocation point of variable b and variable e is by value of replacing with " 5 " respectively and value " 8 ".Further, at the head generation steady state value Rule of judgment intermediate code S411 of branch of execution route intermediate code string, its value that keeps at variable b is branched off into intermediate code S1 when not being " 5 ".Similarly, generate the intermediate code S412 of steady state value Rule of judgment branch corresponding to variable e.

In step n18, the variable that the intermediate code generating portion 2e of branch fetches among the hot path information F2 keeps information, and the invocation point of the variable of high speed piece H3 is replaced with the value that is kept in the variable maintenance information.

The value that the value that Figure 18 illustrates variable b in the variable maintenance information becomes " 5 " and variable e becomes the situation of " 8 ".Compare as can be seen with Figure 11, the invocation point of variable b and variable e is by value of replacing with " 5 " respectively and value " 8 ".Further, during value after value that variable keeps is different from replacement, intermediate code generating portion 2e formation condition branch of branch intermediate code, thus carry out from 0 starting point of part intermediate code.In Figure 18, when the value that is kept by variable b was not " 5 ", the intermediate code generating portion 2e of branch at first generated the intermediate code S411 of steady state value Rule of judgment branch that is branched off into intermediate code S1 at the head of execution route intermediate code string.Similarly, branch's intermediate code generating portion 2e generates the intermediate code S412 of steady state value Rule of judgment branch corresponding to variable e.

In next step n19, the interlude of optimizing among the 2 couples of Figure 18 in unit carries out redundancy elimination processing.Figure 19 illustrates and carries out the resulting result of redundancy elimination processing.Propagate the effect of optimizing by steady state value, eliminated intermediate code S521 and intermediate code S82, and eliminate optimization by inessential code and eliminated judgement intermediate code S203.Figure 20 illustrates execution in step n20 and the resulting result of step n21.Compare with the situation among Figure 13, step number has reduced by a step.

As mentioned above, in the middle of the variable of in hot path HP, being quoted, when the value that variable kept is limited to (localize) for particular value, can further improve the speed of high speed piece.

＜improvement example 3〉(steady state value is propagated and is improved 2)

In above-mentioned improvement example 2, the intermediate code generating portion 2e of branch has carried out the steady state value replacement processing of steady state value Rule of judgment branch intermediate code and has generated handling to high speed piece H1.Yet the intermediate code generating portion 2e of branch can copy high speed piece H1 earlier, then high speed piece H1 is carried out the steady state value replacement processing of steady state value Rule of judgment branch intermediate code and generate handling.Further, the intermediate code generating portion 2e of branch can generate the pseudo-intermediate code that only is made of label, described label is positioned at before the starting point of the high speed piece H1 before the copy, and the branch target setting of steady state value Rule of judgment branch intermediate code can be set to this puppet intermediate code.Further, the branch's intermediate code that is branched off into the intermediate code that is right after part intermediate code terminal point can be inserted into the position that is right after the terminal point of high speed piece H1 before the copy.

The processing of above-mentioned situation is described with reference to Figure 21-Figure 22 hereinafter.In step n18, the intermediate code generating portion 2e of branch copy high speed piece H1, and replace processing, thus the variable among the high speed piece H1 that is copied is replaced with steady state value.In Figure 21 copy among the high speed piece H4, the invocation point of variable b and variable e is replaced with steady state value " 5 " and steady state value " 8 " respectively.

Further, the intermediate code generating portion 2e of branch generates the pseudo-intermediate code that only is made of label, described label is positioned at before the starting point of the high speed piece H1 before the copy, and generating branch's intermediate code, the intermediate code that this branch's intermediate code is branched off into is positioned at after the terminal point followed by the part intermediate code of high speed piece H1 terminal point before the copy.Intermediate code S501 is the intermediate code that only has label in Figure 21, and the intermediate code S502 of branch is the intermediate code that is branched off into intermediate code S16, and described intermediate code S16 is the intermediate code (the second branch code maker) after the part intermediate code terminal point.

Further, branch's intermediate code generating portion 2e branch target of copying the steady state value Rule of judgment branch intermediate code among the high speed piece H1 is set to the pseudo-intermediate code (the 3rd execution route code generator) that generated.In Figure 21, the branch target of the intermediate code S413 of steady state value Rule of judgment branch is set to intermediate code S501, and similarly, the branch target of the intermediate code S414 of steady state value Rule of judgment branch is set to intermediate code S501.Figure 22 shows execution in step n19, step n20 and the resulting result of step n21.Even when the value that keeps in value that variable keeps and hot path information F2 is different, carry out control and can be converted to another high speed piece, by the program conversion of carrying out in the above described manner, the speed of described another high speed piece is compared with the part intermediate code and is improved.Therefore, the high speed that can quicken hot path HP is carried out.

＜improvement example 4〉(being branched off into the middle point of part intermediate code string)

In above-mentioned＜operation example〉in, branch's intermediate code is set to be branched off into as the part intermediate code from high speed piece H1 and strings a little intermediate code S1, shown in conditional branching intermediate code S202 and S203 among Figure 11.Yet, thereby by being to be branched off into the middle some omission of part intermediate code string the part of part intermediate code string is carried out with the high speed block structure, can shorten the implementation of subprogram, perhaps reduce part intermediate code string.

Further, also can use conversion to part intermediate code string, make the intermediate code in the high speed piece can skip (crossing) conditional branching intermediate code, intermediate code in the described high speed piece is corresponding to the intermediate code in the fundamental block (for example, the fundamental block B1 in Figure 11 situation, fundamental block B4 and fundamental block B7) at a plurality of controls interflow in the part intermediate code string.Hereinafter this conversion will be described in further detail.

As shown in figure 23, in the total of as shown in Figure 1 compiler apparatus A, increase the sink block definition and replaced part 2h.The sink block definition is replaced part 2h and is at first calculated sink block, and described sink block is the fundamental block that hot path HP goes up a plurality of controls interflow.Or rather, the fundamental block that is comprised in inevitably from the whole visible path of hot path origin-to-destination is sink block (fundamental block that comprises starting point and terminal point also is a sink block).

Then, when having the variable that is defined by sink block, to carrying out following processing at the defining point of variable and the identifier at invocation point place, described variable appears at the defining point of defined variable from sink block in the entire path of hot path HP outlet.That is, by variable name tabulation, the identifier of variable is replaced with the identifier that not have appearance in the variable name tabulation with reference to the contents such as identifier that show variable.Yet, if the value that in a plurality of periods, exists variable to keep, so by existing period ground will exist the defining point of variable in the period and the variable identifier at invocation point place to replace with the identifier (sink block defining variable alternative) that does not have in the variable name tabulation.

Further, when the variable that exists in the porch of hot path HP by the sink block definition, generate at the destination county of hot path HP and will revert to the intermediate code string (converge defining variable and guarantee code generator) of original identifier by the identifier of the variable of sink block definition.

The traffic flow information that part 2h changes reformed identifier is replaced in the sink block definition.In the process that changes traffic flow information, can upgrade traffic flow information once more about all variablees.

Further, the intermediate code generating portion 2e of branch shown in Figure 23 can carry out following processing.That is the intermediate code generating portion 2e of branch is by execution route intermediate code string is comprised among the read routine converting member 2A in order over the ground conditional branching intermediate code and the conditional branching intermediate code in the part intermediate code string.Further, branch's intermediate code generating portion 2e extracts that control is converted to from the conditional branching intermediate code of being read and does not appear at intermediate code on the hot path.Branch's intermediate code of branch's intermediate code generating portion 2e conditional branching intermediate code is set to not appear at the intermediate code on the hot path then.Therefore, the condition of the conditional branching intermediate code that is comprised when execution route intermediate code string by the time, can be branched off into the intermediate code in the middle of the former part intermediate code string that should carry out.

Further, the intermediate code dependency analysis part 2f shown in Figure 23 can carry out following processing.That is intermediate code dependency analysis part 2f extracts the conditional branching intermediate code of at first finding towards high speed piece terminal point from middle code in the middle of the intermediate code of high speed piece, by the intermediate code (except the conditional branching intermediate code) that sink block generated.Further, intermediate code dependency analysis part 2f generates the dependence to the conditional branching intermediate code of being extracted of the intermediate code generate from sink block.Therefore, can obtain following advantage.

Intermediate code parallelization part 2g can dispatch the intermediate code that generates from sink block, skips the conditional branching intermediate code that is found towards high speed piece starting point.Yet,, can not dispatch by skipping the conditional branching intermediate code that at first is found to be towards high speed piece terminal point by carrying out above-mentioned control.

Further, the intermediate code dependency analysis part 2f shown in Figure 23 can carry out following processing.That is intermediate code dependency analysis part 2f is not the intermediate code that fundamental block generated of sink block in the middle of high speed piece intermediate code, extracts the conditional branching intermediate code of at first finding towards high speed piece starting point from middle code.Further, intermediate code dependency analysis part 2f generates from the conditional branching intermediate code extracted to by the dependence that is not the intermediate code that fundamental block generated of sink block.

Further, the intermediate code dependency analysis part 2f shown in Figure 23 can carry out following processing.That is intermediate code dependency analysis part 2f is not the intermediate code that fundamental block generated of sink block in the middle of high speed piece intermediate code, extracts the conditional branching intermediate code of at first finding towards high speed piece terminal point from middle code.Further, intermediate code dependency analysis part 2f generates from by not being the dependence of the intermediate code that fundamental block generated of sink block to the conditional branching intermediate code of being extracted.Therefore, intermediate code parallelization part 2g can not dispatch by skipping by the intermediate code that basic blocks generated and the conditional branching intermediate code that are not sink block.

Revise operations flows among Fig. 2 according to above-mentioned improvement to control.That is, as shown in figure 24, in the operations flows of Fig. 2, increased step n40, in the intermediate code that step n40 is generated, the identifier of the variable that defines in the sink block is replaced.Further, change step n18, thereby make the branch's intermediate code in the conditional branching intermediate code of execution route intermediate code string be branched in the centre of part intermediate code.Further, change step n20 to generate the dependence between the intermediate code among the high speed piece H4, the target of the scheduling of carrying out thereby the feasible intermediate code that is only generated by sink block becomes skip condition branch intermediate code.In addition, after middle program is carried out parallelization, increase step n22, be used for once more middle program being carried out redundancy and eliminate processing.

Therefore, by generating by intermediate code that sink block generated with by not being the intermediate code that fundamental block generated of sink block and the dependence between the conditional branching intermediate code, can in the program transfer process, guarantee before the conversion and the equivalence of the program after the conversion, in conversion, branch be carried out in the centre of part intermediate code string.

Figure 25 A and Figure 25 B show by partly changing the example of the source program that source program obtains among Fig. 5 A and Fig. 5 B.Intermediate code S8 and intermediate code S9 change from the program structure shown in Fig. 5 A and Fig. 5 B to obtain.With reference to Figure 26-Figure 32 key step among Figure 24 is described hereinafter.

In step n40, image pattern 26 upgrades the program among Figure 25 A and Figure 25 B like that.That is in Figure 25 A and Figure 25 B, variable a is by the intermediate code S1 definition of sink block B1.The value that is kept in intermediate code S1, intermediate code S6 as the definition of variable a among the variable a, S12 quotes by intermediate code.Further, because variable a also is present in the exit of fundamental block B7, the value that variable a is kept is also quoted after fundamental block B7.Further, because variable a also is present in the exit of fundamental block B7, so the value that variable a is kept in the intermediate code S10 as the definition of variable a also is cited after fundamental block B7.

Therefore, following each period constituted variable a identical have a period.

-begin the period to fundamental block B7 outlet from middle code S1 through fundamental block B2, fundamental block B4 and fundamental block B6.

-begin the period to fundamental block B7 outlet from middle code S6 through fundamental block B4 and fundamental block B6.

-begin to the period of the outlet of fundamental block B7 from middle code S10.

Therefore, sink block definition replacement part 2h replaces with the identifier t10 that produces again with defining point and the invocation point (being present in existing in the period of variable a) of variable a.Further, the sink block definition is replaced part 2h and is generated intermediate code S151, is used at the destination county of hot path HP identifier t10 being reverted to identifier a.

Similarly, in variable f, from middle code S8 begin to period of fundamental block B7 inlet and from middle code S15 begin period at least to fundamental block B7 outlet be have each other different value variable f have a period.

Therefore, sink block definition replacement part 2h carries out following processing.

-will be present in the defining point and the invocation point that begin the variable f to the period of fundamental block B7 inlet from middle code S8 to replace with the identifier t12 that regenerates.

-will be present in the defining point that begins to the period of fundamental block B7 outlet from middle code S15 to replace with the identifier t13 that regenerates.

Further, the processing that part 2h generates intermediate code S153 is replaced in the sink block definition, and this intermediate code S153 is used at the hot path destination county identifier t13 being reverted to identifier f.

Further, the sink block definition is replaced part 2h and is replaced variable c in an identical manner.In addition, the sink block definition is replaced shown in the part 2h image pattern 27A and is changed the traffic flow information of reformed identifier like that.

In step n14, shown in Figure 27 B, replace target variable X3 and path assurance variable X 4 by intermediate code calculating path input variable X1, path output variable X2, the path of Figure 26.Yet, in example, do not have the path to guarantee variable X 4.

In step n15, to path shown in the intermediate code S52 among Figure 28, intermediate code S203 and Figure 27 C replace target variable X3 (=d) carry out identifier to replace and handle, so that generate the execution route intermediate code string B200 shown in Figure 28.

In step n16, shown in conditional branching intermediate code S202 among Figure 28 and conditional branching intermediate code S203, the conditional branching intermediate code is set, wherein among Figure 26 the condition of the judgement intermediate code among conditional branching intermediate code S3 and the conditional branching intermediate code S9 by logic inversion.

In step n18, the branch target of conditional branching intermediate code S202 in the Figure 28 of this position and conditional branching intermediate code S203 is set to be branched to the centre of part intermediate code string.That is branch's intermediate code of conditional branching intermediate code S202 is set to intermediate code S6, and branch's intermediate code of conditional branching intermediate code S203 is set to intermediate code S12.

In step n19, the interlude among Figure 28 is carried out redundancy eliminate optimization process.In Figure 28,, therefore eliminate a part of program as shown in figure 29 like that owing to there is not the path can arrive fundamental block B11 and fundamental block B21.

In step n20, carry out the dependency analysis of high speed piece H4.At this moment, except the dependency analysis (rely on and generate) that carries out routine data, also carry out such dependency analysis (rely on and generate), it makes can not dispatch by skip the conditional branching intermediate code of being found along the terminal point direction of high speed piece in the intermediate code that is generated by sink block.For example, as shown in figure 30, intermediate code S12, intermediate code S22 and intermediate code S82 are the intermediate codes that is generated by sink block.Therefore, generate following dependence respectively.

-dependence from middle code S12 to conditional branching intermediate code S202

-dependence from middle code S22 to conditional branching intermediate code S202

-dependence from middle code S82 to conditional branching intermediate code S203

Data dependence about variable t11 also is present in from middle code S22 to conditional branching intermediate code S202.Further, the data dependence about variable t12 also is present in from middle code S82 to conditional branching intermediate code S203.

Further, in the intermediate code that generates by the fundamental block that is not sink block, generated dependence, made and can not dispatch by skip condition branch intermediate code.For example, as shown in figure 30, intermediate code S42 and intermediate code S52 are the intermediate codes that is generated by the fundamental block that is not sink block.Therefore, generate following dependence respectively.

-dependence from conditional branching intermediate code S202 to intermediate code S42

-dependence from conditional branching intermediate code S202 to intermediate code S52

-dependence from middle code S42 to conditional branching intermediate code S203

-dependence from middle code S52 to conditional branching intermediate code S203

Data dependence about variable t3 also is present in from middle code S52 to conditional branching intermediate code S203.

In step n21, such as shown in figure 31 according to dependence shown in Figure 20, scheduling intermediate code string among the piece H4 after parallelization.In step n22, further, the interlude of Figure 31 is carried out redundancy eliminate processing.As scheme as shown in the S32, by using equivalence statement, eliminate intermediate code S8, intermediate code S15 and intermediate code S153 in example shown in the above-mentioned patent documentation 1.For example, Figure 31 from middle code S82 to the path of intermediate code S8, do not have the intermediate code that is used for new variables d1 more or be used for the more intermediate code of new variables t12.Therefore, intermediate code S8 is judged as redundant computation, thereby eliminate it.Further, intermediate code S15 among Figure 31 and intermediate code S153 are judged conduct than intermediate code S150 and the more redundant computation of intermediate code S1530, thereby eliminate them.

＜improvement example 5〉(probability)

In the above-described embodiments, optimize unit 2 and can set up or invalid probability, generate the probability that unusual probability and particular variables keep particular value, come the mode of control transformation according to the Rule of judgment that hot path HP goes up the conditional branching intermediate code.Can obtain these probabilities itself from hot path information F2.

For example, in the program of Fig. 5 A and Fig. 5 B, the probability that the judgement of the intermediate code S3 of assumed condition branch is set up is that the probability that the judgement of p1, conditional branching intermediate code S9 is set up is p2.Therefore, the probability of execution hot path HP is the product value of probability p1 and probability p2, i.e. p1*p2.When certain certain threshold level T1 is set to eigenvalue (proper value), and product value p1*p2 is during greater than described threshold value T1, and the program shown in Fig. 5 A and Fig. 5 B is converted into program shown in Figure 13 (first execution route conversion judgment device).

Further, when the unusual probability of generation is p3 in unusual generation intermediate code S10 shown in Fig. 5 A and Fig. 5 B, if probability p3 is greater than T2 when certain certain threshold level T2 is set to eigenvalue, program is converted into program shown in Figure 13 shown in Fig. 5 A and Fig. 5 B so.If less than, program shown in Fig. 5 A and Fig. 5 B is converted into program shown in Figure 16 (the 3rd execution route conversion judgment device) so.

Further, each among hypothesis amount b and the e is respectively p4 and p5 at the probability that the fundamental block B1 porch shown in Fig. 5 A and Fig. 5 B has value " 5 " and " 8 " respectively.The result is provided as eigenvalue with certain certain threshold level T3, and when the product value of p1*p2*p4*p5 during greater than threshold value T3, program shown in Fig. 5 A and Fig. 5 B is converted into program shown in Figure 20 (the 5th execution route conversion judgment device).

Threshold value T1, threshold value T2 and threshold value T3 can obtain from hot path information F2, and perhaps these threshold values can be by optimizing the value that unit 2 keeps.

＜improvement example 6〉(average execution time)

In the above-described embodiments, optimizing unit 2 can be by using average next definite intermediate code finally to be exported of execution time.For example, in Fig. 5 A and Fig. 5 B, the intermediate code S3 of assumed condition branch is that genuine probability is p1, is p2 and conditional branching intermediate code S9 is genuine probability, and these probabilities can obtain from hot path information F2.

Further, in the program shown in Fig. 5 A and Fig. 5 B, make the following assumptions.

The time that-order is carried out fundamental block B1, fundamental block B2, fundamental block B4, fundamental block B5 and fundamental block B7 is T51.

The time that-order is carried out fundamental block B1, fundamental block B2, fundamental block B4, fundamental block B6 and fundamental block B7 is T52.

The time that-order is carried out fundamental block B1, fundamental block B3, fundamental block B4, fundamental block B5 and fundamental block B7 is T53.

The time that-order is carried out fundamental block B1, fundamental block B3, fundamental block B4, fundamental block B6 and fundamental block B7 is T54.

In this case, the average execution time of program can be expressed as follows shown in Fig. 5 A and Fig. 5 B.

ET1=T51*p1*p2+T52*p1* (1-p2)+T53* (1-p1) * p2+T54* (1-p1) * (1-p2)---------------(expression formula 1)

Further, make the following assumptions.

-in Figure 13 from middle code S52 begin to the execution time of intermediate code S112 be T131.

-from middle code S52 begin to the execution time of intermediate code S203 be T132.

-from middle code S52 begin to the execution time of intermediate code S202 be T133.

In this case, the average execution time of program can be expressed as follows as shown in figure 13.

ET2=T131*p1*p2+T132* (1-p2)+T52*p1* (1-p2)+T54* (1-p1) * (1-p2)+T133* (1-p1) * p2+T53* (1-p1) * p2+T54* (1-p1) * (1-p2)--------(expression formula 2)

At this moment, when judging average execution time ET2, be used for the processing (second execution route conversion judgment device) of program shown in Figure 13 that Fig. 5 A and Fig. 5 B program are converted to less than average execution time ET1.Similarly,, can calculate the average execution time, select to be transformed into program then with less average execution time program being converted in the processing of Figure 16, Figure 20, Figure 22 and program shown in Figure 32.

In program as shown in figure 16, make the following assumptions.

-beginning up to the execution time of intermediate code S112 from middle code S12 is T161.

-beginning up to the execution time of intermediate code S202 from middle code S12 is T162.

-beginning up to the execution time of intermediate code S203 from middle code S12 is T163.

-the unusual probability of generation is p3 in the intermediate code S10 shown in Fig. 5 A and Fig. 5 B.

In this case, the average execution time of program can be expressed as follows as shown in Figure 16.

ET3={T161*p1*p2+T162* (1-p1) * p2+T53* (1-p1) * p2+T54* (1-p1) * (1-p2)+T163* (1-p2)+T52*p1* (1-p2)+T54* (1-p1) * (1-p2) } * (1-p3)+{ T162+T52*p1* (1-p2)+T54* (1-p1) * (1-p2) } * p3-----(expression formula 3) (the 4th execution route conversion judgment device)

Further, in program as shown in figure 20, make the following assumptions.

-beginning up to the execution time of intermediate code S152 from middle code S121 is T201.

-beginning up to the execution time of intermediate code S411 from middle code S121 is T202.

-beginning up to the execution time of intermediate code S412 from middle code S121 is T203.

-beginning up to the execution time of intermediate code S202 from middle code S121 is T204.

The probability that among-variable b and the e each fundamental block B1 porch in Fig. 5 has value " 5 " and " 8 " is respectively p4 and p5.

In this case, the average execution time of program can be expressed as follows as shown in Figure 20.

ET4=T201*p1*p4*p5+ (T202+ET1) * (1-p4)+(T203+ET1) * p4* (1-p5)+{ T204+T53* (1-p1) * p2+T54* (1-p1) * (1-p2) } * (1-p1) * p4*p5---(expression formula 4)

Further, in program as shown in figure 22, make the following assumptions.

-beginning up to the execution time of intermediate code S152 from middle code S121 is T221.

-beginning up to the execution time of intermediate code S413 from middle code S121 is T222.

-beginning up to the execution time of intermediate code S414 from middle code S121 is T223.

-beginning up to the execution time of intermediate code S202 from middle code S121 is T224.

In this case, the average execution time of program can be expressed as follows as shown in Figure 22.

ET5=T221*p1*p4*p5+ (T222+ET2) * (1-p4)+(T223+ET2) * p4* (1-p5)+{ T224+T53* (1-p1) * p2+T54* (1-p1) * (1-p2) } * (1-p1) * p4*p5---(expression formula 5)

(the 6th execution route conversion judgment device)

Further, in program shown in figure 32, make the following assumptions.

-order is carried out fundamental block B31, fundamental block B41, fundamental block B51 and fundamental block B71 in Figure 32 execution time is T321.

The execution time that-order is carried out fundamental block B31, fundamental block B41, fundamental block B61 and fundamental block B71 is T322.

The execution time that-order is carried out fundamental block B61 and fundamental block B71 is T323.

-beginning up to the execution time of intermediate code S151 from middle code S12 is T324.

-beginning up to the execution time of intermediate code S202 from middle code S12 is T325.

-beginning up to the execution time of intermediate code S203 from middle code S12 is T326.

In this case, the average execution time of program can be expressed as follows as shown in Figure 32.

ET6=T324*p1*p2+T325* (1-p1)+T321*p2+T322* (1-p2)+(T326+T322) * p1* (1-p2)--(expression formula 6)

Optimize unit 2 according to the comparison that the average execution time ET1 that calculates in the above described manner, average execution time ET2, average execution time ET3, average execution time ET4, average execution time ET5 and average execution time ET6 are carried out, following control transformation is handled.That is average execution time ET1 hour, by itself output, and did not change program among Fig. 5 in the middle of all average execution time.When other average execution time hour, with the conversion output of minimum average B configuration execution time as final intermediate code.

＜additional explanation 〉

As above, described according to compiler apparatus of the present invention with reference to embodiment and improvement example.But, need not to emphasize that the present invention is not limited to these embodiment and improves example.

(1) as in program shown in Figure 11, under not generating unusual condition, carry out＜improve example 2〉in program conversion.Yet,, can when considering that generation is unusual, carry out the program conversion as in program shown in Figure 14.Further, as in program shown in Figure 29, can under the situation that is generated to the middle branch of part intermediate code string, carry out the program conversion.

(2)＜improve example 3 in, according to the program among Figure 11, it is switched to and does not generate unusual program among Figure 13, and the fundamental block B174 in the program of Figure 22 further is added to by this way in the program converted.Yet according to program among Figure 14, it also is switched to the program of having considered unusual generation among Figure 16, and the fundamental block B174 in the program of Figure 22 further is added to by this way in the program converted.

(3) in an embodiment, described＜improved example 2 respectively〉and＜improvement example 4 〉.Yet, also can make up＜improve example 2〉and＜improvement example 4 〉.For example, in execution＜improvement example 2〉the program of Figure 20 in, can further carry out＜improve example 4 to fundamental block B1-B7〉thus in the program conversion convert thereof into the program of Figure 33.

Similarly, also can make up＜improve example 3〉and＜improvement example 4 〉.For example, in execution＜improvement example 3〉Figure 22 in program in, can carry out＜improve example 4 to fundamental block B1-B7〉in the program conversion to convert thereof into the program (B201 is identical with B503 among two figure) among Figure 34 and Figure 35.But, in the program of Figure 34 and Figure 35, be performed the processing that comes from the medial fascicle of high speed piece H7 to the outside, be the processing of in the program of Fig. 5, being carried out, so that do not carry out hot path HP.Therefore, in the program of Figure 34 and Figure 35, select to carry out the hot path of frequency as having second height, and improved the speed in selected path through the path of fundamental block B1, fundamental block B3, fundamental block B4, fundamental block B5 and fundamental block B7.

In addition, can be by merging＜embodiment〉and＜improve example 1 〉-＜improve example 4〉use other improvement.Can construct by merging＜embodiment at an easy rate with the method described in the embodiment and＜improve example 1 〉-＜improve example 4〉the new compiler apparatus that obtains.

(4) in an embodiment, after the operation of intermediate code scheduler 2B, start resource allocation unit 3.But, in contrast, also can start resource allocation unit 3 earlier, restart intermediate code scheduler 2B after this.

(5) do not provide about comprising the description that embodiment carried out of round-robin hot path.But, can perhaps use the program conversion that whole circulation is thought of as the embodiment that is equivalent to single intermediate code with the program transformation applications of embodiment in to the circulation of innermost layer or the program after the loop unrolling.Further, can also be according to embodiment application program conversion from interior loop to outer round-robin incremental steps.For example, in the program of Figure 36 A, when the hot path of interior loop L1 is path through intermediate code S1, intermediate code S2 and intermediate code S4, program conversion that can Application Example.Like this, can as the program among Figure 36 B, generate high speed piece H124.Further, as the program among Figure 36 C, for example, when whole circulation L1 be taken as new intermediate code S20 and the L2 that for example circulates in hot path when being path through intermediate code S6, intermediate code S7, intermediate code S20, intermediate code S8, intermediate code S9 and intermediate code S11, can as the situation of circulation L1, the program of Application Example change.

(6) further, the present invention can wherein have program recorded thereon or digital signal, for example floppy disk, hard disk, CD-ROM, MO, DVD, DVD-ROM, DVD-RAM, semiconductor memory or the like as the recording medium that can be read by computing machine.In addition, the present invention can be as computer program or the digital signal passed through such as the Network Transmission of telecommunication line, wired or wireless electrical communication lines or the Internet etc.

The present invention is described in detail with reference to most preferred embodiment.But, can merge and improve each composition department, and not break away from the spirit of claims and wide protection domain.

Claims

1, a kind of source program that is used for comprising branch instruction is converted to the compiler apparatus of target program, and described target program is a string object code, and described device comprises:

The described first run time version maker generates the first execution route code, by will be on the execution route specified by described execution route designated equipment that define and variable that need appear at the porch of described appointment execution route replace with another variable and obtain this first execution route code;

Described first dependency parser is calculated dependence according to the analysis that the dependence between the instruction on the described appointment execution route is carried out, increase described assurance code and and described appointment execution route on the corresponding described branch code of described conditional branch instructions between dependence, thereby make and carry out after the described conditional branch instructions of described assurance code on described appointment execution route, thereby and increase dependence between the instruction make do not generate unusual; With

2, compiler apparatus according to claim 1 is used as circulation included in the described source program as single instruction, and described device further comprises the cycling element treatment facility, wherein

3, compiler apparatus according to claim 1, further comprise first execution route conversion judgment device, wherein said first execution route conversion judgment device judges according to the execution probability of described appointment execution route whether the described program after carrying out described parallelization equipment is taken as described object code.

4, compiler apparatus according to claim 1 further comprises second execution route conversion judgment device, wherein said second execution route conversion judgment device:

According to the execution time and the described execution probability of object code described in the described appointment execution route after carrying out described parallelization equipment, the average execution time of calculating described appointment execution route;

5, compiler apparatus according to claim 1 comprises that further reentry point is provided with the instruction code maker and second dependency parser, wherein:

When described appointment execution route the term of execution generate when unusual, described reentry point is provided with the instruction code that the increase of instruction code maker is used to stipulate the reentry point on the described appointment execution route; With

6, compiler apparatus according to claim 5, comprise that further the processing routine of interrupting generation place increases device, wherein when generation is unusual, the processing routine of described interruption generation place increases device and increases by a processing routine to described object code, and this processing routine is used to return the described reentry point by described instruction code appointment.

7, compiler apparatus according to claim 6, further comprise the 3rd execution route conversion judgment device, wherein said the 3rd execution route conversion judgment device generates unusual probability according to the execution probability of described appointment execution route with after carrying out described parallelization equipment on described execution route, judge whether the described program after carrying out described parallelization equipment is taken as described object code.

8, compiler apparatus according to claim 7 further comprises the 4th execution route conversion judgment device, wherein said the 4th execution route conversion judgment device:

According to the described execution probability of described appointment execution route, generate described unusual described probability, after carrying out described parallelization equipment described the above object code of execution route execution time and increase execution time of object code described in the described processing routine that device increased by the processing routine of described generation interruptions, calculate the average execution time of described processing routine and average execution time of described appointment execution route after the described parallelization equipment of execution;

9, compiler apparatus according to claim 8 further comprises the second execution route code generator, wherein:

10, compiler apparatus according to claim 9, further comprise the 5th execution route conversion judgment device, wherein said the 5th execution route conversion judgment device judges whether to carry out the described second execution route code generator according to the described execution probability of described appointment execution route and the probability of the described variable maintenance particular value on the described appointment execution route.

11, compiler apparatus according to claim 10 further comprises the 6th execution route conversion judgment device, wherein said the 6th execution route conversion judgment device:

12, compiler apparatus according to claim 11 further comprises the 3rd execution route code generator and the second branch code maker, wherein:

13, compiler apparatus according to claim 12 further comprises the 7th execution route conversion judgment device, wherein said the 7th execution route conversion judgment device:

14, a kind of source program that is used for comprising branch instruction is converted to the compiler apparatus of target program, and described target program is a string object code, and described device comprises:

When the branch condition of carrying out described appointment execution route is false, described branch code maker is according to the condition of the conditional branch instructions on the described appointment execution route, generate a branch code, thereby make the branch target of described the above conditional branch instructions of appointment execution route be designated as the branch target under the invalid situation of described branch condition in the described partial code;

The analysis that described dependency parser basis is carried out the dependence between the instruction on the described appointment execution route comes the dependence between the computations, and increase the instruction be present in the fundamental block and the dependence between the described conditional branch instructions simultaneously, can not be thereby make by from the fundamental block that appears at described a plurality of controls interflow, and the instruction in described appointment execution route, skip the described conditional branch instructions found and transfer processing along the terminal point direction of described execution route, described dependency parser also increases the dependence between described instruction and the described conditional branch instructions, can not be by never appearing in the described fundamental block thereby make, and the described instruction in described appointment execution route is skipped described conditional branch instructions and transfer processing; With

15, compiler apparatus according to claim 14 further comprises converging the defining variable replacement equipment and converging defining variable guaranteeing code generator, wherein:

16, compiler apparatus according to claim 15, further comprise first execution route conversion judgment device, wherein said first execution route conversion judgment device judges according to the described execution probability of described appointment execution route whether the described program after carrying out described parallelization equipment is taken as described object code.

17, compiler apparatus according to claim 16 further comprises second execution route conversion judgment device, wherein said second execution route conversion judgment device:

18, a kind of source program that is used for comprising branch instruction is converted to the compiler apparatus of target program, and described target program is a string object code, and described device comprises:

Execution route designated equipment, the first execution route code generator, first guarantee code generator, the second execution route code generator, converge the defining variable replacement equipment, converge defining variable guarantees that code generator, the 3rd execution route code generator, second guarantee code generator, partial code maker, the first branch code maker, the second branch code maker, the 3rd branch code maker, dependency parser and parallelization equipment, wherein:

When the described branch condition of carrying out described appointment execution route is false, the described first branch code maker is according to the condition of the conditional branch instructions in described the 3rd execution route code, generate first branch code, thereby make the branch target of the described conditional branch instructions in described the 3rd execution route be designated as the branch target under the invalid situation of described branch condition in described partial code;

19, a kind of source program that is used for comprising branch instruction is converted to the compiler method of target program, and described target program is a string object code, and described method comprises the following steps:

First run time version generates step, be used to generate the first execution route code, by will be on the execution route specified by described execution route given step that define and variable that need appear at the porch of described appointment execution route replace with another variable and obtain this first execution route code;

20, compiler method according to claim 19 further may further comprise the steps:

The described second dependency analysis step does not increase by the described first dependency analysis step and increases between described instruction to avoid generating those unusual dependences.

21, compiler method according to claim 20, comprise that further the processing routine of interrupting generation place increases step, be used for increasing by one to described object code and handling routine when generation is unusual, this processing routine is used to return the described reentry point by described instruction code appointment.

22, a kind of source program that is used for comprising branch instruction is converted to the compiler method of target program, and described target program is a string object code, said method comprising the steps of:

Converge defining variable and guarantee that code generates step, be used to generate the variable that is used for described second another variable is reverted to original variable and guarantee code, described second another variable is second another variable and the described exit that need appear at the described part strings of commands;

First branch code generates step, be used for when the branch condition of carrying out described appointment execution route is false, condition according to the conditional branch instructions in described the 3rd execution route code, generate first branch code, thereby make the branch target of the described conditional branch instructions in described the 3rd execution route code be designated as the branch target under the invalid situation of described branch condition in described partial code;

The parallelization step is used for rearranging the described instruction on the described appointment execution route according to the described dependence between the described instruction of being calculated by described dependency analysis step.

23, a kind of source program that is used for comprising branch instruction is converted to the compiler program of target program, and described target program is a string object code, and described compiler program makes computing machine carry out following steps:

24, compiler program according to claim 23 further comprises the following steps of being carried out by described computing machine:

25, compiler program according to claim 24, further comprise the following steps of being carried out by described computing machine: the processing routine of interrupting generation place increases step, be used for when generation is unusual, increase by one to described object code and handle routine, this processing routine is used to return the described reentry point by described instruction code appointment.

26, a kind of source program that is used for comprising branch instruction is converted to the compiler program of target program, and described target program is a string object code, and described compiler program makes computing machine carry out following steps:

First branch code generates step, when the branch condition of carrying out described appointment execution route is false, described first branch code generates the condition of step according to the conditional branch instructions in described the 3rd execution route code, generate first branch code, thereby make the branch target of the described conditional branch instructions on described the 3rd execution route code be designated as the branch target under the invalid situation of described branch condition in described partial code;